Home
last modified time | relevance | path

Searched refs:PMCR_EL0 (Results 1 - 8 of 8) sorted by relevance

/kernel/linux/linux-6.6/arch/arm64/kvm/
H A Dpmu-emul.c75 u64 val = __vcpu_sys_reg(kvm_pmc_to_vcpu(pmc), PMCR_EL0); in kvm_pmc_has_64bit_overflow()
253 u64 val = __vcpu_sys_reg(vcpu, PMCR_EL0) >> ARMV8_PMU_PMCR_N_SHIFT; in kvm_pmu_valid_counter_mask()
275 if (!(__vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_E) || !val) in kvm_pmu_enable_counter_mask()
327 if ((__vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_E)) { in kvm_pmu_overflow_status()
429 if (!(__vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_E)) in kvm_pmu_counter_increment()
542 /* Fixup PMCR_EL0 to reconcile the PMU version and the LP bit */ in kvm_pmu_handle_pmcr()
547 __vcpu_sys_reg(vcpu, PMCR_EL0) = val & ~(ARMV8_PMU_PMCR_C | ARMV8_PMU_PMCR_P); in kvm_pmu_handle_pmcr()
572 return (__vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_E) && in kvm_pmu_counter_is_enabled()
H A Dsys_regs.c767 /* No PMU available, PMCR_EL0 may UNDEF... */ in reset_pmcr()
771 /* Only preserve PMCR_EL0.N, and reset the rest to 0 */ in reset_pmcr()
825 val = __vcpu_sys_reg(vcpu, PMCR_EL0); in access_pmcr()
833 val = __vcpu_sys_reg(vcpu, PMCR_EL0) in access_pmcr()
882 pmcr = __vcpu_sys_reg(vcpu, PMCR_EL0); in pmu_counter_idx_valid()
2169 { PMU_SYS_REG(PMCR_EL0), .access = access_pmcr,
2170 .reset = reset_pmcr, .reg = PMCR_EL0 },
H A Darm.c805 __vcpu_sys_reg(vcpu, PMCR_EL0)); in check_vcpu_requests()
H A Demulate-nested.c1609 SR_FGT(SYS_PMCR_EL0, HDFGWTR, PMCR_EL0, 1),
/kernel/linux/linux-5.10/arch/arm64/kvm/
H A Dpmu-emul.c46 __vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_LC); in kvm_pmu_idx_is_64bit()
292 u64 val = __vcpu_sys_reg(vcpu, PMCR_EL0) >> ARMV8_PMU_PMCR_N_SHIFT; in kvm_pmu_valid_counter_mask()
314 if (!(__vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_E) || !val) in kvm_pmu_enable_counter_mask()
372 if ((__vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_E)) { in kvm_pmu_overflow_status()
520 if (!(__vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_E)) in kvm_pmu_software_increment()
589 return (__vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_E) && in kvm_pmu_counter_is_enabled()
H A Dsys_regs.c672 /* No PMU available, PMCR_EL0 may UNDEF... */ in reset_pmcr()
678 * Writable bits of PMCR_EL0 (ARMV8_PMU_PMCR_MASK) are reset to UNKNOWN in reset_pmcr()
732 val = __vcpu_sys_reg(vcpu, PMCR_EL0); in access_pmcr()
737 __vcpu_sys_reg(vcpu, PMCR_EL0) = val; in access_pmcr()
742 val = __vcpu_sys_reg(vcpu, PMCR_EL0) in access_pmcr()
793 pmcr = __vcpu_sys_reg(vcpu, PMCR_EL0); in pmu_counter_idx_valid()
1620 { SYS_DESC(SYS_PMCR_EL0), access_pmcr, reset_pmcr, PMCR_EL0 },
/kernel/linux/linux-5.10/arch/arm64/include/asm/
H A Dkvm_host.h161 PMCR_EL0, /* Control Register */ enumerator
/kernel/linux/linux-6.6/arch/arm64/include/asm/
H A Dkvm_host.h323 PMCR_EL0, /* Control Register */ enumerator

Completed in 18 milliseconds