Searched refs:PMCNTENSET_EL0 (Results 1 - 6 of 6) sorted by relevance
| /kernel/linux/linux-6.6/arch/arm64/kvm/ |
| H A D | pmu-emul.c | 329 reg &= __vcpu_sys_reg(vcpu, PMCNTENSET_EL0); in kvm_pmu_overflow_status()
433 mask &= __vcpu_sys_reg(vcpu, PMCNTENSET_EL0); in kvm_pmu_counter_increment()
551 __vcpu_sys_reg(vcpu, PMCNTENSET_EL0)); in kvm_pmu_handle_pmcr()
554 __vcpu_sys_reg(vcpu, PMCNTENSET_EL0)); in kvm_pmu_handle_pmcr()
573 (__vcpu_sys_reg(vcpu, PMCNTENSET_EL0) & BIT(pmc->idx)); in kvm_pmu_counter_is_enabled()
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| H A D | sys_regs.c | 1009 /* accessing PMCNTENSET_EL0 */ in access_pmcnten()
1010 __vcpu_sys_reg(vcpu, PMCNTENSET_EL0) |= val; in access_pmcnten()
1015 __vcpu_sys_reg(vcpu, PMCNTENSET_EL0) &= ~val; in access_pmcnten()
1019 p->regval = __vcpu_sys_reg(vcpu, PMCNTENSET_EL0); in access_pmcnten()
2171 { PMU_SYS_REG(PMCNTENSET_EL0),
2172 .access = access_pmcnten, .reg = PMCNTENSET_EL0 },
2174 .access = access_pmcnten, .reg = PMCNTENSET_EL0 },
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| /kernel/linux/linux-5.10/arch/arm64/kvm/ |
| H A D | pmu-emul.c | 374 reg &= __vcpu_sys_reg(vcpu, PMCNTENSET_EL0); in kvm_pmu_overflow_status()
524 val &= __vcpu_sys_reg(vcpu, PMCNTENSET_EL0); in kvm_pmu_software_increment()
572 __vcpu_sys_reg(vcpu, PMCNTENSET_EL0) & mask); in kvm_pmu_handle_pmcr()
590 (__vcpu_sys_reg(vcpu, PMCNTENSET_EL0) & BIT(select_idx)); in kvm_pmu_counter_is_enabled()
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| H A D | sys_regs.c | 915 /* accessing PMCNTENSET_EL0 */ in access_pmcnten()
916 __vcpu_sys_reg(vcpu, PMCNTENSET_EL0) |= val; in access_pmcnten()
921 __vcpu_sys_reg(vcpu, PMCNTENSET_EL0) &= ~val; in access_pmcnten()
925 p->regval = __vcpu_sys_reg(vcpu, PMCNTENSET_EL0) & mask; in access_pmcnten()
1621 { SYS_DESC(SYS_PMCNTENSET_EL0), access_pmcnten, reset_unknown, PMCNTENSET_EL0 },
1622 { SYS_DESC(SYS_PMCNTENCLR_EL0), access_pmcnten, reset_unknown, PMCNTENSET_EL0 },
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| /kernel/linux/linux-5.10/arch/arm64/include/asm/ |
| H A D | kvm_host.h | 169 PMCNTENSET_EL0, /* Count Enable Set Register */ enumerator
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| /kernel/linux/linux-6.6/arch/arm64/include/asm/ |
| H A D | kvm_host.h | 331 PMCNTENSET_EL0, /* Count Enable Set Register */ enumerator
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