| /kernel/linux/linux-5.10/arch/arm/mach-davinci/ |
| H A D | pm.c | 51 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
53 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
58 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
60 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
75 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
77 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
80 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
82 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
88 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
90 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
[all...] |
| H A D | sleep.S | 78 ldr ip, [r3, #PLLCTL]
81 str ip, [r3, #PLLCTL]
89 ldr ip, [r3, #PLLCTL]
91 str ip, [r3, #PLLCTL]
109 ldr ip, [r3, #PLLCTL]
111 str ip, [r3, #PLLCTL]
114 ldr ip, [r3, #PLLCTL]
116 str ip, [r3, #PLLCTL]
123 ldr ip, [r3, #PLLCTL]
125 str ip, [r3, #PLLCTL]
[all...] |
| H A D | clock.h | 13 #define PLLCTL 0x100 macro
|
| /kernel/linux/linux-6.6/arch/arm/mach-davinci/ |
| H A D | pm.c | 50 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
52 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
57 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
59 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
74 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
76 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
79 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
81 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
87 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
89 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); in davinci_pm_suspend()
[all...] |
| H A D | sleep.S | 78 ldr ip, [r3, #PLLCTL]
81 str ip, [r3, #PLLCTL]
89 ldr ip, [r3, #PLLCTL]
91 str ip, [r3, #PLLCTL]
109 ldr ip, [r3, #PLLCTL]
111 str ip, [r3, #PLLCTL]
114 ldr ip, [r3, #PLLCTL]
116 str ip, [r3, #PLLCTL]
123 ldr ip, [r3, #PLLCTL]
125 str ip, [r3, #PLLCTL]
[all...] |
| H A D | clock.h | 13 #define PLLCTL 0x100 macro
|
| /kernel/linux/linux-5.10/drivers/clk/davinci/ |
| H A D | pll.c | 36 #define PLLCTL 0x100 macro
314 ctrl = readl(pll->base + PLLCTL); in davinci_pllen_rate_change()
319 writel(ctrl, pll->base + PLLCTL); in davinci_pllen_rate_change()
325 writel(ctrl, pll->base + PLLCTL); in davinci_pllen_rate_change()
331 writel(ctrl, pll->base + PLLCTL); in davinci_pllen_rate_change()
337 writel(ctrl, pll->base + PLLCTL); in davinci_pllen_rate_change()
388 * If a PLL has PLLCTL[CLKMODE], then it is the primary PLL. in davinci_pll_clk_register()
394 * mean the signal after the PLLCTL[CLKMODE] switch. in davinci_pll_clk_register()
967 DEBUG_REG(PLLCTL),
|
| /kernel/linux/linux-6.6/drivers/clk/davinci/ |
| H A D | pll.c | 36 #define PLLCTL 0x100 macro
314 ctrl = readl(pll->base + PLLCTL); in davinci_pllen_rate_change()
319 writel(ctrl, pll->base + PLLCTL); in davinci_pllen_rate_change()
325 writel(ctrl, pll->base + PLLCTL); in davinci_pllen_rate_change()
331 writel(ctrl, pll->base + PLLCTL); in davinci_pllen_rate_change()
337 writel(ctrl, pll->base + PLLCTL); in davinci_pllen_rate_change()
388 * If a PLL has PLLCTL[CLKMODE], then it is the primary PLL. in davinci_pll_clk_register()
394 * mean the signal after the PLLCTL[CLKMODE] switch. in davinci_pll_clk_register()
951 DEBUG_REG(PLLCTL),
|
| /kernel/linux/linux-5.10/arch/c6x/include/asm/ |
| H A D | clock.h | 22 #define PLLCTL 0x100 macro
58 /* PLLCTL register bits */
|
| /kernel/linux/linux-5.10/sound/pci/ctxfi/ |
| H A D | cthw20k1.c | 1314 if (hw_read_20kx(hw, PLLCTL) == pllctl) in hw_pll_init()
1317 hw_write_20kx(hw, PLLCTL, pllctl); in hw_pll_init()
1963 data = hw_read_20kx(hw, PLLCTL); in hw_card_stop()
1964 hw_write_20kx(hw, PLLCTL, (data & (~(0x0F<<12)))); in hw_card_stop()
|
| H A D | ct20k1reg.h | 612 #define PLLCTL 0x1C6060 macro
|
| /kernel/linux/linux-6.6/sound/pci/ctxfi/ |
| H A D | cthw20k1.c | 1314 if (hw_read_20kx(hw, PLLCTL) == pllctl) in hw_pll_init()
1317 hw_write_20kx(hw, PLLCTL, pllctl); in hw_pll_init()
1959 data = hw_read_20kx(hw, PLLCTL); in hw_card_stop()
1960 hw_write_20kx(hw, PLLCTL, (data & (~(0x0F<<12)))); in hw_card_stop()
|
| H A D | ct20k1reg.h | 612 #define PLLCTL 0x1C6060 macro
|
| /kernel/linux/linux-5.10/arch/c6x/platforms/ |
| H A D | pll.c | 275 ctrl = pll_read(pll, PLLCTL); in clk_pllclk_recalc()
|