| /kernel/linux/linux-6.6/arch/s390/crypto/ |
| H A D | chacha-s390.S | 468 #define D5 %v23 define
512 VAF D5,D2,T3 # K[3]+5
537 VX D5,D5,A5
543 VERLLF D5,D5,16
550 VAF C5,C5,D5
575 VX D5,D5,A5
581 VERLLF D5,D
[all...] |
| /kernel/linux/linux-5.10/arch/m68k/fpsp040/ |
| H A D | srem_mod.S | 117 movel 8(%a0),%d5 | ...(D3,D4,D5) is |Y|
133 subl %d6,%d3 | ...(D3,D4,D5) is normalized
142 movel %d5,%d7 | ...a copy of D5
147 orl %d7,%d4 | ...(D3,D4,D5) normalized
152 addil #0x00003FFE,%d3 | ...(D3,D4,D5) normalized
226 |..At this point carry = 0, R = (D1,D2), Y = (D4,D5)
|
| H A D | decbin.S | 11 | Saves and Modifies: D2-D5
|
| /kernel/linux/linux-6.6/arch/m68k/fpsp040/ |
| H A D | srem_mod.S | 117 movel 8(%a0),%d5 | ...(D3,D4,D5) is |Y|
133 subl %d6,%d3 | ...(D3,D4,D5) is normalized
142 movel %d5,%d7 | ...a copy of D5
147 orl %d7,%d4 | ...(D3,D4,D5) normalized
152 addil #0x00003FFE,%d3 | ...(D3,D4,D5) normalized
226 |..At this point carry = 0, R = (D1,D2), Y = (D4,D5)
|
| H A D | decbin.S | 11 | Saves and Modifies: D2-D5
|
| /kernel/linux/linux-5.10/drivers/pinctrl/aspeed/ |
| H A D | pinctrl-aspeed-g5.c | 1211 #define D5 162 macro
1212 SIG_EXPR_LIST_DECL_SINGLE(D5, GPIOU2, GPIOU2, SIG_DESC_SET(SCUA0, 10));
1213 SIG_EXPR_LIST_DECL_SINGLE(D5, RMII2DASH0, RMII2, RMII2_DESC);
1214 SIG_EXPR_LIST_DECL_SINGLE(D5, RGMII2TXD2, RGMII2);
1215 PIN_DECL_(D5, SIG_EXPR_LIST_PTR(D5, GPIOU2), SIG_EXPR_LIST_PTR(D5, RMII2DASH0),
1216 SIG_EXPR_LIST_PTR(D5, RGMII2TXD2));
1312 FUNC_GROUP_DECL(RGMII2, B2, B1, A2, B3, D5, D4, C2, C1, C3, D1, D2, E6);
1989 ASPEED_PINCTRL_PIN(D5),
[all...] |
| H A D | pinctrl-aspeed-g6.c | 1295 #define D5 210 macro
1296 SIG_EXPR_LIST_DECL_SESG(D5, RGMII1TXD0, RGMII1, SIG_DESC_SET(SCU400, 2),
1298 SIG_EXPR_LIST_DECL_SESG(D5, RMII1TXD0, RMII1, SIG_DESC_SET(SCU400, 2),
1300 PIN_DECL_2(D5, GPIO18A2, RGMII1TXD0, RMII1TXD0);
1359 FUNC_GROUP_DECL(RGMII1, C6, D6, D5, A3, C5, E6, B3, A2, B2, B1, C4, E5);
1360 FUNC_GROUP_DECL(RMII1, C6, D6, D5, A3, B3, B2, B1, C4, E5);
1785 ASPEED_PINCTRL_PIN(D5),
|
| H A D | pinctrl-aspeed-g4.c | 113 #define D5 7 macro
114 SIG_EXPR_LIST_DECL_SINGLE(D5, MDIO2, MDIO2, MDIO2_DESC);
115 SIG_EXPR_LIST_DECL_SINGLE(D5, TIMER8, TIMER8, SIG_DESC_SET(SCU80, 7));
116 PIN_DECL_2(D5, GPIOA7, MDIO2, TIMER8);
118 FUNC_GROUP_DECL(TIMER8, D5);
119 FUNC_GROUP_DECL(MDIO2, A3, D5);
1999 ASPEED_PINCTRL_PIN(D5),
2442 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, D6, D5, SCU8C, 16),
2443 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, D6, D5, SCU8C, 16),
|
| /kernel/linux/linux-6.6/drivers/pinctrl/aspeed/ |
| H A D | pinctrl-aspeed-g5.c | 1211 #define D5 162 macro
1212 SIG_EXPR_LIST_DECL_SINGLE(D5, GPIOU2, GPIOU2, SIG_DESC_SET(SCUA0, 10));
1213 SIG_EXPR_LIST_DECL_SINGLE(D5, RMII2DASH0, RMII2, RMII2_DESC);
1214 SIG_EXPR_LIST_DECL_SINGLE(D5, RGMII2TXD2, RGMII2);
1215 PIN_DECL_(D5, SIG_EXPR_LIST_PTR(D5, GPIOU2), SIG_EXPR_LIST_PTR(D5, RMII2DASH0),
1216 SIG_EXPR_LIST_PTR(D5, RGMII2TXD2));
1312 FUNC_GROUP_DECL(RGMII2, B2, B1, A2, B3, D5, D4, C2, C1, C3, D1, D2, E6);
1989 ASPEED_PINCTRL_PIN(D5),
[all...] |
| H A D | pinctrl-aspeed-g4.c | 113 #define D5 7 macro
114 SIG_EXPR_LIST_DECL_SINGLE(D5, MDIO2, MDIO2, MDIO2_DESC);
115 SIG_EXPR_LIST_DECL_SINGLE(D5, TIMER8, TIMER8, SIG_DESC_SET(SCU80, 7));
116 PIN_DECL_2(D5, GPIOA7, MDIO2, TIMER8);
118 FUNC_GROUP_DECL(TIMER8, D5);
119 FUNC_GROUP_DECL(MDIO2, A3, D5);
1999 ASPEED_PINCTRL_PIN(D5),
2442 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, D6, D5, SCU8C, 16),
2443 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, D6, D5, SCU8C, 16),
|
| H A D | pinctrl-aspeed-g6.c | 1312 #define D5 210 macro
1313 SIG_EXPR_LIST_DECL_SESG(D5, RGMII1TXD0, RGMII1, SIG_DESC_SET(SCU400, 2),
1315 SIG_EXPR_LIST_DECL_SESG(D5, RMII1TXD0, RMII1, SIG_DESC_SET(SCU400, 2),
1317 PIN_DECL_2(D5, GPIO18A2, RGMII1TXD0, RMII1TXD0);
1376 FUNC_GROUP_DECL(RGMII1, C6, D6, D5, A3, C5, E6, B3, A2, B2, B1, C4, E5);
1377 FUNC_GROUP_DECL(RMII1, C6, D6, D5, A3, B3, B2, B1, C4, E5);
1802 ASPEED_PINCTRL_PIN(D5),
|
| /kernel/linux/linux-5.10/drivers/pinctrl/renesas/ |
| H A D | pfc-r8a77970.c | 199 #define IP5_27_24 FM(VI1_DATA2) FM(CANFD0_TX_B) F_(0, 0) FM(D5) FM(MMC_D0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
585 PINMUX_IPSR_GPSR(IP5_27_24, D5),
|
| H A D | pfc-r8a77990.c | 80 #define GPSR0_5 F_(D5, IP6_11_8)
266 #define IP6_11_8 FM(D5) FM(RX3_A) FM(HRX3_B) F_(0, 0) F_(0, 0) FM(DU_DR5) FM(VI4_DATA4_B) F_(0, 0) FM(LCDOUT21) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
871 PINMUX_IPSR_GPSR(IP6_11_8, D5),
5121 [31] = RCAR_GP_PIN(0, 5), /* D5 */
|
| H A D | pfc-sh7734.c | 745 PINMUX_IPSR_GPSR(IP2_4_3, D5),
1422 GPIO_FN(D5), GPIO_FN(SD0_WP_A), GPIO_FN(MMC_D5_A), GPIO_FN(FD5_A),
|
| H A D | pfc-r8a77980.c | 232 #define IP5_27_24 FM(VI1_DATA2) FM(CANFD0_TX_B) F_(0, 0) FM(D5) FM(MMC_DS) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
663 PINMUX_IPSR_GPSR(IP5_27_24, D5),
|
| H A D | pfc-r8a77951.c | 92 #define GPSR0_5 F_(D5, IP6_3_0)
305 #define IP6_3_0 FM(D5) FM(MSIOF2_SYNC_B)F_(0, 0) F_(0, 0) FM(VI4_DATA21) FM(VI5_DATA5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
955 PINMUX_IPSR_GPSR(IP6_3_0, D5),
5772 { RCAR_GP_PIN(0, 5), 0, 3 }, /* D5 */
6036 [15] = RCAR_GP_PIN(0, 5), /* D5 */
|
| H A D | pfc-r8a77965.c | 97 #define GPSR0_5 F_(D5, IP6_3_0)
310 #define IP6_3_0 FM(D5) FM(MSIOF2_SYNC_B)F_(0, 0) F_(0, 0) FM(VI4_DATA21) FM(VI5_DATA5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
961 PINMUX_IPSR_GPSR(IP6_3_0, D5),
5977 { RCAR_GP_PIN(0, 5), 0, 3 }, /* D5 */
6237 [15] = RCAR_GP_PIN(0, 5), /* D5 */
|
| H A D | pfc-r8a7796.c | 97 #define GPSR0_5 F_(D5, IP6_3_0)
310 #define IP6_3_0 FM(D5) FM(MSIOF2_SYNC_B)F_(0, 0) F_(0, 0) FM(VI4_DATA21) FM(VI5_DATA5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
959 PINMUX_IPSR_GPSR(IP6_3_0, D5),
5724 { RCAR_GP_PIN(0, 5), 0, 3 }, /* D5 */
5984 [15] = RCAR_GP_PIN(0, 5), /* D5 */
|
| H A D | pfc-r8a77950.c | 92 #define GPSR0_5 F_(D5, IP6_3_0)
304 #define IP6_3_0 FM(D5) FM(MSIOF2_SYNC_B)F_(0, 0) F_(0, 0) FM(VI4_DATA21) FM(VI5_DATA5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
948 PINMUX_IPSR_GPSR(IP6_3_0, D5),
5403 { RCAR_GP_PIN(0, 5), 0, 3 }, /* D5 */
5665 [15] = RCAR_GP_PIN(0, 5), /* D5 */
|
| /kernel/linux/linux-6.6/drivers/pinctrl/renesas/ |
| H A D | pfc-r8a77970.c | 210 #define IP5_27_24 FM(VI1_DATA2) FM(CANFD0_TX_B) F_(0, 0) FM(D5) FM(MMC_D0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
594 PINMUX_IPSR_GPSR(IP5_27_24, D5),
|
| H A D | pfc-r8a77990.c | 80 #define GPSR0_5 F_(D5, IP6_11_8)
266 #define IP6_11_8 FM(D5) FM(RX3_A) FM(HRX3_B) F_(0, 0) F_(0, 0) FM(DU_DR5) FM(VI4_DATA4_B) F_(0, 0) FM(LCDOUT21) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
872 PINMUX_IPSR_GPSR(IP6_11_8, D5),
5177 [31] = RCAR_GP_PIN(0, 5), /* D5 */
|
| H A D | pfc-r8a77980.c | 244 #define IP5_27_24 FM(VI1_DATA2) FM(CANFD0_TX_B) F_(0, 0) FM(D5) FM(MMC_DS) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
672 PINMUX_IPSR_GPSR(IP5_27_24, D5),
|
| H A D | pfc-sh7734.c | 744 PINMUX_IPSR_GPSR(IP2_4_3, D5),
1421 GPIO_FN(D5), GPIO_FN(SD0_WP_A), GPIO_FN(MMC_D5_A), GPIO_FN(FD5_A),
|
| H A D | pfc-r8a779a0.c | 398 #define IP0SR2_19_16 FM(GP2_04) F_(0, 0) FM(MSIOF4_RXD) F_(0, 0) F_(0, 0) FM(D5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
956 PINMUX_IPSR_MSEL(IP0SR2_19_16, D5, SEL_I2C1_0),
|
| H A D | pfc-r8a77951.c | 91 #define GPSR0_5 F_(D5, IP6_3_0)
304 #define IP6_3_0 FM(D5) FM(MSIOF2_SYNC_B)F_(0, 0) F_(0, 0) FM(VI4_DATA21) FM(VI5_DATA5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
954 PINMUX_IPSR_GPSR(IP6_3_0, D5),
5715 { RCAR_GP_PIN(0, 5), 0, 3 }, /* D5 */
5978 [15] = RCAR_GP_PIN(0, 5), /* D5 */
|