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/kernel/linux/linux-5.10/arch/sparc/kernel/
H A Dcpu.c54 #define CPU(ver, _name) \ macro
68 CPU(0, "Fujitsu MB86900/1A or LSI L64831 SparcKIT-40"),
70 CPU(4, "Fujitsu MB86904"),
71 CPU(5, "Fujitsu TurboSparc MB86907"),
72 CPU(-1, NULL)
88 CPU(0, "LSI Logic Corporation - L64811"),
90 CPU(1, "Cypress/ROSS CY7C601"),
92 CPU(3, "Cypress/ROSS CY7C611"),
94 CPU(0xf, "ROSS HyperSparc RT620"),
95 CPU(
[all...]
/kernel/linux/linux-6.6/arch/sparc/kernel/
H A Dcpu.c54 #define CPU(ver, _name) \ macro
68 CPU(0, "Fujitsu MB86900/1A or LSI L64831 SparcKIT-40"),
70 CPU(4, "Fujitsu MB86904"),
71 CPU(5, "Fujitsu TurboSparc MB86907"),
72 CPU(-1, NULL)
88 CPU(0, "LSI Logic Corporation - L64811"),
90 CPU(1, "Cypress/ROSS CY7C601"),
92 CPU(3, "Cypress/ROSS CY7C611"),
94 CPU(0xf, "ROSS HyperSparc RT620"),
95 CPU(
[all...]
/kernel/linux/linux-5.10/drivers/media/pci/cx18/
H A Dcx18-mailbox.c20 static const char *rpu_str[] = { "APU", "CPU", "EPU", "HPU" };
36 API_ENTRY(CPU, CX18_CPU_SET_CHANNEL_TYPE, 0),
37 API_ENTRY(CPU, CX18_EPU_DEBUG, 0),
38 API_ENTRY(CPU, CX18_CREATE_TASK, 0),
39 API_ENTRY(CPU, CX18_DESTROY_TASK, 0),
40 API_ENTRY(CPU, CX18_CPU_CAPTURE_START, API_SLOW),
41 API_ENTRY(CPU, CX18_CPU_CAPTURE_STOP, API_SLOW),
42 API_ENTRY(CPU, CX18_CPU_CAPTURE_PAUSE, 0),
43 API_ENTRY(CPU, CX18_CPU_CAPTURE_RESUME, 0),
44 API_ENTRY(CPU, CX18_CPU_SET_CHANNEL_TYP
[all...]
/kernel/linux/linux-6.6/drivers/media/pci/cx18/
H A Dcx18-mailbox.c20 static const char *rpu_str[] = { "APU", "CPU", "EPU", "HPU" };
36 API_ENTRY(CPU, CX18_CPU_SET_CHANNEL_TYPE, 0),
37 API_ENTRY(CPU, CX18_EPU_DEBUG, 0),
38 API_ENTRY(CPU, CX18_CREATE_TASK, 0),
39 API_ENTRY(CPU, CX18_DESTROY_TASK, 0),
40 API_ENTRY(CPU, CX18_CPU_CAPTURE_START, API_SLOW),
41 API_ENTRY(CPU, CX18_CPU_CAPTURE_STOP, API_SLOW),
42 API_ENTRY(CPU, CX18_CPU_CAPTURE_PAUSE, 0),
43 API_ENTRY(CPU, CX18_CPU_CAPTURE_RESUME, 0),
44 API_ENTRY(CPU, CX18_CPU_SET_CHANNEL_TYP
[all...]
/kernel/linux/linux-5.10/arch/arm/common/
H A Dmcpm_head.S25 1902: .asciz "CPU"
56 mla r4, r3, r10, r9 @ r4 = canonical CPU index
60 /* We didn't expect this CPU. Try to cheaply make it quiet. */
88 @ Signal that this CPU is coming UP:
95 @ state, because there is at least one active CPU (this CPU).
123 @ Any CPU trying to take the cluster into CLUSTER_GOING_DOWN from this
176 @ If a platform-specific CPU setup hook is needed, it is
180 mov r0, #0 @ first (CPU) affinity level
184 @ Mark the CPU a
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/kernel/linux/linux-6.6/arch/arm/common/
H A Dmcpm_head.S27 1902: .asciz "CPU"
58 mla r4, r3, r10, r9 @ r4 = canonical CPU index
62 /* We didn't expect this CPU. Try to cheaply make it quiet. */
90 @ Signal that this CPU is coming UP:
97 @ state, because there is at least one active CPU (this CPU).
125 @ Any CPU trying to take the cluster into CLUSTER_GOING_DOWN from this
178 @ If a platform-specific CPU setup hook is needed, it is
182 mov r0, #0 @ first (CPU) affinity level
186 @ Mark the CPU a
[all...]
/kernel/linux/linux-5.10/arch/h8300/kernel/
H A Dsetup.c38 #define CPU "H8/300H" macro
40 #define CPU "H8S" macro
42 #define CPU "Unknown" macro
105 pr_notice("\r\n\nuClinux " CPU "\n"); in setup_arch()
122 * Get CPU information for use by the procfs.
129 cpu = CPU; in show_cpuinfo()
131 seq_printf(m, "CPU:\t\t%s\n" in show_cpuinfo()
/kernel/linux/linux-5.10/tools/perf/tests/
H A Dhists_output.c121 #define CPU(he) (he->cpu) macro
243 * Overhead CPU Command: Pid in test2()
269 CPU(he) == 1 && PID(he) == 100 && he->stat.period == 300); in test2()
274 CPU(he) == 0 && PID(he) == 100 && he->stat.period == 100); in test2()
475 * CPU Command: Pid Command Shared Object Symbol in test5()
505 CPU(he) == 0 && PID(he) == 100 && in test5()
512 CPU(he) == 2 && PID(he) == 200 && in test5()
519 CPU(he) == 1 && PID(he) == 300 && in test5()
526 CPU(he) == 0 && PID(he) == 300 && in test5()
533 CPU(h in test5()
[all...]
/kernel/linux/linux-6.6/tools/perf/tests/
H A Dhists_output.c134 #define CPU(he) (he->cpu) macro
256 * Overhead CPU Command: Pid in test2()
282 CPU(he) == 1 && PID(he) == 100 && he->stat.period == 300); in test2()
287 CPU(he) == 0 && PID(he) == 100 && he->stat.period == 100); in test2()
488 * CPU Command: Pid Command Shared Object Symbol in test5()
518 CPU(he) == 0 && PID(he) == 100 && in test5()
525 CPU(he) == 2 && PID(he) == 200 && in test5()
532 CPU(he) == 1 && PID(he) == 300 && in test5()
539 CPU(he) == 0 && PID(he) == 300 && in test5()
546 CPU(h in test5()
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/kernel/linux/linux-5.10/tools/testing/selftests/tc-testing/
H A DMakefile15 CPU ?= probe macro
17 CPU ?= generic macro
30 $(LLC) -march=bpf -mcpu=$(CPU) $(LLC_FLAGS) -filetype=obj -o $@
/kernel/linux/linux-6.6/tools/testing/selftests/tc-testing/
H A DMakefile13 CPU ?= probe macro
15 CPU ?= generic macro
28 $(LLC) -march=bpf -mcpu=$(CPU) $(LLC_FLAGS) -filetype=obj -o $@
/kernel/linux/linux-5.10/arch/arm/kernel/
H A Dhyp-stub.S14 * For the kernel proper, we need to find out the CPU boot mode long after
27 * Save the primary CPU boot mode. Requires 2 scratch registers.
36 * Compare the current mode with the one saved on the primary CPU.
44 cmp \mode, \reg1 @ matches primary CPU boot mode?
55 * The zImage loader only runs on one CPU, so we don't bother with mult-CPU
71 @ Call this from the primary CPU
91 * Once we have given up on one CPU, we do not try to install the
100 retne lr @ give up if the CPU is not in HYP mode
106 * Eventually, CPU
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/kernel/linux/linux-6.6/tools/testing/selftests/sgx/
H A Dtest_encl_bootstrap.S13 .fill 1, 8, 0 # STATE (set by CPU)
16 .fill 1, 4, 0 # CSSA (set by CPU)
27 .fill 1, 8, 0 # STATE (set by CPU)
30 .fill 1, 4, 0 # CSSA (set by CPU)
/kernel/linux/linux-6.6/arch/arm/kernel/
H A Dhyp-stub.S16 * For the kernel proper, we need to find out the CPU boot mode long after
29 * Save the primary CPU boot mode. Requires 2 scratch registers.
38 * Compare the current mode with the one saved on the primary CPU.
46 cmp \mode, \reg1 @ matches primary CPU boot mode?
57 * The zImage loader only runs on one CPU, so we don't bother with mult-CPU
73 @ Call this from the primary CPU
93 * Once we have given up on one CPU, we do not try to install the
102 retne lr @ give up if the CPU is not in HYP mode
108 * Eventually, CPU
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/kernel/linux/linux-5.10/drivers/clk/mxs/
H A Dclk-imx23.c23 #define CPU (CLKCTRL + 0x0020) macro
49 writel_relaxed(1 << BP_CPU_INTERRUPT_WAIT, CPU + SET); in clk_misc_init()
125 clks[cpu_pll] = mxs_clk_div("cpu_pll", "ref_cpu", CPU, 0, 6, 28); in mx23_clocks_init()
126 clks[cpu_xtal] = mxs_clk_div("cpu_xtal", "ref_xtal", CPU, 16, 10, 29); in mx23_clocks_init()
H A Dclk-imx28.c23 #define CPU (CLKCTRL + 0x0050) macro
84 writel_relaxed(1 << BP_CPU_INTERRUPT_WAIT, CPU + SET); in clk_misc_init()
190 clks[cpu_pll] = mxs_clk_div("cpu_pll", "ref_cpu", CPU, 0, 6, 28); in mx28_clocks_init()
191 clks[cpu_xtal] = mxs_clk_div("cpu_xtal", "ref_xtal", CPU, 16, 10, 29); in mx28_clocks_init()
/kernel/linux/linux-6.6/drivers/clk/mxs/
H A Dclk-imx23.c23 #define CPU (CLKCTRL + 0x0020) macro
49 writel_relaxed(1 << BP_CPU_INTERRUPT_WAIT, CPU + SET); in clk_misc_init()
125 clks[cpu_pll] = mxs_clk_div("cpu_pll", "ref_cpu", CPU, 0, 6, 28); in mx23_clocks_init()
126 clks[cpu_xtal] = mxs_clk_div("cpu_xtal", "ref_xtal", CPU, 16, 10, 29); in mx23_clocks_init()
H A Dclk-imx28.c23 #define CPU (CLKCTRL + 0x0050) macro
84 writel_relaxed(1 << BP_CPU_INTERRUPT_WAIT, CPU + SET); in clk_misc_init()
190 clks[cpu_pll] = mxs_clk_div("cpu_pll", "ref_cpu", CPU, 0, 6, 28); in mx28_clocks_init()
191 clks[cpu_xtal] = mxs_clk_div("cpu_xtal", "ref_xtal", CPU, 16, 10, 29); in mx28_clocks_init()
/kernel/linux/linux-5.10/arch/arm/mach-tegra/
H A Dreset-handler.S26 * CPU boot vector when restarting the a CPU following
31 * r8: CPU part number
46 /* Clear the flow controller flags for this CPU. */
54 @ & ext flags for CPU power mgnt
119 * Common handler for all CPU reset events.
125 * R7 = CPU present (to the OS) mask
126 * R8 = CPU in LP1 state mask
127 * R9 = CPU in LP2 state mask
128 * R10 = CPU numbe
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/kernel/linux/linux-6.6/arch/arm/mach-tegra/
H A Dreset-handler.S28 * CPU boot vector when restarting the a CPU following
33 * r8: CPU part number
48 /* Clear the flow controller flags for this CPU. */
56 @ & ext flags for CPU power mgnt
121 * Common handler for all CPU reset events.
127 * R7 = CPU present (to the OS) mask
128 * R8 = CPU in LP1 state mask
129 * R9 = CPU in LP2 state mask
130 * R10 = CPU numbe
[all...]
/kernel/linux/linux-5.10/arch/arm/mach-sa1100/
H A Dsleep.S50 @ Adjust memory timing before lowering CPU clock
53 @ delay 90us and set CPU PLL to lowest speed
137 @ about 7 ns out of the entire time that the CPU is running!
/kernel/linux/linux-6.6/arch/arm/mach-sa1100/
H A Dsleep.S50 @ Adjust memory timing before lowering CPU clock
53 @ delay 90us and set CPU PLL to lowest speed
137 @ about 7 ns out of the entire time that the CPU is running!
/kernel/linux/linux-5.10/arch/arm/mach-mvebu/
H A Dpmsu_ll.S18 orr r1, r1, #0x8 @ SCU CPU Power Status Register
19 mrc p15, 0, r0, cr0, cr0, 5 @ get the CPU ID
/kernel/linux/linux-6.6/arch/arm/mach-mvebu/
H A Dpmsu_ll.S15 orr r1, r1, #0x8 @ SCU CPU Power Status Register
16 mrc p15, 0, r0, cr0, cr0, 5 @ get the CPU ID
/kernel/linux/linux-6.6/tools/testing/selftests/cgroup/
H A Dtest_cpuset_prs.sh26 CPUS=$(lscpu | grep "^CPU(s):" | sed -e "s/.*:[[:space:]]*//")
213 # O<c>-<v> = Write <v> to CPU online file of <c>
239 # CPU offlining cases:
323 CPU=${1%-*}
325 CPUFILE=//sys/devices/system/cpu/cpu${CPU}/online
328 OFFLINE_CPUS="$OFFLINE_CPUS $CPU"
331 OFFLINE_CPUS=$(echo $CPU $CPU $OFFLINE_CPUS | fmt -1 |\
586 echo "Test $TEST[$I] failed effective CPU check!"

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