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Searched refs:CLK_TOP_SPI0_SEL (Results 1 - 18 of 18) sorted by relevance

/kernel/linux/linux-5.10/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmt7622-clk.h77 #define CLK_TOP_SPI0_SEL 65 macro
H A Dmt7629-clk.h92 #define CLK_TOP_SPI0_SEL 82 macro
H A Dmt2701-clk.h97 #define CLK_TOP_SPI0_SEL 86 macro
/kernel/linux/linux-5.10/include/dt-bindings/clock/
H A Dmt7622-clk.h77 #define CLK_TOP_SPI0_SEL 65 macro
H A Dmt7629-clk.h92 #define CLK_TOP_SPI0_SEL 82 macro
H A Dmt2701-clk.h97 #define CLK_TOP_SPI0_SEL 86 macro
/kernel/linux/linux-6.6/include/dt-bindings/clock/
H A Dmt7622-clk.h77 #define CLK_TOP_SPI0_SEL 65 macro
H A Dmt7629-clk.h92 #define CLK_TOP_SPI0_SEL 82 macro
H A Dmt2701-clk.h97 #define CLK_TOP_SPI0_SEL 86 macro
/kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmt7622-clk.h77 #define CLK_TOP_SPI0_SEL 65 macro
H A Dmt7629-clk.h92 #define CLK_TOP_SPI0_SEL 82 macro
H A Dmt2701-clk.h97 #define CLK_TOP_SPI0_SEL 86 macro
/kernel/linux/linux-6.6/drivers/clk/mediatek/
H A Dclk-mt7622.c408 MUX_GATE(CLK_TOP_SPI0_SEL, "spi0_sel", spi0_parents,
H A Dclk-mt7629.c482 MUX_GATE(CLK_TOP_SPI0_SEL, "spi0_sel", spi0_parents,
H A Dclk-mt2701.c507 MUX_GATE(CLK_TOP_SPI0_SEL, "spi0_sel", spi_parents,
/kernel/linux/linux-5.10/drivers/clk/mediatek/
H A Dclk-mt7622.c537 MUX_GATE(CLK_TOP_SPI0_SEL, "spi0_sel", spi0_parents,
H A Dclk-mt7629.c507 MUX_GATE(CLK_TOP_SPI0_SEL, "spi0_sel", spi0_parents,
H A Dclk-mt2701.c508 MUX_GATE(CLK_TOP_SPI0_SEL, "spi0_sel", spi_parents,

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