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Searched refs:CLK_TOP_DPI0_SEL (Results 1 - 18 of 18) sorted by relevance

/kernel/linux/linux-6.6/include/dt-bindings/clock/
H A Dmediatek,mt6795-clk.h113 #define CLK_TOP_DPI0_SEL 102 macro
H A Dmediatek,mt8365-clk.h103 #define CLK_TOP_DPI0_SEL 93 macro
H A Dmt8173-clk.h116 #define CLK_TOP_DPI0_SEL 106 macro
H A Dmt2701-clk.h104 #define CLK_TOP_DPI0_SEL 93 macro
/kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmediatek,mt6795-clk.h113 #define CLK_TOP_DPI0_SEL 102 macro
H A Dmediatek,mt8365-clk.h103 #define CLK_TOP_DPI0_SEL 93 macro
H A Dmt8173-clk.h116 #define CLK_TOP_DPI0_SEL 106 macro
H A Dmt2701-clk.h104 #define CLK_TOP_DPI0_SEL 93 macro
/kernel/linux/linux-5.10/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmt8173-clk.h116 #define CLK_TOP_DPI0_SEL 106 macro
H A Dmt2701-clk.h104 #define CLK_TOP_DPI0_SEL 93 macro
/kernel/linux/linux-5.10/include/dt-bindings/clock/
H A Dmt8173-clk.h116 #define CLK_TOP_DPI0_SEL 106 macro
H A Dmt2701-clk.h104 #define CLK_TOP_DPI0_SEL 93 macro
/kernel/linux/linux-6.6/drivers/clk/mediatek/
H A Dclk-mt6795-topckgen.c490 TOP_MUX_GATE_NOSR(CLK_TOP_DPI0_SEL, "dpi0_sel", dpi0_parents, 0xa0, 0, 3, 7, 0),
H A Dclk-mt8173-topckgen.c577 MUX_GATE_FLAGS(CLK_TOP_DPI0_SEL, "dpi0_sel", dpi0_parents,
H A Dclk-mt2701.c527 MUX_GATE(CLK_TOP_DPI0_SEL, "dpi0_sel", dpi0_parents,
H A Dclk-mt8365.c501 MUX_GATE_CLR_SET_UPD(CLK_TOP_DPI0_SEL, "dpi0_sel", dpi0_parents, 0x0c0,
/kernel/linux/linux-5.10/drivers/clk/mediatek/
H A Dclk-mt2701.c528 MUX_GATE(CLK_TOP_DPI0_SEL, "dpi0_sel", dpi0_parents,
H A Dclk-mt8173.c576 MUX_GATE_FLAGS(CLK_TOP_DPI0_SEL, "dpi0_sel", dpi0_parents, 0x00a0, 0, 3, 7, 0),

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