/device/soc/rockchip/common/vendor/drivers/staging/android/fiq_debugger/ |
H A D | fiq_debugger_arm64.c | 21 static char *mode_name(const struct pt_regs *regs)
in mode_name() argument 23 if (compat_user_mode(regs)) {
in mode_name() 26 switch (processor_mode(regs)) {
in mode_name() 43 void fiq_debugger_dump_pc(struct fiq_debugger_output *output, const struct pt_regs *regs)
in fiq_debugger_dump_pc() argument 45 output->printf(output, " pc %016lx cpsr %08lx mode %s\n", regs->pc, regs->pstate, mode_name(regs));
in fiq_debugger_dump_pc() 48 void fiq_debugger_dump_regs_aarch32(struct fiq_debugger_output *output, const struct pt_regs *regs)
in fiq_debugger_dump_regs_aarch32() argument 50 output->printf(output, " r0 %08x r1 %08x r2 %08x r3 %08x\n", regs->compat_usr(0), regs in fiq_debugger_dump_regs_aarch32() 63 fiq_debugger_dump_regs_aarch64(struct fiq_debugger_output *output, const struct pt_regs *regs) fiq_debugger_dump_regs_aarch64() argument 88 fiq_debugger_dump_regs(struct fiq_debugger_output *output, const struct pt_regs *regs) fiq_debugger_dump_regs() argument 104 fiq_debugger_dump_allregs(struct fiq_debugger_output *output, const struct pt_regs *regs) fiq_debugger_dump_allregs() argument 151 fiq_debugger_dump_stacktrace(struct fiq_debugger_output *output, const struct pt_regs *regs, unsigned int depth, void *ssp) fiq_debugger_dump_stacktrace() argument [all...] |
H A D | fiq_debugger_arm.c | 45 void fiq_debugger_dump_pc(struct fiq_debugger_output *output, const struct pt_regs *regs)
in fiq_debugger_dump_pc() argument 47 output->printf(output, " pc %08x cpsr %08x mode %s\n", regs->ARM_pc, regs->ARM_cpsr, mode_name(regs->ARM_cpsr));
in fiq_debugger_dump_pc() 50 void fiq_debugger_dump_regs(struct fiq_debugger_output *output, const struct pt_regs *regs)
in fiq_debugger_dump_regs() argument 52 output->printf(output, " r0 %08x r1 %08x r2 %08x r3 %08x\n", regs->ARM_r0, regs->ARM_r1, regs->ARM_r2,
in fiq_debugger_dump_regs() 53 regs->ARM_r3);
in fiq_debugger_dump_regs() 54 output->printf(output, " r4 %08x r5 %08x r6 %08x r7 %08x\n", regs in fiq_debugger_dump_regs() 89 get_mode_regs(struct mode_regs *regs) get_mode_regs() argument 143 fiq_debugger_dump_allregs(struct fiq_debugger_output *output, const struct pt_regs *regs) fiq_debugger_dump_allregs() argument 217 fiq_debugger_dump_stacktrace(struct fiq_debugger_output *output, const struct pt_regs *regs, unsigned int depth, void *ssp) fiq_debugger_dump_stacktrace() argument [all...] |
H A D | fiq_debugger_priv.h | 60 void fiq_debugger_dump_pc(struct fiq_debugger_output *output, const struct pt_regs *regs); 61 void fiq_debugger_dump_regs(struct fiq_debugger_output *output, const struct pt_regs *regs); 62 void fiq_debugger_dump_allregs(struct fiq_debugger_output *output, const struct pt_regs *regs); 63 void fiq_debugger_dump_stacktrace(struct fiq_debugger_output *output, const struct pt_regs *regs, unsigned int depth,
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/device/soc/rockchip/rk3588/kernel/drivers/staging/android/fiq_debugger/ |
H A D | fiq_debugger_arm64.c | 21 static char *mode_name(const struct pt_regs *regs) in mode_name() argument 23 if (compat_user_mode(regs)) { in mode_name() 26 switch (processor_mode(regs)) { in mode_name() 38 const struct pt_regs *regs) in fiq_debugger_dump_pc() 41 regs->pc, regs->pstate, mode_name(regs)); in fiq_debugger_dump_pc() 45 const struct pt_regs *regs) in fiq_debugger_dump_regs_aarch32() 48 regs->compat_usr(0), regs in fiq_debugger_dump_regs_aarch32() 37 fiq_debugger_dump_pc(struct fiq_debugger_output *output, const struct pt_regs *regs) fiq_debugger_dump_pc() argument 44 fiq_debugger_dump_regs_aarch32(struct fiq_debugger_output *output, const struct pt_regs *regs) fiq_debugger_dump_regs_aarch32() argument 63 fiq_debugger_dump_regs_aarch64(struct fiq_debugger_output *output, const struct pt_regs *regs) fiq_debugger_dump_regs_aarch64() argument 103 fiq_debugger_dump_regs(struct fiq_debugger_output *output, const struct pt_regs *regs) fiq_debugger_dump_regs() argument 118 fiq_debugger_dump_allregs(struct fiq_debugger_output *output, const struct pt_regs *regs) fiq_debugger_dump_allregs() argument 175 fiq_debugger_dump_stacktrace(struct fiq_debugger_output *output, const struct pt_regs *regs, unsigned int depth, void *ssp) fiq_debugger_dump_stacktrace() argument [all...] |
H A D | fiq_debugger_priv.h | 31 const struct pt_regs *regs); 33 const struct pt_regs *regs); 35 const struct pt_regs *regs); 37 const struct pt_regs *regs, unsigned int depth, void *ssp);
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/device/soc/rockchip/rk3588/kernel/include/trace/hooks/ |
H A D | traps.h | 16 TP_PROTO(struct pt_regs *regs, bool user), 17 TP_ARGS(regs, user), 21 TP_PROTO(struct pt_regs *regs, bool user), 22 TP_ARGS(regs, user), 26 TP_PROTO(struct pt_regs *regs, unsigned int esr, bool user), 27 TP_ARGS(regs, esr, user), 31 TP_PROTO(struct pt_regs *regs, unsigned int esr, int reason), 32 TP_ARGS(regs, reason, esr), 1); 35 TP_PROTO(struct pt_regs *regs, unsigned int esr), 36 TP_ARGS(regs, es [all...] |
H A D | fault.h | 16 TP_PROTO(struct pt_regs *regs, unsigned int esr, unsigned long addr, const char *msg), 17 TP_ARGS(regs, esr, addr, msg), 1); 20 TP_PROTO(struct pt_regs *regs, unsigned int esr, unsigned long addr, const char *msg), 21 TP_ARGS(regs, esr, addr, msg), 1); 24 TP_PROTO(struct pt_regs *regs, unsigned int esr, unsigned long addr, const char *msg), 25 TP_ARGS(regs, esr, addr, msg), 1); 28 TP_PROTO(struct pt_regs *regs, unsigned int esr, unsigned long addr, bool user), 29 TP_ARGS(regs, esr, addr, user),
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H A D | debug.h | 17 TP_PROTO(struct pt_regs *regs), 18 TP_ARGS(regs)) 20 #define trace_android_vh_ipi_stop(regs) 21 #define trace_android_vh_ipi_stop_rcuidle(regs)
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/device/soc/rockchip/common/sdk_linux/drivers/thermal/ |
H A D | rockchip_thermal.c | 169 * @regs: the base address of tsadc controller
190 void __iomem *regs;
member 534 * @regs: the base address of tsadc controller
549 static void rk_tsadcv2_initialize(struct regmap *grf, void __iomem *regs, enum tshut_polarity tshut_polarity)
in rk_tsadcv2_initialize() argument 552 writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH, regs + TSADCV2_AUTO_CON);
in rk_tsadcv2_initialize() 554 writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH, regs + TSADCV2_AUTO_CON);
in rk_tsadcv2_initialize() 557 writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
in rk_tsadcv2_initialize() 558 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT, regs + TSADCV2_HIGHT_INT_DEBOUNCE);
in rk_tsadcv2_initialize() 559 writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME, regs + TSADCV2_AUTO_PERIOD_HT);
in rk_tsadcv2_initialize() 560 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT, regs in rk_tsadcv2_initialize() 583 rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs, enum tshut_polarity tshut_polarity) rk_tsadcv3_initialize() argument 618 rk_tsadcv4_initialize(struct regmap *grf, void __iomem *regs, enum tshut_polarity tshut_polarity) rk_tsadcv4_initialize() argument 624 rk_tsadcv5_initialize(struct regmap *grf, void __iomem *regs, enum tshut_polarity tshut_polarity) rk_tsadcv5_initialize() argument 644 rk_tsadcv6_initialize(struct regmap *grf, void __iomem *regs, enum tshut_polarity tshut_polarity) rk_tsadcv6_initialize() argument 653 rk_tsadcv7_initialize(struct regmap *grf, void __iomem *regs, enum tshut_polarity tshut_polarity) rk_tsadcv7_initialize() argument 677 rk_tsadcv2_irq_ack(void __iomem *regs) rk_tsadcv2_irq_ack() argument 685 rk_tsadcv3_irq_ack(void __iomem *regs) rk_tsadcv3_irq_ack() argument 693 rk_tsadcv2_control(void __iomem *regs, bool enable) rk_tsadcv2_control() argument 716 rk_tsadcv3_control(void __iomem *regs, bool enable) rk_tsadcv3_control() argument 730 rk_tsadcv2_get_temp(const struct chip_tsadc_table *table, int chn, void __iomem *regs, int *temp) rk_tsadcv2_get_temp() argument 739 rk_tsadcv2_alarm_temp(const struct chip_tsadc_table *table, int chn, void __iomem *regs, int temp) rk_tsadcv2_alarm_temp() argument 772 rk_tsadcv2_tshut_temp(const struct chip_tsadc_table *table, int chn, void __iomem *regs, int temp) rk_tsadcv2_tshut_temp() argument 791 rk_tsadcv2_tshut_mode(struct regmap *grf, int chn, void __iomem *regs, enum tshut_mode mode) rk_tsadcv2_tshut_mode() argument 807 rk_tsadcv3_tshut_mode(struct regmap *grf, int chn, void __iomem *regs, enum tshut_mode mode) rk_tsadcv3_tshut_mode() argument [all...] |
/device/soc/rockchip/common/vendor/drivers/phy/ |
H A D | phy-rockchip-naneng-edp.c | 67 void __iomem *regs;
member 92 writel(EDP_PHY_TX_AMP(lane, val), edpphy->regs + EDP_PHY_GRF_CON4);
in rockchip_edp_phy_set_voltages() 95 writel(EDP_PHY_TX_AMP_SCALE(lane, val), edpphy->regs + EDP_PHY_GRF_CON5);
in rockchip_edp_phy_set_voltages() 98 writel(EDP_PHY_TX_EMP(lane, val), edpphy->regs + EDP_PHY_GRF_CON3);
in rockchip_edp_phy_set_voltages() 109 writel(EDP_PHY_TX_IDLE(0xf) | EDP_PHY_TX_PD(0xf), edpphy->regs + EDP_PHY_GRF_CON0);
in rockchip_edp_phy_set_rate() 111 writel(EDP_PHY_TX_MODE(0x3), edpphy->regs + EDP_PHY_GRF_CON5);
in rockchip_edp_phy_set_rate() 112 writel(EDP_PHY_PD_PLL(0x1), edpphy->regs + EDP_PHY_GRF_CON0);
in rockchip_edp_phy_set_rate() 116 writel(EDP_PHY_PLL_DIV(0x4380), edpphy->regs + EDP_PHY_GRF_CON1);
in rockchip_edp_phy_set_rate() 117 writel(EDP_PHY_TX_RTERM(0x1) | EDP_PHY_RATE(0x1) | EDP_PHY_REF_DIV(0x0), edpphy->regs + EDP_PHY_GRF_CON2);
in rockchip_edp_phy_set_rate() 118 writel(EDP_PHY_PLL_CTL_H(0x0800), edpphy->regs in rockchip_edp_phy_set_rate() [all...] |
/device/soc/rockchip/rk3588/kernel/drivers/phy/rockchip/ |
H A D | phy-rockchip-naneng-edp.c | 71 void __iomem *regs; member 98 edpphy->regs + EDP_PHY_GRF_CON4); in rockchip_edp_phy_set_voltages() 102 edpphy->regs + EDP_PHY_GRF_CON5); in rockchip_edp_phy_set_voltages() 106 edpphy->regs + EDP_PHY_GRF_CON3); in rockchip_edp_phy_set_voltages() 119 edpphy->regs + EDP_PHY_GRF_CON0); in rockchip_edp_phy_set_rate() 121 writel(EDP_PHY_TX_MODE(0x3), edpphy->regs + EDP_PHY_GRF_CON5); in rockchip_edp_phy_set_rate() 122 writel(EDP_PHY_PD_PLL(0x1), edpphy->regs + EDP_PHY_GRF_CON0); in rockchip_edp_phy_set_rate() 127 edpphy->regs + EDP_PHY_GRF_CON1); in rockchip_edp_phy_set_rate() 129 EDP_PHY_REF_DIV(0x0), edpphy->regs + EDP_PHY_GRF_CON2); in rockchip_edp_phy_set_rate() 131 edpphy->regs in rockchip_edp_phy_set_rate() [all...] |
/device/soc/rockchip/common/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd_wifi6/include/ |
H A D | sbhndarm.h | 76 #define ARM_CM3_REG(regs, reg) (&((cm3regs_t *)regs)->reg) 110 #define ARM_CR4_REG(regs, reg) (&((cr4regs_t *)regs)->reg) 126 #define ARM_CA7_REG(regs, reg) (&((ca7regs_t *)regs)->reg) 129 #define ARMREG(regs, reg) ARM_CM3_REG(regs, reg) 133 #define ARMREG(regs, reg) ARM_CR4_REG(regs, re [all...] |
H A D | bcmsdpcm.h | 239 (void *)(uintptr)&((h)->regs->dma.sdiod32.dma32regs[chnl].xmt) : \ 240 (void *)(uintptr)&((h)->regs->dma.sdiod32.dma32regs[chnl].rcv)) 244 (void *)(uintptr)&((h)->regs->dma.sdiod64.dma64regs[chnl].xmt) : \ 245 (void *)(uintptr)&((h)->regs->dma.sdiod64.dma64regs[chnl].rcv)) 254 (void *)(uintptr)&((h)->regs->dma.pcm32.dmaregs.xmt) : \ 255 (void *)(uintptr)&((h)->regs->dma.pcm32.dmaregs.rcv)) 264 ((dma32diag_t *)(uintptr)&((h)->regs->dma.sdiod32.dmafifo)) : \ 265 ((dma32diag_t *)(uintptr)&((h)->regs->dma.sdiod64.dmafifo))) 268 ((dma32diag_t *)(uintptr)&((h)->regs->dma.pcm32.dmafifo))
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/device/soc/rockchip/common/sdk_linux/drivers/spi/ |
H A D | spi-rockchip.c | 183 void __iomem *regs;
member 212 writel_relaxed((enable ? 1U : 0U), rs->regs + ROCKCHIP_SPI_SSIENR);
in spi_enable_chip() 221 if (!(readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_SLAVE_TX_BUSY) &&
in wait_for_tx_idle() 222 !((readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_BUSY))) {
in wait_for_tx_idle() 226 if (!(readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_BUSY)) {
in wait_for_tx_idle() 239 ver = readl_relaxed(rs->regs + ROCKCHIP_SPI_VERSION);
in get_fifo_len() 266 ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, 1);
in rockchip_spi_set_cs() 268 ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, BIT(spi->chip_select));
in rockchip_spi_set_cs() 272 ROCKCHIP_SPI_CLR_BITS(rs->regs + ROCKCHIP_SPI_SER, 1);
in rockchip_spi_set_cs() 274 ROCKCHIP_SPI_CLR_BITS(rs->regs in rockchip_spi_set_cs() [all...] |
/device/soc/rockchip/common/sdk_linux/arch/arm64/kernel/ |
H A D | process.c | 228 static void print_pstate(struct pt_regs *regs) in print_pstate() argument 230 u64 pstate = regs->pstate; in print_pstate() 232 if (compat_user_mode(regs)) { in print_pstate() 250 void __show_regs(struct pt_regs *regs) in __show_regs() argument 255 if (compat_user_mode(regs)) { in __show_regs() 256 lr = regs->compat_lr; in __show_regs() 257 sp = regs->compat_sp; in __show_regs() 260 lr = regs->regs[0x1e]; in __show_regs() 261 sp = regs in __show_regs() 297 show_regs(struct pt_regs *regs) show_regs() argument [all...] |
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/component/hdmi/src/mkp/ |
H A D | Makefile | 94 INC_PATH += -I$(CUR_DIR)/$(PRODUCT_DIR)/regs 97 INC_PATH += -I$(CUR_DIR)/$(PHY_DIR)/regs 98 INC_PATH += -I$(CUR_DIR)/$(CTRL_DIR)/regs 100 HDMI_SRC += $(CTRL_DIR)/regs/hdmi_reg_aon.c\ 101 $(CTRL_DIR)/regs/hdmi_reg_audio_path.c\ 102 $(CTRL_DIR)/regs/hdmi_reg_ctrl.c\ 103 $(CTRL_DIR)/regs/hdmi_reg_tx.c\ 104 $(CTRL_DIR)/regs/hdmi_reg_video_path.c 112 HDMI_SRC += $(PRODUCT_DIR)/regs/hdmi_reg_crg.c\ 114 $(PHY_DIR)/regs/hdmi_reg_dph [all...] |
/device/soc/rockchip/common/sdk_linux/drivers/pwm/ |
H A D | pwm-rockchip.c | 61 struct rockchip_pwm_regs regs;
member 88 tmp = readl_relaxed(pc->base + pc->data->regs.period);
in rockchip_pwm_get_state() 92 tmp = readl_relaxed(pc->base + pc->data->regs.duty);
in rockchip_pwm_get_state() 96 val = readl_relaxed(pc->base + pc->data->regs.ctrl);
in rockchip_pwm_get_state() 132 ctrl = readl_relaxed(pc->base + pc->data->regs.ctrl);
in rockchip_pwm_config() 156 writel_relaxed(ctrl, pc->base + pc->data->regs.ctrl);
in rockchip_pwm_config() 159 writel(period, pc->base + pc->data->regs.period);
in rockchip_pwm_config() 160 writel(duty, pc->base + pc->data->regs.duty);
in rockchip_pwm_config() 180 writel(ctrl, pc->base + pc->data->regs.ctrl);
in rockchip_pwm_config() 198 val = readl_relaxed(pc->base + pc->data->regs in rockchip_pwm_enable() [all...] |
/device/soc/rockchip/rk3568/hardware/mpp/mpp/legacy/ |
H A D | vpu.c | 188 RK_S32 VPUClientSendReg(int socket, RK_U32 *regs, RK_U32 nregs) in VPUClientSendReg() argument 198 HDF_LOGE("set reg[%03d]: %08x\n", i, regs[i]); in VPUClientSendReg() 205 VpuExtraInfo *extra_info = (VpuExtraInfo*)(regs + (nregs - VPU_EXTRA_INFO_SIZE)); in VPUClientSendReg() 211 reqs[0].data_ptr = REQ_DATA_PTR((void*)regs); in VPUClientSendReg() 218 reqs[1].data_ptr = REQ_DATA_PTR((void*)regs); in VPUClientSendReg() 243 req.req = regs; in VPUClientSendReg() 270 RK_S32 VPUClientWaitResult(int socket, RK_U32 *regs, RK_U32 nregs, VPU_CMD_TYPE *cmd, RK_S32 *len) in VPUClientWaitResult() argument 280 VpuExtraInfo *extra_info = (VpuExtraInfo*)(regs + (nregs - VPU_EXTRA_INFO_SIZE)); in VPUClientWaitResult() 292 mpp_req.data_ptr = REQ_DATA_PTR((void*)regs); in VPUClientWaitResult() 296 req.req = regs; in VPUClientWaitResult() [all...] |
/device/board/hisilicon/hispark_taurus/liteos_a/board/include/hisoc/ |
H A D | mmc.h | 142 unsigned int regs[] = {PERI_CRG82, PERI_CRG88, PERI_CRG85}; \ 145 val = readl((uintptr_t)regs[mmc_num]); \ 146 PRINT_DEBUG("0x%x:0x%x\n", regs[mmc_num], val); \ 148 writel(val | 1, (uintptr_t)regs[mmc_num]); \ 150 writel(val, (uintptr_t)regs[mmc_num]); \ 151 PRINT_DEBUG("0x%x:0x%x\n", regs[mmc_num], val); \
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/device/soc/rockchip/common/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd_wifi6/ |
H A D | sbutils.c | 48 static uint _sb_scan(si_info_t *sii, uint32 sba, volatile void *regs, uint bus, uint32 sbba, 390 if (!cores_info->regs[coreidx]) { in sb_corereg() 391 cores_info->regs[coreidx] = REG_MAP(cores_info->coresba[coreidx], in sb_corereg() 393 ASSERT(GOODREGS(cores_info->regs[coreidx])); in sb_corereg() 395 r = (volatile uint32 *)((volatile uchar *)cores_info->regs[coreidx] + regoff); in sb_corereg() 397 /* If pci/pcie, we can get at pci/pcie regs and on newer cores to chipc */ in sb_corereg() 489 if (!cores_info->regs[coreidx]) { in sb_corereg_addr() 490 cores_info->regs[coreidx] = REG_MAP(cores_info->coresba[coreidx], in sb_corereg_addr() 492 ASSERT(GOODREGS(cores_info->regs[coreidx])); in sb_corereg_addr() 494 r = (volatile uint32 *)((volatile uchar *)cores_info->regs[coreid in sb_corereg_addr() 535 _sb_scan(si_info_t *sii, uint32 sba, volatile void *regs, uint bus, uint32 sbba, uint numcores, uint devid) _sb_scan() argument 626 sb_scan(si_t *sih, volatile void *regs, uint devid) sb_scan() argument 679 volatile void *regs; _sb_setcoreidx() local [all...] |
H A D | siutils.c | 125 static si_info_t *si_doattach(si_info_t *sii, uint devid, osl_t *osh, volatile void *regs, 129 uint *origidx, volatile void *regs); 164 * regs - virtual address of initial core registers 171 si_attach(uint devid, osl_t *osh, volatile void *regs, in si_attach() argument 192 if (si_doattach(sii, devid, osh, regs, bustype, sdh, vars, varsz) == NULL) { in si_attach() 229 void *regs = NULL; in si_kattach() local 232 regs = REG_MAP(si_enum_base(device_id), SI_CORE_SIZE); // map physical to virtual in si_kattach() 237 if (si_doattach(&ksii, device_id, osh, regs, in si_kattach() 242 REG_UNMAP(regs); in si_kattach() 245 REG_UNMAP(regs); in si_kattach() 357 si_buscore_setup(si_info_t *sii, chipcregs_t *cc, uint bustype, uint32 savewin, uint *origidx, volatile void *regs) si_buscore_setup() argument 628 si_doattach(si_info_t *sii, uint devid, osl_t *osh, volatile void *regs, uint bustype, void *sdh, char **vars, uint *varsz) si_doattach() argument 2464 sysmem_banksize(si_info_t *sii, sysmemregs_t *regs, uint8 idx) sysmem_banksize() argument 2483 sysmemregs_t *regs; si_sysmem_size() local 2520 socram_banksize(si_info_t *sii, sbsocramregs_t *regs, uint8 idx, uint8 mem_type) socram_banksize() argument 2538 sbsocramregs_t *regs; si_socram_set_bankpda() local 2574 sbsocramregs_t *regs; si_socdevram() local 2646 sbsocramregs_t *regs; si_socdevram_remap_isenb() local 2707 sbsocramregs_t *regs; si_socdevram_size() local 2753 sbsocramregs_t *regs; si_socdevram_remap_size() local 2818 sbsocramregs_t *regs; si_socram_size() local 2884 volatile uint8 *regs; si_tcm_size() local 2968 sbsocramregs_t *regs; si_socram_srmem_size() local [all...] |
/device/soc/rockchip/common/sdk_linux/kernel/bpf/ |
H A D | verifier.c | 51 * insn is less then 4K, but there are too many branches that change stack/regs.
570 reg = &state->regs[i];
in print_verifier_state() 1055 static void mark_reg_known_zero(struct bpf_verifier_env *env, struct bpf_reg_state *regs, u32 regno)
in mark_reg_known_zero() argument 1058 verbose(env, "mark_reg_known_zero(regs, %u)\n", regno);
in mark_reg_known_zero() 1059 /* Something bad happened, let's kill all regs */
in mark_reg_known_zero() 1061 verifier_mark_reg_not_init(env, regs + regno);
in mark_reg_known_zero() 1065 verifier_mark_reg_known_zero(regs + regno);
in mark_reg_known_zero() 1332 static void mark_reg_unknown(struct bpf_verifier_env *env, struct bpf_reg_state *regs, u32 regno)
in mark_reg_unknown() argument 1335 verbose(env, "mark_reg_unknown(regs, %u)\n", regno);
in mark_reg_unknown() 1336 /* Something bad happened, let's kill all regs excep in mark_reg_unknown() 1351 mark_reg_not_init(struct bpf_verifier_env *env, struct bpf_reg_state *regs, u32 regno) mark_reg_not_init() argument 1364 mark_btf_ld_reg(struct bpf_verifier_env *env, struct bpf_reg_state *regs, u32 regno, enum bpf_reg_type reg_type, u32 btf_id) mark_btf_ld_reg() argument 1379 struct bpf_reg_state *regs = state->regs; init_reg_state() local 1716 struct bpf_reg_state *reg, *regs = state->regs; check_reg_arg() local 2764 struct bpf_reg_state *regs = cur_regs(env); check_map_access_type() local 2944 struct bpf_reg_state *regs = cur_regs(env); check_packet_access() local 3024 struct bpf_reg_state *regs = cur_regs(env); check_sock_access() local 3505 check_ptr_to_btf_access(struct bpf_verifier_env *env, struct bpf_reg_state *regs, int regno, int off, int size, enum bpf_access_type atype, int value_regno) check_ptr_to_btf_access() argument 3548 check_ptr_to_map_access(struct bpf_verifier_env *env, struct bpf_reg_state *regs, int regno, int off, int size, enum bpf_access_type atype, int value_regno) check_ptr_to_map_access() argument 3628 struct bpf_reg_state *regs = cur_regs(env); check_stack_access_within_bounds() local 3692 struct bpf_reg_state *regs = cur_regs(env); check_mem_access() local 4076 struct bpf_reg_state *regs = cur_regs(env), *reg = ®s[regno]; check_helper_mem_access() local 4141 struct bpf_reg_state *regs = cur_regs(env), *reg = ®s[regno]; process_spin_lock() local 4343 struct bpf_reg_state *regs = cur_regs(env), *reg = ®s[regno]; check_reg_type() local 4413 struct bpf_reg_state *regs = cur_regs(env), *reg = ®s[regno]; check_func_arg() local 4978 struct bpf_reg_state *regs = state->regs, *reg; __clear_all_pkt_pointers() local 5010 struct bpf_reg_state *regs = state->regs, *reg; release_reg_references() local 5051 clear_caller_saved_regs(struct bpf_verifier_env *env, struct bpf_reg_state *regs) clear_caller_saved_regs() argument 5204 do_refine_retval_range(struct bpf_reg_state *regs, int ret_type, int func_id, struct bpf_call_arg_meta *meta) do_refine_retval_range() argument 5260 struct bpf_reg_state *regs = cur_regs(env), *reg; record_func_key() local 5311 struct bpf_reg_state *regs; check_helper_call() local 5715 struct bpf_reg_state *regs; sanitize_speculative_path() local 5947 struct bpf_reg_state *regs = state->regs, *dst_reg; adjust_ptr_min_max_vals() local 6715 struct bpf_reg_state *regs = cur_regs(env); adjust_scalar_min_max_vals() local 6878 struct bpf_reg_state *regs = state->regs, *dst_reg, *src_reg; adjust_reg_min_max_vals() local 6956 struct bpf_reg_state *regs = cur_regs(env); check_alu_op() local 7704 struct bpf_reg_state *regs = state->regs; mark_ptr_or_null_regs() local 7826 struct bpf_reg_state *regs = this_branch->frame[this_branch->curframe]->regs; check_cond_jmp_op() local 7985 struct bpf_reg_state *regs = cur_regs(env); check_ld_imm() local 8084 struct bpf_reg_state *regs = cur_regs(env); check_ld_abs() local 9657 struct bpf_reg_state *regs; do_check() local 11590 struct bpf_reg_state *regs; do_check_common() local [all...] |
/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/tests/kutf/ |
H A D | kutf_helpers.c | 146 void __iomem *regs = NULL; in kutf_helper_external_reset_gpu() local 151 regs = ioremap(FPGA_SYSCTL_START_ADDR, FPGA_SYSCTL_SIZE); in kutf_helper_external_reset_gpu() 152 if (!regs) in kutf_helper_external_reset_gpu() 156 gpu_reset_reg = regs + FPGA_SYSCTL_GPU_RESET_REG; in kutf_helper_external_reset_gpu() 170 iounmap(regs); in kutf_helper_external_reset_gpu()
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/device/soc/rockchip/common/sdk_linux/drivers/devfreq/event/ |
H A D | rockchip-dfi.c | 94 void __iomem *regs; member 326 void __iomem *dfi_regs = info->regs; in rockchip_dfi_start_hardware_counter() 347 void __iomem *dfi_regs = info->regs; in rockchip_dfi_stop_hardware_counter() 357 void __iomem *dfi_regs = info->regs; in rockchip_dfi_get_busier_ch() 453 data->regs = devm_ioremap_resource(&pdev->dev, res); in px30_dfi_init() 454 if (IS_ERR(data->regs)) { in px30_dfi_init() 455 return PTR_ERR(data->regs); in px30_dfi_init() 562 data->regs = devm_platform_ioremap_resource(pdev, 0); in rockchip_dfi_init() 563 if (IS_ERR(data->regs)) { in rockchip_dfi_init() 564 return PTR_ERR(data->regs); in rockchip_dfi_init() [all...] |
/device/soc/rockchip/common/vendor/drivers/mmc/host/ |
H A D | rk_sdmmc.h | 238 #define mci_readl(dev, reg) __raw_readl((dev)->regs + SDMMC_##reg) 239 #define mci_writel(dev, reg, value) __raw_writel((value), (dev)->regs + SDMMC_##reg) 240 #define mci_readreg(dev, addr) __raw_readl((dev)->regs + (addr)) 241 #define mci_writereg(dev, addr, value) __raw_writel((value), (dev)->regs + (addr)) 244 #define mci_readw(dev, reg) __raw_readw((dev)->regs + SDMMC_##reg) 245 #define mci_writew(dev, reg, value) __raw_writew((value), (dev)->regs + SDMMC_##reg) 249 #define mci_readq(dev, reg) __raw_readq((dev)->regs + SDMMC_##reg) 250 #define mci_writeq(dev, reg, value) __raw_writeq((value), (dev)->regs + SDMMC_##reg) 260 #define mci_readq(dev, reg) (*(u64 __force *)((dev)->regs + SDMMC_##reg)) 261 #define mci_writeq(dev, reg, value) (*(u64 __force *)((dev)->regs [all...] |