Searched refs:configure (Results 1 - 11 of 11) sorted by relevance
| /device/soc/rockchip/common/vendor/drivers/phy/ |
| H A D | phy-rockchip-naneng-edp.c | 207 dev_err(edpphy->dev, "invalid params for phy configure\n");
in rockchip_edp_phy_configure()
294 .configure = rockchip_edp_phy_configure,
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| H A D | phy-rockchip-usbdp.c | 187 /* used for configure phy reference clock frequency */
in udphy_clk_init()
812 .configure = rockchip_dp_phy_configure,
1041 /* configure phy reference clock */
in rk3588_udphy_refclk_set()
1133 /* Step 3: configure lane mux */
in rk3588_udphy_init()
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| /device/soc/rockchip/rk3588/kernel/drivers/phy/rockchip/ |
| H A D | phy-rockchip-naneng-edp.c | 227 dev_err(edpphy->dev, "invalid params for phy configure\n"); in rockchip_edp_phy_configure()
320 .configure = rockchip_edp_phy_configure,
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| H A D | phy-rockchip-usbdp.c | 255 /* used for configure phy reference clock frequency */ in udphy_clk_init()
861 .configure = rockchip_dp_phy_configure,
1080 /* configure phy reference clock */ in rk3588_udphy_refclk_set()
1172 /* Step 3: configure lane mux */ in rk3588_udphy_init()
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| H A D | phy-rockchip-samsung-hdptx.c | 691 dev_err(hdptx->dev, "invalid params for phy configure\n"); in rockchip_hdptx_phy_configure()
1063 .configure = rockchip_hdptx_phy_configure,
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| H A D | phy-rockchip-samsung-dcphy.c | 1817 .configure = samsung_mipi_dcphy_configure,
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| /device/soc/rockchip/common/sdk_linux/drivers/gpu/drm/bridge/synopsys/ |
| H A D | dw-hdmi.c | 428 int (*configure)(struct dw_hdmi *hdmi, const struct dw_hdmi_plat_data *pdata, unsigned long mpixelclock); member
1108 * configure the channel status information of all the channel status
2003 ret = phy->configure(hdmi, pdata, mpixelclock); in hdmi_phy_configure()
3929 .configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
3936 .configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
3942 .configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
3948 .configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
3955 .configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
3989 if (!dw_hdmi_phys[i].configure && !hdmi->plat_data->configure_phy) { in dw_hdmi_detect_phy()
4484 dev_err(dev, "Failed to configure regma in dw_hdmi_probe()
[all...] |
| /device/soc/hisilicon/common/hal/middleware/ffmpeg_adapt/ |
| H A D | configure_llvm | 3 # FFmpeg configure script
45 echo "This configure script requires a POSIX-compatible shell"
49 echo "Disabling this configure test will create a broken FFmpeg."
61 Usage: configure [options]
81 --disable-logging do not log configure debug information
82 --fatal-warnings fail if any configure warning is generated
495 NOTE: Object files are built at the place where configure is launched.
537 If you think configure made a mistake, make sure you are using the latest
543 Rerun configure with logging enabled (do not use --disable-logging), and
548 Include the log file "$logfile" produced by configure a
[all...] |
| /device/soc/rockchip/common/sdk_linux/drivers/phy/rockchip/ |
| H A D | phy-rockchip-inno-dsidphy.c | 30 * when you configure the registers, you must set both of them. The Clock Lane
752 .configure = inno_dsidphy_configure,
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| /device/soc/rockchip/common/vendor/drivers/gpu/drm/bridge/synopsys/ |
| H A D | dw-hdmi-qp.c | 408 int (*configure)(struct dw_hdmi_qp *hdmi, const struct dw_hdmi_plat_data *pdata, unsigned long mpixelclock);
member
653 * configure the channel status information of all the channel status
2301 dev_err(dev, "Failed to configure regmap\n");
in _dw_hdmi_probe()
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| /device/soc/rockchip/rk3588/kernel/drivers/gpu/drm/bridge/synopsys/ |
| H A D | dw-hdmi-qp.c | 201 int (*configure)(struct dw_hdmi_qp *hdmi, member
456 * configure the channel status information of all the channel status
2193 dev_err(dev, "Failed to configure regmap\n"); in __dw_hdmi_probe()
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