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Searched refs:clks (Results 1 - 25 of 89) sorted by relevance

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/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/backend/gpu/
H A Dmali_kbase_clk_rate_trace_mgr.c99 clk_rtm->clks[index] = clk_data; in gpu_clk_data_init()
155 clk_rtm->clk_rate_trace_ops->gpu_clk_notifier_unregister(kbdev, clk_rtm->clks[i]->gpu_clk_handle, in kbase_clk_rate_trace_manager_init()
156 &clk_rtm->clks[i]->clk_rate_change_nb); in kbase_clk_rate_trace_manager_init()
157 kfree(clk_rtm->clks[i]); in kbase_clk_rate_trace_manager_init()
175 if (!clk_rtm->clks[i]) { in kbase_clk_rate_trace_manager_term()
179 clk_rtm->clk_rate_trace_ops->gpu_clk_notifier_unregister(kbdev, clk_rtm->clks[i]->gpu_clk_handle, in kbase_clk_rate_trace_manager_term()
180 &clk_rtm->clks[i]->clk_rate_change_nb); in kbase_clk_rate_trace_manager_term()
181 kfree(clk_rtm->clks[i]); in kbase_clk_rate_trace_manager_term()
200 struct kbase_clk_data *clk_data = clk_rtm->clks[i]; in kbase_clk_rate_trace_manager_gpu_active()
230 struct kbase_clk_data *clk_data = clk_rtm->clks[ in kbase_clk_rate_trace_manager_gpu_idle()
[all...]
/device/soc/rockchip/common/sdk_linux/drivers/nvmem/
H A Drockchip-otp.c63 struct clk_bulk_data *clks; member
146 ret = clk_bulk_prepare_enable(otp->num_clks, otp->clks); in rockchip_otp_read()
148 dev_err(otp->dev, "failed to prepare/enable clks\n"); in rockchip_otp_read()
180 clk_bulk_disable_unprepare(otp->num_clks, otp->clks); in rockchip_otp_read()
237 otp->clks = devm_kcalloc(dev, otp->num_clks, sizeof(*otp->clks), GFP_KERNEL); in rockchip_otp_probe()
238 if (!otp->clks) { in rockchip_otp_probe()
243 otp->clks[i].id = rockchip_otp_clocks[i]; in rockchip_otp_probe()
246 ret = devm_clk_bulk_get(dev, otp->num_clks, otp->clks); in rockchip_otp_probe()
H A Drockchip-efuse.c99 struct clk_bulk_data *clks; member
151 ret = clk_bulk_prepare_enable(efuse->num_clks, efuse->clks); in rockchip_rk1808_efuse_read()
191 clk_bulk_disable_unprepare(efuse->num_clks, efuse->clks); in rockchip_rk1808_efuse_read()
204 ret = clk_bulk_prepare_enable(efuse->num_clks, efuse->clks); in rockchip_rk3128_efuse_read()
228 clk_bulk_disable_unprepare(efuse->num_clks, efuse->clks); in rockchip_rk3128_efuse_read()
239 ret = clk_bulk_prepare_enable(efuse->num_clks, efuse->clks); in rockchip_rk3288_efuse_read()
263 clk_bulk_disable_unprepare(efuse->num_clks, efuse->clks); in rockchip_rk3288_efuse_read()
275 ret = clk_bulk_prepare_enable(efuse->num_clks, efuse->clks); in rockchip_rk3288_efuse_secure_read()
301 clk_bulk_disable_unprepare(efuse->num_clks, efuse->clks); in rockchip_rk3288_efuse_secure_read()
314 ret = clk_bulk_prepare_enable(efuse->num_clks, efuse->clks); in rockchip_rk3328_efuse_read()
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/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/backend/gpu/
H A Dmali_kbase_clk_rate_trace_mgr.c183 clk_rtm->clks[index] = clk_data; in gpu_clk_data_init()
246 kbdev, clk_rtm->clks[i]->gpu_clk_handle, in kbase_clk_rate_trace_manager_init()
247 &clk_rtm->clks[i]->clk_rate_change_nb); in kbase_clk_rate_trace_manager_init()
248 kfree(clk_rtm->clks[i]); in kbase_clk_rate_trace_manager_init()
265 if (!clk_rtm->clks[i]) in kbase_clk_rate_trace_manager_term()
270 (kbdev, clk_rtm->clks[i]->gpu_clk_handle, in kbase_clk_rate_trace_manager_term()
271 &clk_rtm->clks[i]->clk_rate_change_nb); in kbase_clk_rate_trace_manager_term()
272 kfree(clk_rtm->clks[i]); in kbase_clk_rate_trace_manager_term()
290 struct kbase_clk_data *clk_data = clk_rtm->clks[i]; in kbase_clk_rate_trace_manager_gpu_active()
318 struct kbase_clk_data *clk_data = clk_rtm->clks[ in kbase_clk_rate_trace_manager_gpu_idle()
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/device/soc/rockchip/common/vendor/drivers/media/platform/rockchip/isp/
H A Dhw.c493 .clks = rv1126_isp_clks,
504 .clks = rk1808_isp_clks,
515 .clks = rk3288_isp_clks,
526 .clks = rk3326_isp_clks,
537 .clks = rk3368_isp_clks,
548 .clks = rk3399_isp_clks,
559 .clks = rk3568_isp_clks,
570 .clks = rk3588_isp_clks,
581 .clks = rk3588_isp_unite_clks,
738 if (!IS_ERR(dev->clks[ in disable_sys_clk()
[all...]
H A Dhw.h18 const char *const *clks; member
45 struct clk *clks[RKISP_MAX_BUS_CLK]; member
/device/soc/rockchip/rk3588/kernel/drivers/media/platform/rockchip/isp/
H A Dhw.c494 .clks = rv1126_isp_clks,
505 .clks = rk1808_isp_clks,
516 .clks = rk3288_isp_clks,
527 .clks = rk3326_isp_clks,
538 .clks = rk3368_isp_clks,
549 .clks = rk3399_isp_clks,
560 .clks = rk3568_isp_clks,
571 .clks = rk3588_isp_clks,
582 .clks = rk3588_isp_unite_clks,
731 if (!IS_ERR(dev->clks[ in disable_sys_clk()
[all...]
H A Dhw.h18 const char * const *clks; member
45 struct clk *clks[RKISP_MAX_BUS_CLK]; member
/device/soc/rockchip/rk3588/kernel/drivers/video/rockchip/rga3/
H A Drga_drv.c147 if (!IS_ERR(rga_scheduler->clks[i])) { in rga_power_enable()
148 ret = clk_prepare_enable(rga_scheduler->clks[i]); in rga_power_enable()
158 if (!IS_ERR(rga_scheduler->clks[i])) in rga_power_enable()
159 clk_disable_unprepare(rga_scheduler->clks[i]); in rga_power_enable()
174 if (!IS_ERR(rga_scheduler->clks[i])) in rga_power_disable()
175 clk_disable_unprepare(rga_scheduler->clks[i]); in rga_power_disable()
642 .clks = old_rga2_clks,
649 .clks = rk3588_rga2_clks,
656 .clks = rga3_core_0_clks,
663 .clks
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/device/soc/rockchip/common/vendor/drivers/media/platform/rockchip/ispp/
H A Dhw.c125 clk_disable_unprepare(dev->clks[i]); in disable_sys_clk()
136 ret = clk_prepare_enable(dev->clks[i]); in enable_sys_clk()
155 rkispp_set_clk_rate(dev->clks[0], dev->core_clk_min); in enable_sys_clk()
156 dev_dbg(dev->dev, "set ispp clk:%luHz\n", clk_get_rate(dev->clks[0])); in enable_sys_clk()
160 clk_disable_unprepare(dev->clks[i]); in enable_sys_clk()
258 .clks = rv1126_ispp_clks,
268 .clks = rk3588_ispp_clks,
358 struct clk *clk = devm_clk_get(dev, match_data->clks[i]); in rkispp_hw_probe()
361 dev_err(dev, "failed to get %s\n", match_data->clks[i]); in rkispp_hw_probe()
365 hw_dev->clks[ in rkispp_hw_probe()
[all...]
H A Dhw.h19 const char *const *clks; member
41 struct clk *clks[ISPP_MAX_BUS_CLK]; member
/device/soc/rockchip/rk3588/kernel/drivers/media/platform/rockchip/ispp/
H A Dhw.c142 clk_disable_unprepare(dev->clks[i]); in disable_sys_clk()
152 ret = clk_prepare_enable(dev->clks[i]); in enable_sys_clk()
166 rkispp_set_clk_rate(dev->clks[0], dev->core_clk_min); in enable_sys_clk()
167 dev_dbg(dev->dev, "set ispp clk:%luHz\n", clk_get_rate(dev->clks[0])); in enable_sys_clk()
171 clk_disable_unprepare(dev->clks[i]); in enable_sys_clk()
259 .clks = rv1126_ispp_clks,
269 .clks = rk3588_ispp_clks,
365 struct clk *clk = devm_clk_get(dev, match_data->clks[i]); in rkispp_hw_probe()
369 match_data->clks[i]); in rkispp_hw_probe()
373 hw_dev->clks[ in rkispp_hw_probe()
[all...]
H A Dhw.h20 const char * const *clks; member
34 struct clk *clks[ISPP_MAX_BUS_CLK]; member
/device/soc/rockchip/common/sdk_linux/drivers/clk/rockchip/
H A Dclk-rk3188.c641 struct clk **clks; in rk3066a_clk_init() local
647 clks = ctx->clk_data.clks; in rk3066a_clk_init()
651 rockchip_clk_register_armclk(ctx, ARMCLK, "armclk", 2, clks[PLL_APLL], clks[PLL_GPLL], &rk3066_cpuclk_data, in rk3066a_clk_init()
660 struct clk **clks; in rk3188a_clk_init() local
668 clks = ctx->clk_data.clks; in rk3188a_clk_init()
672 rockchip_clk_register_armclk(ctx, ARMCLK, "armclk", 2, clks[PLL_APLL], clks[PLL_GPL in rk3188a_clk_init()
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H A Dclk-rk3036.c387 struct clk **clks; in rk3036_clk_init() local
407 clks = ctx->clk_data.clks; in rk3036_clk_init()
417 rockchip_clk_register_armclk(ctx, ARMCLK, "armclk", 2, clks[PLL_APLL], clks[PLL_GPLL], &rk3036_cpuclk_data, in rk3036_clk_init()
/device/soc/rockchip/rk3588/kernel/drivers/phy/rockchip/
H A Dphy-rockchip-snps-pcie3.c49 struct clk_bulk_data *clks; member
147 ret = clk_bulk_prepare_enable(priv->num_clks, priv->clks); in rochchip_p3phy_init()
149 pr_err("failed to enable PCIe bulk clks %d\n", ret); in rochchip_p3phy_init()
159 clk_bulk_disable_unprepare(priv->num_clks, priv->clks); in rochchip_p3phy_init()
168 clk_bulk_disable_unprepare(priv->num_clks, priv->clks); in rochchip_p3phy_exit()
251 priv->num_clks = devm_clk_bulk_get_all(dev, &priv->clks); in rockchip_p3phy_probe()
H A Dphy-rockchip-naneng-combphy.c70 const struct clk_bulk_data *clks; member
80 struct clk_bulk_data *clks; member
229 ret = clk_bulk_prepare_enable(priv->num_clks, priv->clks); in rockchip_combphy_init()
231 dev_err(priv->dev, "failed to enable clks\n"); in rockchip_combphy_init()
255 clk_bulk_disable_unprepare(priv->num_clks, priv->clks); in rockchip_combphy_init()
264 clk_bulk_disable_unprepare(priv->num_clks, priv->clks); in rockchip_combphy_exit()
302 ret = devm_clk_bulk_get(dev, priv->num_clks, priv->clks); in rockchip_combphy_parse_dt()
390 priv->clks = devm_kmemdup(dev, phy_cfg->clks, in rockchip_combphy_probe()
394 if (!priv->clks) in rockchip_combphy_probe()
[all...]
/device/soc/rockchip/common/vendor/drivers/phy/
H A Dphy-rockchip-naneng-combphy.c70 const struct clk_bulk_data *clks; member
80 struct clk_bulk_data *clks; member
227 ret = clk_bulk_prepare_enable(priv->num_clks, priv->clks); in rockchip_combphy_init()
229 dev_err(priv->dev, "failed to enable clks\n"); in rockchip_combphy_init()
254 clk_bulk_disable_unprepare(priv->num_clks, priv->clks); in rockchip_combphy_init()
263 clk_bulk_disable_unprepare(priv->num_clks, priv->clks); in rockchip_combphy_exit()
299 ret = devm_clk_bulk_get(dev, priv->num_clks, priv->clks); in rockchip_combphy_parse_dt()
385 priv->clks = devm_kmemdup(dev, phy_cfg->clks, phy_cfg->num_clks * sizeof(struct clk_bulk_data), GFP_KERNEL); in rockchip_combphy_probe()
387 if (!priv->clks) { in rockchip_combphy_probe()
[all...]
H A Dphy-rockchip-snps-pcie3.c58 struct clk_bulk_data *clks; member
145 ret = clk_bulk_prepare_enable(priv->num_clks, priv->clks); in rochchip_p3phy_init()
147 pr_err("failed to enable PCIe bulk clks %d\n", ret); in rochchip_p3phy_init()
157 clk_bulk_disable_unprepare(priv->num_clks, priv->clks); in rochchip_p3phy_init()
167 clk_bulk_disable_unprepare(priv->num_clks, priv->clks); in rochchip_p3phy_exit()
252 priv->num_clks = devm_clk_bulk_get_all(dev, &priv->clks); in rockchip_p3phy_probe()
/device/soc/rockchip/common/vendor/drivers/rockchip/
H A Drockchip_pvtm.c70 struct clk_bulk_data *clks; member
283 ret = clk_bulk_prepare_enable(pvtm->num_clks, pvtm->clks); in rockchip_pvtm_get_value()
285 dev_err(pvtm->dev, "failed to prepare/enable pvtm clks\n"); in rockchip_pvtm_get_value()
335 clk_bulk_disable_unprepare(pvtm->num_clks, pvtm->clks); in rockchip_pvtm_get_value()
352 ret = clk_bulk_prepare_enable(pvtm->num_clks, pvtm->clks); in rv1126_pvtm_get_value()
354 dev_err(pvtm->dev, "failed to prepare/enable pvtm clks\n"); in rv1126_pvtm_get_value()
403 clk_bulk_disable_unprepare(pvtm->num_clks, pvtm->clks); in rv1126_pvtm_get_value()
888 pvtm->clks = devm_kcalloc(dev, pvtm->num_clks, sizeof(*pvtm->clks), GFP_KERNEL); in rockchip_pvtm_init()
889 if (!pvtm->clks) { in rockchip_pvtm_init()
[all...]
/device/soc/rockchip/rk3588/kernel/drivers/soc/rockchip/
H A Drockchip_pvtm.c75 struct clk_bulk_data *clks; member
297 ret = clk_bulk_prepare_enable(pvtm->num_clks, pvtm->clks); in rockchip_pvtm_get_value()
299 dev_err(pvtm->dev, "failed to prepare/enable pvtm clks\n"); in rockchip_pvtm_get_value()
351 clk_bulk_disable_unprepare(pvtm->num_clks, pvtm->clks); in rockchip_pvtm_get_value()
371 ret = clk_bulk_prepare_enable(pvtm->num_clks, pvtm->clks); in rv1126_pvtm_get_value()
373 dev_err(pvtm->dev, "failed to prepare/enable pvtm clks\n"); in rv1126_pvtm_get_value()
424 clk_bulk_disable_unprepare(pvtm->num_clks, pvtm->clks); in rv1126_pvtm_get_value()
889 pvtm->clks = devm_kcalloc(dev, pvtm->num_clks, sizeof(*pvtm->clks), in rockchip_pvtm_init()
891 if (!pvtm->clks) in rockchip_pvtm_init()
[all...]
/device/soc/rockchip/common/vendor/drivers/media/platform/rockchip/cif/
H A Dhw.c712 .clks = px30_cif_clks,
721 .clks = rk1808_cif_clks,
730 .clks = rk3128_cif_clks,
739 .clks = rk3288_cif_clks,
748 .clks = rk3328_cif_clks,
757 .clks = rk3368_cif_clks,
766 .clks = rv1126_cif_clks,
775 .clks = rv1126_cif_lite_clks,
784 .clks = rk3568_cif_clks,
793 .clks
[all...]
H A Dhw.h83 const char *const *clks; member
102 struct clk *clks[RKCIF_MAX_BUS_CLK]; member
/device/soc/rockchip/rk3588/kernel/drivers/media/platform/rockchip/cif/
H A Dhw.c728 .clks = px30_cif_clks,
737 .clks = rk1808_cif_clks,
746 .clks = rk3128_cif_clks,
755 .clks = rk3288_cif_clks,
764 .clks = rk3328_cif_clks,
773 .clks = rk3368_cif_clks,
782 .clks = rv1126_cif_clks,
791 .clks = rv1126_cif_lite_clks,
800 .clks = rk3568_cif_clks,
809 .clks
[all...]
H A Dhw.h87 const char * const *clks; member
106 struct clk *clks[RKCIF_MAX_BUS_CLK]; member

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