Home
last modified time | relevance | path

Searched refs:PCLK_WDT (Results 1 - 21 of 21) sorted by relevance

/device/soc/rockchip/common/sdk_linux/include/dt-bindings/clock/
H A Drk3036-cru.h80 #define PCLK_WDT 368 macro
H A Drk3128-cru.h92 #define PCLK_WDT 319 macro
H A Drk3188-cru-common.h84 #define PCLK_WDT 331 macro
H A Drk1808-cru.h206 #define PCLK_WDT 284 macro
H A Drk3288-cru.h160 #define PCLK_WDT 368 macro
H A Drk3368-cru.h150 #define PCLK_WDT 368 macro
H A Drk3399-cru.h285 #define PCLK_WDT 380 macro
/device/soc/rockchip/rk3588/kernel/include/dt-bindings/clock/
H A Drk1808-cru.h206 #define PCLK_WDT 284 macro
H A Drv1126-cru.h311 #define PCLK_WDT 248 macro
H A Drk3588-cru.h233 #define PCLK_WDT 230 macro
/device/soc/rockchip/common/sdk_linux/drivers/clk/rockchip/
H A Dclk-rk3036.c360 GATE(PCLK_WDT, "pclk_wdt", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 15, GFLAGS),
H A Dclk-rk3128.c415 GATE(PCLK_WDT, "pclk_wdt", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 15, GFLAGS),
H A Dclk-rk3368.c695 SGRF_GATE(PCLK_WDT, "pclk_wdt", "pclk_pd_alive"),
H A Dclk-rk3188.c448 GATE(PCLK_WDT, "pclk_wdt", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 15, GFLAGS),
H A Dclk-rk3328.c605 SGRF_GATE(PCLK_WDT, "pclk_wdt", "pclk_bus"),
H A Dclk-rv1108.c447 GATE(PCLK_WDT, "pclk_wdt", "pclk_bus_pre", 0, RV1108_CLKGATE_CON(13), 3, GFLAGS),
H A Dclk-rk3308.c643 SGRF_GATE(PCLK_WDT, "pclk_wdt", "pclk_bus"),
H A Dclk-rk3288.c588 SGRF_GATE(PCLK_WDT, "pclk_wdt", "pclk_pd_alive"),
H A Dclk-rk3399.c1028 SGRF_GATE(PCLK_WDT, "pclk_wdt", "pclk_alive"),
/device/soc/rockchip/common/vendor/drivers/clk/
H A Dclk-rk1808.c583 GATE(PCLK_WDT, "pclk_wdt", "lsclk_bus_pre", 0, RK1808_CLKGATE_CON(17), 1, GFLAGS),
/device/soc/rockchip/rk3588/kernel/drivers/clk/rockchip/
H A Dclk-rk3588.c1324 GATE(PCLK_WDT, "pclk_wdt", "pclk_center_root", 0,

Completed in 33 milliseconds