PCLK_DDR_MON (reference) in projects: device - OpenGrok search results

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Searched refs:PCLK_DDR_MON (Results 1 - 4 of 4) sorted by relevance

/device/soc/rockchip/rk3588/kernel/include/dt-bindings/clock/
H A D	rv1126-cru.h	`342 #define PCLK_DDR_MON 280 macro`
/device/soc/rockchip/common/sdk_linux/include/dt-bindings/clock/
H A D	rk3399-cru.h	`282 #define PCLK_DDR_MON 377 macro`
/device/soc/rockchip/common/sdk_linux/drivers/clk/rockchip/
H A D	clk-rk3308.c	`677 GATE(PCLK_DDR_MON, "pclk_ddr_mon", "pclk_bus", CLK_IGNORE_UNUSED, RK3308_CLKGATE_CON(7), 5, GFLAGS),`
H A D	clk-rk3399.c	`553 GATE(PCLK_DDR_MON, "pclk_ddr_mon", "pclk_ddr", 0, RK3399_CLKGATE_CON(18), 12, GFLAGS),`

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