Home
last modified time | relevance | path

Searched refs:DPK_WR_OK_TIMEOUT_US (Results 1 - 2 of 2) sorted by relevance

/device/soc/rockchip/common/vendor/drivers/gpu/drm/bridge/synopsys/
H A Ddw-hdmi-hdcp.c41 #define DPK_WR_OK_TIMEOUT_US 30000 macro
329 ret = readx_poll_timeout(readl, reg_rmsts_addr, val, val & DPK_WR_OK_STS, 0x3E8, DPK_WR_OK_TIMEOUT_US); in dw_hdmi_hdcp_load_key()
340 ret = readx_poll_timeout(readl, reg_rmsts_addr, val, val & DPK_WR_OK_STS, 0x3E8, DPK_WR_OK_TIMEOUT_US); in dw_hdmi_hdcp_load_key()
359 ret = readx_poll_timeout(readl, reg_rmsts_addr, val, val & DPK_WR_OK_STS, 0x3E8, DPK_WR_OK_TIMEOUT_US); in dw_hdmi_hdcp_load_key()
/device/soc/rockchip/rk3588/kernel/drivers/gpu/drm/bridge/synopsys/
H A Ddw-hdmi-hdcp.c41 #define DPK_WR_OK_TIMEOUT_US 30000 macro
320 DPK_WR_OK_TIMEOUT_US); in dw_hdmi_hdcp_load_key()
331 DPK_WR_OK_TIMEOUT_US); in dw_hdmi_hdcp_load_key()
352 DPK_WR_OK_TIMEOUT_US); in dw_hdmi_hdcp_load_key()

Completed in 3 milliseconds