1 /*
2 * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
3 * Author Huicong Xu <xhc@rock-chips.com>
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15 #include <linux/clk.h>
16 #include <linux/delay.h>
17 #include <linux/err.h>
18 #include <linux/hdmi.h>
19 #include <linux/iopoll.h>
20 #include <linux/irq.h>
21 #include <linux/kthread.h>
22 #include <linux/mutex.h>
23 #include <linux/module.h>
24 #include <linux/of_device.h>
25 #include <linux/spinlock.h>
26 #include <linux/soc/rockchip/rk_vendor_storage.h>
27 #include <crypto/sha.h>
28 #include <drm/bridge/dw_hdmi.h>
29
30 #include "dw-hdmi.h"
31 #include "dw-hdmi-hdcp.h"
32
33 #define HDCP_KEY_SIZE 308
34 #define HDCP_KEY_SEED_SIZE 2
35
36 #define KSV_LEN 5
37 #define HEADER 10
38 #define SHAMAX 20
39
40 #define MAX_DOWNSTREAM_DEVICE_NUM 5
41 #define DPK_WR_OK_TIMEOUT_US 30000
42 #define HDMI_HDCP1X_ID 5
43
44 /* HDCP Registers */
45 #define HDMI_HDCPREG_RMCTL 0x780e
46 #define HDMI_HDCPREG_RMSTS 0x780f
47 #define HDMI_HDCPREG_SEED0 0x7810
48 #define HDMI_HDCPREG_SEED1 0x7811
49 #define HDMI_HDCPREG_DPK0 0x7812
50 #define HDMI_HDCPREG_DPK1 0x7813
51 #define HDMI_HDCPREG_DPK2 0x7814
52 #define HDMI_HDCPREG_DPK3 0x7815
53 #define HDMI_HDCPREG_DPK4 0x7816
54 #define HDMI_HDCPREG_DPK5 0x7817
55 #define HDMI_HDCPREG_DPK6 0x7818
56 #define HDMI_HDCP2REG_CTRL 0x7904
57 #define HDMI_HDCP2REG_MASK 0x790c
58 #define HDMI_HDCP2REG_MUTE 0x790e
59 #define DEV_MOD 0666
60 #define IO_MEM __iomem
61
62 enum dw_hdmi_hdcp_state {
63 DW_HDCP_DISABLED,
64 DW_HDCP_AUTH_START,
65 DW_HDCP_AUTH_SUCCESS,
66 DW_HDCP_AUTH_FAIL,
67 };
68
69 enum {
70 DW_HDMI_HDCP_KSV_LEN = 8,
71 DW_HDMI_HDCP_SHA_LEN = 20,
72 DW_HDMI_HDCP_DPK_LEN = 280,
73 DW_HDMI_HDCP_KEY_LEN = 308,
74 DW_HDMI_HDCP_SEED_LEN = 2,
75 };
76
77 enum {
78 HDMI_MC_CLKDIS_HDCPCLK_MASK = 0x40,
79 HDMI_MC_CLKDIS_HDCPCLK_ENABLE = 0x00,
80
81 HDMI_A_SRMCTRL_SHA1_FAIL_MASK = 0X08,
82 HDMI_A_SRMCTRL_SHA1_FAIL_DISABLE = 0X00,
83 HDMI_A_SRMCTRL_SHA1_FAIL_ENABLE = 0X08,
84
85 HDMI_A_SRMCTRL_KSV_UPDATE_MASK = 0X04,
86 HDMI_A_SRMCTRL_KSV_UPDATE_DISABLE = 0X00,
87 HDMI_A_SRMCTRL_KSV_UPDATE_ENABLE = 0X04,
88
89 HDMI_A_SRMCTRL_KSV_MEM_REQ_MASK = 0X01,
90 HDMI_A_SRMCTRL_KSV_MEM_REQ_DISABLE = 0X00,
91 HDMI_A_SRMCTRL_KSV_MEM_REQ_ENABLE = 0X01,
92
93 HDMI_A_SRMCTRL_KSV_MEM_ACCESS_MASK = 0X02,
94 HDMI_A_SRMCTRL_KSV_MEM_ACCESS_DISABLE = 0X00,
95 HDMI_A_SRMCTRL_KSV_MEM_ACCESS_ENABLE = 0X02,
96
97 HDMI_A_SRM_BASE_MAX_DEVS_EXCEEDED = 0x80,
98 HDMI_A_SRM_BASE_DEVICE_COUNT = 0x7f,
99
100 HDMI_A_SRM_BASE_MAX_CASCADE_EXCEEDED = 0x08,
101
102 HDMI_A_APIINTSTAT_KSVSHA1_CALC_INT = 0x02,
103
104 /* HDCPREG_RMSTS field values */
105 DPK_WR_OK_STS = 0x40,
106
107 HDMI_A_HDCP22_MASK = 0x40,
108
109 HDMI_HDCP2_OVR_EN_MASK = 0x02,
110 HDMI_HDCP2_OVR_ENABLE = 0x02,
111 HDMI_HDCP2_OVR_DISABLE = 0x00,
112
113 HDMI_HDCP2_FORCE_MASK = 0x04,
114 HDMI_HDCP2_FORCE_ENABLE = 0x04,
115 HDMI_HDCP2_FORCE_DISABLE = 0x00,
116 };
117
118 struct sha_t {
119 u8 mlength[8];
120 u8 mblock[64];
121 int mindex;
122 int mcomputed;
123 int mcorrupted;
124 unsigned int mdigest[5];
125 };
126
127 static struct dw_hdcp *g_hdcp;
128
shacircularshift(unsigned int bits, unsigned int word)129 static inline unsigned int shacircularshift(unsigned int bits, unsigned int word)
130 {
131 return (((word << bits) & 0xFFFFFFFF) | (word >> (0x20 - bits)));
132 }
133
hdcp_modb(struct dw_hdcp *hdcp, u8 data, u8 mask, unsigned int reg)134 static void hdcp_modb(struct dw_hdcp *hdcp, u8 data, u8 mask, unsigned int reg)
135 {
136 struct dw_hdmi *hdmi = hdcp->hdmi;
137 u8 val = hdcp->read(hdmi, reg) & ~mask;
138
139 val |= data & mask;
140 hdcp->write(hdmi, val, reg);
141 }
142
sha_reset(struct sha_t *sha)143 static void sha_reset(struct sha_t *sha)
144 {
145 u32 i = 0;
146
147 sha->mindex = 0;
148 sha->mcomputed = false;
149 sha->mcorrupted = false;
150 for (i = 0; i < sizeof(sha->mlength); i++) {
151 sha->mlength[i] = 0;
152 }
153
154 sha1_init(sha->mdigest);
155 }
156
sha_processblock(struct sha_t *sha)157 static void sha_processblock(struct sha_t *sha)
158 {
159 u32 array[SHA1_WORKSPACE_WORDS];
160
161 sha1_transform(sha->mdigest, sha->mblock, array);
162 sha->mindex = 0;
163 }
164
sha_padmessage(struct sha_t *sha)165 static void sha_padmessage(struct sha_t *sha)
166 {
167 /*
168 * Check to see if the current message block is too small to hold
169 * the initial padding bits and length. If so, we will pad the
170 * block, process it, and then continue padding into a second
171 * block.
172 */
173 if (sha->mindex > 0x37) {
174 sha->mblock[sha->mindex++] = 0x80;
175 while (sha->mindex < 0x40) {
176 sha->mblock[sha->mindex++] = 0;
177 }
178
179 sha_processblock(sha);
180 while (sha->mindex < 0x38) {
181 sha->mblock[sha->mindex++] = 0;
182 }
183 } else {
184 sha->mblock[sha->mindex++] = 0x80;
185 while (sha->mindex < 0x38) {
186 sha->mblock[sha->mindex++] = 0;
187 }
188 }
189
190 /* Store the message length as the last 8 octets */
191 sha->mblock[0x38] = sha->mlength[0x7];
192 sha->mblock[0x39] = sha->mlength[0x6];
193 sha->mblock[0x3A] = sha->mlength[0x5];
194 sha->mblock[0x3B] = sha->mlength[0x4];
195 sha->mblock[0x3C] = sha->mlength[0x3];
196 sha->mblock[0x3D] = sha->mlength[0x2];
197 sha->mblock[0x3E] = sha->mlength[1];
198 sha->mblock[0x3F] = sha->mlength[0];
199
200 sha_processblock(sha);
201 }
202
sha_result(struct sha_t *sha)203 static int sha_result(struct sha_t *sha)
204 {
205 if (sha->mcorrupted) {
206 return false;
207 }
208
209 if (sha->mcomputed == 0) {
210 sha_padmessage(sha);
211 sha->mcomputed = true;
212 }
213 return true;
214 }
215
sha_input(struct sha_t *sha, const u8 *data, u32 size)216 static void sha_input(struct sha_t *sha, const u8 *data, u32 size)
217 {
218 int i = 0;
219 unsigned int j = 0;
220 int rc = true;
221
222 if (data == 0 || size == 0) {
223 return;
224 }
225
226 if (sha->mcomputed || sha->mcorrupted) {
227 sha->mcorrupted = true;
228 return;
229 }
230 while (size-- && !sha->mcorrupted) {
231 sha->mblock[sha->mindex++] = *data;
232
233 for (i = 0; i < 0x8; i++) {
234 rc = true;
235 for (j = 0; j < sizeof(sha->mlength); j++) {
236 sha->mlength[j]++;
237 if (sha->mlength[j] != 0) {
238 rc = false;
239 break;
240 }
241 }
242 sha->mcorrupted = (sha->mcorrupted || rc) ? true : false;
243 }
244 /* if corrupted then message is too long */
245 if (sha->mindex == 0x40) {
246 sha_processblock(sha);
247 }
248 data++;
249 }
250 }
251
hdcp_verify_ksv(const u8 *data, u32 size)252 static int hdcp_verify_ksv(const u8 *data, u32 size)
253 {
254 u32 i = 0;
255 struct sha_t sha;
256
257 if ((!data) || (size < (HEADER + SHAMAX))) {
258 return false;
259 }
260
261 sha_reset(&sha);
262 sha_input(&sha, data, size - SHAMAX);
263 if (sha_result(&sha) == false) {
264 return false;
265 }
266
267 for (i = 0; i < SHAMAX; i++) {
268 if (data[size - SHAMAX + i] != (u8)(sha.mdigest[i / 0x4] >> ((i % 0x4) * 0x8))) {
269 return false;
270 }
271 }
272 return true;
273 }
274
hdcp_load_keys_cb(struct dw_hdcp *hdcp)275 static int hdcp_load_keys_cb(struct dw_hdcp *hdcp)
276 {
277 u32 size;
278 u8 hdcp_vendor_data[320];
279
280 hdcp->keys = kmalloc(HDCP_KEY_SIZE, GFP_KERNEL);
281 if (!hdcp->keys) {
282 return -ENOMEM;
283 }
284
285 hdcp->seeds = kmalloc(HDCP_KEY_SEED_SIZE, GFP_KERNEL);
286 if (!hdcp->seeds) {
287 kfree(hdcp->keys);
288 return -ENOMEM;
289 }
290
291 size = rk_vendor_read(HDMI_HDCP1X_ID, hdcp_vendor_data, 0x13A);
292 if (size < (HDCP_KEY_SIZE + HDCP_KEY_SEED_SIZE)) {
293 dev_dbg(hdcp->dev, "HDCP: read size %d\n", size);
294 memset(hdcp->keys, 0, HDCP_KEY_SIZE);
295 memset(hdcp->seeds, 0, HDCP_KEY_SEED_SIZE);
296 } else {
297 memcpy(hdcp->keys, hdcp_vendor_data, HDCP_KEY_SIZE);
298 memcpy(hdcp->seeds, hdcp_vendor_data + HDCP_KEY_SIZE, HDCP_KEY_SEED_SIZE);
299 }
300 return 0;
301 }
302
dw_hdmi_hdcp_load_key(struct dw_hdcp *hdcp)303 static int dw_hdmi_hdcp_load_key(struct dw_hdcp *hdcp)
304 {
305 int i, j;
306 int ret, val;
307 void IO_MEM *reg_rmsts_addr;
308 struct hdcp_keys *hdcp_keys;
309 struct dw_hdmi *hdmi = hdcp->hdmi;
310
311 if (!hdcp->keys) {
312 ret = hdcp_load_keys_cb(hdcp);
313 if (ret) {
314 return ret;
315 }
316 }
317 hdcp_keys = hdcp->keys;
318
319 if (hdcp->reg_io_width == 0x4) {
320 reg_rmsts_addr = hdcp->regs + (HDMI_HDCPREG_RMSTS << 0x2);
321 } else if (hdcp->reg_io_width == 1) {
322 reg_rmsts_addr = hdcp->regs + HDMI_HDCPREG_RMSTS;
323 } else {
324 return -EPERM;
325 }
326
327 /* Disable decryption logic */
328 hdcp->write(hdmi, 0, HDMI_HDCPREG_RMCTL);
329 ret = readx_poll_timeout(readl, reg_rmsts_addr, val, val & DPK_WR_OK_STS, 0x3E8, DPK_WR_OK_TIMEOUT_US);
330 if (ret) {
331 return ret;
332 }
333 hdcp->write(hdmi, 0, HDMI_HDCPREG_DPK6);
334 hdcp->write(hdmi, 0, HDMI_HDCPREG_DPK5);
335
336 /* The useful data in ksv should be 5 byte */
337 for (i = 0x4; i >= 0; i--) {
338 hdcp->write(hdmi, hdcp_keys->KSV[i], HDMI_HDCPREG_DPK0 + i);
339 }
340 ret = readx_poll_timeout(readl, reg_rmsts_addr, val, val & DPK_WR_OK_STS, 0x3E8, DPK_WR_OK_TIMEOUT_US);
341 if (ret) {
342 return ret;
343 }
344
345 /* Enable decryption logic */
346 if (hdcp->seeds) {
347 hdcp->write(hdmi, 1, HDMI_HDCPREG_RMCTL);
348 hdcp->write(hdmi, hdcp->seeds[0], HDMI_HDCPREG_SEED1);
349 hdcp->write(hdmi, hdcp->seeds[1], HDMI_HDCPREG_SEED0);
350 } else {
351 hdcp->write(hdmi, 0, HDMI_HDCPREG_RMCTL);
352 }
353
354 /* Write encrypt device private key */
355 for (i = 0; i < DW_HDMI_HDCP_DPK_LEN - 0x6; i += 0x7) {
356 for (j = 0x6; j >= 0; j--) {
357 hdcp->write(hdmi, hdcp_keys->devicekey[i + j], HDMI_HDCPREG_DPK0 + j);
358 }
359 ret = readx_poll_timeout(readl, reg_rmsts_addr, val, val & DPK_WR_OK_STS, 0x3E8, DPK_WR_OK_TIMEOUT_US);
360 if (ret) {
361 return ret;
362 }
363 }
364 return 0;
365 }
366
dw_hdmi_hdcp_start(struct dw_hdcp *hdcp)367 static int dw_hdmi_hdcp_start(struct dw_hdcp *hdcp)
368 {
369 struct dw_hdmi *hdmi = hdcp->hdmi;
370
371 if (!hdcp->enable) {
372 return -EPERM;
373 }
374
375 if (!(hdcp->read(hdmi, HDMI_HDCPREG_RMSTS) & 0x3f)) {
376 dw_hdmi_hdcp_load_key(hdcp);
377 }
378
379 hdcp_modb(hdcp, HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE, HDMI_FC_INVIDCONF_HDCP_KEEPOUT_MASK, HDMI_FC_INVIDCONF);
380
381 hdcp->remaining_times = hdcp->retry_times;
382 if (hdcp->read(hdmi, HDMI_CONFIG1_ID) & HDMI_A_HDCP22_MASK) {
383 if (hdcp->hdcp2_enable == 0) {
384 hdcp_modb(hdcp, HDMI_HDCP2_OVR_ENABLE | HDMI_HDCP2_FORCE_DISABLE,
385 HDMI_HDCP2_OVR_EN_MASK | HDMI_HDCP2_FORCE_MASK, HDMI_HDCP2REG_CTRL);
386 hdcp->write(hdmi, 0xff, HDMI_HDCP2REG_MASK);
387 hdcp->write(hdmi, 0xff, HDMI_HDCP2REG_MUTE);
388 } else {
389 hdcp_modb(hdcp, HDMI_HDCP2_OVR_DISABLE | HDMI_HDCP2_FORCE_DISABLE,
390 HDMI_HDCP2_OVR_EN_MASK | HDMI_HDCP2_FORCE_MASK, HDMI_HDCP2REG_CTRL);
391 hdcp->write(hdmi, 0x00, HDMI_HDCP2REG_MASK);
392 hdcp->write(hdmi, 0x00, HDMI_HDCP2REG_MUTE);
393 }
394 }
395
396 hdcp->write(hdmi, 0x40, HDMI_A_OESSWCFG);
397 hdcp_modb(hdcp,
398 HDMI_A_HDCPCFG0_BYPENCRYPTION_DISABLE | HDMI_A_HDCPCFG0_EN11FEATURE_DISABLE |
399 HDMI_A_HDCPCFG0_SYNCRICHECK_ENABLE,
400 HDMI_A_HDCPCFG0_BYPENCRYPTION_MASK | HDMI_A_HDCPCFG0_EN11FEATURE_MASK | HDMI_A_HDCPCFG0_SYNCRICHECK_MASK,
401 HDMI_A_HDCPCFG0);
402
403 hdcp_modb(hdcp, HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_ENABLE | HDMI_A_HDCPCFG1_PH2UPSHFTENC_ENABLE,
404 HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_MASK | HDMI_A_HDCPCFG1_PH2UPSHFTENC_MASK, HDMI_A_HDCPCFG1);
405
406 /* Reset HDCP Engine */
407 if (hdcp->read(hdmi, HDMI_MC_CLKDIS) & HDMI_MC_CLKDIS_HDCPCLK_MASK) {
408 hdcp_modb(hdcp, HDMI_A_HDCPCFG1_SWRESET_ASSERT, HDMI_A_HDCPCFG1_SWRESET_MASK, HDMI_A_HDCPCFG1);
409 }
410
411 hdcp->write(hdmi, 0x00, HDMI_A_APIINTMSK);
412 hdcp_modb(hdcp, HDMI_A_HDCPCFG0_RXDETECT_ENABLE, HDMI_A_HDCPCFG0_RXDETECT_MASK, HDMI_A_HDCPCFG0);
413
414 /*
415 * XXX: to sleep 100ms here between output hdmi and enable hdcpclk,
416 * otherwise hdcp auth fail when Connect to repeater
417 */
418 msleep(0x64);
419 hdcp_modb(hdcp, HDMI_MC_CLKDIS_HDCPCLK_ENABLE, HDMI_MC_CLKDIS_HDCPCLK_MASK, HDMI_MC_CLKDIS);
420
421 hdcp->status = DW_HDCP_AUTH_START;
422 dev_dbg(hdcp->dev, "%s success\n", __func__);
423 return 0;
424 }
425
dw_hdmi_hdcp_stop(struct dw_hdcp *hdcp)426 static int dw_hdmi_hdcp_stop(struct dw_hdcp *hdcp)
427 {
428 struct dw_hdmi *hdmi = hdcp->hdmi;
429
430 if (!hdcp->enable) {
431 return -EPERM;
432 }
433
434 hdcp_modb(hdcp, HDMI_MC_CLKDIS_HDCPCLK_DISABLE, HDMI_MC_CLKDIS_HDCPCLK_MASK, HDMI_MC_CLKDIS);
435 hdcp->write(hdmi, 0xff, HDMI_A_APIINTMSK);
436
437 hdcp_modb(hdcp, HDMI_A_HDCPCFG0_RXDETECT_DISABLE, HDMI_A_HDCPCFG0_RXDETECT_MASK, HDMI_A_HDCPCFG0);
438
439 hdcp_modb(hdcp, HDMI_A_SRMCTRL_SHA1_FAIL_DISABLE | HDMI_A_SRMCTRL_KSV_UPDATE_DISABLE,
440 HDMI_A_SRMCTRL_SHA1_FAIL_MASK | HDMI_A_SRMCTRL_KSV_UPDATE_MASK, HDMI_A_SRMCTRL);
441
442 hdcp->status = DW_HDCP_DISABLED;
443 return 0;
444 }
445
dw_hdmi_hdcp_ksvsha1(struct dw_hdcp *hdcp)446 static int dw_hdmi_hdcp_ksvsha1(struct dw_hdcp *hdcp)
447 {
448 int rc = 0, value, list, i;
449 char bstaus0, bstaus1;
450 char *ksvlistbuf;
451 struct dw_hdmi *hdmi = hdcp->hdmi;
452
453 hdcp_modb(hdcp, HDMI_A_SRMCTRL_KSV_MEM_REQ_ENABLE, HDMI_A_SRMCTRL_KSV_MEM_REQ_MASK, HDMI_A_SRMCTRL);
454
455 list = 0x14;
456 do {
457 value = hdcp->read(hdmi, HDMI_A_SRMCTRL);
458 usleep_range(0x1F4, 0x3E8);
459 } while ((value & HDMI_A_SRMCTRL_KSV_MEM_ACCESS_MASK) == 0 && --list);
460
461 if ((value & HDMI_A_SRMCTRL_KSV_MEM_ACCESS_MASK) == 0) {
462 dev_err(hdcp->dev, "KSV memory can not access\n");
463 rc = -EPERM;
464 goto out;
465 }
466
467 hdcp->read(hdmi, HDMI_A_SRM_BASE);
468 bstaus0 = hdcp->read(hdmi, HDMI_A_SRM_BASE + 1);
469 bstaus1 = hdcp->read(hdmi, HDMI_A_SRM_BASE + 0x2);
470
471 if (bstaus0 & HDMI_A_SRM_BASE_MAX_DEVS_EXCEEDED) {
472 dev_err(hdcp->dev, "MAX_DEVS_EXCEEDED\n");
473 rc = -EPERM;
474 goto out;
475 }
476
477 list = bstaus0 & HDMI_A_SRM_BASE_DEVICE_COUNT;
478 if (list > MAX_DOWNSTREAM_DEVICE_NUM) {
479 dev_err(hdcp->dev, "MAX_DOWNSTREAM_DEVICE_NUM\n");
480 rc = -EPERM;
481 goto out;
482 }
483 if (bstaus1 & HDMI_A_SRM_BASE_MAX_CASCADE_EXCEEDED) {
484 dev_err(hdcp->dev, "MAX_CASCADE_EXCEEDED\n");
485 rc = -EPERM;
486 goto out;
487 }
488
489 value = (list * KSV_LEN) + HEADER + SHAMAX;
490 ksvlistbuf = kmalloc(value, GFP_KERNEL);
491 if (!ksvlistbuf) {
492 rc = -ENOMEM;
493 goto out;
494 }
495
496 ksvlistbuf[(list * KSV_LEN)] = bstaus0;
497 ksvlistbuf[(list * KSV_LEN) + 1] = bstaus1;
498 for (i = 0x2; i < value; i++) {
499 if (i < HEADER) { /* BSTATUS & M0 */
500 ksvlistbuf[(list * KSV_LEN) + i] = hdcp->read(hdmi, HDMI_A_SRM_BASE + i + 1);
501 } else if (i < (HEADER + (list * KSV_LEN))) { /* KSV list */
502 ksvlistbuf[i - HEADER] = hdcp->read(hdmi, HDMI_A_SRM_BASE + i + 1);
503 } else { /* SHA */
504 ksvlistbuf[i] = hdcp->read(hdmi, HDMI_A_SRM_BASE + i + 1);
505 }
506 }
507 if (hdcp_verify_ksv(ksvlistbuf, value) == true) {
508 rc = 0;
509 dev_dbg(hdcp->dev, "ksv check valid\n");
510 } else {
511 dev_err(hdcp->dev, "ksv check invalid\n");
512 rc = -1;
513 }
514 kfree(ksvlistbuf);
515 out:
516 hdcp_modb(hdcp, HDMI_A_SRMCTRL_KSV_MEM_REQ_DISABLE, HDMI_A_SRMCTRL_KSV_MEM_REQ_MASK, HDMI_A_SRMCTRL);
517 return rc;
518 }
519
dw_hdmi_hdcp_2nd_auth(struct dw_hdcp *hdcp)520 static void dw_hdmi_hdcp_2nd_auth(struct dw_hdcp *hdcp)
521 {
522 if (dw_hdmi_hdcp_ksvsha1(hdcp)) {
523 hdcp_modb(hdcp, HDMI_A_SRMCTRL_SHA1_FAIL_ENABLE | HDMI_A_SRMCTRL_KSV_UPDATE_ENABLE,
524 HDMI_A_SRMCTRL_SHA1_FAIL_MASK | HDMI_A_SRMCTRL_KSV_UPDATE_MASK, HDMI_A_SRMCTRL);
525 } else {
526 hdcp_modb(hdcp, HDMI_A_SRMCTRL_SHA1_FAIL_DISABLE | HDMI_A_SRMCTRL_KSV_UPDATE_ENABLE,
527 HDMI_A_SRMCTRL_SHA1_FAIL_MASK | HDMI_A_SRMCTRL_KSV_UPDATE_MASK, HDMI_A_SRMCTRL);
528 }
529 }
530
dw_hdmi_hdcp_isr(struct dw_hdcp *hdcp, int hdcp_int)531 static void dw_hdmi_hdcp_isr(struct dw_hdcp *hdcp, int hdcp_int)
532 {
533 dev_dbg(hdcp->dev, "hdcp_int is 0x%02x\n", hdcp_int);
534 if (hdcp_int & HDMI_A_APIINTSTAT_KSVSHA1_CALC_INT) {
535 dev_dbg(hdcp->dev, "hdcp sink is a repeater\n");
536 dw_hdmi_hdcp_2nd_auth(hdcp);
537 }
538 if (hdcp_int & 0x40) {
539 hdcp->status = DW_HDCP_AUTH_FAIL;
540 if (hdcp->remaining_times > 1) {
541 hdcp->remaining_times--;
542 } else if (hdcp->remaining_times == 1) {
543 hdcp_modb(hdcp, HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_DISABLE, HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_MASK,
544 HDMI_A_HDCPCFG1);
545 }
546 }
547 if (hdcp_int & 0x80) {
548 dev_dbg(hdcp->dev, "hdcp auth success\n");
549 hdcp->status = DW_HDCP_AUTH_SUCCESS;
550 }
551 }
552
hdcp_enable_read(struct device *device, struct device_attribute *attr, char *buf)553 static ssize_t hdcp_enable_read(struct device *device, struct device_attribute *attr, char *buf)
554 {
555 bool enable = 0;
556 struct dw_hdcp *hdcp = g_hdcp;
557
558 if (hdcp) {
559 enable = hdcp->enable;
560 }
561
562 return snprintf(buf, PAGE_SIZE, "%d\n", enable);
563 }
564
hdcp_enable_write(struct device *device, struct device_attribute *attr, const char *buf, size_t count)565 static ssize_t hdcp_enable_write(struct device *device, struct device_attribute *attr, const char *buf, size_t count)
566 {
567 bool enable;
568 struct dw_hdcp *hdcp = g_hdcp;
569
570 if (!hdcp) {
571 return -EINVAL;
572 }
573
574 if (kstrtobool(buf, &enable)) {
575 return -EINVAL;
576 }
577
578 if (hdcp->enable != enable) {
579 if (enable) {
580 hdcp->enable = enable;
581 if (hdcp->read(hdcp->hdmi, HDMI_PHY_STAT0) & HDMI_PHY_HPD) {
582 dw_hdmi_hdcp_start(hdcp);
583 }
584 } else {
585 dw_hdmi_hdcp_stop(hdcp);
586 hdcp->enable = enable;
587 }
588 }
589
590 return count;
591 }
592
593 static DEVICE_ATTR(enable, 0644, hdcp_enable_read, hdcp_enable_write);
594
hdcp_trytimes_read(struct device *device, struct device_attribute *attr, char *buf)595 static ssize_t hdcp_trytimes_read(struct device *device, struct device_attribute *attr, char *buf)
596 {
597 int trytimes = 0;
598 struct dw_hdcp *hdcp = g_hdcp;
599
600 if (hdcp) {
601 trytimes = hdcp->retry_times;
602 }
603
604 return snprintf(buf, PAGE_SIZE, "%d\n", trytimes);
605 }
606
hdcp_trytimes_write(struct device *device, struct device_attribute *attr, const char *buf, size_t count)607 static ssize_t hdcp_trytimes_write(struct device *device, struct device_attribute *attr, const char *buf, size_t count)
608 {
609 int trytimes;
610 struct dw_hdcp *hdcp = g_hdcp;
611
612 if (!hdcp) {
613 return -EINVAL;
614 }
615
616 if (kstrtoint(buf, 0, &trytimes)) {
617 return -EINVAL;
618 }
619
620 if (hdcp->retry_times != trytimes) {
621 hdcp->retry_times = trytimes;
622 hdcp->remaining_times = hdcp->retry_times;
623 }
624
625 return count;
626 }
627
628 static DEVICE_ATTR(trytimes, 0644, hdcp_trytimes_read, hdcp_trytimes_write);
629
hdcp_status_read(struct device *device, struct device_attribute *attr, char *buf)630 static ssize_t hdcp_status_read(struct device *device, struct device_attribute *attr, char *buf)
631 {
632 int status = DW_HDCP_DISABLED;
633 struct dw_hdcp *hdcp = g_hdcp;
634
635 if (hdcp) {
636 status = hdcp->status;
637 }
638
639 if (status == DW_HDCP_DISABLED) {
640 return snprintf(buf, PAGE_SIZE, "hdcp disable\n");
641 } else if (status == DW_HDCP_AUTH_START) {
642 return snprintf(buf, PAGE_SIZE, "hdcp_auth_start\n");
643 } else if (status == DW_HDCP_AUTH_SUCCESS) {
644 return snprintf(buf, PAGE_SIZE, "hdcp_auth_success\n");
645 } else if (status == DW_HDCP_AUTH_FAIL) {
646 return snprintf(buf, PAGE_SIZE, "hdcp_auth_fail\n");
647 } else {
648 return snprintf(buf, PAGE_SIZE, "unknown status\n");
649 }
650 }
651
652 static DEVICE_ATTR(status, 0444, hdcp_status_read, NULL);
653
dw_hdmi_hdcp_probe(struct platform_device *pdev)654 static int dw_hdmi_hdcp_probe(struct platform_device *pdev)
655 {
656 int ret = 0;
657 struct dw_hdcp *hdcp = pdev->dev.platform_data;
658
659 g_hdcp = hdcp;
660 hdcp->mdev.minor = MISC_DYNAMIC_MINOR;
661 hdcp->mdev.name = "hdmi_hdcp1x";
662 hdcp->mdev.mode = DEV_MOD;
663
664 if (misc_register(&hdcp->mdev)) {
665 dev_err(&pdev->dev, "HDCP: Could not add character driver\n");
666 return -EINVAL;
667 }
668
669 ret = device_create_file(hdcp->mdev.this_device, &dev_attr_enable);
670 if (ret) {
671 dev_err(&pdev->dev, "HDCP: Could not add sys file enable\n");
672 ret = -EINVAL;
673 goto error0;
674 }
675
676 ret = device_create_file(hdcp->mdev.this_device, &dev_attr_trytimes);
677 if (ret) {
678 dev_err(&pdev->dev, "HDCP: Could not add sys file trytimes\n");
679 ret = -EINVAL;
680 goto error1;
681 }
682
683 ret = device_create_file(hdcp->mdev.this_device, &dev_attr_status);
684 if (ret) {
685 dev_err(&pdev->dev, "HDCP: Could not add sys file status\n");
686 ret = -EINVAL;
687 goto error2;
688 }
689
690 /* retry time if hdcp auth fail. unlimited time if set 0 */
691 hdcp->retry_times = 0;
692 hdcp->dev = &pdev->dev;
693 hdcp->hdcp_start = dw_hdmi_hdcp_start;
694 hdcp->hdcp_stop = dw_hdmi_hdcp_stop;
695 hdcp->hdcp_isr = dw_hdmi_hdcp_isr;
696 dev_dbg(hdcp->dev, "%s success\n", __func__);
697 return 0;
698
699 error2:
700 device_remove_file(hdcp->mdev.this_device, &dev_attr_trytimes);
701 error1:
702 device_remove_file(hdcp->mdev.this_device, &dev_attr_enable);
703 error0:
704 misc_deregister(&hdcp->mdev);
705 return ret;
706 }
707
dw_hdmi_hdcp_remove(struct platform_device *pdev)708 static int dw_hdmi_hdcp_remove(struct platform_device *pdev)
709 {
710 struct dw_hdcp *hdcp = pdev->dev.platform_data;
711
712 device_remove_file(hdcp->mdev.this_device, &dev_attr_trytimes);
713 device_remove_file(hdcp->mdev.this_device, &dev_attr_enable);
714 device_remove_file(hdcp->mdev.this_device, &dev_attr_status);
715 misc_deregister(&hdcp->mdev);
716
717 kfree(hdcp->keys);
718 kfree(hdcp->seeds);
719
720 return 0;
721 }
722
723 static struct platform_driver dw_hdmi_hdcp_driver = {
724 .probe = dw_hdmi_hdcp_probe,
725 .remove = dw_hdmi_hdcp_remove,
726 .driver =
727 {
728 .name = DW_HDCP_DRIVER_NAME,
729 },
730 };
731
732 module_platform_driver(dw_hdmi_hdcp_driver);
733 MODULE_DESCRIPTION("DW HDMI transmitter HDCP driver");
734 MODULE_LICENSE("GPL");
735