1 /*
2 * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
3 * Author Huicong Xu <xhc@rock-chips.com>
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15 #include <linux/clk.h>
16 #include <linux/delay.h>
17 #include <linux/err.h>
18 #include <linux/hdmi.h>
19 #include <linux/iopoll.h>
20 #include <linux/irq.h>
21 #include <linux/kthread.h>
22 #include <linux/mutex.h>
23 #include <linux/module.h>
24 #include <linux/of_device.h>
25 #include <linux/spinlock.h>
26 #include <linux/soc/rockchip/rk_vendor_storage.h>
27 #include <crypto/sha.h>
28 #include <drm/bridge/dw_hdmi.h>
29
30 #include "dw-hdmi.h"
31 #include "dw-hdmi-hdcp.h"
32
33 #define HDCP_KEY_SIZE 308
34 #define HDCP_KEY_SEED_SIZE 2
35
36 #define KSV_LEN 5
37 #define HEADER 10
38 #define SHAMAX 20
39
40 #define MAX_DOWNSTREAM_DEVICE_NUM 5
41 #define DPK_WR_OK_TIMEOUT_US 30000
42 #define HDMI_HDCP1X_ID 5
43
44 /* HDCP Registers */
45 #define HDMI_HDCPREG_RMCTL 0x780e
46 #define HDMI_HDCPREG_RMSTS 0x780f
47 #define HDMI_HDCPREG_SEED0 0x7810
48 #define HDMI_HDCPREG_SEED1 0x7811
49 #define HDMI_HDCPREG_DPK0 0x7812
50 #define HDMI_HDCPREG_DPK1 0x7813
51 #define HDMI_HDCPREG_DPK2 0x7814
52 #define HDMI_HDCPREG_DPK3 0x7815
53 #define HDMI_HDCPREG_DPK4 0x7816
54 #define HDMI_HDCPREG_DPK5 0x7817
55 #define HDMI_HDCPREG_DPK6 0x7818
56 #define HDMI_HDCP2REG_CTRL 0x7904
57 #define HDMI_HDCP2REG_MASK 0x790c
58 #define HDMI_HDCP2REG_MUTE 0x790e
59
60 enum dw_hdmi_hdcp_state {
61 DW_HDCP_DISABLED,
62 DW_HDCP_AUTH_START,
63 DW_HDCP_AUTH_SUCCESS,
64 DW_HDCP_AUTH_FAIL,
65 };
66
67 enum {
68 DW_HDMI_HDCP_KSV_LEN = 8,
69 DW_HDMI_HDCP_SHA_LEN = 20,
70 DW_HDMI_HDCP_DPK_LEN = 280,
71 DW_HDMI_HDCP_KEY_LEN = 308,
72 DW_HDMI_HDCP_SEED_LEN = 2,
73 };
74
75 enum {
76 HDMI_MC_CLKDIS_HDCPCLK_MASK = 0x40,
77 HDMI_MC_CLKDIS_HDCPCLK_ENABLE = 0x00,
78
79 HDMI_A_SRMCTRL_SHA1_FAIL_MASK = 0X08,
80 HDMI_A_SRMCTRL_SHA1_FAIL_DISABLE = 0X00,
81 HDMI_A_SRMCTRL_SHA1_FAIL_ENABLE = 0X08,
82
83 HDMI_A_SRMCTRL_KSV_UPDATE_MASK = 0X04,
84 HDMI_A_SRMCTRL_KSV_UPDATE_DISABLE = 0X00,
85 HDMI_A_SRMCTRL_KSV_UPDATE_ENABLE = 0X04,
86
87 HDMI_A_SRMCTRL_KSV_MEM_REQ_MASK = 0X01,
88 HDMI_A_SRMCTRL_KSV_MEM_REQ_DISABLE = 0X00,
89 HDMI_A_SRMCTRL_KSV_MEM_REQ_ENABLE = 0X01,
90
91 HDMI_A_SRMCTRL_KSV_MEM_ACCESS_MASK = 0X02,
92 HDMI_A_SRMCTRL_KSV_MEM_ACCESS_DISABLE = 0X00,
93 HDMI_A_SRMCTRL_KSV_MEM_ACCESS_ENABLE = 0X02,
94
95 HDMI_A_SRM_BASE_MAX_DEVS_EXCEEDED = 0x80,
96 HDMI_A_SRM_BASE_DEVICE_COUNT = 0x7f,
97
98 HDMI_A_SRM_BASE_MAX_CASCADE_EXCEEDED = 0x08,
99
100 HDMI_A_APIINTSTAT_KSVSHA1_CALC_INT = 0x02,
101
102 /* HDCPREG_RMSTS field values */
103 DPK_WR_OK_STS = 0x40,
104
105 HDMI_A_HDCP22_MASK = 0x40,
106
107 HDMI_HDCP2_OVR_EN_MASK = 0x02,
108 HDMI_HDCP2_OVR_ENABLE = 0x02,
109 HDMI_HDCP2_OVR_DISABLE = 0x00,
110
111 HDMI_HDCP2_FORCE_MASK = 0x04,
112 HDMI_HDCP2_FORCE_ENABLE = 0x04,
113 HDMI_HDCP2_FORCE_DISABLE = 0x00,
114 };
115
116 struct sha_t {
117 u8 mlength[8];
118 u8 mblock[64];
119 int mindex;
120 int mcomputed;
121 int mcorrupted;
122 unsigned int mdigest[5];
123 };
124
125 static struct dw_hdcp *g_hdcp;
126
shacircularshift(unsigned int bits, unsigned int word)127 static inline unsigned int shacircularshift(unsigned int bits,
128 unsigned int word)
129 {
130 return (((word << bits) & 0xFFFFFFFF) | (word >> (32 - bits)));
131 }
132
hdcp_modb(struct dw_hdcp *hdcp, u8 data, u8 mask, unsigned int reg)133 static void hdcp_modb(struct dw_hdcp *hdcp, u8 data, u8 mask, unsigned int reg)
134 {
135 struct dw_hdmi *hdmi = hdcp->hdmi;
136 u8 val = hdcp->read(hdmi, reg) & ~mask;
137
138 val |= data & mask;
139 hdcp->write(hdmi, val, reg);
140 }
141
sha_reset(struct sha_t *sha)142 static void sha_reset(struct sha_t *sha)
143 {
144 u32 i = 0;
145
146 sha->mindex = 0;
147 sha->mcomputed = false;
148 sha->mcorrupted = false;
149 for (i = 0; i < sizeof(sha->mlength); i++)
150 sha->mlength[i] = 0;
151
152 sha1_init(sha->mdigest);
153 }
154
sha_processblock(struct sha_t *sha)155 static void sha_processblock(struct sha_t *sha)
156 {
157 u32 array[SHA1_WORKSPACE_WORDS];
158
159 sha1_transform(sha->mdigest, sha->mblock, array);
160 sha->mindex = 0;
161 }
162
sha_padmessage(struct sha_t *sha)163 static void sha_padmessage(struct sha_t *sha)
164 {
165 /*
166 * Check to see if the current message block is too small to hold
167 * the initial padding bits and length. If so, we will pad the
168 * block, process it, and then continue padding into a second
169 * block.
170 */
171 if (sha->mindex > 55) {
172 sha->mblock[sha->mindex++] = 0x80;
173 while (sha->mindex < 64)
174 sha->mblock[sha->mindex++] = 0;
175
176 sha_processblock(sha);
177 while (sha->mindex < 56)
178 sha->mblock[sha->mindex++] = 0;
179 } else {
180 sha->mblock[sha->mindex++] = 0x80;
181 while (sha->mindex < 56)
182 sha->mblock[sha->mindex++] = 0;
183 }
184
185 /* Store the message length as the last 8 octets */
186 sha->mblock[56] = sha->mlength[7];
187 sha->mblock[57] = sha->mlength[6];
188 sha->mblock[58] = sha->mlength[5];
189 sha->mblock[59] = sha->mlength[4];
190 sha->mblock[60] = sha->mlength[3];
191 sha->mblock[61] = sha->mlength[2];
192 sha->mblock[62] = sha->mlength[1];
193 sha->mblock[63] = sha->mlength[0];
194
195 sha_processblock(sha);
196 }
197
sha_result(struct sha_t *sha)198 static int sha_result(struct sha_t *sha)
199 {
200 if (sha->mcorrupted)
201 return false;
202
203 if (sha->mcomputed == 0) {
204 sha_padmessage(sha);
205 sha->mcomputed = true;
206 }
207 return true;
208 }
209
sha_input(struct sha_t *sha, const u8 *data, u32 size)210 static void sha_input(struct sha_t *sha, const u8 *data, u32 size)
211 {
212 int i = 0;
213 unsigned int j = 0;
214 int rc = true;
215
216 if (data == 0 || size == 0)
217 return;
218
219 if (sha->mcomputed || sha->mcorrupted) {
220 sha->mcorrupted = true;
221 return;
222 }
223 while (size-- && !sha->mcorrupted) {
224 sha->mblock[sha->mindex++] = *data;
225
226 for (i = 0; i < 8; i++) {
227 rc = true;
228 for (j = 0; j < sizeof(sha->mlength); j++) {
229 sha->mlength[j]++;
230 if (sha->mlength[j] != 0) {
231 rc = false;
232 break;
233 }
234 }
235 sha->mcorrupted = (sha->mcorrupted ||
236 rc) ? true : false;
237 }
238 /* if corrupted then message is too long */
239 if (sha->mindex == 64)
240 sha_processblock(sha);
241 data++;
242 }
243 }
244
hdcp_verify_ksv(const u8 *data, u32 size)245 static int hdcp_verify_ksv(const u8 *data, u32 size)
246 {
247 u32 i = 0;
248 struct sha_t sha;
249
250 if ((!data) || (size < (HEADER + SHAMAX)))
251 return false;
252
253 sha_reset(&sha);
254 sha_input(&sha, data, size - SHAMAX);
255 if (sha_result(&sha) == false)
256 return false;
257
258 for (i = 0; i < SHAMAX; i++) {
259 if (data[size - SHAMAX + i] != (u8)(sha.mdigest[i / 4]
260 >> ((i % 4) * 8)))
261 return false;
262 }
263 return true;
264 }
265
hdcp_load_keys_cb(struct dw_hdcp *hdcp)266 static int hdcp_load_keys_cb(struct dw_hdcp *hdcp)
267 {
268 u32 size;
269 u8 hdcp_vendor_data[320];
270
271 hdcp->keys = kmalloc(HDCP_KEY_SIZE, GFP_KERNEL);
272 if (!hdcp->keys)
273 return -ENOMEM;
274
275 hdcp->seeds = kmalloc(HDCP_KEY_SEED_SIZE, GFP_KERNEL);
276 if (!hdcp->seeds) {
277 kfree(hdcp->keys);
278 return -ENOMEM;
279 }
280
281 size = rk_vendor_read(HDMI_HDCP1X_ID, hdcp_vendor_data, 314);
282 if (size < (HDCP_KEY_SIZE + HDCP_KEY_SEED_SIZE)) {
283 dev_dbg(hdcp->dev, "HDCP: read size %d\n", size);
284 memset(hdcp->keys, 0, HDCP_KEY_SIZE);
285 memset(hdcp->seeds, 0, HDCP_KEY_SEED_SIZE);
286 } else {
287 memcpy(hdcp->keys, hdcp_vendor_data, HDCP_KEY_SIZE);
288 memcpy(hdcp->seeds, hdcp_vendor_data + HDCP_KEY_SIZE,
289 HDCP_KEY_SEED_SIZE);
290 }
291 return 0;
292 }
293
dw_hdmi_hdcp_load_key(struct dw_hdcp *hdcp)294 static int dw_hdmi_hdcp_load_key(struct dw_hdcp *hdcp)
295 {
296 int i, j;
297 int ret, val;
298 void __iomem *reg_rmsts_addr;
299 struct hdcp_keys *hdcp_keys;
300 struct dw_hdmi *hdmi = hdcp->hdmi;
301
302 if (!hdcp->keys) {
303 ret = hdcp_load_keys_cb(hdcp);
304 if (ret)
305 return ret;
306 }
307 hdcp_keys = hdcp->keys;
308
309 if (hdcp->reg_io_width == 4)
310 reg_rmsts_addr = hdcp->regs + (HDMI_HDCPREG_RMSTS << 2);
311 else if (hdcp->reg_io_width == 1)
312 reg_rmsts_addr = hdcp->regs + HDMI_HDCPREG_RMSTS;
313 else
314 return -EPERM;
315
316 /* Disable decryption logic */
317 hdcp->write(hdmi, 0, HDMI_HDCPREG_RMCTL);
318 ret = readx_poll_timeout(readl, reg_rmsts_addr, val,
319 val & DPK_WR_OK_STS, 1000,
320 DPK_WR_OK_TIMEOUT_US);
321 if (ret)
322 return ret;
323 hdcp->write(hdmi, 0, HDMI_HDCPREG_DPK6);
324 hdcp->write(hdmi, 0, HDMI_HDCPREG_DPK5);
325
326 /* The useful data in ksv should be 5 byte */
327 for (i = 4; i >= 0; i--)
328 hdcp->write(hdmi, hdcp_keys->KSV[i], HDMI_HDCPREG_DPK0 + i);
329 ret = readx_poll_timeout(readl, reg_rmsts_addr, val,
330 val & DPK_WR_OK_STS, 1000,
331 DPK_WR_OK_TIMEOUT_US);
332
333 if (ret)
334 return ret;
335
336 /* Enable decryption logic */
337 if (hdcp->seeds) {
338 hdcp->write(hdmi, 1, HDMI_HDCPREG_RMCTL);
339 hdcp->write(hdmi, hdcp->seeds[0], HDMI_HDCPREG_SEED1);
340 hdcp->write(hdmi, hdcp->seeds[1], HDMI_HDCPREG_SEED0);
341 } else {
342 hdcp->write(hdmi, 0, HDMI_HDCPREG_RMCTL);
343 }
344
345 /* Write encrypt device private key */
346 for (i = 0; i < DW_HDMI_HDCP_DPK_LEN - 6; i += 7) {
347 for (j = 6; j >= 0; j--)
348 hdcp->write(hdmi, hdcp_keys->devicekey[i + j],
349 HDMI_HDCPREG_DPK0 + j);
350 ret = readx_poll_timeout(readl, reg_rmsts_addr, val,
351 val & DPK_WR_OK_STS, 1000,
352 DPK_WR_OK_TIMEOUT_US);
353
354 if (ret)
355 return ret;
356 }
357 return 0;
358 }
359
dw_hdmi_hdcp_start(struct dw_hdcp *hdcp)360 static int dw_hdmi_hdcp_start(struct dw_hdcp *hdcp)
361 {
362 struct dw_hdmi *hdmi = hdcp->hdmi;
363
364 if (!hdcp->enable)
365 return -EPERM;
366
367 if (!(hdcp->read(hdmi, HDMI_HDCPREG_RMSTS) & 0x3f))
368 dw_hdmi_hdcp_load_key(hdcp);
369
370 hdcp_modb(hdcp, HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE,
371 HDMI_FC_INVIDCONF_HDCP_KEEPOUT_MASK,
372 HDMI_FC_INVIDCONF);
373
374 hdcp->remaining_times = hdcp->retry_times;
375 if (hdcp->read(hdmi, HDMI_CONFIG1_ID) & HDMI_A_HDCP22_MASK) {
376 if (hdcp->hdcp2_enable == 0) {
377 hdcp_modb(hdcp, HDMI_HDCP2_OVR_ENABLE |
378 HDMI_HDCP2_FORCE_DISABLE,
379 HDMI_HDCP2_OVR_EN_MASK |
380 HDMI_HDCP2_FORCE_MASK,
381 HDMI_HDCP2REG_CTRL);
382 hdcp->write(hdmi, 0xff, HDMI_HDCP2REG_MASK);
383 hdcp->write(hdmi, 0xff, HDMI_HDCP2REG_MUTE);
384 } else {
385 hdcp_modb(hdcp, HDMI_HDCP2_OVR_DISABLE |
386 HDMI_HDCP2_FORCE_DISABLE,
387 HDMI_HDCP2_OVR_EN_MASK |
388 HDMI_HDCP2_FORCE_MASK,
389 HDMI_HDCP2REG_CTRL);
390 hdcp->write(hdmi, 0x00, HDMI_HDCP2REG_MASK);
391 hdcp->write(hdmi, 0x00, HDMI_HDCP2REG_MUTE);
392 }
393 }
394
395 hdcp->write(hdmi, 0x40, HDMI_A_OESSWCFG);
396 hdcp_modb(hdcp, HDMI_A_HDCPCFG0_BYPENCRYPTION_DISABLE |
397 HDMI_A_HDCPCFG0_EN11FEATURE_DISABLE |
398 HDMI_A_HDCPCFG0_SYNCRICHECK_ENABLE,
399 HDMI_A_HDCPCFG0_BYPENCRYPTION_MASK |
400 HDMI_A_HDCPCFG0_EN11FEATURE_MASK |
401 HDMI_A_HDCPCFG0_SYNCRICHECK_MASK, HDMI_A_HDCPCFG0);
402
403 hdcp_modb(hdcp, HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_ENABLE |
404 HDMI_A_HDCPCFG1_PH2UPSHFTENC_ENABLE,
405 HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_MASK |
406 HDMI_A_HDCPCFG1_PH2UPSHFTENC_MASK, HDMI_A_HDCPCFG1);
407
408 /* Reset HDCP Engine */
409 if (hdcp->read(hdmi, HDMI_MC_CLKDIS) & HDMI_MC_CLKDIS_HDCPCLK_MASK) {
410 hdcp_modb(hdcp, HDMI_A_HDCPCFG1_SWRESET_ASSERT,
411 HDMI_A_HDCPCFG1_SWRESET_MASK, HDMI_A_HDCPCFG1);
412 }
413
414 hdcp->write(hdmi, 0x00, HDMI_A_APIINTMSK);
415 hdcp_modb(hdcp, HDMI_A_HDCPCFG0_RXDETECT_ENABLE,
416 HDMI_A_HDCPCFG0_RXDETECT_MASK, HDMI_A_HDCPCFG0);
417
418 /*
419 * XXX: to sleep 100ms here between output hdmi and enable hdcpclk,
420 * otherwise hdcp auth fail when Connect to repeater
421 */
422 msleep(100);
423 hdcp_modb(hdcp, HDMI_MC_CLKDIS_HDCPCLK_ENABLE,
424 HDMI_MC_CLKDIS_HDCPCLK_MASK, HDMI_MC_CLKDIS);
425
426 hdcp->status = DW_HDCP_AUTH_START;
427 dev_dbg(hdcp->dev, "%s success\n", __func__);
428 return 0;
429 }
430
dw_hdmi_hdcp_stop(struct dw_hdcp *hdcp)431 static int dw_hdmi_hdcp_stop(struct dw_hdcp *hdcp)
432 {
433 struct dw_hdmi *hdmi = hdcp->hdmi;
434
435 if (!hdcp->enable)
436 return -EPERM;
437
438 hdcp_modb(hdcp, HDMI_MC_CLKDIS_HDCPCLK_DISABLE,
439 HDMI_MC_CLKDIS_HDCPCLK_MASK, HDMI_MC_CLKDIS);
440 hdcp->write(hdmi, 0xff, HDMI_A_APIINTMSK);
441
442 hdcp_modb(hdcp, HDMI_A_HDCPCFG0_RXDETECT_DISABLE,
443 HDMI_A_HDCPCFG0_RXDETECT_MASK, HDMI_A_HDCPCFG0);
444
445 hdcp_modb(hdcp, HDMI_A_SRMCTRL_SHA1_FAIL_DISABLE |
446 HDMI_A_SRMCTRL_KSV_UPDATE_DISABLE,
447 HDMI_A_SRMCTRL_SHA1_FAIL_MASK |
448 HDMI_A_SRMCTRL_KSV_UPDATE_MASK, HDMI_A_SRMCTRL);
449
450 hdcp->status = DW_HDCP_DISABLED;
451 return 0;
452 }
453
dw_hdmi_hdcp_ksvsha1(struct dw_hdcp *hdcp)454 static int dw_hdmi_hdcp_ksvsha1(struct dw_hdcp *hdcp)
455 {
456 int rc = 0, value, list, i;
457 char bstaus0, bstaus1;
458 char *ksvlistbuf;
459 struct dw_hdmi *hdmi = hdcp->hdmi;
460
461 hdcp_modb(hdcp, HDMI_A_SRMCTRL_KSV_MEM_REQ_ENABLE,
462 HDMI_A_SRMCTRL_KSV_MEM_REQ_MASK, HDMI_A_SRMCTRL);
463
464 list = 20;
465 do {
466 value = hdcp->read(hdmi, HDMI_A_SRMCTRL);
467 usleep_range(500, 1000);
468 } while ((value & HDMI_A_SRMCTRL_KSV_MEM_ACCESS_MASK) == 0 && --list);
469
470 if ((value & HDMI_A_SRMCTRL_KSV_MEM_ACCESS_MASK) == 0) {
471 dev_err(hdcp->dev, "KSV memory can not access\n");
472 rc = -EPERM;
473 goto out;
474 }
475
476 hdcp->read(hdmi, HDMI_A_SRM_BASE);
477 bstaus0 = hdcp->read(hdmi, HDMI_A_SRM_BASE + 1);
478 bstaus1 = hdcp->read(hdmi, HDMI_A_SRM_BASE + 2);
479
480 if (bstaus0 & HDMI_A_SRM_BASE_MAX_DEVS_EXCEEDED) {
481 dev_err(hdcp->dev, "MAX_DEVS_EXCEEDED\n");
482 rc = -EPERM;
483 goto out;
484 }
485
486 list = bstaus0 & HDMI_A_SRM_BASE_DEVICE_COUNT;
487 if (list > MAX_DOWNSTREAM_DEVICE_NUM) {
488 dev_err(hdcp->dev, "MAX_DOWNSTREAM_DEVICE_NUM\n");
489 rc = -EPERM;
490 goto out;
491 }
492 if (bstaus1 & HDMI_A_SRM_BASE_MAX_CASCADE_EXCEEDED) {
493 dev_err(hdcp->dev, "MAX_CASCADE_EXCEEDED\n");
494 rc = -EPERM;
495 goto out;
496 }
497
498 value = (list * KSV_LEN) + HEADER + SHAMAX;
499 ksvlistbuf = kmalloc(value, GFP_KERNEL);
500 if (!ksvlistbuf) {
501 rc = -ENOMEM;
502 goto out;
503 }
504
505 ksvlistbuf[(list * KSV_LEN)] = bstaus0;
506 ksvlistbuf[(list * KSV_LEN) + 1] = bstaus1;
507 for (i = 2; i < value; i++) {
508 if (i < HEADER) /* BSTATUS & M0 */
509 ksvlistbuf[(list * KSV_LEN) + i] =
510 hdcp->read(hdmi, HDMI_A_SRM_BASE + i + 1);
511 else if (i < (HEADER + (list * KSV_LEN))) /* KSV list */
512 ksvlistbuf[i - HEADER] =
513 hdcp->read(hdmi, HDMI_A_SRM_BASE + i + 1);
514 else /* SHA */
515 ksvlistbuf[i] =
516 hdcp->read(hdmi, HDMI_A_SRM_BASE + i + 1);
517 }
518 if (hdcp_verify_ksv(ksvlistbuf, value) == true) {
519 rc = 0;
520 dev_dbg(hdcp->dev, "ksv check valid\n");
521 } else {
522 dev_err(hdcp->dev, "ksv check invalid\n");
523 rc = -1;
524 }
525 kfree(ksvlistbuf);
526 out:
527 hdcp_modb(hdcp, HDMI_A_SRMCTRL_KSV_MEM_REQ_DISABLE,
528 HDMI_A_SRMCTRL_KSV_MEM_REQ_MASK, HDMI_A_SRMCTRL);
529 return rc;
530 }
531
dw_hdmi_hdcp_2nd_auth(struct dw_hdcp *hdcp)532 static void dw_hdmi_hdcp_2nd_auth(struct dw_hdcp *hdcp)
533 {
534 if (dw_hdmi_hdcp_ksvsha1(hdcp))
535 hdcp_modb(hdcp, HDMI_A_SRMCTRL_SHA1_FAIL_ENABLE |
536 HDMI_A_SRMCTRL_KSV_UPDATE_ENABLE,
537 HDMI_A_SRMCTRL_SHA1_FAIL_MASK |
538 HDMI_A_SRMCTRL_KSV_UPDATE_MASK, HDMI_A_SRMCTRL);
539 else
540 hdcp_modb(hdcp, HDMI_A_SRMCTRL_SHA1_FAIL_DISABLE |
541 HDMI_A_SRMCTRL_KSV_UPDATE_ENABLE,
542 HDMI_A_SRMCTRL_SHA1_FAIL_MASK |
543 HDMI_A_SRMCTRL_KSV_UPDATE_MASK, HDMI_A_SRMCTRL);
544 }
545
dw_hdmi_hdcp_isr(struct dw_hdcp *hdcp, int hdcp_int)546 static void dw_hdmi_hdcp_isr(struct dw_hdcp *hdcp, int hdcp_int)
547 {
548 dev_dbg(hdcp->dev, "hdcp_int is 0x%02x\n", hdcp_int);
549 if (hdcp_int & HDMI_A_APIINTSTAT_KSVSHA1_CALC_INT) {
550 dev_dbg(hdcp->dev, "hdcp sink is a repeater\n");
551 dw_hdmi_hdcp_2nd_auth(hdcp);
552 }
553 if (hdcp_int & 0x40) {
554 hdcp->status = DW_HDCP_AUTH_FAIL;
555 if (hdcp->remaining_times > 1)
556 hdcp->remaining_times--;
557 else if (hdcp->remaining_times == 1)
558 hdcp_modb(hdcp,
559 HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_DISABLE,
560 HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_MASK,
561 HDMI_A_HDCPCFG1);
562 }
563 if (hdcp_int & 0x80) {
564 dev_dbg(hdcp->dev, "hdcp auth success\n");
565 hdcp->status = DW_HDCP_AUTH_SUCCESS;
566 }
567 }
568
hdcp_enable_read(struct device *device, struct device_attribute *attr, char *buf)569 static ssize_t hdcp_enable_read(struct device *device,
570 struct device_attribute *attr, char *buf)
571 {
572 bool enable = 0;
573 struct dw_hdcp *hdcp = g_hdcp;
574
575 if (hdcp)
576 enable = hdcp->enable;
577
578 return snprintf(buf, PAGE_SIZE, "%d\n", enable);
579 }
580
hdcp_enable_write(struct device *device, struct device_attribute *attr, const char *buf, size_t count)581 static ssize_t hdcp_enable_write(struct device *device,
582 struct device_attribute *attr,
583 const char *buf, size_t count)
584 {
585 bool enable;
586 struct dw_hdcp *hdcp = g_hdcp;
587
588 if (!hdcp)
589 return -EINVAL;
590
591 if (kstrtobool(buf, &enable))
592 return -EINVAL;
593
594 if (hdcp->enable != enable) {
595 if (enable) {
596 hdcp->enable = enable;
597 if (hdcp->read(hdcp->hdmi, HDMI_PHY_STAT0) &
598 HDMI_PHY_HPD)
599 dw_hdmi_hdcp_start(hdcp);
600 } else {
601 dw_hdmi_hdcp_stop(hdcp);
602 hdcp->enable = enable;
603 }
604 }
605
606 return count;
607 }
608
609 static DEVICE_ATTR(enable, 0644, hdcp_enable_read, hdcp_enable_write);
610
hdcp_trytimes_read(struct device *device, struct device_attribute *attr, char *buf)611 static ssize_t hdcp_trytimes_read(struct device *device,
612 struct device_attribute *attr, char *buf)
613 {
614 int trytimes = 0;
615 struct dw_hdcp *hdcp = g_hdcp;
616
617 if (hdcp)
618 trytimes = hdcp->retry_times;
619
620 return snprintf(buf, PAGE_SIZE, "%d\n", trytimes);
621 }
622
hdcp_trytimes_write(struct device *device, struct device_attribute *attr, const char *buf, size_t count)623 static ssize_t hdcp_trytimes_write(struct device *device,
624 struct device_attribute *attr,
625 const char *buf, size_t count)
626 {
627 int trytimes;
628 struct dw_hdcp *hdcp = g_hdcp;
629
630 if (!hdcp)
631 return -EINVAL;
632
633 if (kstrtoint(buf, 0, &trytimes))
634 return -EINVAL;
635
636 if (hdcp->retry_times != trytimes) {
637 hdcp->retry_times = trytimes;
638 hdcp->remaining_times = hdcp->retry_times;
639 }
640
641 return count;
642 }
643
644 static DEVICE_ATTR(trytimes, 0644, hdcp_trytimes_read, hdcp_trytimes_write);
645
hdcp_status_read(struct device *device, struct device_attribute *attr, char *buf)646 static ssize_t hdcp_status_read(struct device *device,
647 struct device_attribute *attr, char *buf)
648 {
649 int status = DW_HDCP_DISABLED;
650 struct dw_hdcp *hdcp = g_hdcp;
651
652 if (hdcp)
653 status = hdcp->status;
654
655 if (status == DW_HDCP_DISABLED)
656 return snprintf(buf, PAGE_SIZE, "hdcp disable\n");
657 else if (status == DW_HDCP_AUTH_START)
658 return snprintf(buf, PAGE_SIZE, "hdcp_auth_start\n");
659 else if (status == DW_HDCP_AUTH_SUCCESS)
660 return snprintf(buf, PAGE_SIZE, "hdcp_auth_success\n");
661 else if (status == DW_HDCP_AUTH_FAIL)
662 return snprintf(buf, PAGE_SIZE, "hdcp_auth_fail\n");
663 else
664 return snprintf(buf, PAGE_SIZE, "unknown status\n");
665 }
666
667 static DEVICE_ATTR(status, 0444, hdcp_status_read, NULL);
668
dw_hdmi_hdcp_probe(struct platform_device *pdev)669 static int dw_hdmi_hdcp_probe(struct platform_device *pdev)
670 {
671 int ret = 0;
672 struct dw_hdcp *hdcp = pdev->dev.platform_data;
673
674 g_hdcp = hdcp;
675 hdcp->mdev.minor = MISC_DYNAMIC_MINOR;
676 hdcp->mdev.name = "hdmi_hdcp1x";
677 hdcp->mdev.mode = 0666;
678
679 if (misc_register(&hdcp->mdev)) {
680 dev_err(&pdev->dev, "HDCP: Could not add character driver\n");
681 return -EINVAL;
682 }
683
684 ret = device_create_file(hdcp->mdev.this_device, &dev_attr_enable);
685 if (ret) {
686 dev_err(&pdev->dev, "HDCP: Could not add sys file enable\n");
687 ret = -EINVAL;
688 goto error0;
689 }
690
691 ret = device_create_file(hdcp->mdev.this_device, &dev_attr_trytimes);
692 if (ret) {
693 dev_err(&pdev->dev, "HDCP: Could not add sys file trytimes\n");
694 ret = -EINVAL;
695 goto error1;
696 }
697
698 ret = device_create_file(hdcp->mdev.this_device, &dev_attr_status);
699 if (ret) {
700 dev_err(&pdev->dev, "HDCP: Could not add sys file status\n");
701 ret = -EINVAL;
702 goto error2;
703 }
704
705 /* retry time if hdcp auth fail. unlimited time if set 0 */
706 hdcp->retry_times = 0;
707 hdcp->dev = &pdev->dev;
708 hdcp->hdcp_start = dw_hdmi_hdcp_start;
709 hdcp->hdcp_stop = dw_hdmi_hdcp_stop;
710 hdcp->hdcp_isr = dw_hdmi_hdcp_isr;
711 dev_dbg(hdcp->dev, "%s success\n", __func__);
712 return 0;
713
714 error2:
715 device_remove_file(hdcp->mdev.this_device, &dev_attr_trytimes);
716 error1:
717 device_remove_file(hdcp->mdev.this_device, &dev_attr_enable);
718 error0:
719 misc_deregister(&hdcp->mdev);
720 return ret;
721 }
722
dw_hdmi_hdcp_remove(struct platform_device *pdev)723 static int dw_hdmi_hdcp_remove(struct platform_device *pdev)
724 {
725 struct dw_hdcp *hdcp = pdev->dev.platform_data;
726
727 device_remove_file(hdcp->mdev.this_device, &dev_attr_trytimes);
728 device_remove_file(hdcp->mdev.this_device, &dev_attr_enable);
729 device_remove_file(hdcp->mdev.this_device, &dev_attr_status);
730 misc_deregister(&hdcp->mdev);
731
732 kfree(hdcp->keys);
733 kfree(hdcp->seeds);
734
735 return 0;
736 }
737
738 static struct platform_driver dw_hdmi_hdcp_driver = {
739 .probe = dw_hdmi_hdcp_probe,
740 .remove = dw_hdmi_hdcp_remove,
741 .driver = {
742 .name = DW_HDCP_DRIVER_NAME,
743 },
744 };
745
746 module_platform_driver(dw_hdmi_hdcp_driver);
747 MODULE_DESCRIPTION("DW HDMI transmitter HDCP driver");
748 MODULE_LICENSE("GPL");
749