Searched refs:DPK_WR_OK_STS (Results 1 - 2 of 2) sorted by relevance
/device/soc/rockchip/common/vendor/drivers/gpu/drm/bridge/synopsys/ |
H A D | dw-hdmi-hdcp.c | 105 DPK_WR_OK_STS = 0x40,
enumerator 329 ret = readx_poll_timeout(readl, reg_rmsts_addr, val, val & DPK_WR_OK_STS, 0x3E8, DPK_WR_OK_TIMEOUT_US);
in dw_hdmi_hdcp_load_key() 340 ret = readx_poll_timeout(readl, reg_rmsts_addr, val, val & DPK_WR_OK_STS, 0x3E8, DPK_WR_OK_TIMEOUT_US);
in dw_hdmi_hdcp_load_key() 359 ret = readx_poll_timeout(readl, reg_rmsts_addr, val, val & DPK_WR_OK_STS, 0x3E8, DPK_WR_OK_TIMEOUT_US);
in dw_hdmi_hdcp_load_key()
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/device/soc/rockchip/rk3588/kernel/drivers/gpu/drm/bridge/synopsys/ |
H A D | dw-hdmi-hdcp.c | 103 DPK_WR_OK_STS = 0x40, enumerator 319 val & DPK_WR_OK_STS, 1000, in dw_hdmi_hdcp_load_key() 330 val & DPK_WR_OK_STS, 1000, in dw_hdmi_hdcp_load_key() 351 val & DPK_WR_OK_STS, 1000, in dw_hdmi_hdcp_load_key()
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