| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | reglist-arm64.h | 28 explicit CPURegList(CPURegister reg0, CPURegisters... regs) in CPURegList() argument
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| /third_party/mesa3d/src/freedreno/decode/ |
| H A D | crashdec-mempool.c | 56 uint32_t reg0 : 18; in dump_mem_pool_chunk() member
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| /third_party/node/deps/openssl/openssl/crypto/aria/ |
| H A D | aria.c | 474 register uint32_t reg0, reg1, reg2, reg3; in ossl_aria_encrypt() local
541 register uint32_t reg0, reg1, reg2, reg3; ossl_aria_set_encrypt_key() local
676 register uint32_t reg0, reg1, reg2, reg3; ossl_aria_set_decrypt_key() local
[all...] |
| /third_party/openssl/crypto/aria/ |
| H A D | aria.c | 474 register uint32_t reg0, reg1, reg2, reg3; in ossl_aria_encrypt() local
541 register uint32_t reg0, reg1, reg2, reg3; ossl_aria_set_encrypt_key() local
676 register uint32_t reg0, reg1, reg2, reg3; ossl_aria_set_decrypt_key() local
[all...] |
| /third_party/ffmpeg/libavcodec/loongarch/ |
| H A D | vp9_intra_lsx.c | 435 __m128i tmp0, tmp1, tmp2, tmp3, reg0, reg1; in ff_tm_4x4_lsx() local
467 __m128i reg0, reg1; in ff_tm_8x8_lsx() local
517 __m128i reg0, reg1; ff_tm_16x16_lsx() local
600 __m128i tmp0, tmp1, tmp2, tmp3, reg0, reg1, reg2; ff_tm_32x32_lsx() local
[all...] |
| H A D | vc1dsp_lasx.c | 144 __m256i reg0, reg1, reg2, reg3; in ff_vc1_inv_trans_8x8_dc_lasx() local
272 __m256i const_dc, temp0, temp1, reg0, reg1; in ff_vc1_inv_trans_8x4_dc_lasx() local
298 __m256i const_dc, temp0, temp1, temp2, temp3, reg0, reg1; in ff_vc1_inv_trans_4x8_dc_lasx() local
[all...] |
| H A D | vp9_mc_lsx.c | 457 __m128i reg0, reg1, reg2, reg3, reg4; in common_vt_8t_4w_lsx() local
517 __m128i reg0, reg1, reg2, reg3, reg4, reg5; in common_vt_8t_8w_lsx() local
589 __m128i reg0, reg1, reg2, reg3, reg4, reg5; common_vt_8t_16w_lsx() local
683 __m128i reg0, reg1, reg2, reg3, reg4, reg5; common_vt_8t_16w_mult_lsx() local
1543 __m128i reg0, reg1, reg2, reg3, reg4; common_vt_8t_and_aver_dst_4w_lsx() local
1619 __m128i reg0, reg1, reg2, reg3, reg4, reg5; common_vt_8t_and_aver_dst_8w_lsx() local
1705 __m128i reg0, reg1, reg2, reg3, reg4, reg5; common_vt_8t_and_aver_dst_16w_mult_lsx() local
[all...] |
| H A D | vp9_idct_lsx.c | 376 __m128i reg0, reg2, reg4, reg6, reg8, reg10, reg12, reg14; in vp9_idct16_1d_columns_addblk_lsx() local
502 __m128i reg0, reg2, reg4, reg6, reg8, reg10, reg12, reg14; vp9_idct16_1d_columns_lsx() local
883 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; vp9_idct8x32_column_even_process_store() local
998 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; vp9_idct8x32_column_odd_process_store() local
[all...] |
| H A D | hevc_mc_bi_lsx.c | 64 __m128i reg0, reg1, reg2, reg3; in hevc_bi_copy_4w_lsx() local
150 __m128i reg0, reg1, reg2, reg3; in hevc_bi_copy_6w_lsx() local
246 __m128i reg0, reg1, reg2, reg3; hevc_bi_copy_8w_lsx() local
1507 __m128i reg0, reg1, reg2, reg3; hevc_hv_4t_6w_lsx() local
[all...] |
| /third_party/ffmpeg/libavcodec/mips/ |
| H A D | h264pred_msa.c | 217 v4i32 reg0, reg1, reg2, reg3; in intra_predict_plane_16x16_msa() local
|
| H A D | vp9_idct_msa.c | 967 v8i16 reg0, reg2, reg4, reg6, reg8, reg10, reg12, reg14; in vp9_idct16_1d_columns_addblk_msa() local
1070 v8i16 reg0, reg2, reg4, reg6, reg8, reg10, reg12, reg14; vp9_idct16_1d_columns_msa() local
1634 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; vp9_idct8x32_column_even_process_store() local
1718 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; vp9_idct8x32_column_odd_process_store() local
[all...] |
| /third_party/backends/backend/ |
| H A D | p5_device.c | 723 uint8_t reg0=0; in start_scan() local
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| /third_party/mesa3d/src/util/ |
| H A D | register_allocate.c | 178 ra_add_transitive_reg_pair_conflict(struct ra_regs *regs, unsigned int base_reg, unsigned int reg0, unsigned int reg1) ra_add_transitive_reg_pair_conflict() argument
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| /third_party/node/deps/v8/src/codegen/s390/ |
| H A D | assembler-s390.cc | 195 int16_t reg0; in ProbeImpl() local
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| /third_party/vixl/test/aarch64/ |
| H A D | test-utils-aarch64.cc | 270 bool Equal64(const Register& reg0, in Equal64() argument
281 bool NotEqual64(const Register& reg0, in NotEqual64() argument
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| /third_party/mesa3d/src/panfrost/bifrost/ |
| H A D | bifrost.h | 230 unsigned reg0 : 5; member
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| H A D | IceAssemblerX8632.cpp | 2972 void AssemblerX8632::xchg(Type Ty, GPRRegister reg0, GPRRegister reg1) { in xchg() argument
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| H A D | IceAssemblerX8664.cpp | 3130 void AssemblerX8664::xchg(Type Ty, GPRRegister reg0, GPRRegister reg1) { in xchg() argument
[all...] |
| /third_party/node/deps/v8/src/codegen/ia32/ |
| H A D | assembler-ia32.h | 603 void cmp(Register reg0, Register reg1) { cmp(reg0, Operand(reg1)); } in cmp() argument
695 void test(Register reg0, Register reg1) { test(reg0, Operand(reg1)); } in test() argument
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| /third_party/node/deps/v8/src/builtins/arm64/ |
| H A D | builtins-arm64.cc | 3812 CPURegister reg0 = copy_to_input.PopLowestIndex(); in CopyRegListToFrame() local
3847 CPURegister reg0 = restore_list.PopLowestIndex(); in RestoreRegList() local
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| /third_party/node/deps/v8/src/baseline/ |
| H A D | baseline-compiler.cc | 358 interpreter::Register reg0, reg1; in StoreRegisterPair() local
|