| /third_party/mesa3d/src/intel/vulkan/ |
| H A D | gfx7_cmd_buffer.c | 182 struct anv_state ds_state = in cmd_buffer_flush_dynamic_state() local
|
| /third_party/mesa3d/src/broadcom/vulkan/ |
| H A D | v3dv_meta_clear.c | 585 const VkPipelineDepthStencilStateCreateInfo ds_state = { in create_color_clear_pipeline() local
647 const VkPipelineDepthStencilStateCreateInfo ds_state = { in create_depth_clear_pipeline() local
438 create_pipeline(struct v3dv_device *device, struct v3dv_render_pass *pass, uint32_t subpass_idx, uint32_t samples, struct nir_shader *vs_nir, struct nir_shader *gs_nir, struct nir_shader *fs_nir, const VkPipelineVertexInputStateCreateInfo *vi_state, const VkPipelineDepthStencilStateCreateInfo *ds_state, const VkPipelineColorBlendStateCreateInfo *cb_state, const VkPipelineLayout layout, VkPipeline *pipeline) create_pipeline() argument
|
| H A D | v3dv_meta_copy.c | 1849 VkPipelineDepthStencilStateCreateInfo ds_state = { in create_texel_buffer_copy_pipeline() local
3538 VkPipelineDepthStencilStateCreateInfo ds_state = { in create_blit_pipeline() local
3365 create_pipeline(struct v3dv_device *device, struct v3dv_render_pass *pass, struct nir_shader *vs_nir, struct nir_shader *gs_nir, struct nir_shader *fs_nir, const VkPipelineVertexInputStateCreateInfo *vi_state, const VkPipelineDepthStencilStateCreateInfo *ds_state, const VkPipelineColorBlendStateCreateInfo *cb_state, const VkPipelineMultisampleStateCreateInfo *ms_state, const VkPipelineLayout layout, VkPipeline *pipeline) create_pipeline() argument
|
| /third_party/mesa3d/src/amd/compiler/tests/ |
| H A D | helpers.cpp | 795 VkPipelineDepthStencilStateCreateInfo ds_state; in create_graphics_pipeline() local
[all...] |
| /third_party/mesa3d/src/amd/vulkan/ |
| H A D | radv_meta_clear.c | 194 const VkPipelineDepthStencilStateCreateInfo ds_state = { in create_color_pipeline() local
458 const VkPipelineDepthStencilStateCreateInfo ds_state = { in create_depthstencil_pipeline() local
77 create_pipeline(struct radv_device *device, uint32_t samples, struct nir_shader *vs_nir, struct nir_shader *fs_nir, const VkPipelineVertexInputStateCreateInfo *vi_state, const VkPipelineDepthStencilStateCreateInfo *ds_state, const VkPipelineColorBlendStateCreateInfo *cb_state, const VkPipelineRenderingCreateInfo *dyn_state, const VkPipelineLayout layout, const struct radv_graphics_pipeline_create_info *extra, const VkAllocationCallbacks *alloc, VkPipeline *pipeline) create_pipeline() argument
|
| H A D | radv_pipeline.c | 2204 struct radv_depth_stencil_state ds_state = {0}; in radv_pipeline_init_depth_stencil_state() local
5524 radv_pipeline_emit_depth_stencil_state(struct radeon_cmdbuf *ctx_cs, const struct radv_depth_stencil_state *ds_state) radv_pipeline_emit_depth_stencil_state() argument
6684 radv_pipeline_emit_pm4(struct radv_graphics_pipeline *pipeline, const struct radv_blend_state *blend, const struct radv_depth_stencil_state *ds_state, uint32_t vgt_gs_out_prim_type, const struct radv_graphics_pipeline_info *info) radv_pipeline_emit_pm4() argument
6859 radv_pipeline_init_extra(struct radv_graphics_pipeline *pipeline, const struct radv_graphics_pipeline_create_info *extra, struct radv_blend_state *blend_state, struct radv_depth_stencil_state *ds_state, const struct radv_graphics_pipeline_info *info, uint32_t *vgt_gs_out_prim_type) radv_pipeline_init_extra() argument
6970 struct radv_depth_stencil_state ds_state = radv_graphics_pipeline_init() local
[all...] |
| /third_party/mesa3d/src/gallium/drivers/iris/ |
| H A D | iris_state.c | 4580 uint32_t *ds_state = (void *) shader->derived_data; in iris_store_tes_state() local
|