1root {
2    platform {
3        template codec_controller {
4            match_attr = "";
5            serviceName = "";
6            codecDaiName = "";
7        }
8        controller_0x120c1030 :: codec_controller {
9            match_attr = "hdf_codec_driver";
10            serviceName = "codec_service_0";
11            codecDaiName = "codec_dai";
12
13            idInfo {
14                chipName = "hi3516";
15                chipIdRegister = 0x113c0000;
16                chipIdSize = 0x1000;
17            }
18
19            hwInfo = [
20                /*
21                    Playback/Captrue, formats, rates, rate_min, rate_max, channels_min, channels_max,
22                    buffer_bytes_max, period_bytes_min, period_bytes_max, periods_min, periods_max
23                */
24                1, 0xF, 0xFF, 8000, 96000, 1, 2, 1, 2, 3, 4, 5,
25                2, 0xF, 0xFF, 8000, 96000, 1, 2, 1, 2, 3, 4, 5,
26            ];
27
28            regConfig {
29                /* reg, value */
30                initSeqConfig = [
31                    0x14,    0x04000002,
32                    0x18,    0xFD200004,
33                    0x1C,    0x00180018,
34                    0x20,    0x8F8F0028,
35                    0x24,    0x00005C5C,
36                    0x28,    0x00130000,
37                    0x2c,    0x00303E2E,
38                    0x30,    0xFF035AC2,
39                    0x34,    0x08000001,
40                    0x38,    0x06062424,
41                    0x3C,    0x0000C001,
42                    0x14,    0x04000002
43                ];
44
45                /*
46                    Mixer
47                    reg: register address
48                    rreg: register address
49                    shift: shift bits
50                    rshift: rshift bits
51                    min: min value
52                    max: max value
53                    mask: mask of value
54                    invert: enum InvertVal 0-uninvert 1-invert
55                    value: value
56                */
57                ctrlParamsSeqConfig = [
58                    0x2004,  0x2004,  8,    8,    0x28,   0x7F,   0x7F,   0,    0,  //"Main Playback Volume"
59                    0x3c,    0x3c,    24,   24,   0x0,    0x57,   0x7F,   1,    0,  //"Main Capture Volume"
60                    0x38,    0x38,    31,   31,   0x0,    0x1,    0x1,    0,    0,  //"Playback Mute"
61                    0x3c,    0x3c,    31,   31,   0x0,    0x1,    0x1,    0,    0,  //"Capture Mute"
62                    0x20,    0x20,    16,   16,   0x0,    0xF,    0x1F,   0,    0,  //"Mic Left Gain"
63                    0x20,    0x20,    24,   24,   0x0,    0xF,    0x1F,   0,    0,  //"Mic Right Gain"
64                    0x2000,  0x2000,  16,   16,   0x0,    0x7,    0x7,    0,    0,  //"Render Channel Mode"
65                    0x1000,  0x1000,  16,   16,   0x0,    0x7,    0x7,    0,    0   //"Capture Channel Mode"
66                ];
67
68                controlsConfig = [
69                    /*
70                        "Master Playback Volume",
71                        "Master Capture Volume",
72                        "Playback Mute",
73                        "Capture Mute",
74                        "Mic Left Gain",
75                        "Mic Right Gain",
76                        "External Codec Enable",
77                        "Internally Codec Enable",
78                        "Render Channel Mode",
79                        "Capture Channel Mode"
80                    */
81
82                    /*array index, iface, mixer/mux, enable,*/
83                    0,  2,  0,  0,
84                    1,  2,  0,  1,
85                    2,  2,  0,  1,
86                    3,  2,  0,  1,
87                    4,  2,  0,  1,
88                    5,  2,  0,  1,
89                    8,  2,  0,  0,
90                    9,  2,  0,  0,
91                ];
92
93                /* reg, rreg, shift, rshift, min, max, mask, invert, value */
94                daiStartupSeqConfig = [
95                    0x24,    0x24,    11,    11,    0x0,    0x1,    0x1,    0,   0x1    // adc_tune_En09
96                ];
97
98                /* reg, rreg, shift, rshift, min, max, mask, invert, value */
99                daiParamsSeqConfig = [
100                    0x30,    0x30,    13,   13,    0x0,    0x1F,   0x1F,    0,    0x0,    // i2s_frequency
101                    0x1C,    0x1C,    6,    6,     0x0,    0x3,    0x3,     0,    0x0,    // adc_mode_sel
102                    0x30,    0x30,    22,   22,    0x0,    0x3,    0x3,     0,    0x0,    // i2s_datawith
103                ];
104
105                // Mixer: reg, rreg, shift, rshift, min, max, mask, invert, value
106                ctrlSapmParamsSeqConfig = [
107                    0x20,    0x20,    23,    23,    0x0,    0x1,    0x1,    0,    0,     // LPGA MIC 0 -- connect MIC
108                    0x20,    0x20,    31,    31,    0x0,    0x1,    0x1,    0,    0,     // RPGA MIC 0 -- connect MIC
109                    0x30,    0x30,    27,    27,    0x0,    0x1,    0x1,    0,    0,     // dacl to dacr mixer
110                    0x30,    0x30,    26,    26,    0x0,    0x1,    0x1,    0,    0      // dacr to dacl mixer
111                ];
112
113                /* index = "ADCL", "ADCR", "DACL", "DACR", "LPGA", "RPGA", "SPKL", "SPKR", "MIC"*/
114                // sapmType, compNameIndex, reg, mask, shift, invert, kcontrolNews, kcontrolsNum
115                sapmComponent = [
116                    10,    0,     0x20,      0x1,       15,    1,     0,     0, // ADCL
117                    10,    1,     0x20,      0x1,       14,    1,     0,     0, // ADCR
118                    11,    2,     0x14,      0x1,       11,    1,     0,     0, // DACL
119                    11,    3,     0x14,      0x1,       12,    1,     0,     0, // DACR
120                    17,    4,     0x20,      0x1,       13,    1,     1,     1, // LPGA
121                    17,    5,     0x20,      0x1,       12,    1,     2,     1, // RPGA
122                    15,    6,     0xFFFF,    0xFFFF,    0,     0,     0,     0, // SPKL
123                    15,    7,     0xFFFF,    0xFFFF,    0,     0,     0,     0, // SPKR
124                    17,    52,    0xFFFF,    0xFFFF,    0,     0,     3,     1, // SPKL PGA
125                    17,    53,    0xFFFF,    0xFFFF,    0,     0,     4,     1, // SPKR PGA
126                    13,    40,    0xFFFF,    0xFFFF,    0,     0,     0,     0, // MIC1
127                    13,    41,    0xFFFF,    0xFFFF,    0,     0,     0,     0  // MIC2
128                ];
129
130                /* array index, iface, mixer/mux, enable */
131                sapmConfig = [
132                    0,    2,    0,    1,
133                    1,    2,    0,    1,
134                    2,    2,    0,    1,
135                    3,    2,    0,    1
136                ];
137            }
138        }
139        controller_0x120c1031 :: codec_controller {
140            match_attr = "hdf_codec_driver_ex";
141            serviceName = "codec_service_1";
142            codecDaiName = "tfa9879_codec_dai";
143
144            regConfig {
145                /*  regAddr: register address
146                    regValue: config register value
147                    mask: mask of value
148                    shift: shift bits
149                    max: max value
150                    min: min value
151                    invert: enum Tfa9879InvertVal 0-uninvert 1-invert
152                */
153
154                /* reg, value */
155                /* regAddr, regValue, mask, shift, max, min, invert, opsType */
156                /* reg, rreg, shift, value, min, max, mask, invert */
157                resetSeqConfig = [
158                    0x00,    0x0
159                ];
160
161                hwInfo = [
162                    /*
163                        Playback/Captrue, formats, rates, rate_min, rate_max, channels_min, channels_max,
164                        buffer_bytes_max, period_bytes_min, period_bytes_max, periods_min, periods_max
165                    */
166                    1, 0xF, 0xFF, 8000, 96000, 1, 2, 1, 2, 3, 4, 5,
167                ];
168
169                /* reg, value */
170                initSeqConfig = [
171                    0x00,    0x0001,
172                    0x01,    0x0a18,
173                    0x02,    0x0007,
174                    0x03,    0x0a18,
175                    0x04,    0x0007,
176                    0x05,    0x59DD,
177                    0x06,    0xC63E,
178                    0x07,    0x651A,
179                    0x08,    0xE53E,
180                    0x09,    0x4616,
181                    0x0A,    0xD33E,
182                    0x0B,    0x4DF3,
183                    0x0C,    0xEA3E,
184                    0x0D,    0x5EE0,
185                    0x0E,    0xF93E,
186                    0x0F,    0x0008,
187                    0x10,    0x92BA,
188                    0x11,    0x12A5,
189                    0x12,    0x0004,
190                    0x13,    0x1031,
191                    0x14,    0x0000
192                ];
193
194                /*  reg: register address
195                    rreg: register address
196                    shift: shift bits
197                    rshift: rshift bits
198                    min: min value
199                    max: max value
200                    mask: mask of value
201                    invert: enum InvertVal 0-uninvert 1-invert
202                    value: value
203                */
204                /* reg, rreg, shift, rshift, min, max, mask, invert, value */
205                ctrlParamsSeqConfig = [
206                    0x13,    0x13,    0,     0,     0x0,    0xBC,  0xFF,    1,   0x0,    // output volume
207                    0x14,    0x14,    9,     9,     0x0,    0x1,   0x1,     0,   0x0,    // output mute
208                    0x01,    0x01,    10,    10,    0x0,    0x3,   0x3,     0,   0x0     // output channel
209                ];
210
211                /* reg, rreg, shift, rshift, min, max, mask, invert, value */
212                daiStartupSeqConfig = [
213                    0x00,    0x00,    0,    0,    0x0,    0xF,    0xF,    0,   0x9    // work
214                ];
215
216                /* reg, rreg, shift, rshift, min, max, mask, invert, value */
217                daiParamsSeqConfig = [
218                    0x01,    0x01,    6,    6,    0x0,    0xF,   0xF,    0,    0x0,    // i2s_frequency
219                    0x01,    0x01,    3,    3,    0x0,    0x7,   0x7,    0,    0x0,    // i2s_format
220                    0x01,    0x01,    10,   10,   0x0,    0x3,   0x3,    0,    0x0     // i2s_channel
221                ];
222
223                /*array index, iface, mixer/mux, enable,*/
224                controlsConfig = [
225                    /*
226                        "Master Playback Volume",
227                        "Playback Mute",
228                        "Render Channel Mode"
229                    */
230                    0,  2,  0,  1,
231                    2,  2,  0,  1,
232                    8,  2,  0,  1
233                ];
234            }
235        }
236    }
237}
238