1 /******************************************************************************* 2 * Copyright (c) 2008-2020 The Khronos Group Inc. 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 ******************************************************************************/ 16 17 /* cl_ext.h contains OpenCL extensions which don't have external */ 18 /* (OpenGL, D3D) dependencies. */ 19 20 #ifndef __CL_EXT_H 21 #define __CL_EXT_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 #include <CL/cl.h> 28 29 /*************************************************************** 30 * cl_khr_command_buffer 31 ***************************************************************/ 32 #define cl_khr_command_buffer 1 33 #define CL_KHR_COMMAND_BUFFER_EXTENSION_NAME \ 34 "cl_khr_command_buffer" 35 36 typedef cl_bitfield cl_device_command_buffer_capabilities_khr; 37 typedef struct _cl_command_buffer_khr* cl_command_buffer_khr; 38 typedef cl_uint cl_sync_point_khr; 39 typedef cl_uint cl_command_buffer_info_khr; 40 typedef cl_uint cl_command_buffer_state_khr; 41 typedef cl_properties cl_command_buffer_properties_khr; 42 typedef cl_bitfield cl_command_buffer_flags_khr; 43 typedef cl_properties cl_ndrange_kernel_command_properties_khr; 44 typedef struct _cl_mutable_command_khr* cl_mutable_command_khr; 45 46 /* cl_device_info */ 47 #define CL_DEVICE_COMMAND_BUFFER_CAPABILITIES_KHR 0x12A9 48 #define CL_DEVICE_COMMAND_BUFFER_REQUIRED_QUEUE_PROPERTIES_KHR 0x12AA 49 50 /* cl_device_command_buffer_capabilities_khr - bitfield */ 51 #define CL_COMMAND_BUFFER_CAPABILITY_KERNEL_PRINTF_KHR (1 << 0) 52 #define CL_COMMAND_BUFFER_CAPABILITY_DEVICE_SIDE_ENQUEUE_KHR (1 << 1) 53 #define CL_COMMAND_BUFFER_CAPABILITY_SIMULTANEOUS_USE_KHR (1 << 2) 54 #define CL_COMMAND_BUFFER_CAPABILITY_OUT_OF_ORDER_KHR (1 << 3) 55 56 /* cl_command_buffer_properties_khr */ 57 #define CL_COMMAND_BUFFER_FLAGS_KHR 0x1293 58 59 /* cl_command_buffer_flags_khr */ 60 #define CL_COMMAND_BUFFER_SIMULTANEOUS_USE_KHR (1 << 0) 61 62 /* Error codes */ 63 #define CL_INVALID_COMMAND_BUFFER_KHR -1138 64 #define CL_INVALID_SYNC_POINT_WAIT_LIST_KHR -1139 65 #define CL_INCOMPATIBLE_COMMAND_QUEUE_KHR -1140 66 67 /* cl_command_buffer_info_khr */ 68 #define CL_COMMAND_BUFFER_QUEUES_KHR 0x1294 69 #define CL_COMMAND_BUFFER_NUM_QUEUES_KHR 0x1295 70 #define CL_COMMAND_BUFFER_REFERENCE_COUNT_KHR 0x1296 71 #define CL_COMMAND_BUFFER_STATE_KHR 0x1297 72 #define CL_COMMAND_BUFFER_PROPERTIES_ARRAY_KHR 0x1298 73 74 /* cl_command_buffer_state_khr */ 75 #define CL_COMMAND_BUFFER_STATE_RECORDING_KHR 0 76 #define CL_COMMAND_BUFFER_STATE_EXECUTABLE_KHR 1 77 #define CL_COMMAND_BUFFER_STATE_PENDING_KHR 2 78 #define CL_COMMAND_BUFFER_STATE_INVALID_KHR 3 79 80 /* cl_command_type */ 81 #define CL_COMMAND_COMMAND_BUFFER_KHR 0x12A8 82 83 84 typedef cl_command_buffer_khr (CL_API_CALL * 85 clCreateCommandBufferKHR_fn)( 86 cl_uint num_queues, 87 const cl_command_queue* queues, 88 const cl_command_buffer_properties_khr* properties, 89 cl_int* errcode_ret) ; 90 91 typedef cl_int (CL_API_CALL * 92 clFinalizeCommandBufferKHR_fn)( 93 cl_command_buffer_khr command_buffer) ; 94 95 typedef cl_int (CL_API_CALL * 96 clRetainCommandBufferKHR_fn)( 97 cl_command_buffer_khr command_buffer) ; 98 99 typedef cl_int (CL_API_CALL * 100 clReleaseCommandBufferKHR_fn)( 101 cl_command_buffer_khr command_buffer) ; 102 103 typedef cl_int (CL_API_CALL * 104 clEnqueueCommandBufferKHR_fn)( 105 cl_uint num_queues, 106 cl_command_queue* queues, 107 cl_command_buffer_khr command_buffer, 108 cl_uint num_events_in_wait_list, 109 const cl_event* event_wait_list, 110 cl_event* event) ; 111 112 typedef cl_int (CL_API_CALL * 113 clCommandBarrierWithWaitListKHR_fn)( 114 cl_command_buffer_khr command_buffer, 115 cl_command_queue command_queue, 116 cl_uint num_sync_points_in_wait_list, 117 const cl_sync_point_khr* sync_point_wait_list, 118 cl_sync_point_khr* sync_point, 119 cl_mutable_command_khr* mutable_handle) ; 120 121 typedef cl_int (CL_API_CALL * 122 clCommandCopyBufferKHR_fn)( 123 cl_command_buffer_khr command_buffer, 124 cl_command_queue command_queue, 125 cl_mem src_buffer, 126 cl_mem dst_buffer, 127 size_t src_offset, 128 size_t dst_offset, 129 size_t size, 130 cl_uint num_sync_points_in_wait_list, 131 const cl_sync_point_khr* sync_point_wait_list, 132 cl_sync_point_khr* sync_point, 133 cl_mutable_command_khr* mutable_handle) ; 134 135 typedef cl_int (CL_API_CALL * 136 clCommandCopyBufferRectKHR_fn)( 137 cl_command_buffer_khr command_buffer, 138 cl_command_queue command_queue, 139 cl_mem src_buffer, 140 cl_mem dst_buffer, 141 const size_t* src_origin, 142 const size_t* dst_origin, 143 const size_t* region, 144 size_t src_row_pitch, 145 size_t src_slice_pitch, 146 size_t dst_row_pitch, 147 size_t dst_slice_pitch, 148 cl_uint num_sync_points_in_wait_list, 149 const cl_sync_point_khr* sync_point_wait_list, 150 cl_sync_point_khr* sync_point, 151 cl_mutable_command_khr* mutable_handle) ; 152 153 typedef cl_int (CL_API_CALL * 154 clCommandCopyBufferToImageKHR_fn)( 155 cl_command_buffer_khr command_buffer, 156 cl_command_queue command_queue, 157 cl_mem src_buffer, 158 cl_mem dst_image, 159 size_t src_offset, 160 const size_t* dst_origin, 161 const size_t* region, 162 cl_uint num_sync_points_in_wait_list, 163 const cl_sync_point_khr* sync_point_wait_list, 164 cl_sync_point_khr* sync_point, 165 cl_mutable_command_khr* mutable_handle) ; 166 167 typedef cl_int (CL_API_CALL * 168 clCommandCopyImageKHR_fn)( 169 cl_command_buffer_khr command_buffer, 170 cl_command_queue command_queue, 171 cl_mem src_image, 172 cl_mem dst_image, 173 const size_t* src_origin, 174 const size_t* dst_origin, 175 const size_t* region, 176 cl_uint num_sync_points_in_wait_list, 177 const cl_sync_point_khr* sync_point_wait_list, 178 cl_sync_point_khr* sync_point, 179 cl_mutable_command_khr* mutable_handle) ; 180 181 typedef cl_int (CL_API_CALL * 182 clCommandCopyImageToBufferKHR_fn)( 183 cl_command_buffer_khr command_buffer, 184 cl_command_queue command_queue, 185 cl_mem src_image, 186 cl_mem dst_buffer, 187 const size_t* src_origin, 188 const size_t* region, 189 size_t dst_offset, 190 cl_uint num_sync_points_in_wait_list, 191 const cl_sync_point_khr* sync_point_wait_list, 192 cl_sync_point_khr* sync_point, 193 cl_mutable_command_khr* mutable_handle) ; 194 195 typedef cl_int (CL_API_CALL * 196 clCommandFillBufferKHR_fn)( 197 cl_command_buffer_khr command_buffer, 198 cl_command_queue command_queue, 199 cl_mem buffer, 200 const void* pattern, 201 size_t pattern_size, 202 size_t offset, 203 size_t size, 204 cl_uint num_sync_points_in_wait_list, 205 const cl_sync_point_khr* sync_point_wait_list, 206 cl_sync_point_khr* sync_point, 207 cl_mutable_command_khr* mutable_handle) ; 208 209 typedef cl_int (CL_API_CALL * 210 clCommandFillImageKHR_fn)( 211 cl_command_buffer_khr command_buffer, 212 cl_command_queue command_queue, 213 cl_mem image, 214 const void* fill_color, 215 const size_t* origin, 216 const size_t* region, 217 cl_uint num_sync_points_in_wait_list, 218 const cl_sync_point_khr* sync_point_wait_list, 219 cl_sync_point_khr* sync_point, 220 cl_mutable_command_khr* mutable_handle) ; 221 222 typedef cl_int (CL_API_CALL * 223 clCommandNDRangeKernelKHR_fn)( 224 cl_command_buffer_khr command_buffer, 225 cl_command_queue command_queue, 226 const cl_ndrange_kernel_command_properties_khr* properties, 227 cl_kernel kernel, 228 cl_uint work_dim, 229 const size_t* global_work_offset, 230 const size_t* global_work_size, 231 const size_t* local_work_size, 232 cl_uint num_sync_points_in_wait_list, 233 const cl_sync_point_khr* sync_point_wait_list, 234 cl_sync_point_khr* sync_point, 235 cl_mutable_command_khr* mutable_handle) ; 236 237 typedef cl_int (CL_API_CALL * 238 clGetCommandBufferInfoKHR_fn)( 239 cl_command_buffer_khr command_buffer, 240 cl_command_buffer_info_khr param_name, 241 size_t param_value_size, 242 void* param_value, 243 size_t* param_value_size_ret) ; 244 245 #ifndef CL_NO_PROTOTYPES 246 247 extern CL_API_ENTRY cl_command_buffer_khr CL_API_CALL 248 clCreateCommandBufferKHR( 249 cl_uint num_queues, 250 const cl_command_queue* queues, 251 const cl_command_buffer_properties_khr* properties, 252 cl_int* errcode_ret) ; 253 254 extern CL_API_ENTRY cl_int CL_API_CALL 255 clFinalizeCommandBufferKHR( 256 cl_command_buffer_khr command_buffer) ; 257 258 extern CL_API_ENTRY cl_int CL_API_CALL 259 clRetainCommandBufferKHR( 260 cl_command_buffer_khr command_buffer) ; 261 262 extern CL_API_ENTRY cl_int CL_API_CALL 263 clReleaseCommandBufferKHR( 264 cl_command_buffer_khr command_buffer) ; 265 266 extern CL_API_ENTRY cl_int CL_API_CALL 267 clEnqueueCommandBufferKHR( 268 cl_uint num_queues, 269 cl_command_queue* queues, 270 cl_command_buffer_khr command_buffer, 271 cl_uint num_events_in_wait_list, 272 const cl_event* event_wait_list, 273 cl_event* event) ; 274 275 extern CL_API_ENTRY cl_int CL_API_CALL 276 clCommandBarrierWithWaitListKHR( 277 cl_command_buffer_khr command_buffer, 278 cl_command_queue command_queue, 279 cl_uint num_sync_points_in_wait_list, 280 const cl_sync_point_khr* sync_point_wait_list, 281 cl_sync_point_khr* sync_point, 282 cl_mutable_command_khr* mutable_handle) ; 283 284 extern CL_API_ENTRY cl_int CL_API_CALL 285 clCommandCopyBufferKHR( 286 cl_command_buffer_khr command_buffer, 287 cl_command_queue command_queue, 288 cl_mem src_buffer, 289 cl_mem dst_buffer, 290 size_t src_offset, 291 size_t dst_offset, 292 size_t size, 293 cl_uint num_sync_points_in_wait_list, 294 const cl_sync_point_khr* sync_point_wait_list, 295 cl_sync_point_khr* sync_point, 296 cl_mutable_command_khr* mutable_handle) ; 297 298 extern CL_API_ENTRY cl_int CL_API_CALL 299 clCommandCopyBufferRectKHR( 300 cl_command_buffer_khr command_buffer, 301 cl_command_queue command_queue, 302 cl_mem src_buffer, 303 cl_mem dst_buffer, 304 const size_t* src_origin, 305 const size_t* dst_origin, 306 const size_t* region, 307 size_t src_row_pitch, 308 size_t src_slice_pitch, 309 size_t dst_row_pitch, 310 size_t dst_slice_pitch, 311 cl_uint num_sync_points_in_wait_list, 312 const cl_sync_point_khr* sync_point_wait_list, 313 cl_sync_point_khr* sync_point, 314 cl_mutable_command_khr* mutable_handle) ; 315 316 extern CL_API_ENTRY cl_int CL_API_CALL 317 clCommandCopyBufferToImageKHR( 318 cl_command_buffer_khr command_buffer, 319 cl_command_queue command_queue, 320 cl_mem src_buffer, 321 cl_mem dst_image, 322 size_t src_offset, 323 const size_t* dst_origin, 324 const size_t* region, 325 cl_uint num_sync_points_in_wait_list, 326 const cl_sync_point_khr* sync_point_wait_list, 327 cl_sync_point_khr* sync_point, 328 cl_mutable_command_khr* mutable_handle) ; 329 330 extern CL_API_ENTRY cl_int CL_API_CALL 331 clCommandCopyImageKHR( 332 cl_command_buffer_khr command_buffer, 333 cl_command_queue command_queue, 334 cl_mem src_image, 335 cl_mem dst_image, 336 const size_t* src_origin, 337 const size_t* dst_origin, 338 const size_t* region, 339 cl_uint num_sync_points_in_wait_list, 340 const cl_sync_point_khr* sync_point_wait_list, 341 cl_sync_point_khr* sync_point, 342 cl_mutable_command_khr* mutable_handle) ; 343 344 extern CL_API_ENTRY cl_int CL_API_CALL 345 clCommandCopyImageToBufferKHR( 346 cl_command_buffer_khr command_buffer, 347 cl_command_queue command_queue, 348 cl_mem src_image, 349 cl_mem dst_buffer, 350 const size_t* src_origin, 351 const size_t* region, 352 size_t dst_offset, 353 cl_uint num_sync_points_in_wait_list, 354 const cl_sync_point_khr* sync_point_wait_list, 355 cl_sync_point_khr* sync_point, 356 cl_mutable_command_khr* mutable_handle) ; 357 358 extern CL_API_ENTRY cl_int CL_API_CALL 359 clCommandFillBufferKHR( 360 cl_command_buffer_khr command_buffer, 361 cl_command_queue command_queue, 362 cl_mem buffer, 363 const void* pattern, 364 size_t pattern_size, 365 size_t offset, 366 size_t size, 367 cl_uint num_sync_points_in_wait_list, 368 const cl_sync_point_khr* sync_point_wait_list, 369 cl_sync_point_khr* sync_point, 370 cl_mutable_command_khr* mutable_handle) ; 371 372 extern CL_API_ENTRY cl_int CL_API_CALL 373 clCommandFillImageKHR( 374 cl_command_buffer_khr command_buffer, 375 cl_command_queue command_queue, 376 cl_mem image, 377 const void* fill_color, 378 const size_t* origin, 379 const size_t* region, 380 cl_uint num_sync_points_in_wait_list, 381 const cl_sync_point_khr* sync_point_wait_list, 382 cl_sync_point_khr* sync_point, 383 cl_mutable_command_khr* mutable_handle) ; 384 385 extern CL_API_ENTRY cl_int CL_API_CALL 386 clCommandNDRangeKernelKHR( 387 cl_command_buffer_khr command_buffer, 388 cl_command_queue command_queue, 389 const cl_ndrange_kernel_command_properties_khr* properties, 390 cl_kernel kernel, 391 cl_uint work_dim, 392 const size_t* global_work_offset, 393 const size_t* global_work_size, 394 const size_t* local_work_size, 395 cl_uint num_sync_points_in_wait_list, 396 const cl_sync_point_khr* sync_point_wait_list, 397 cl_sync_point_khr* sync_point, 398 cl_mutable_command_khr* mutable_handle) ; 399 400 extern CL_API_ENTRY cl_int CL_API_CALL 401 clGetCommandBufferInfoKHR( 402 cl_command_buffer_khr command_buffer, 403 cl_command_buffer_info_khr param_name, 404 size_t param_value_size, 405 void* param_value, 406 size_t* param_value_size_ret) ; 407 408 #endif /* CL_NO_PROTOTYPES */ 409 410 /* cl_khr_fp64 extension - no extension #define since it has no functions */ 411 /* CL_DEVICE_DOUBLE_FP_CONFIG is defined in CL.h for OpenCL >= 120 */ 412 413 #if CL_TARGET_OPENCL_VERSION <= 110 414 #define CL_DEVICE_DOUBLE_FP_CONFIG 0x1032 415 #endif 416 417 /* cl_khr_fp16 extension - no extension #define since it has no functions */ 418 #define CL_DEVICE_HALF_FP_CONFIG 0x1033 419 420 /* Memory object destruction 421 * 422 * Apple extension for use to manage externally allocated buffers used with cl_mem objects with CL_MEM_USE_HOST_PTR 423 * 424 * Registers a user callback function that will be called when the memory object is deleted and its resources 425 * freed. Each call to clSetMemObjectCallbackFn registers the specified user callback function on a callback 426 * stack associated with memobj. The registered user callback functions are called in the reverse order in 427 * which they were registered. The user callback functions are called and then the memory object is deleted 428 * and its resources freed. This provides a mechanism for the application (and libraries) using memobj to be 429 * notified when the memory referenced by host_ptr, specified when the memory object is created and used as 430 * the storage bits for the memory object, can be reused or freed. 431 * 432 * The application may not call CL api's with the cl_mem object passed to the pfn_notify. 433 * 434 * Please check for the "cl_APPLE_SetMemObjectDestructor" extension using clGetDeviceInfo(CL_DEVICE_EXTENSIONS) 435 * before using. 436 */ 437 #define cl_APPLE_SetMemObjectDestructor 1 438 extern CL_API_ENTRY cl_int CL_API_CALL clSetMemObjectDestructorAPPLE( cl_mem memobj, 439 void (* pfn_notify)(cl_mem memobj, void * user_data), 440 void * user_data) CL_API_SUFFIX__VERSION_1_0; 441 442 443 /* Context Logging Functions 444 * 445 * The next three convenience functions are intended to be used as the pfn_notify parameter to clCreateContext(). 446 * Please check for the "cl_APPLE_ContextLoggingFunctions" extension using clGetDeviceInfo(CL_DEVICE_EXTENSIONS) 447 * before using. 448 * 449 * clLogMessagesToSystemLog forwards on all log messages to the Apple System Logger 450 */ 451 #define cl_APPLE_ContextLoggingFunctions 1 452 extern CL_API_ENTRY void CL_API_CALL clLogMessagesToSystemLogAPPLE( const char * errstr, 453 const void * private_info, 454 size_t cb, 455 void * user_data) CL_API_SUFFIX__VERSION_1_0; 456 457 /* clLogMessagesToStdout sends all log messages to the file descriptor stdout */ 458 extern CL_API_ENTRY void CL_API_CALL clLogMessagesToStdoutAPPLE( const char * errstr, 459 const void * private_info, 460 size_t cb, 461 void * user_data) CL_API_SUFFIX__VERSION_1_0; 462 463 /* clLogMessagesToStderr sends all log messages to the file descriptor stderr */ 464 extern CL_API_ENTRY void CL_API_CALL clLogMessagesToStderrAPPLE( const char * errstr, 465 const void * private_info, 466 size_t cb, 467 void * user_data) CL_API_SUFFIX__VERSION_1_0; 468 469 470 /************************ 471 * cl_khr_icd extension * 472 ************************/ 473 #define cl_khr_icd 1 474 475 /* cl_platform_info */ 476 #define CL_PLATFORM_ICD_SUFFIX_KHR 0x0920 477 478 /* Additional Error Codes */ 479 #define CL_PLATFORM_NOT_FOUND_KHR -1001 480 481 extern CL_API_ENTRY cl_int CL_API_CALL 482 clIcdGetPlatformIDsKHR(cl_uint num_entries, 483 cl_platform_id * platforms, 484 cl_uint * num_platforms); 485 486 typedef cl_int 487 (CL_API_CALL *clIcdGetPlatformIDsKHR_fn)(cl_uint num_entries, 488 cl_platform_id * platforms, 489 cl_uint * num_platforms); 490 491 492 /******************************* 493 * cl_khr_il_program extension * 494 *******************************/ 495 #define cl_khr_il_program 1 496 497 /* New property to clGetDeviceInfo for retrieving supported intermediate 498 * languages 499 */ 500 #define CL_DEVICE_IL_VERSION_KHR 0x105B 501 502 /* New property to clGetProgramInfo for retrieving for retrieving the IL of a 503 * program 504 */ 505 #define CL_PROGRAM_IL_KHR 0x1169 506 507 extern CL_API_ENTRY cl_program CL_API_CALL 508 clCreateProgramWithILKHR(cl_context context, 509 const void * il, 510 size_t length, 511 cl_int * errcode_ret); 512 513 typedef cl_program 514 (CL_API_CALL *clCreateProgramWithILKHR_fn)(cl_context context, 515 const void * il, 516 size_t length, 517 cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_2; 518 519 /* Extension: cl_khr_image2d_from_buffer 520 * 521 * This extension allows a 2D image to be created from a cl_mem buffer without 522 * a copy. The type associated with a 2D image created from a buffer in an 523 * OpenCL program is image2d_t. Both the sampler and sampler-less read_image 524 * built-in functions are supported for 2D images and 2D images created from 525 * a buffer. Similarly, the write_image built-ins are also supported for 2D 526 * images created from a buffer. 527 * 528 * When the 2D image from buffer is created, the client must specify the 529 * width, height, image format (i.e. channel order and channel data type) 530 * and optionally the row pitch. 531 * 532 * The pitch specified must be a multiple of 533 * CL_DEVICE_IMAGE_PITCH_ALIGNMENT_KHR pixels. 534 * The base address of the buffer must be aligned to 535 * CL_DEVICE_IMAGE_BASE_ADDRESS_ALIGNMENT_KHR pixels. 536 */ 537 538 #define CL_DEVICE_IMAGE_PITCH_ALIGNMENT_KHR 0x104A 539 #define CL_DEVICE_IMAGE_BASE_ADDRESS_ALIGNMENT_KHR 0x104B 540 541 542 /************************************** 543 * cl_khr_initialize_memory extension * 544 **************************************/ 545 546 #define CL_CONTEXT_MEMORY_INITIALIZE_KHR 0x2030 547 548 549 /************************************** 550 * cl_khr_terminate_context extension * 551 **************************************/ 552 553 #define CL_CONTEXT_TERMINATED_KHR -1121 554 555 #define CL_DEVICE_TERMINATE_CAPABILITY_KHR 0x2031 556 #define CL_CONTEXT_TERMINATE_KHR 0x2032 557 558 #define cl_khr_terminate_context 1 559 extern CL_API_ENTRY cl_int CL_API_CALL 560 clTerminateContextKHR(cl_context context) CL_API_SUFFIX__VERSION_1_2; 561 562 typedef cl_int 563 (CL_API_CALL *clTerminateContextKHR_fn)(cl_context context) CL_API_SUFFIX__VERSION_1_2; 564 565 566 /* 567 * Extension: cl_khr_spir 568 * 569 * This extension adds support to create an OpenCL program object from a 570 * Standard Portable Intermediate Representation (SPIR) instance 571 */ 572 573 #define CL_DEVICE_SPIR_VERSIONS 0x40E0 574 #define CL_PROGRAM_BINARY_TYPE_INTERMEDIATE 0x40E1 575 576 577 /***************************************** 578 * cl_khr_create_command_queue extension * 579 *****************************************/ 580 #define cl_khr_create_command_queue 1 581 582 typedef cl_properties cl_queue_properties_khr; 583 584 extern CL_API_ENTRY cl_command_queue CL_API_CALL 585 clCreateCommandQueueWithPropertiesKHR(cl_context context, 586 cl_device_id device, 587 const cl_queue_properties_khr* properties, 588 cl_int* errcode_ret) CL_API_SUFFIX__VERSION_1_2; 589 590 typedef cl_command_queue 591 (CL_API_CALL *clCreateCommandQueueWithPropertiesKHR_fn)(cl_context context, 592 cl_device_id device, 593 const cl_queue_properties_khr* properties, 594 cl_int* errcode_ret) CL_API_SUFFIX__VERSION_1_2; 595 596 597 /****************************************** 598 * cl_nv_device_attribute_query extension * 599 ******************************************/ 600 601 /* cl_nv_device_attribute_query extension - no extension #define since it has no functions */ 602 #define CL_DEVICE_COMPUTE_CAPABILITY_MAJOR_NV 0x4000 603 #define CL_DEVICE_COMPUTE_CAPABILITY_MINOR_NV 0x4001 604 #define CL_DEVICE_REGISTERS_PER_BLOCK_NV 0x4002 605 #define CL_DEVICE_WARP_SIZE_NV 0x4003 606 #define CL_DEVICE_GPU_OVERLAP_NV 0x4004 607 #define CL_DEVICE_KERNEL_EXEC_TIMEOUT_NV 0x4005 608 #define CL_DEVICE_INTEGRATED_MEMORY_NV 0x4006 609 610 611 /********************************* 612 * cl_amd_device_attribute_query * 613 *********************************/ 614 615 #define CL_DEVICE_PROFILING_TIMER_OFFSET_AMD 0x4036 616 #define CL_DEVICE_TOPOLOGY_AMD 0x4037 617 #define CL_DEVICE_BOARD_NAME_AMD 0x4038 618 #define CL_DEVICE_GLOBAL_FREE_MEMORY_AMD 0x4039 619 #define CL_DEVICE_SIMD_PER_COMPUTE_UNIT_AMD 0x4040 620 #define CL_DEVICE_SIMD_WIDTH_AMD 0x4041 621 #define CL_DEVICE_SIMD_INSTRUCTION_WIDTH_AMD 0x4042 622 #define CL_DEVICE_WAVEFRONT_WIDTH_AMD 0x4043 623 #define CL_DEVICE_GLOBAL_MEM_CHANNELS_AMD 0x4044 624 #define CL_DEVICE_GLOBAL_MEM_CHANNEL_BANKS_AMD 0x4045 625 #define CL_DEVICE_GLOBAL_MEM_CHANNEL_BANK_WIDTH_AMD 0x4046 626 #define CL_DEVICE_LOCAL_MEM_SIZE_PER_COMPUTE_UNIT_AMD 0x4047 627 #define CL_DEVICE_LOCAL_MEM_BANKS_AMD 0x4048 628 #define CL_DEVICE_THREAD_TRACE_SUPPORTED_AMD 0x4049 629 #define CL_DEVICE_GFXIP_MAJOR_AMD 0x404A 630 #define CL_DEVICE_GFXIP_MINOR_AMD 0x404B 631 #define CL_DEVICE_AVAILABLE_ASYNC_QUEUES_AMD 0x404C 632 #define CL_DEVICE_PREFERRED_WORK_GROUP_SIZE_AMD 0x4030 633 #define CL_DEVICE_MAX_WORK_GROUP_SIZE_AMD 0x4031 634 #define CL_DEVICE_PREFERRED_CONSTANT_BUFFER_SIZE_AMD 0x4033 635 #define CL_DEVICE_PCIE_ID_AMD 0x4034 636 637 638 /********************************* 639 * cl_arm_printf extension 640 *********************************/ 641 642 #define CL_PRINTF_CALLBACK_ARM 0x40B0 643 #define CL_PRINTF_BUFFERSIZE_ARM 0x40B1 644 645 646 /*********************************** 647 * cl_ext_device_fission extension 648 ***********************************/ 649 #define cl_ext_device_fission 1 650 651 extern CL_API_ENTRY cl_int CL_API_CALL 652 clReleaseDeviceEXT(cl_device_id device) CL_API_SUFFIX__VERSION_1_1; 653 654 typedef cl_int 655 (CL_API_CALL *clReleaseDeviceEXT_fn)(cl_device_id device) CL_API_SUFFIX__VERSION_1_1; 656 657 extern CL_API_ENTRY cl_int CL_API_CALL 658 clRetainDeviceEXT(cl_device_id device) CL_API_SUFFIX__VERSION_1_1; 659 660 typedef cl_int 661 (CL_API_CALL *clRetainDeviceEXT_fn)(cl_device_id device) CL_API_SUFFIX__VERSION_1_1; 662 663 typedef cl_ulong cl_device_partition_property_ext; 664 extern CL_API_ENTRY cl_int CL_API_CALL 665 clCreateSubDevicesEXT(cl_device_id in_device, 666 const cl_device_partition_property_ext * properties, 667 cl_uint num_entries, 668 cl_device_id * out_devices, 669 cl_uint * num_devices) CL_API_SUFFIX__VERSION_1_1; 670 671 typedef cl_int 672 (CL_API_CALL * clCreateSubDevicesEXT_fn)(cl_device_id in_device, 673 const cl_device_partition_property_ext * properties, 674 cl_uint num_entries, 675 cl_device_id * out_devices, 676 cl_uint * num_devices) CL_API_SUFFIX__VERSION_1_1; 677 678 /* cl_device_partition_property_ext */ 679 #define CL_DEVICE_PARTITION_EQUALLY_EXT 0x4050 680 #define CL_DEVICE_PARTITION_BY_COUNTS_EXT 0x4051 681 #define CL_DEVICE_PARTITION_BY_NAMES_EXT 0x4052 682 #define CL_DEVICE_PARTITION_BY_AFFINITY_DOMAIN_EXT 0x4053 683 684 /* clDeviceGetInfo selectors */ 685 #define CL_DEVICE_PARENT_DEVICE_EXT 0x4054 686 #define CL_DEVICE_PARTITION_TYPES_EXT 0x4055 687 #define CL_DEVICE_AFFINITY_DOMAINS_EXT 0x4056 688 #define CL_DEVICE_REFERENCE_COUNT_EXT 0x4057 689 #define CL_DEVICE_PARTITION_STYLE_EXT 0x4058 690 691 /* error codes */ 692 #define CL_DEVICE_PARTITION_FAILED_EXT -1057 693 #define CL_INVALID_PARTITION_COUNT_EXT -1058 694 #define CL_INVALID_PARTITION_NAME_EXT -1059 695 696 /* CL_AFFINITY_DOMAINs */ 697 #define CL_AFFINITY_DOMAIN_L1_CACHE_EXT 0x1 698 #define CL_AFFINITY_DOMAIN_L2_CACHE_EXT 0x2 699 #define CL_AFFINITY_DOMAIN_L3_CACHE_EXT 0x3 700 #define CL_AFFINITY_DOMAIN_L4_CACHE_EXT 0x4 701 #define CL_AFFINITY_DOMAIN_NUMA_EXT 0x10 702 #define CL_AFFINITY_DOMAIN_NEXT_FISSIONABLE_EXT 0x100 703 704 /* cl_device_partition_property_ext list terminators */ 705 #define CL_PROPERTIES_LIST_END_EXT ((cl_device_partition_property_ext) 0) 706 #define CL_PARTITION_BY_COUNTS_LIST_END_EXT ((cl_device_partition_property_ext) 0) 707 #define CL_PARTITION_BY_NAMES_LIST_END_EXT ((cl_device_partition_property_ext) 0 - 1) 708 709 710 /*********************************** 711 * cl_ext_migrate_memobject extension definitions 712 ***********************************/ 713 #define cl_ext_migrate_memobject 1 714 715 typedef cl_bitfield cl_mem_migration_flags_ext; 716 717 #define CL_MIGRATE_MEM_OBJECT_HOST_EXT 0x1 718 719 #define CL_COMMAND_MIGRATE_MEM_OBJECT_EXT 0x4040 720 721 extern CL_API_ENTRY cl_int CL_API_CALL 722 clEnqueueMigrateMemObjectEXT(cl_command_queue command_queue, 723 cl_uint num_mem_objects, 724 const cl_mem * mem_objects, 725 cl_mem_migration_flags_ext flags, 726 cl_uint num_events_in_wait_list, 727 const cl_event * event_wait_list, 728 cl_event * event); 729 730 typedef cl_int 731 (CL_API_CALL *clEnqueueMigrateMemObjectEXT_fn)(cl_command_queue command_queue, 732 cl_uint num_mem_objects, 733 const cl_mem * mem_objects, 734 cl_mem_migration_flags_ext flags, 735 cl_uint num_events_in_wait_list, 736 const cl_event * event_wait_list, 737 cl_event * event); 738 739 740 /********************************* 741 * cl_ext_cxx_for_opencl extension 742 *********************************/ 743 #define cl_ext_cxx_for_opencl 1 744 745 #define CL_DEVICE_CXX_FOR_OPENCL_NUMERIC_VERSION_EXT 0x4230 746 747 /********************************* 748 * cl_qcom_ext_host_ptr extension 749 *********************************/ 750 #define cl_qcom_ext_host_ptr 1 751 752 #define CL_MEM_EXT_HOST_PTR_QCOM (1 << 29) 753 754 #define CL_DEVICE_EXT_MEM_PADDING_IN_BYTES_QCOM 0x40A0 755 #define CL_DEVICE_PAGE_SIZE_QCOM 0x40A1 756 #define CL_IMAGE_ROW_ALIGNMENT_QCOM 0x40A2 757 #define CL_IMAGE_SLICE_ALIGNMENT_QCOM 0x40A3 758 #define CL_MEM_HOST_UNCACHED_QCOM 0x40A4 759 #define CL_MEM_HOST_WRITEBACK_QCOM 0x40A5 760 #define CL_MEM_HOST_WRITETHROUGH_QCOM 0x40A6 761 #define CL_MEM_HOST_WRITE_COMBINING_QCOM 0x40A7 762 763 typedef cl_uint cl_image_pitch_info_qcom; 764 765 extern CL_API_ENTRY cl_int CL_API_CALL 766 clGetDeviceImageInfoQCOM(cl_device_id device, 767 size_t image_width, 768 size_t image_height, 769 const cl_image_format *image_format, 770 cl_image_pitch_info_qcom param_name, 771 size_t param_value_size, 772 void *param_value, 773 size_t *param_value_size_ret); 774 775 typedef struct _cl_mem_ext_host_ptr 776 { 777 /* Type of external memory allocation. */ 778 /* Legal values will be defined in layered extensions. */ 779 cl_uint allocation_type; 780 781 /* Host cache policy for this external memory allocation. */ 782 cl_uint host_cache_policy; 783 784 } cl_mem_ext_host_ptr; 785 786 787 /******************************************* 788 * cl_qcom_ext_host_ptr_iocoherent extension 789 ********************************************/ 790 791 /* Cache policy specifying io-coherence */ 792 #define CL_MEM_HOST_IOCOHERENT_QCOM 0x40A9 793 794 795 /********************************* 796 * cl_qcom_ion_host_ptr extension 797 *********************************/ 798 799 #define CL_MEM_ION_HOST_PTR_QCOM 0x40A8 800 801 typedef struct _cl_mem_ion_host_ptr 802 { 803 /* Type of external memory allocation. */ 804 /* Must be CL_MEM_ION_HOST_PTR_QCOM for ION allocations. */ 805 cl_mem_ext_host_ptr ext_host_ptr; 806 807 /* ION file descriptor */ 808 int ion_filedesc; 809 810 /* Host pointer to the ION allocated memory */ 811 void* ion_hostptr; 812 813 } cl_mem_ion_host_ptr; 814 815 816 /********************************* 817 * cl_qcom_android_native_buffer_host_ptr extension 818 *********************************/ 819 820 #define CL_MEM_ANDROID_NATIVE_BUFFER_HOST_PTR_QCOM 0x40C6 821 822 typedef struct _cl_mem_android_native_buffer_host_ptr 823 { 824 /* Type of external memory allocation. */ 825 /* Must be CL_MEM_ANDROID_NATIVE_BUFFER_HOST_PTR_QCOM for Android native buffers. */ 826 cl_mem_ext_host_ptr ext_host_ptr; 827 828 /* Virtual pointer to the android native buffer */ 829 void* anb_ptr; 830 831 } cl_mem_android_native_buffer_host_ptr; 832 833 834 /****************************************** 835 * cl_img_yuv_image extension * 836 ******************************************/ 837 838 /* Image formats used in clCreateImage */ 839 #define CL_NV21_IMG 0x40D0 840 #define CL_YV12_IMG 0x40D1 841 842 843 /****************************************** 844 * cl_img_cached_allocations extension * 845 ******************************************/ 846 847 /* Flag values used by clCreateBuffer */ 848 #define CL_MEM_USE_UNCACHED_CPU_MEMORY_IMG (1 << 26) 849 #define CL_MEM_USE_CACHED_CPU_MEMORY_IMG (1 << 27) 850 851 852 /****************************************** 853 * cl_img_use_gralloc_ptr extension * 854 ******************************************/ 855 #define cl_img_use_gralloc_ptr 1 856 857 /* Flag values used by clCreateBuffer */ 858 #define CL_MEM_USE_GRALLOC_PTR_IMG (1 << 28) 859 860 /* To be used by clGetEventInfo: */ 861 #define CL_COMMAND_ACQUIRE_GRALLOC_OBJECTS_IMG 0x40D2 862 #define CL_COMMAND_RELEASE_GRALLOC_OBJECTS_IMG 0x40D3 863 864 /* Error codes from clEnqueueAcquireGrallocObjectsIMG and clEnqueueReleaseGrallocObjectsIMG */ 865 #define CL_GRALLOC_RESOURCE_NOT_ACQUIRED_IMG 0x40D4 866 #define CL_INVALID_GRALLOC_OBJECT_IMG 0x40D5 867 868 extern CL_API_ENTRY cl_int CL_API_CALL 869 clEnqueueAcquireGrallocObjectsIMG(cl_command_queue command_queue, 870 cl_uint num_objects, 871 const cl_mem * mem_objects, 872 cl_uint num_events_in_wait_list, 873 const cl_event * event_wait_list, 874 cl_event * event) CL_API_SUFFIX__VERSION_1_2; 875 876 extern CL_API_ENTRY cl_int CL_API_CALL 877 clEnqueueReleaseGrallocObjectsIMG(cl_command_queue command_queue, 878 cl_uint num_objects, 879 const cl_mem * mem_objects, 880 cl_uint num_events_in_wait_list, 881 const cl_event * event_wait_list, 882 cl_event * event) CL_API_SUFFIX__VERSION_1_2; 883 884 /****************************************** 885 * cl_img_generate_mipmap extension * 886 ******************************************/ 887 #define cl_img_generate_mipmap 1 888 889 typedef cl_uint cl_mipmap_filter_mode_img; 890 891 /* To be used by clEnqueueGenerateMipmapIMG */ 892 #define CL_MIPMAP_FILTER_ANY_IMG 0x0 893 #define CL_MIPMAP_FILTER_BOX_IMG 0x1 894 895 /* To be used by clGetEventInfo */ 896 #define CL_COMMAND_GENERATE_MIPMAP_IMG 0x40D6 897 898 extern CL_API_ENTRY cl_int CL_API_CALL 899 clEnqueueGenerateMipmapIMG(cl_command_queue command_queue, 900 cl_mem src_image, 901 cl_mem dst_image, 902 cl_mipmap_filter_mode_img mipmap_filter_mode, 903 const size_t *array_region, 904 const size_t *mip_region, 905 cl_uint num_events_in_wait_list, 906 const cl_event *event_wait_list, 907 cl_event *event) CL_API_SUFFIX__VERSION_1_2; 908 909 /****************************************** 910 * cl_img_mem_properties extension * 911 ******************************************/ 912 #define cl_img_mem_properties 1 913 914 /* To be used by clCreateBufferWithProperties */ 915 #define CL_MEM_ALLOC_FLAGS_IMG 0x40D7 916 917 /* To be used wiith the CL_MEM_ALLOC_FLAGS_IMG property */ 918 typedef cl_bitfield cl_mem_alloc_flags_img; 919 920 /* To be used with cl_mem_alloc_flags_img */ 921 #define CL_MEM_ALLOC_RELAX_REQUIREMENTS_IMG (1 << 0) 922 923 /********************************* 924 * cl_khr_subgroups extension 925 *********************************/ 926 #define cl_khr_subgroups 1 927 928 #if !defined(CL_VERSION_2_1) 929 /* For OpenCL 2.1 and newer, cl_kernel_sub_group_info is declared in CL.h. 930 In hindsight, there should have been a khr suffix on this type for 931 the extension, but keeping it un-suffixed to maintain backwards 932 compatibility. */ 933 typedef cl_uint cl_kernel_sub_group_info; 934 #endif 935 936 /* cl_kernel_sub_group_info */ 937 #define CL_KERNEL_MAX_SUB_GROUP_SIZE_FOR_NDRANGE_KHR 0x2033 938 #define CL_KERNEL_SUB_GROUP_COUNT_FOR_NDRANGE_KHR 0x2034 939 940 extern CL_API_ENTRY cl_int CL_API_CALL 941 clGetKernelSubGroupInfoKHR(cl_kernel in_kernel, 942 cl_device_id in_device, 943 cl_kernel_sub_group_info param_name, 944 size_t input_value_size, 945 const void * input_value, 946 size_t param_value_size, 947 void * param_value, 948 size_t * param_value_size_ret) CL_API_SUFFIX__VERSION_2_0_DEPRECATED; 949 950 typedef cl_int 951 (CL_API_CALL * clGetKernelSubGroupInfoKHR_fn)(cl_kernel in_kernel, 952 cl_device_id in_device, 953 cl_kernel_sub_group_info param_name, 954 size_t input_value_size, 955 const void * input_value, 956 size_t param_value_size, 957 void * param_value, 958 size_t * param_value_size_ret) CL_API_SUFFIX__VERSION_2_0_DEPRECATED; 959 960 961 /********************************* 962 * cl_khr_mipmap_image extension 963 *********************************/ 964 965 /* cl_sampler_properties */ 966 #define CL_SAMPLER_MIP_FILTER_MODE_KHR 0x1155 967 #define CL_SAMPLER_LOD_MIN_KHR 0x1156 968 #define CL_SAMPLER_LOD_MAX_KHR 0x1157 969 970 971 /********************************* 972 * cl_khr_priority_hints extension 973 *********************************/ 974 /* This extension define is for backwards compatibility. 975 It shouldn't be required since this extension has no new functions. */ 976 #define cl_khr_priority_hints 1 977 978 typedef cl_uint cl_queue_priority_khr; 979 980 /* cl_command_queue_properties */ 981 #define CL_QUEUE_PRIORITY_KHR 0x1096 982 983 /* cl_queue_priority_khr */ 984 #define CL_QUEUE_PRIORITY_HIGH_KHR (1<<0) 985 #define CL_QUEUE_PRIORITY_MED_KHR (1<<1) 986 #define CL_QUEUE_PRIORITY_LOW_KHR (1<<2) 987 988 989 /********************************* 990 * cl_khr_throttle_hints extension 991 *********************************/ 992 /* This extension define is for backwards compatibility. 993 It shouldn't be required since this extension has no new functions. */ 994 #define cl_khr_throttle_hints 1 995 996 typedef cl_uint cl_queue_throttle_khr; 997 998 /* cl_command_queue_properties */ 999 #define CL_QUEUE_THROTTLE_KHR 0x1097 1000 1001 /* cl_queue_throttle_khr */ 1002 #define CL_QUEUE_THROTTLE_HIGH_KHR (1<<0) 1003 #define CL_QUEUE_THROTTLE_MED_KHR (1<<1) 1004 #define CL_QUEUE_THROTTLE_LOW_KHR (1<<2) 1005 1006 1007 /********************************* 1008 * cl_khr_subgroup_named_barrier 1009 *********************************/ 1010 /* This extension define is for backwards compatibility. 1011 It shouldn't be required since this extension has no new functions. */ 1012 #define cl_khr_subgroup_named_barrier 1 1013 1014 /* cl_device_info */ 1015 #define CL_DEVICE_MAX_NAMED_BARRIER_COUNT_KHR 0x2035 1016 1017 1018 /********************************* 1019 * cl_khr_extended_versioning 1020 *********************************/ 1021 1022 #define cl_khr_extended_versioning 1 1023 1024 #define CL_VERSION_MAJOR_BITS_KHR (10) 1025 #define CL_VERSION_MINOR_BITS_KHR (10) 1026 #define CL_VERSION_PATCH_BITS_KHR (12) 1027 1028 #define CL_VERSION_MAJOR_MASK_KHR ((1 << CL_VERSION_MAJOR_BITS_KHR) - 1) 1029 #define CL_VERSION_MINOR_MASK_KHR ((1 << CL_VERSION_MINOR_BITS_KHR) - 1) 1030 #define CL_VERSION_PATCH_MASK_KHR ((1 << CL_VERSION_PATCH_BITS_KHR) - 1) 1031 1032 #define CL_VERSION_MAJOR_KHR(version) ((version) >> (CL_VERSION_MINOR_BITS_KHR + CL_VERSION_PATCH_BITS_KHR)) 1033 #define CL_VERSION_MINOR_KHR(version) (((version) >> CL_VERSION_PATCH_BITS_KHR) & CL_VERSION_MINOR_MASK_KHR) 1034 #define CL_VERSION_PATCH_KHR(version) ((version) & CL_VERSION_PATCH_MASK_KHR) 1035 1036 #define CL_MAKE_VERSION_KHR(major, minor, patch) \ 1037 ((((major) & CL_VERSION_MAJOR_MASK_KHR) << (CL_VERSION_MINOR_BITS_KHR + CL_VERSION_PATCH_BITS_KHR)) | \ 1038 (((minor) & CL_VERSION_MINOR_MASK_KHR) << CL_VERSION_PATCH_BITS_KHR) | \ 1039 ((patch) & CL_VERSION_PATCH_MASK_KHR)) 1040 1041 typedef cl_uint cl_version_khr; 1042 1043 #define CL_NAME_VERSION_MAX_NAME_SIZE_KHR 64 1044 1045 typedef struct _cl_name_version_khr 1046 { 1047 cl_version_khr version; 1048 char name[CL_NAME_VERSION_MAX_NAME_SIZE_KHR]; 1049 } cl_name_version_khr; 1050 1051 /* cl_platform_info */ 1052 #define CL_PLATFORM_NUMERIC_VERSION_KHR 0x0906 1053 #define CL_PLATFORM_EXTENSIONS_WITH_VERSION_KHR 0x0907 1054 1055 /* cl_device_info */ 1056 #define CL_DEVICE_NUMERIC_VERSION_KHR 0x105E 1057 #define CL_DEVICE_OPENCL_C_NUMERIC_VERSION_KHR 0x105F 1058 #define CL_DEVICE_EXTENSIONS_WITH_VERSION_KHR 0x1060 1059 #define CL_DEVICE_ILS_WITH_VERSION_KHR 0x1061 1060 #define CL_DEVICE_BUILT_IN_KERNELS_WITH_VERSION_KHR 0x1062 1061 1062 1063 /********************************* 1064 * cl_khr_device_uuid extension 1065 *********************************/ 1066 #define cl_khr_device_uuid 1 1067 1068 #define CL_UUID_SIZE_KHR 16 1069 #define CL_LUID_SIZE_KHR 8 1070 1071 #define CL_DEVICE_UUID_KHR 0x106A 1072 #define CL_DRIVER_UUID_KHR 0x106B 1073 #define CL_DEVICE_LUID_VALID_KHR 0x106C 1074 #define CL_DEVICE_LUID_KHR 0x106D 1075 #define CL_DEVICE_NODE_MASK_KHR 0x106E 1076 1077 1078 /*************************************************************** 1079 * cl_khr_pci_bus_info 1080 ***************************************************************/ 1081 #define cl_khr_pci_bus_info 1 1082 1083 typedef struct _cl_device_pci_bus_info_khr { 1084 cl_uint pci_domain; 1085 cl_uint pci_bus; 1086 cl_uint pci_device; 1087 cl_uint pci_function; 1088 } cl_device_pci_bus_info_khr; 1089 1090 /* cl_device_info */ 1091 #define CL_DEVICE_PCI_BUS_INFO_KHR 0x410F 1092 1093 1094 /*************************************************************** 1095 * cl_khr_suggested_local_work_size 1096 ***************************************************************/ 1097 #define cl_khr_suggested_local_work_size 1 1098 1099 extern CL_API_ENTRY cl_int CL_API_CALL 1100 clGetKernelSuggestedLocalWorkSizeKHR( 1101 cl_command_queue command_queue, 1102 cl_kernel kernel, 1103 cl_uint work_dim, 1104 const size_t* global_work_offset, 1105 const size_t* global_work_size, 1106 size_t* suggested_local_work_size) CL_API_SUFFIX__VERSION_3_0; 1107 1108 typedef cl_int (CL_API_CALL * 1109 clGetKernelSuggestedLocalWorkSizeKHR_fn)( 1110 cl_command_queue command_queue, 1111 cl_kernel kernel, 1112 cl_uint work_dim, 1113 const size_t* global_work_offset, 1114 const size_t* global_work_size, 1115 size_t* suggested_local_work_size) CL_API_SUFFIX__VERSION_3_0; 1116 1117 1118 /*************************************************************** 1119 * cl_khr_integer_dot_product 1120 ***************************************************************/ 1121 #define cl_khr_integer_dot_product 1 1122 1123 typedef cl_bitfield cl_device_integer_dot_product_capabilities_khr; 1124 1125 /* cl_device_integer_dot_product_capabilities_khr */ 1126 #define CL_DEVICE_INTEGER_DOT_PRODUCT_INPUT_4x8BIT_PACKED_KHR (1 << 0) 1127 #define CL_DEVICE_INTEGER_DOT_PRODUCT_INPUT_4x8BIT_KHR (1 << 1) 1128 1129 typedef struct _cl_device_integer_dot_product_acceleration_properties_khr { 1130 cl_bool signed_accelerated; 1131 cl_bool unsigned_accelerated; 1132 cl_bool mixed_signedness_accelerated; 1133 cl_bool accumulating_saturating_signed_accelerated; 1134 cl_bool accumulating_saturating_unsigned_accelerated; 1135 cl_bool accumulating_saturating_mixed_signedness_accelerated; 1136 } cl_device_integer_dot_product_acceleration_properties_khr; 1137 1138 /* cl_device_info */ 1139 #define CL_DEVICE_INTEGER_DOT_PRODUCT_CAPABILITIES_KHR 0x1073 1140 #define CL_DEVICE_INTEGER_DOT_PRODUCT_ACCELERATION_PROPERTIES_8BIT_KHR 0x1074 1141 #define CL_DEVICE_INTEGER_DOT_PRODUCT_ACCELERATION_PROPERTIES_4x8BIT_PACKED_KHR 0x1075 1142 1143 1144 /*************************************************************** 1145 * cl_khr_external_memory 1146 ***************************************************************/ 1147 #define cl_khr_external_memory 1 1148 1149 typedef cl_uint cl_external_memory_handle_type_khr; 1150 1151 /* cl_platform_info */ 1152 #define CL_PLATFORM_EXTERNAL_MEMORY_IMPORT_HANDLE_TYPES_KHR 0x2044 1153 1154 /* cl_device_info */ 1155 #define CL_DEVICE_EXTERNAL_MEMORY_IMPORT_HANDLE_TYPES_KHR 0x204F 1156 1157 /* cl_mem_properties */ 1158 #define CL_DEVICE_HANDLE_LIST_KHR 0x2051 1159 #define CL_DEVICE_HANDLE_LIST_END_KHR 0 1160 1161 /* cl_command_type */ 1162 #define CL_COMMAND_ACQUIRE_EXTERNAL_MEM_OBJECTS_KHR 0x2047 1163 #define CL_COMMAND_RELEASE_EXTERNAL_MEM_OBJECTS_KHR 0x2048 1164 1165 1166 typedef cl_int (CL_API_CALL * 1167 clEnqueueAcquireExternalMemObjectsKHR_fn)( 1168 cl_command_queue command_queue, 1169 cl_uint num_mem_objects, 1170 const cl_mem* mem_objects, 1171 cl_uint num_events_in_wait_list, 1172 const cl_event* event_wait_list, 1173 cl_event* event) CL_API_SUFFIX__VERSION_3_0; 1174 1175 typedef cl_int (CL_API_CALL * 1176 clEnqueueReleaseExternalMemObjectsKHR_fn)( 1177 cl_command_queue command_queue, 1178 cl_uint num_mem_objects, 1179 const cl_mem* mem_objects, 1180 cl_uint num_events_in_wait_list, 1181 const cl_event* event_wait_list, 1182 cl_event* event) CL_API_SUFFIX__VERSION_3_0; 1183 1184 extern CL_API_ENTRY cl_int CL_API_CALL 1185 clEnqueueAcquireExternalMemObjectsKHR( 1186 cl_command_queue command_queue, 1187 cl_uint num_mem_objects, 1188 const cl_mem* mem_objects, 1189 cl_uint num_events_in_wait_list, 1190 const cl_event* event_wait_list, 1191 cl_event* event) CL_API_SUFFIX__VERSION_3_0; 1192 1193 extern CL_API_ENTRY cl_int CL_API_CALL 1194 clEnqueueReleaseExternalMemObjectsKHR( 1195 cl_command_queue command_queue, 1196 cl_uint num_mem_objects, 1197 const cl_mem* mem_objects, 1198 cl_uint num_events_in_wait_list, 1199 const cl_event* event_wait_list, 1200 cl_event* event) CL_API_SUFFIX__VERSION_3_0; 1201 1202 /*************************************************************** 1203 * cl_khr_external_memory_dma_buf 1204 ***************************************************************/ 1205 #define cl_khr_external_memory_dma_buf 1 1206 1207 /* cl_external_memory_handle_type_khr */ 1208 #define CL_EXTERNAL_MEMORY_HANDLE_DMA_BUF_KHR 0x2067 1209 1210 /*************************************************************** 1211 * cl_khr_external_memory_dx 1212 ***************************************************************/ 1213 #define cl_khr_external_memory_dx 1 1214 1215 /* cl_external_memory_handle_type_khr */ 1216 #define CL_EXTERNAL_MEMORY_HANDLE_D3D11_TEXTURE_KHR 0x2063 1217 #define CL_EXTERNAL_MEMORY_HANDLE_D3D11_TEXTURE_KMT_KHR 0x2064 1218 #define CL_EXTERNAL_MEMORY_HANDLE_D3D12_HEAP_KHR 0x2065 1219 #define CL_EXTERNAL_MEMORY_HANDLE_D3D12_RESOURCE_KHR 0x2066 1220 1221 /*************************************************************** 1222 * cl_khr_external_memory_opaque_fd 1223 ***************************************************************/ 1224 #define cl_khr_external_memory_opaque_fd 1 1225 1226 /* cl_external_memory_handle_type_khr */ 1227 #define CL_EXTERNAL_MEMORY_HANDLE_OPAQUE_FD_KHR 0x2060 1228 1229 /*************************************************************** 1230 * cl_khr_external_memory_win32 1231 ***************************************************************/ 1232 #define cl_khr_external_memory_win32 1 1233 1234 /* cl_external_memory_handle_type_khr */ 1235 #define CL_EXTERNAL_MEMORY_HANDLE_OPAQUE_WIN32_KHR 0x2061 1236 #define CL_EXTERNAL_MEMORY_HANDLE_OPAQUE_WIN32_KMT_KHR 0x2062 1237 1238 /*************************************************************** 1239 * cl_khr_external_semaphore 1240 ***************************************************************/ 1241 #define cl_khr_external_semaphore 1 1242 1243 typedef struct _cl_semaphore_khr * cl_semaphore_khr; 1244 typedef cl_uint cl_external_semaphore_handle_type_khr; 1245 1246 /* cl_platform_info */ 1247 #define CL_PLATFORM_SEMAPHORE_IMPORT_HANDLE_TYPES_KHR 0x2037 1248 #define CL_PLATFORM_SEMAPHORE_EXPORT_HANDLE_TYPES_KHR 0x2038 1249 1250 /* cl_device_info */ 1251 #define CL_DEVICE_SEMAPHORE_IMPORT_HANDLE_TYPES_KHR 0x204D 1252 #define CL_DEVICE_SEMAPHORE_EXPORT_HANDLE_TYPES_KHR 0x204E 1253 1254 /* cl_semaphore_properties_khr */ 1255 #define CL_SEMAPHORE_EXPORT_HANDLE_TYPES_KHR 0x203F 1256 #define CL_SEMAPHORE_EXPORT_HANDLE_TYPES_LIST_END_KHR 0 1257 1258 1259 typedef cl_int (CL_API_CALL * 1260 clGetSemaphoreHandleForTypeKHR_fn)( 1261 cl_semaphore_khr sema_object, 1262 cl_device_id device, 1263 cl_external_semaphore_handle_type_khr handle_type, 1264 size_t handle_size, 1265 void* handle_ptr, 1266 size_t* handle_size_ret) CL_API_SUFFIX__VERSION_1_2; 1267 1268 extern CL_API_ENTRY cl_int CL_API_CALL 1269 clGetSemaphoreHandleForTypeKHR( 1270 cl_semaphore_khr sema_object, 1271 cl_device_id device, 1272 cl_external_semaphore_handle_type_khr handle_type, 1273 size_t handle_size, 1274 void* handle_ptr, 1275 size_t* handle_size_ret) CL_API_SUFFIX__VERSION_1_2; 1276 1277 /*************************************************************** 1278 * cl_khr_external_semaphore_dx_fence 1279 ***************************************************************/ 1280 #define cl_khr_external_semaphore_dx_fence 1 1281 1282 /* cl_external_semaphore_handle_type_khr */ 1283 #define CL_SEMAPHORE_HANDLE_D3D12_FENCE_KHR 0x2059 1284 1285 /*************************************************************** 1286 * cl_khr_external_semaphore_opaque_fd 1287 ***************************************************************/ 1288 #define cl_khr_external_semaphore_opaque_fd 1 1289 1290 /* cl_external_semaphore_handle_type_khr */ 1291 #define CL_SEMAPHORE_HANDLE_OPAQUE_FD_KHR 0x2055 1292 1293 /*************************************************************** 1294 * cl_khr_external_semaphore_sync_fd 1295 ***************************************************************/ 1296 #define cl_khr_external_semaphore_sync_fd 1 1297 1298 /* cl_external_semaphore_handle_type_khr */ 1299 #define CL_SEMAPHORE_HANDLE_SYNC_FD_KHR 0x2058 1300 1301 /*************************************************************** 1302 * cl_khr_external_semaphore_win32 1303 ***************************************************************/ 1304 #define cl_khr_external_semaphore_win32 1 1305 1306 /* cl_external_semaphore_handle_type_khr */ 1307 #define CL_SEMAPHORE_HANDLE_OPAQUE_WIN32_KHR 0x2056 1308 #define CL_SEMAPHORE_HANDLE_OPAQUE_WIN32_KMT_KHR 0x2057 1309 1310 /*************************************************************** 1311 * cl_khr_semaphore 1312 ***************************************************************/ 1313 #define cl_khr_semaphore 1 1314 1315 /* type cl_semaphore_khr */ 1316 typedef cl_properties cl_semaphore_properties_khr; 1317 typedef cl_uint cl_semaphore_info_khr; 1318 typedef cl_uint cl_semaphore_type_khr; 1319 typedef cl_ulong cl_semaphore_payload_khr; 1320 1321 /* cl_semaphore_type */ 1322 #define CL_SEMAPHORE_TYPE_BINARY_KHR 1 1323 1324 /* cl_platform_info */ 1325 #define CL_PLATFORM_SEMAPHORE_TYPES_KHR 0x2036 1326 1327 /* cl_device_info */ 1328 #define CL_DEVICE_SEMAPHORE_TYPES_KHR 0x204C 1329 1330 /* cl_semaphore_info_khr */ 1331 #define CL_SEMAPHORE_CONTEXT_KHR 0x2039 1332 #define CL_SEMAPHORE_REFERENCE_COUNT_KHR 0x203A 1333 #define CL_SEMAPHORE_PROPERTIES_KHR 0x203B 1334 #define CL_SEMAPHORE_PAYLOAD_KHR 0x203C 1335 1336 /* cl_semaphore_info_khr or cl_semaphore_properties_khr */ 1337 #define CL_SEMAPHORE_TYPE_KHR 0x203D 1338 /* enum CL_DEVICE_HANDLE_LIST_KHR */ 1339 /* enum CL_DEVICE_HANDLE_LIST_END_KHR */ 1340 1341 /* cl_command_type */ 1342 #define CL_COMMAND_SEMAPHORE_WAIT_KHR 0x2042 1343 #define CL_COMMAND_SEMAPHORE_SIGNAL_KHR 0x2043 1344 1345 /* Error codes */ 1346 #define CL_INVALID_SEMAPHORE_KHR -1142 1347 1348 1349 typedef cl_semaphore_khr (CL_API_CALL * 1350 clCreateSemaphoreWithPropertiesKHR_fn)( 1351 cl_context context, 1352 const cl_semaphore_properties_khr* sema_props, 1353 cl_int* errcode_ret) CL_API_SUFFIX__VERSION_1_2; 1354 1355 typedef cl_int (CL_API_CALL * 1356 clEnqueueWaitSemaphoresKHR_fn)( 1357 cl_command_queue command_queue, 1358 cl_uint num_sema_objects, 1359 const cl_semaphore_khr* sema_objects, 1360 const cl_semaphore_payload_khr* sema_payload_list, 1361 cl_uint num_events_in_wait_list, 1362 const cl_event* event_wait_list, 1363 cl_event* event) CL_API_SUFFIX__VERSION_1_2; 1364 1365 typedef cl_int (CL_API_CALL * 1366 clEnqueueSignalSemaphoresKHR_fn)( 1367 cl_command_queue command_queue, 1368 cl_uint num_sema_objects, 1369 const cl_semaphore_khr* sema_objects, 1370 const cl_semaphore_payload_khr* sema_payload_list, 1371 cl_uint num_events_in_wait_list, 1372 const cl_event* event_wait_list, 1373 cl_event* event) CL_API_SUFFIX__VERSION_1_2; 1374 1375 typedef cl_int (CL_API_CALL * 1376 clGetSemaphoreInfoKHR_fn)( 1377 cl_semaphore_khr sema_object, 1378 cl_semaphore_info_khr param_name, 1379 size_t param_value_size, 1380 void* param_value, 1381 size_t* param_value_size_ret) CL_API_SUFFIX__VERSION_1_2; 1382 1383 typedef cl_int (CL_API_CALL * 1384 clReleaseSemaphoreKHR_fn)( 1385 cl_semaphore_khr sema_object) CL_API_SUFFIX__VERSION_1_2; 1386 1387 typedef cl_int (CL_API_CALL * 1388 clRetainSemaphoreKHR_fn)( 1389 cl_semaphore_khr sema_object) CL_API_SUFFIX__VERSION_1_2; 1390 1391 extern CL_API_ENTRY cl_semaphore_khr CL_API_CALL 1392 clCreateSemaphoreWithPropertiesKHR( 1393 cl_context context, 1394 const cl_semaphore_properties_khr* sema_props, 1395 cl_int* errcode_ret) CL_API_SUFFIX__VERSION_1_2; 1396 1397 extern CL_API_ENTRY cl_int CL_API_CALL 1398 clEnqueueWaitSemaphoresKHR( 1399 cl_command_queue command_queue, 1400 cl_uint num_sema_objects, 1401 const cl_semaphore_khr* sema_objects, 1402 const cl_semaphore_payload_khr* sema_payload_list, 1403 cl_uint num_events_in_wait_list, 1404 const cl_event* event_wait_list, 1405 cl_event* event) CL_API_SUFFIX__VERSION_1_2; 1406 1407 extern CL_API_ENTRY cl_int CL_API_CALL 1408 clEnqueueSignalSemaphoresKHR( 1409 cl_command_queue command_queue, 1410 cl_uint num_sema_objects, 1411 const cl_semaphore_khr* sema_objects, 1412 const cl_semaphore_payload_khr* sema_payload_list, 1413 cl_uint num_events_in_wait_list, 1414 const cl_event* event_wait_list, 1415 cl_event* event) CL_API_SUFFIX__VERSION_1_2; 1416 1417 extern CL_API_ENTRY cl_int CL_API_CALL 1418 clGetSemaphoreInfoKHR( 1419 cl_semaphore_khr sema_object, 1420 cl_semaphore_info_khr param_name, 1421 size_t param_value_size, 1422 void* param_value, 1423 size_t* param_value_size_ret) CL_API_SUFFIX__VERSION_1_2; 1424 1425 extern CL_API_ENTRY cl_int CL_API_CALL 1426 clReleaseSemaphoreKHR( 1427 cl_semaphore_khr sema_object) CL_API_SUFFIX__VERSION_1_2; 1428 1429 extern CL_API_ENTRY cl_int CL_API_CALL 1430 clRetainSemaphoreKHR( 1431 cl_semaphore_khr sema_object) CL_API_SUFFIX__VERSION_1_2; 1432 1433 /********************************** 1434 * cl_arm_import_memory extension * 1435 **********************************/ 1436 #define cl_arm_import_memory 1 1437 1438 typedef intptr_t cl_import_properties_arm; 1439 1440 /* Default and valid proporties name for cl_arm_import_memory */ 1441 #define CL_IMPORT_TYPE_ARM 0x40B2 1442 1443 /* Host process memory type default value for CL_IMPORT_TYPE_ARM property */ 1444 #define CL_IMPORT_TYPE_HOST_ARM 0x40B3 1445 1446 /* DMA BUF memory type value for CL_IMPORT_TYPE_ARM property */ 1447 #define CL_IMPORT_TYPE_DMA_BUF_ARM 0x40B4 1448 1449 /* Protected memory property */ 1450 #define CL_IMPORT_TYPE_PROTECTED_ARM 0x40B5 1451 1452 /* Android hardware buffer type value for CL_IMPORT_TYPE_ARM property */ 1453 #define CL_IMPORT_TYPE_ANDROID_HARDWARE_BUFFER_ARM 0x41E2 1454 1455 /* Data consistency with host property */ 1456 #define CL_IMPORT_DMA_BUF_DATA_CONSISTENCY_WITH_HOST_ARM 0x41E3 1457 1458 /* Index of plane in a multiplanar hardware buffer */ 1459 #define CL_IMPORT_ANDROID_HARDWARE_BUFFER_PLANE_INDEX_ARM 0x41EF 1460 1461 /* Index of layer in a multilayer hardware buffer */ 1462 #define CL_IMPORT_ANDROID_HARDWARE_BUFFER_LAYER_INDEX_ARM 0x41F0 1463 1464 /* Import memory size value to indicate a size for the whole buffer */ 1465 #define CL_IMPORT_MEMORY_WHOLE_ALLOCATION_ARM SIZE_MAX 1466 1467 /* This extension adds a new function that allows for direct memory import into 1468 * OpenCL via the clImportMemoryARM function. 1469 * 1470 * Memory imported through this interface will be mapped into the device's page 1471 * tables directly, providing zero copy access. It will never fall back to copy 1472 * operations and aliased buffers. 1473 * 1474 * Types of memory supported for import are specified as additional extension 1475 * strings. 1476 * 1477 * This extension produces cl_mem allocations which are compatible with all other 1478 * users of cl_mem in the standard API. 1479 * 1480 * This extension maps pages with the same properties as the normal buffer creation 1481 * function clCreateBuffer. 1482 */ 1483 extern CL_API_ENTRY cl_mem CL_API_CALL 1484 clImportMemoryARM( cl_context context, 1485 cl_mem_flags flags, 1486 const cl_import_properties_arm *properties, 1487 void *memory, 1488 size_t size, 1489 cl_int *errcode_ret) CL_API_SUFFIX__VERSION_1_0; 1490 1491 1492 /****************************************** 1493 * cl_arm_shared_virtual_memory extension * 1494 ******************************************/ 1495 #define cl_arm_shared_virtual_memory 1 1496 1497 /* Used by clGetDeviceInfo */ 1498 #define CL_DEVICE_SVM_CAPABILITIES_ARM 0x40B6 1499 1500 /* Used by clGetMemObjectInfo */ 1501 #define CL_MEM_USES_SVM_POINTER_ARM 0x40B7 1502 1503 /* Used by clSetKernelExecInfoARM: */ 1504 #define CL_KERNEL_EXEC_INFO_SVM_PTRS_ARM 0x40B8 1505 #define CL_KERNEL_EXEC_INFO_SVM_FINE_GRAIN_SYSTEM_ARM 0x40B9 1506 1507 /* To be used by clGetEventInfo: */ 1508 #define CL_COMMAND_SVM_FREE_ARM 0x40BA 1509 #define CL_COMMAND_SVM_MEMCPY_ARM 0x40BB 1510 #define CL_COMMAND_SVM_MEMFILL_ARM 0x40BC 1511 #define CL_COMMAND_SVM_MAP_ARM 0x40BD 1512 #define CL_COMMAND_SVM_UNMAP_ARM 0x40BE 1513 1514 /* Flag values returned by clGetDeviceInfo with CL_DEVICE_SVM_CAPABILITIES_ARM as the param_name. */ 1515 #define CL_DEVICE_SVM_COARSE_GRAIN_BUFFER_ARM (1 << 0) 1516 #define CL_DEVICE_SVM_FINE_GRAIN_BUFFER_ARM (1 << 1) 1517 #define CL_DEVICE_SVM_FINE_GRAIN_SYSTEM_ARM (1 << 2) 1518 #define CL_DEVICE_SVM_ATOMICS_ARM (1 << 3) 1519 1520 /* Flag values used by clSVMAllocARM: */ 1521 #define CL_MEM_SVM_FINE_GRAIN_BUFFER_ARM (1 << 10) 1522 #define CL_MEM_SVM_ATOMICS_ARM (1 << 11) 1523 1524 typedef cl_bitfield cl_svm_mem_flags_arm; 1525 typedef cl_uint cl_kernel_exec_info_arm; 1526 typedef cl_bitfield cl_device_svm_capabilities_arm; 1527 1528 extern CL_API_ENTRY void * CL_API_CALL 1529 clSVMAllocARM(cl_context context, 1530 cl_svm_mem_flags_arm flags, 1531 size_t size, 1532 cl_uint alignment) CL_API_SUFFIX__VERSION_1_2; 1533 1534 extern CL_API_ENTRY void CL_API_CALL 1535 clSVMFreeARM(cl_context context, 1536 void * svm_pointer) CL_API_SUFFIX__VERSION_1_2; 1537 1538 extern CL_API_ENTRY cl_int CL_API_CALL 1539 clEnqueueSVMFreeARM(cl_command_queue command_queue, 1540 cl_uint num_svm_pointers, 1541 void * svm_pointers[], 1542 void (CL_CALLBACK * pfn_free_func)(cl_command_queue queue, 1543 cl_uint num_svm_pointers, 1544 void * svm_pointers[], 1545 void * user_data), 1546 void * user_data, 1547 cl_uint num_events_in_wait_list, 1548 const cl_event * event_wait_list, 1549 cl_event * event) CL_API_SUFFIX__VERSION_1_2; 1550 1551 extern CL_API_ENTRY cl_int CL_API_CALL 1552 clEnqueueSVMMemcpyARM(cl_command_queue command_queue, 1553 cl_bool blocking_copy, 1554 void * dst_ptr, 1555 const void * src_ptr, 1556 size_t size, 1557 cl_uint num_events_in_wait_list, 1558 const cl_event * event_wait_list, 1559 cl_event * event) CL_API_SUFFIX__VERSION_1_2; 1560 1561 extern CL_API_ENTRY cl_int CL_API_CALL 1562 clEnqueueSVMMemFillARM(cl_command_queue command_queue, 1563 void * svm_ptr, 1564 const void * pattern, 1565 size_t pattern_size, 1566 size_t size, 1567 cl_uint num_events_in_wait_list, 1568 const cl_event * event_wait_list, 1569 cl_event * event) CL_API_SUFFIX__VERSION_1_2; 1570 1571 extern CL_API_ENTRY cl_int CL_API_CALL 1572 clEnqueueSVMMapARM(cl_command_queue command_queue, 1573 cl_bool blocking_map, 1574 cl_map_flags flags, 1575 void * svm_ptr, 1576 size_t size, 1577 cl_uint num_events_in_wait_list, 1578 const cl_event * event_wait_list, 1579 cl_event * event) CL_API_SUFFIX__VERSION_1_2; 1580 1581 extern CL_API_ENTRY cl_int CL_API_CALL 1582 clEnqueueSVMUnmapARM(cl_command_queue command_queue, 1583 void * svm_ptr, 1584 cl_uint num_events_in_wait_list, 1585 const cl_event * event_wait_list, 1586 cl_event * event) CL_API_SUFFIX__VERSION_1_2; 1587 1588 extern CL_API_ENTRY cl_int CL_API_CALL 1589 clSetKernelArgSVMPointerARM(cl_kernel kernel, 1590 cl_uint arg_index, 1591 const void * arg_value) CL_API_SUFFIX__VERSION_1_2; 1592 1593 extern CL_API_ENTRY cl_int CL_API_CALL 1594 clSetKernelExecInfoARM(cl_kernel kernel, 1595 cl_kernel_exec_info_arm param_name, 1596 size_t param_value_size, 1597 const void * param_value) CL_API_SUFFIX__VERSION_1_2; 1598 1599 /******************************** 1600 * cl_arm_get_core_id extension * 1601 ********************************/ 1602 1603 #ifdef CL_VERSION_1_2 1604 1605 #define cl_arm_get_core_id 1 1606 1607 /* Device info property for bitfield of cores present */ 1608 #define CL_DEVICE_COMPUTE_UNITS_BITFIELD_ARM 0x40BF 1609 1610 #endif /* CL_VERSION_1_2 */ 1611 1612 /********************************* 1613 * cl_arm_job_slot_selection 1614 *********************************/ 1615 1616 #define cl_arm_job_slot_selection 1 1617 1618 /* cl_device_info */ 1619 #define CL_DEVICE_JOB_SLOTS_ARM 0x41E0 1620 1621 /* cl_command_queue_properties */ 1622 #define CL_QUEUE_JOB_SLOT_ARM 0x41E1 1623 1624 /********************************* 1625 * cl_arm_scheduling_controls 1626 *********************************/ 1627 1628 #define cl_arm_scheduling_controls 1 1629 1630 typedef cl_bitfield cl_device_scheduling_controls_capabilities_arm; 1631 1632 /* cl_device_info */ 1633 #define CL_DEVICE_SCHEDULING_CONTROLS_CAPABILITIES_ARM 0x41E4 1634 1635 #define CL_DEVICE_SCHEDULING_KERNEL_BATCHING_ARM (1 << 0) 1636 #define CL_DEVICE_SCHEDULING_WORKGROUP_BATCH_SIZE_ARM (1 << 1) 1637 #define CL_DEVICE_SCHEDULING_WORKGROUP_BATCH_SIZE_MODIFIER_ARM (1 << 2) 1638 #define CL_DEVICE_SCHEDULING_DEFERRED_FLUSH_ARM (1 << 3) 1639 #define CL_DEVICE_SCHEDULING_REGISTER_ALLOCATION_ARM (1 << 4) 1640 1641 #define CL_DEVICE_SUPPORTED_REGISTER_ALLOCATIONS_ARM 0x41EB 1642 1643 /* cl_kernel_info */ 1644 #define CL_KERNEL_EXEC_INFO_WORKGROUP_BATCH_SIZE_ARM 0x41E5 1645 #define CL_KERNEL_EXEC_INFO_WORKGROUP_BATCH_SIZE_MODIFIER_ARM 0x41E6 1646 1647 /* cl_queue_properties */ 1648 #define CL_QUEUE_KERNEL_BATCHING_ARM 0x41E7 1649 #define CL_QUEUE_DEFERRED_FLUSH_ARM 0x41EC 1650 1651 /************************************** 1652 * cl_arm_controlled_kernel_termination 1653 ***************************************/ 1654 1655 #define cl_arm_controlled_kernel_termination 1 1656 1657 /* Error code to indicate kernel terminated with failure */ 1658 #define CL_COMMAND_TERMINATED_ITSELF_WITH_FAILURE_ARM -1108 1659 1660 /* cl_device_info */ 1661 #define CL_DEVICE_CONTROLLED_TERMINATION_CAPABILITIES_ARM 0x41EE 1662 1663 /* Bit fields for controlled termination feature query */ 1664 typedef cl_bitfield cl_device_controlled_termination_capabilities_arm; 1665 1666 #define CL_DEVICE_CONTROLLED_TERMINATION_SUCCESS_ARM (1 << 0) 1667 #define CL_DEVICE_CONTROLLED_TERMINATION_FAILURE_ARM (1 << 1) 1668 #define CL_DEVICE_CONTROLLED_TERMINATION_QUERY_ARM (1 << 2) 1669 1670 /* cl_event_info */ 1671 #define CL_EVENT_COMMAND_TERMINATION_REASON_ARM 0x41ED 1672 1673 /* Values returned for event termination reason query */ 1674 typedef cl_uint cl_command_termination_reason_arm; 1675 1676 #define CL_COMMAND_TERMINATION_COMPLETION_ARM 0 1677 #define CL_COMMAND_TERMINATION_CONTROLLED_SUCCESS_ARM 1 1678 #define CL_COMMAND_TERMINATION_CONTROLLED_FAILURE_ARM 2 1679 #define CL_COMMAND_TERMINATION_ERROR_ARM 3 1680 1681 /************************************* 1682 * cl_arm_protected_memory_allocation * 1683 *************************************/ 1684 1685 #define cl_arm_protected_memory_allocation 1 1686 1687 #define CL_MEM_PROTECTED_ALLOC_ARM (1ULL << 36) 1688 1689 /****************************************** 1690 * cl_intel_exec_by_local_thread extension * 1691 ******************************************/ 1692 1693 #define cl_intel_exec_by_local_thread 1 1694 1695 #define CL_QUEUE_THREAD_LOCAL_EXEC_ENABLE_INTEL (((cl_bitfield)1) << 31) 1696 1697 /*************************************************************** 1698 * cl_intel_device_attribute_query 1699 ***************************************************************/ 1700 1701 #define cl_intel_device_attribute_query 1 1702 1703 typedef cl_bitfield cl_device_feature_capabilities_intel; 1704 1705 /* cl_device_feature_capabilities_intel */ 1706 #define CL_DEVICE_FEATURE_FLAG_DP4A_INTEL (1 << 0) 1707 #define CL_DEVICE_FEATURE_FLAG_DPAS_INTEL (1 << 1) 1708 1709 /* cl_device_info */ 1710 #define CL_DEVICE_IP_VERSION_INTEL 0x4250 1711 #define CL_DEVICE_ID_INTEL 0x4251 1712 #define CL_DEVICE_NUM_SLICES_INTEL 0x4252 1713 #define CL_DEVICE_NUM_SUB_SLICES_PER_SLICE_INTEL 0x4253 1714 #define CL_DEVICE_NUM_EUS_PER_SUB_SLICE_INTEL 0x4254 1715 #define CL_DEVICE_NUM_THREADS_PER_EU_INTEL 0x4255 1716 #define CL_DEVICE_FEATURE_CAPABILITIES_INTEL 0x4256 1717 1718 /*********************************************** 1719 * cl_intel_device_partition_by_names extension * 1720 ************************************************/ 1721 1722 #define cl_intel_device_partition_by_names 1 1723 1724 #define CL_DEVICE_PARTITION_BY_NAMES_INTEL 0x4052 1725 #define CL_PARTITION_BY_NAMES_LIST_END_INTEL -1 1726 1727 /************************************************ 1728 * cl_intel_accelerator extension * 1729 * cl_intel_motion_estimation extension * 1730 * cl_intel_advanced_motion_estimation extension * 1731 *************************************************/ 1732 1733 #define cl_intel_accelerator 1 1734 #define cl_intel_motion_estimation 1 1735 #define cl_intel_advanced_motion_estimation 1 1736 1737 typedef struct _cl_accelerator_intel* cl_accelerator_intel; 1738 typedef cl_uint cl_accelerator_type_intel; 1739 typedef cl_uint cl_accelerator_info_intel; 1740 1741 typedef struct _cl_motion_estimation_desc_intel { 1742 cl_uint mb_block_type; 1743 cl_uint subpixel_mode; 1744 cl_uint sad_adjust_mode; 1745 cl_uint search_path_type; 1746 } cl_motion_estimation_desc_intel; 1747 1748 /* error codes */ 1749 #define CL_INVALID_ACCELERATOR_INTEL -1094 1750 #define CL_INVALID_ACCELERATOR_TYPE_INTEL -1095 1751 #define CL_INVALID_ACCELERATOR_DESCRIPTOR_INTEL -1096 1752 #define CL_ACCELERATOR_TYPE_NOT_SUPPORTED_INTEL -1097 1753 1754 /* cl_accelerator_type_intel */ 1755 #define CL_ACCELERATOR_TYPE_MOTION_ESTIMATION_INTEL 0x0 1756 1757 /* cl_accelerator_info_intel */ 1758 #define CL_ACCELERATOR_DESCRIPTOR_INTEL 0x4090 1759 #define CL_ACCELERATOR_REFERENCE_COUNT_INTEL 0x4091 1760 #define CL_ACCELERATOR_CONTEXT_INTEL 0x4092 1761 #define CL_ACCELERATOR_TYPE_INTEL 0x4093 1762 1763 /* cl_motion_detect_desc_intel flags */ 1764 #define CL_ME_MB_TYPE_16x16_INTEL 0x0 1765 #define CL_ME_MB_TYPE_8x8_INTEL 0x1 1766 #define CL_ME_MB_TYPE_4x4_INTEL 0x2 1767 1768 #define CL_ME_SUBPIXEL_MODE_INTEGER_INTEL 0x0 1769 #define CL_ME_SUBPIXEL_MODE_HPEL_INTEL 0x1 1770 #define CL_ME_SUBPIXEL_MODE_QPEL_INTEL 0x2 1771 1772 #define CL_ME_SAD_ADJUST_MODE_NONE_INTEL 0x0 1773 #define CL_ME_SAD_ADJUST_MODE_HAAR_INTEL 0x1 1774 1775 #define CL_ME_SEARCH_PATH_RADIUS_2_2_INTEL 0x0 1776 #define CL_ME_SEARCH_PATH_RADIUS_4_4_INTEL 0x1 1777 #define CL_ME_SEARCH_PATH_RADIUS_16_12_INTEL 0x5 1778 1779 #define CL_ME_SKIP_BLOCK_TYPE_16x16_INTEL 0x0 1780 #define CL_ME_CHROMA_INTRA_PREDICT_ENABLED_INTEL 0x1 1781 #define CL_ME_LUMA_INTRA_PREDICT_ENABLED_INTEL 0x2 1782 #define CL_ME_SKIP_BLOCK_TYPE_8x8_INTEL 0x4 1783 1784 #define CL_ME_FORWARD_INPUT_MODE_INTEL 0x1 1785 #define CL_ME_BACKWARD_INPUT_MODE_INTEL 0x2 1786 #define CL_ME_BIDIRECTION_INPUT_MODE_INTEL 0x3 1787 1788 #define CL_ME_BIDIR_WEIGHT_QUARTER_INTEL 16 1789 #define CL_ME_BIDIR_WEIGHT_THIRD_INTEL 21 1790 #define CL_ME_BIDIR_WEIGHT_HALF_INTEL 32 1791 #define CL_ME_BIDIR_WEIGHT_TWO_THIRD_INTEL 43 1792 #define CL_ME_BIDIR_WEIGHT_THREE_QUARTER_INTEL 48 1793 1794 #define CL_ME_COST_PENALTY_NONE_INTEL 0x0 1795 #define CL_ME_COST_PENALTY_LOW_INTEL 0x1 1796 #define CL_ME_COST_PENALTY_NORMAL_INTEL 0x2 1797 #define CL_ME_COST_PENALTY_HIGH_INTEL 0x3 1798 1799 #define CL_ME_COST_PRECISION_QPEL_INTEL 0x0 1800 #define CL_ME_COST_PRECISION_HPEL_INTEL 0x1 1801 #define CL_ME_COST_PRECISION_PEL_INTEL 0x2 1802 #define CL_ME_COST_PRECISION_DPEL_INTEL 0x3 1803 1804 #define CL_ME_LUMA_PREDICTOR_MODE_VERTICAL_INTEL 0x0 1805 #define CL_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1 1806 #define CL_ME_LUMA_PREDICTOR_MODE_DC_INTEL 0x2 1807 #define CL_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_LEFT_INTEL 0x3 1808 1809 #define CL_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_RIGHT_INTEL 0x4 1810 #define CL_ME_LUMA_PREDICTOR_MODE_PLANE_INTEL 0x4 1811 #define CL_ME_LUMA_PREDICTOR_MODE_VERTICAL_RIGHT_INTEL 0x5 1812 #define CL_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_DOWN_INTEL 0x6 1813 #define CL_ME_LUMA_PREDICTOR_MODE_VERTICAL_LEFT_INTEL 0x7 1814 #define CL_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_UP_INTEL 0x8 1815 1816 #define CL_ME_CHROMA_PREDICTOR_MODE_DC_INTEL 0x0 1817 #define CL_ME_CHROMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1 1818 #define CL_ME_CHROMA_PREDICTOR_MODE_VERTICAL_INTEL 0x2 1819 #define CL_ME_CHROMA_PREDICTOR_MODE_PLANE_INTEL 0x3 1820 1821 /* cl_device_info */ 1822 #define CL_DEVICE_ME_VERSION_INTEL 0x407E 1823 1824 #define CL_ME_VERSION_LEGACY_INTEL 0x0 1825 #define CL_ME_VERSION_ADVANCED_VER_1_INTEL 0x1 1826 #define CL_ME_VERSION_ADVANCED_VER_2_INTEL 0x2 1827 1828 extern CL_API_ENTRY cl_accelerator_intel CL_API_CALL 1829 clCreateAcceleratorINTEL( 1830 cl_context context, 1831 cl_accelerator_type_intel accelerator_type, 1832 size_t descriptor_size, 1833 const void* descriptor, 1834 cl_int* errcode_ret) CL_API_SUFFIX__VERSION_1_2; 1835 1836 typedef cl_accelerator_intel (CL_API_CALL *clCreateAcceleratorINTEL_fn)( 1837 cl_context context, 1838 cl_accelerator_type_intel accelerator_type, 1839 size_t descriptor_size, 1840 const void* descriptor, 1841 cl_int* errcode_ret) CL_API_SUFFIX__VERSION_1_2; 1842 1843 extern CL_API_ENTRY cl_int CL_API_CALL 1844 clGetAcceleratorInfoINTEL( 1845 cl_accelerator_intel accelerator, 1846 cl_accelerator_info_intel param_name, 1847 size_t param_value_size, 1848 void* param_value, 1849 size_t* param_value_size_ret) CL_API_SUFFIX__VERSION_1_2; 1850 1851 typedef cl_int (CL_API_CALL *clGetAcceleratorInfoINTEL_fn)( 1852 cl_accelerator_intel accelerator, 1853 cl_accelerator_info_intel param_name, 1854 size_t param_value_size, 1855 void* param_value, 1856 size_t* param_value_size_ret) CL_API_SUFFIX__VERSION_1_2; 1857 1858 extern CL_API_ENTRY cl_int CL_API_CALL 1859 clRetainAcceleratorINTEL( 1860 cl_accelerator_intel accelerator) CL_API_SUFFIX__VERSION_1_2; 1861 1862 typedef cl_int (CL_API_CALL *clRetainAcceleratorINTEL_fn)( 1863 cl_accelerator_intel accelerator) CL_API_SUFFIX__VERSION_1_2; 1864 1865 extern CL_API_ENTRY cl_int CL_API_CALL 1866 clReleaseAcceleratorINTEL( 1867 cl_accelerator_intel accelerator) CL_API_SUFFIX__VERSION_1_2; 1868 1869 typedef cl_int (CL_API_CALL *clReleaseAcceleratorINTEL_fn)( 1870 cl_accelerator_intel accelerator) CL_API_SUFFIX__VERSION_1_2; 1871 1872 /****************************************** 1873 * cl_intel_simultaneous_sharing extension * 1874 *******************************************/ 1875 1876 #define cl_intel_simultaneous_sharing 1 1877 1878 #define CL_DEVICE_SIMULTANEOUS_INTEROPS_INTEL 0x4104 1879 #define CL_DEVICE_NUM_SIMULTANEOUS_INTEROPS_INTEL 0x4105 1880 1881 /*********************************** 1882 * cl_intel_egl_image_yuv extension * 1883 ************************************/ 1884 1885 #define cl_intel_egl_image_yuv 1 1886 1887 #define CL_EGL_YUV_PLANE_INTEL 0x4107 1888 1889 /******************************** 1890 * cl_intel_packed_yuv extension * 1891 *********************************/ 1892 1893 #define cl_intel_packed_yuv 1 1894 1895 #define CL_YUYV_INTEL 0x4076 1896 #define CL_UYVY_INTEL 0x4077 1897 #define CL_YVYU_INTEL 0x4078 1898 #define CL_VYUY_INTEL 0x4079 1899 1900 /******************************************** 1901 * cl_intel_required_subgroup_size extension * 1902 *********************************************/ 1903 1904 #define cl_intel_required_subgroup_size 1 1905 1906 #define CL_DEVICE_SUB_GROUP_SIZES_INTEL 0x4108 1907 #define CL_KERNEL_SPILL_MEM_SIZE_INTEL 0x4109 1908 #define CL_KERNEL_COMPILE_SUB_GROUP_SIZE_INTEL 0x410A 1909 1910 /**************************************** 1911 * cl_intel_driver_diagnostics extension * 1912 *****************************************/ 1913 1914 #define cl_intel_driver_diagnostics 1 1915 1916 typedef cl_uint cl_diagnostics_verbose_level; 1917 1918 #define CL_CONTEXT_SHOW_DIAGNOSTICS_INTEL 0x4106 1919 1920 #define CL_CONTEXT_DIAGNOSTICS_LEVEL_ALL_INTEL ( 0xff ) 1921 #define CL_CONTEXT_DIAGNOSTICS_LEVEL_GOOD_INTEL ( 1 ) 1922 #define CL_CONTEXT_DIAGNOSTICS_LEVEL_BAD_INTEL ( 1 << 1 ) 1923 #define CL_CONTEXT_DIAGNOSTICS_LEVEL_NEUTRAL_INTEL ( 1 << 2 ) 1924 1925 /******************************** 1926 * cl_intel_planar_yuv extension * 1927 *********************************/ 1928 1929 #define CL_NV12_INTEL 0x410E 1930 1931 #define CL_MEM_NO_ACCESS_INTEL ( 1 << 24 ) 1932 #define CL_MEM_ACCESS_FLAGS_UNRESTRICTED_INTEL ( 1 << 25 ) 1933 1934 #define CL_DEVICE_PLANAR_YUV_MAX_WIDTH_INTEL 0x417E 1935 #define CL_DEVICE_PLANAR_YUV_MAX_HEIGHT_INTEL 0x417F 1936 1937 /******************************************************* 1938 * cl_intel_device_side_avc_motion_estimation extension * 1939 ********************************************************/ 1940 1941 #define CL_DEVICE_AVC_ME_VERSION_INTEL 0x410B 1942 #define CL_DEVICE_AVC_ME_SUPPORTS_TEXTURE_SAMPLER_USE_INTEL 0x410C 1943 #define CL_DEVICE_AVC_ME_SUPPORTS_PREEMPTION_INTEL 0x410D 1944 1945 #define CL_AVC_ME_VERSION_0_INTEL 0x0 /* No support. */ 1946 #define CL_AVC_ME_VERSION_1_INTEL 0x1 /* First supported version. */ 1947 1948 #define CL_AVC_ME_MAJOR_16x16_INTEL 0x0 1949 #define CL_AVC_ME_MAJOR_16x8_INTEL 0x1 1950 #define CL_AVC_ME_MAJOR_8x16_INTEL 0x2 1951 #define CL_AVC_ME_MAJOR_8x8_INTEL 0x3 1952 1953 #define CL_AVC_ME_MINOR_8x8_INTEL 0x0 1954 #define CL_AVC_ME_MINOR_8x4_INTEL 0x1 1955 #define CL_AVC_ME_MINOR_4x8_INTEL 0x2 1956 #define CL_AVC_ME_MINOR_4x4_INTEL 0x3 1957 1958 #define CL_AVC_ME_MAJOR_FORWARD_INTEL 0x0 1959 #define CL_AVC_ME_MAJOR_BACKWARD_INTEL 0x1 1960 #define CL_AVC_ME_MAJOR_BIDIRECTIONAL_INTEL 0x2 1961 1962 #define CL_AVC_ME_PARTITION_MASK_ALL_INTEL 0x0 1963 #define CL_AVC_ME_PARTITION_MASK_16x16_INTEL 0x7E 1964 #define CL_AVC_ME_PARTITION_MASK_16x8_INTEL 0x7D 1965 #define CL_AVC_ME_PARTITION_MASK_8x16_INTEL 0x7B 1966 #define CL_AVC_ME_PARTITION_MASK_8x8_INTEL 0x77 1967 #define CL_AVC_ME_PARTITION_MASK_8x4_INTEL 0x6F 1968 #define CL_AVC_ME_PARTITION_MASK_4x8_INTEL 0x5F 1969 #define CL_AVC_ME_PARTITION_MASK_4x4_INTEL 0x3F 1970 1971 #define CL_AVC_ME_SEARCH_WINDOW_EXHAUSTIVE_INTEL 0x0 1972 #define CL_AVC_ME_SEARCH_WINDOW_SMALL_INTEL 0x1 1973 #define CL_AVC_ME_SEARCH_WINDOW_TINY_INTEL 0x2 1974 #define CL_AVC_ME_SEARCH_WINDOW_EXTRA_TINY_INTEL 0x3 1975 #define CL_AVC_ME_SEARCH_WINDOW_DIAMOND_INTEL 0x4 1976 #define CL_AVC_ME_SEARCH_WINDOW_LARGE_DIAMOND_INTEL 0x5 1977 #define CL_AVC_ME_SEARCH_WINDOW_RESERVED0_INTEL 0x6 1978 #define CL_AVC_ME_SEARCH_WINDOW_RESERVED1_INTEL 0x7 1979 #define CL_AVC_ME_SEARCH_WINDOW_CUSTOM_INTEL 0x8 1980 #define CL_AVC_ME_SEARCH_WINDOW_16x12_RADIUS_INTEL 0x9 1981 #define CL_AVC_ME_SEARCH_WINDOW_4x4_RADIUS_INTEL 0x2 1982 #define CL_AVC_ME_SEARCH_WINDOW_2x2_RADIUS_INTEL 0xa 1983 1984 #define CL_AVC_ME_SAD_ADJUST_MODE_NONE_INTEL 0x0 1985 #define CL_AVC_ME_SAD_ADJUST_MODE_HAAR_INTEL 0x2 1986 1987 #define CL_AVC_ME_SUBPIXEL_MODE_INTEGER_INTEL 0x0 1988 #define CL_AVC_ME_SUBPIXEL_MODE_HPEL_INTEL 0x1 1989 #define CL_AVC_ME_SUBPIXEL_MODE_QPEL_INTEL 0x3 1990 1991 #define CL_AVC_ME_COST_PRECISION_QPEL_INTEL 0x0 1992 #define CL_AVC_ME_COST_PRECISION_HPEL_INTEL 0x1 1993 #define CL_AVC_ME_COST_PRECISION_PEL_INTEL 0x2 1994 #define CL_AVC_ME_COST_PRECISION_DPEL_INTEL 0x3 1995 1996 #define CL_AVC_ME_BIDIR_WEIGHT_QUARTER_INTEL 0x10 1997 #define CL_AVC_ME_BIDIR_WEIGHT_THIRD_INTEL 0x15 1998 #define CL_AVC_ME_BIDIR_WEIGHT_HALF_INTEL 0x20 1999 #define CL_AVC_ME_BIDIR_WEIGHT_TWO_THIRD_INTEL 0x2B 2000 #define CL_AVC_ME_BIDIR_WEIGHT_THREE_QUARTER_INTEL 0x30 2001 2002 #define CL_AVC_ME_BORDER_REACHED_LEFT_INTEL 0x0 2003 #define CL_AVC_ME_BORDER_REACHED_RIGHT_INTEL 0x2 2004 #define CL_AVC_ME_BORDER_REACHED_TOP_INTEL 0x4 2005 #define CL_AVC_ME_BORDER_REACHED_BOTTOM_INTEL 0x8 2006 2007 #define CL_AVC_ME_SKIP_BLOCK_PARTITION_16x16_INTEL 0x0 2008 #define CL_AVC_ME_SKIP_BLOCK_PARTITION_8x8_INTEL 0x4000 2009 2010 #define CL_AVC_ME_SKIP_BLOCK_16x16_FORWARD_ENABLE_INTEL ( 0x1 << 24 ) 2011 #define CL_AVC_ME_SKIP_BLOCK_16x16_BACKWARD_ENABLE_INTEL ( 0x2 << 24 ) 2012 #define CL_AVC_ME_SKIP_BLOCK_16x16_DUAL_ENABLE_INTEL ( 0x3 << 24 ) 2013 #define CL_AVC_ME_SKIP_BLOCK_8x8_FORWARD_ENABLE_INTEL ( 0x55 << 24 ) 2014 #define CL_AVC_ME_SKIP_BLOCK_8x8_BACKWARD_ENABLE_INTEL ( 0xAA << 24 ) 2015 #define CL_AVC_ME_SKIP_BLOCK_8x8_DUAL_ENABLE_INTEL ( 0xFF << 24 ) 2016 #define CL_AVC_ME_SKIP_BLOCK_8x8_0_FORWARD_ENABLE_INTEL ( 0x1 << 24 ) 2017 #define CL_AVC_ME_SKIP_BLOCK_8x8_0_BACKWARD_ENABLE_INTEL ( 0x2 << 24 ) 2018 #define CL_AVC_ME_SKIP_BLOCK_8x8_1_FORWARD_ENABLE_INTEL ( 0x1 << 26 ) 2019 #define CL_AVC_ME_SKIP_BLOCK_8x8_1_BACKWARD_ENABLE_INTEL ( 0x2 << 26 ) 2020 #define CL_AVC_ME_SKIP_BLOCK_8x8_2_FORWARD_ENABLE_INTEL ( 0x1 << 28 ) 2021 #define CL_AVC_ME_SKIP_BLOCK_8x8_2_BACKWARD_ENABLE_INTEL ( 0x2 << 28 ) 2022 #define CL_AVC_ME_SKIP_BLOCK_8x8_3_FORWARD_ENABLE_INTEL ( 0x1 << 30 ) 2023 #define CL_AVC_ME_SKIP_BLOCK_8x8_3_BACKWARD_ENABLE_INTEL ( 0x2 << 30 ) 2024 2025 #define CL_AVC_ME_BLOCK_BASED_SKIP_4x4_INTEL 0x00 2026 #define CL_AVC_ME_BLOCK_BASED_SKIP_8x8_INTEL 0x80 2027 2028 #define CL_AVC_ME_INTRA_16x16_INTEL 0x0 2029 #define CL_AVC_ME_INTRA_8x8_INTEL 0x1 2030 #define CL_AVC_ME_INTRA_4x4_INTEL 0x2 2031 2032 #define CL_AVC_ME_INTRA_LUMA_PARTITION_MASK_16x16_INTEL 0x6 2033 #define CL_AVC_ME_INTRA_LUMA_PARTITION_MASK_8x8_INTEL 0x5 2034 #define CL_AVC_ME_INTRA_LUMA_PARTITION_MASK_4x4_INTEL 0x3 2035 2036 #define CL_AVC_ME_INTRA_NEIGHBOR_LEFT_MASK_ENABLE_INTEL 0x60 2037 #define CL_AVC_ME_INTRA_NEIGHBOR_UPPER_MASK_ENABLE_INTEL 0x10 2038 #define CL_AVC_ME_INTRA_NEIGHBOR_UPPER_RIGHT_MASK_ENABLE_INTEL 0x8 2039 #define CL_AVC_ME_INTRA_NEIGHBOR_UPPER_LEFT_MASK_ENABLE_INTEL 0x4 2040 2041 #define CL_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_INTEL 0x0 2042 #define CL_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1 2043 #define CL_AVC_ME_LUMA_PREDICTOR_MODE_DC_INTEL 0x2 2044 #define CL_AVC_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_LEFT_INTEL 0x3 2045 #define CL_AVC_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_RIGHT_INTEL 0x4 2046 #define CL_AVC_ME_LUMA_PREDICTOR_MODE_PLANE_INTEL 0x4 2047 #define CL_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_RIGHT_INTEL 0x5 2048 #define CL_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_DOWN_INTEL 0x6 2049 #define CL_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_LEFT_INTEL 0x7 2050 #define CL_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_UP_INTEL 0x8 2051 #define CL_AVC_ME_CHROMA_PREDICTOR_MODE_DC_INTEL 0x0 2052 #define CL_AVC_ME_CHROMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1 2053 #define CL_AVC_ME_CHROMA_PREDICTOR_MODE_VERTICAL_INTEL 0x2 2054 #define CL_AVC_ME_CHROMA_PREDICTOR_MODE_PLANE_INTEL 0x3 2055 2056 #define CL_AVC_ME_FRAME_FORWARD_INTEL 0x1 2057 #define CL_AVC_ME_FRAME_BACKWARD_INTEL 0x2 2058 #define CL_AVC_ME_FRAME_DUAL_INTEL 0x3 2059 2060 #define CL_AVC_ME_SLICE_TYPE_PRED_INTEL 0x0 2061 #define CL_AVC_ME_SLICE_TYPE_BPRED_INTEL 0x1 2062 #define CL_AVC_ME_SLICE_TYPE_INTRA_INTEL 0x2 2063 2064 #define CL_AVC_ME_INTERLACED_SCAN_TOP_FIELD_INTEL 0x0 2065 #define CL_AVC_ME_INTERLACED_SCAN_BOTTOM_FIELD_INTEL 0x1 2066 2067 /******************************************* 2068 * cl_intel_unified_shared_memory extension * 2069 ********************************************/ 2070 #define cl_intel_unified_shared_memory 1 2071 2072 typedef cl_bitfield cl_device_unified_shared_memory_capabilities_intel; 2073 typedef cl_properties cl_mem_properties_intel; 2074 typedef cl_bitfield cl_mem_alloc_flags_intel; 2075 typedef cl_uint cl_mem_info_intel; 2076 typedef cl_uint cl_unified_shared_memory_type_intel; 2077 typedef cl_uint cl_mem_advice_intel; 2078 2079 /* cl_device_info */ 2080 #define CL_DEVICE_HOST_MEM_CAPABILITIES_INTEL 0x4190 2081 #define CL_DEVICE_DEVICE_MEM_CAPABILITIES_INTEL 0x4191 2082 #define CL_DEVICE_SINGLE_DEVICE_SHARED_MEM_CAPABILITIES_INTEL 0x4192 2083 #define CL_DEVICE_CROSS_DEVICE_SHARED_MEM_CAPABILITIES_INTEL 0x4193 2084 #define CL_DEVICE_SHARED_SYSTEM_MEM_CAPABILITIES_INTEL 0x4194 2085 2086 /* cl_device_unified_shared_memory_capabilities_intel - bitfield */ 2087 #define CL_UNIFIED_SHARED_MEMORY_ACCESS_INTEL (1 << 0) 2088 #define CL_UNIFIED_SHARED_MEMORY_ATOMIC_ACCESS_INTEL (1 << 1) 2089 #define CL_UNIFIED_SHARED_MEMORY_CONCURRENT_ACCESS_INTEL (1 << 2) 2090 #define CL_UNIFIED_SHARED_MEMORY_CONCURRENT_ATOMIC_ACCESS_INTEL (1 << 3) 2091 2092 /* cl_mem_properties_intel */ 2093 #define CL_MEM_ALLOC_FLAGS_INTEL 0x4195 2094 2095 /* cl_mem_alloc_flags_intel - bitfield */ 2096 #define CL_MEM_ALLOC_WRITE_COMBINED_INTEL (1 << 0) 2097 #define CL_MEM_ALLOC_INITIAL_PLACEMENT_DEVICE_INTEL (1 << 1) 2098 #define CL_MEM_ALLOC_INITIAL_PLACEMENT_HOST_INTEL (1 << 2) 2099 2100 /* cl_mem_alloc_info_intel */ 2101 #define CL_MEM_ALLOC_TYPE_INTEL 0x419A 2102 #define CL_MEM_ALLOC_BASE_PTR_INTEL 0x419B 2103 #define CL_MEM_ALLOC_SIZE_INTEL 0x419C 2104 #define CL_MEM_ALLOC_DEVICE_INTEL 0x419D 2105 2106 /* cl_unified_shared_memory_type_intel */ 2107 #define CL_MEM_TYPE_UNKNOWN_INTEL 0x4196 2108 #define CL_MEM_TYPE_HOST_INTEL 0x4197 2109 #define CL_MEM_TYPE_DEVICE_INTEL 0x4198 2110 #define CL_MEM_TYPE_SHARED_INTEL 0x4199 2111 2112 /* cl_kernel_exec_info */ 2113 #define CL_KERNEL_EXEC_INFO_INDIRECT_HOST_ACCESS_INTEL 0x4200 2114 #define CL_KERNEL_EXEC_INFO_INDIRECT_DEVICE_ACCESS_INTEL 0x4201 2115 #define CL_KERNEL_EXEC_INFO_INDIRECT_SHARED_ACCESS_INTEL 0x4202 2116 #define CL_KERNEL_EXEC_INFO_USM_PTRS_INTEL 0x4203 2117 2118 /* cl_command_type */ 2119 #define CL_COMMAND_MEMFILL_INTEL 0x4204 2120 #define CL_COMMAND_MEMCPY_INTEL 0x4205 2121 #define CL_COMMAND_MIGRATEMEM_INTEL 0x4206 2122 #define CL_COMMAND_MEMADVISE_INTEL 0x4207 2123 2124 2125 typedef void* (CL_API_CALL * 2126 clHostMemAllocINTEL_fn)( 2127 cl_context context, 2128 const cl_mem_properties_intel* properties, 2129 size_t size, 2130 cl_uint alignment, 2131 cl_int* errcode_ret) ; 2132 2133 typedef void* (CL_API_CALL * 2134 clDeviceMemAllocINTEL_fn)( 2135 cl_context context, 2136 cl_device_id device, 2137 const cl_mem_properties_intel* properties, 2138 size_t size, 2139 cl_uint alignment, 2140 cl_int* errcode_ret) ; 2141 2142 typedef void* (CL_API_CALL * 2143 clSharedMemAllocINTEL_fn)( 2144 cl_context context, 2145 cl_device_id device, 2146 const cl_mem_properties_intel* properties, 2147 size_t size, 2148 cl_uint alignment, 2149 cl_int* errcode_ret) ; 2150 2151 typedef cl_int (CL_API_CALL * 2152 clMemFreeINTEL_fn)( 2153 cl_context context, 2154 void* ptr) ; 2155 2156 typedef cl_int (CL_API_CALL * 2157 clMemBlockingFreeINTEL_fn)( 2158 cl_context context, 2159 void* ptr) ; 2160 2161 typedef cl_int (CL_API_CALL * 2162 clGetMemAllocInfoINTEL_fn)( 2163 cl_context context, 2164 const void* ptr, 2165 cl_mem_info_intel param_name, 2166 size_t param_value_size, 2167 void* param_value, 2168 size_t* param_value_size_ret) ; 2169 2170 typedef cl_int (CL_API_CALL * 2171 clSetKernelArgMemPointerINTEL_fn)( 2172 cl_kernel kernel, 2173 cl_uint arg_index, 2174 const void* arg_value) ; 2175 2176 typedef cl_int (CL_API_CALL * 2177 clEnqueueMemFillINTEL_fn)( 2178 cl_command_queue command_queue, 2179 void* dst_ptr, 2180 const void* pattern, 2181 size_t pattern_size, 2182 size_t size, 2183 cl_uint num_events_in_wait_list, 2184 const cl_event* event_wait_list, 2185 cl_event* event) ; 2186 2187 typedef cl_int (CL_API_CALL * 2188 clEnqueueMemcpyINTEL_fn)( 2189 cl_command_queue command_queue, 2190 cl_bool blocking, 2191 void* dst_ptr, 2192 const void* src_ptr, 2193 size_t size, 2194 cl_uint num_events_in_wait_list, 2195 const cl_event* event_wait_list, 2196 cl_event* event) ; 2197 2198 typedef cl_int (CL_API_CALL * 2199 clEnqueueMemAdviseINTEL_fn)( 2200 cl_command_queue command_queue, 2201 const void* ptr, 2202 size_t size, 2203 cl_mem_advice_intel advice, 2204 cl_uint num_events_in_wait_list, 2205 const cl_event* event_wait_list, 2206 cl_event* event) ; 2207 2208 #ifndef CL_NO_PROTOTYPES 2209 2210 extern CL_API_ENTRY void* CL_API_CALL 2211 clHostMemAllocINTEL( 2212 cl_context context, 2213 const cl_mem_properties_intel* properties, 2214 size_t size, 2215 cl_uint alignment, 2216 cl_int* errcode_ret) ; 2217 2218 extern CL_API_ENTRY void* CL_API_CALL 2219 clDeviceMemAllocINTEL( 2220 cl_context context, 2221 cl_device_id device, 2222 const cl_mem_properties_intel* properties, 2223 size_t size, 2224 cl_uint alignment, 2225 cl_int* errcode_ret) ; 2226 2227 extern CL_API_ENTRY void* CL_API_CALL 2228 clSharedMemAllocINTEL( 2229 cl_context context, 2230 cl_device_id device, 2231 const cl_mem_properties_intel* properties, 2232 size_t size, 2233 cl_uint alignment, 2234 cl_int* errcode_ret) ; 2235 2236 extern CL_API_ENTRY cl_int CL_API_CALL 2237 clMemFreeINTEL( 2238 cl_context context, 2239 void* ptr) ; 2240 2241 extern CL_API_ENTRY cl_int CL_API_CALL 2242 clMemBlockingFreeINTEL( 2243 cl_context context, 2244 void* ptr) ; 2245 2246 extern CL_API_ENTRY cl_int CL_API_CALL 2247 clGetMemAllocInfoINTEL( 2248 cl_context context, 2249 const void* ptr, 2250 cl_mem_info_intel param_name, 2251 size_t param_value_size, 2252 void* param_value, 2253 size_t* param_value_size_ret) ; 2254 2255 extern CL_API_ENTRY cl_int CL_API_CALL 2256 clSetKernelArgMemPointerINTEL( 2257 cl_kernel kernel, 2258 cl_uint arg_index, 2259 const void* arg_value) ; 2260 2261 extern CL_API_ENTRY cl_int CL_API_CALL 2262 clEnqueueMemFillINTEL( 2263 cl_command_queue command_queue, 2264 void* dst_ptr, 2265 const void* pattern, 2266 size_t pattern_size, 2267 size_t size, 2268 cl_uint num_events_in_wait_list, 2269 const cl_event* event_wait_list, 2270 cl_event* event) ; 2271 2272 extern CL_API_ENTRY cl_int CL_API_CALL 2273 clEnqueueMemcpyINTEL( 2274 cl_command_queue command_queue, 2275 cl_bool blocking, 2276 void* dst_ptr, 2277 const void* src_ptr, 2278 size_t size, 2279 cl_uint num_events_in_wait_list, 2280 const cl_event* event_wait_list, 2281 cl_event* event) ; 2282 2283 extern CL_API_ENTRY cl_int CL_API_CALL 2284 clEnqueueMemAdviseINTEL( 2285 cl_command_queue command_queue, 2286 const void* ptr, 2287 size_t size, 2288 cl_mem_advice_intel advice, 2289 cl_uint num_events_in_wait_list, 2290 const cl_event* event_wait_list, 2291 cl_event* event) ; 2292 2293 #endif /* CL_NO_PROTOTYPES */ 2294 2295 #if defined(CL_VERSION_1_2) 2296 /* Requires OpenCL 1.2 for cl_mem_migration_flags: */ 2297 2298 typedef cl_int (CL_API_CALL * 2299 clEnqueueMigrateMemINTEL_fn)( 2300 cl_command_queue command_queue, 2301 const void* ptr, 2302 size_t size, 2303 cl_mem_migration_flags flags, 2304 cl_uint num_events_in_wait_list, 2305 const cl_event* event_wait_list, 2306 cl_event* event) ; 2307 2308 #ifndef CL_NO_PROTOTYPES 2309 2310 extern CL_API_ENTRY cl_int CL_API_CALL 2311 clEnqueueMigrateMemINTEL( 2312 cl_command_queue command_queue, 2313 const void* ptr, 2314 size_t size, 2315 cl_mem_migration_flags flags, 2316 cl_uint num_events_in_wait_list, 2317 const cl_event* event_wait_list, 2318 cl_event* event) ; 2319 2320 #endif /* CL_NO_PROTOTYPES */ 2321 2322 #endif /* defined(CL_VERSION_1_2) */ 2323 2324 /* deprecated, use clEnqueueMemFillINTEL instead */ 2325 2326 typedef cl_int (CL_API_CALL * 2327 clEnqueueMemsetINTEL_fn)( 2328 cl_command_queue command_queue, 2329 void* dst_ptr, 2330 cl_int value, 2331 size_t size, 2332 cl_uint num_events_in_wait_list, 2333 const cl_event* event_wait_list, 2334 cl_event* event) ; 2335 2336 #ifndef CL_NO_PROTOTYPES 2337 2338 extern CL_API_ENTRY cl_int CL_API_CALL 2339 clEnqueueMemsetINTEL( 2340 cl_command_queue command_queue, 2341 void* dst_ptr, 2342 cl_int value, 2343 size_t size, 2344 cl_uint num_events_in_wait_list, 2345 const cl_event* event_wait_list, 2346 cl_event* event) ; 2347 2348 #endif /* CL_NO_PROTOTYPES */ 2349 2350 /*************************************************************** 2351 * cl_intel_mem_alloc_buffer_location 2352 ***************************************************************/ 2353 #define cl_intel_mem_alloc_buffer_location 1 2354 #define CL_INTEL_MEM_ALLOC_BUFFER_LOCATION_EXTENSION_NAME \ 2355 "cl_intel_mem_alloc_buffer_location" 2356 2357 /* cl_mem_properties_intel */ 2358 #define CL_MEM_ALLOC_BUFFER_LOCATION_INTEL 0x419E 2359 2360 /* cl_mem_alloc_info_intel */ 2361 /* enum CL_MEM_ALLOC_BUFFER_LOCATION_INTEL */ 2362 2363 /*************************************************** 2364 * cl_intel_create_buffer_with_properties extension * 2365 ****************************************************/ 2366 2367 #define cl_intel_create_buffer_with_properties 1 2368 2369 extern CL_API_ENTRY cl_mem CL_API_CALL 2370 clCreateBufferWithPropertiesINTEL( 2371 cl_context context, 2372 const cl_mem_properties_intel* properties, 2373 cl_mem_flags flags, 2374 size_t size, 2375 void * host_ptr, 2376 cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0; 2377 2378 typedef cl_mem (CL_API_CALL * 2379 clCreateBufferWithPropertiesINTEL_fn)( 2380 cl_context context, 2381 const cl_mem_properties_intel* properties, 2382 cl_mem_flags flags, 2383 size_t size, 2384 void * host_ptr, 2385 cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0; 2386 2387 /****************************************** 2388 * cl_intel_mem_channel_property extension * 2389 *******************************************/ 2390 2391 #define CL_MEM_CHANNEL_INTEL 0x4213 2392 2393 /********************************* 2394 * cl_intel_mem_force_host_memory * 2395 **********************************/ 2396 2397 #define cl_intel_mem_force_host_memory 1 2398 2399 /* cl_mem_flags */ 2400 #define CL_MEM_FORCE_HOST_MEMORY_INTEL (1 << 20) 2401 2402 /*************************************************************** 2403 * cl_intel_command_queue_families 2404 ***************************************************************/ 2405 #define cl_intel_command_queue_families 1 2406 2407 typedef cl_bitfield cl_command_queue_capabilities_intel; 2408 2409 #define CL_QUEUE_FAMILY_MAX_NAME_SIZE_INTEL 64 2410 2411 typedef struct _cl_queue_family_properties_intel { 2412 cl_command_queue_properties properties; 2413 cl_command_queue_capabilities_intel capabilities; 2414 cl_uint count; 2415 char name[CL_QUEUE_FAMILY_MAX_NAME_SIZE_INTEL]; 2416 } cl_queue_family_properties_intel; 2417 2418 /* cl_device_info */ 2419 #define CL_DEVICE_QUEUE_FAMILY_PROPERTIES_INTEL 0x418B 2420 2421 /* cl_queue_properties */ 2422 #define CL_QUEUE_FAMILY_INTEL 0x418C 2423 #define CL_QUEUE_INDEX_INTEL 0x418D 2424 2425 /* cl_command_queue_capabilities_intel */ 2426 #define CL_QUEUE_DEFAULT_CAPABILITIES_INTEL 0 2427 #define CL_QUEUE_CAPABILITY_CREATE_SINGLE_QUEUE_EVENTS_INTEL (1 << 0) 2428 #define CL_QUEUE_CAPABILITY_CREATE_CROSS_QUEUE_EVENTS_INTEL (1 << 1) 2429 #define CL_QUEUE_CAPABILITY_SINGLE_QUEUE_EVENT_WAIT_LIST_INTEL (1 << 2) 2430 #define CL_QUEUE_CAPABILITY_CROSS_QUEUE_EVENT_WAIT_LIST_INTEL (1 << 3) 2431 #define CL_QUEUE_CAPABILITY_TRANSFER_BUFFER_INTEL (1 << 8) 2432 #define CL_QUEUE_CAPABILITY_TRANSFER_BUFFER_RECT_INTEL (1 << 9) 2433 #define CL_QUEUE_CAPABILITY_MAP_BUFFER_INTEL (1 << 10) 2434 #define CL_QUEUE_CAPABILITY_FILL_BUFFER_INTEL (1 << 11) 2435 #define CL_QUEUE_CAPABILITY_TRANSFER_IMAGE_INTEL (1 << 12) 2436 #define CL_QUEUE_CAPABILITY_MAP_IMAGE_INTEL (1 << 13) 2437 #define CL_QUEUE_CAPABILITY_FILL_IMAGE_INTEL (1 << 14) 2438 #define CL_QUEUE_CAPABILITY_TRANSFER_BUFFER_IMAGE_INTEL (1 << 15) 2439 #define CL_QUEUE_CAPABILITY_TRANSFER_IMAGE_BUFFER_INTEL (1 << 16) 2440 #define CL_QUEUE_CAPABILITY_MARKER_INTEL (1 << 24) 2441 #define CL_QUEUE_CAPABILITY_BARRIER_INTEL (1 << 25) 2442 #define CL_QUEUE_CAPABILITY_KERNEL_INTEL (1 << 26) 2443 2444 /*************************************************************** 2445 * cl_intel_sharing_format_query 2446 ***************************************************************/ 2447 #define cl_intel_sharing_format_query 1 2448 2449 /*************************************************************** 2450 * cl_ext_image_requirements_info 2451 ***************************************************************/ 2452 2453 #ifdef CL_VERSION_3_0 2454 2455 #define cl_ext_image_requirements_info 1 2456 2457 typedef cl_uint cl_image_requirements_info_ext; 2458 2459 #define CL_IMAGE_REQUIREMENTS_ROW_PITCH_ALIGNMENT_EXT 0x1290 2460 #define CL_IMAGE_REQUIREMENTS_BASE_ADDRESS_ALIGNMENT_EXT 0x1292 2461 #define CL_IMAGE_REQUIREMENTS_SIZE_EXT 0x12B2 2462 #define CL_IMAGE_REQUIREMENTS_MAX_WIDTH_EXT 0x12B3 2463 #define CL_IMAGE_REQUIREMENTS_MAX_HEIGHT_EXT 0x12B4 2464 #define CL_IMAGE_REQUIREMENTS_MAX_DEPTH_EXT 0x12B5 2465 #define CL_IMAGE_REQUIREMENTS_MAX_ARRAY_SIZE_EXT 0x12B6 2466 2467 extern CL_API_ENTRY cl_int CL_API_CALL 2468 clGetImageRequirementsInfoEXT( 2469 cl_context context, 2470 const cl_mem_properties* properties, 2471 cl_mem_flags flags, 2472 const cl_image_format* image_format, 2473 const cl_image_desc* image_desc, 2474 cl_image_requirements_info_ext param_name, 2475 size_t param_value_size, 2476 void* param_value, 2477 size_t* param_value_size_ret) CL_API_SUFFIX__VERSION_3_0; 2478 2479 typedef cl_int (CL_API_CALL * 2480 clGetImageRequirementsInfoEXT_fn)( 2481 cl_context context, 2482 const cl_mem_properties* properties, 2483 cl_mem_flags flags, 2484 const cl_image_format* image_format, 2485 const cl_image_desc* image_desc, 2486 cl_image_requirements_info_ext param_name, 2487 size_t param_value_size, 2488 void* param_value, 2489 size_t* param_value_size_ret) CL_API_SUFFIX__VERSION_3_0; 2490 2491 #endif 2492 2493 /*************************************************************** 2494 * cl_ext_image_from_buffer 2495 ***************************************************************/ 2496 2497 #ifdef CL_VERSION_3_0 2498 2499 #define cl_ext_image_from_buffer 1 2500 2501 #define CL_IMAGE_REQUIREMENTS_SLICE_PITCH_ALIGNMENT_EXT 0x1291 2502 2503 #endif 2504 2505 #ifdef __cplusplus 2506 } 2507 #endif 2508 2509 2510 #endif /* __CL_EXT_H */ 2511