1 #include "arm_arch.h" 2 3 #if defined(__thumb2__) && !defined(__APPLE__) 4 .syntax unified 5 .thumb 6 #else 7 .code 32 8 #undef __thumb2__ 9 #endif 10 11 .text 12 13 .align 5 14 .globl OPENSSL_atomic_add 15 .type OPENSSL_atomic_add,%function 16 OPENSSL_atomic_add: 17 #if __ARM_ARCH__>=6 18 .Ladd: ldrex r2,[r0] 19 add r3,r2,r1 20 strex r2,r3,[r0] 21 cmp r2,#0 22 bne .Ladd 23 mov r0,r3 24 bx lr 25 #else 26 stmdb sp!,{r4,r5,r6,lr} 27 ldr r2,.Lspinlock 28 adr r3,.Lspinlock 29 mov r4,r0 30 mov r5,r1 31 add r6,r3,r2 @ &spinlock 32 b .+8 33 .Lspin: bl sched_yield 34 mov r0,#-1 35 swp r0,r0,[r6] 36 cmp r0,#0 37 bne .Lspin 38 39 ldr r2,[r4] 40 add r2,r2,r5 41 str r2,[r4] 42 str r0,[r6] @ release spinlock 43 ldmia sp!,{r4,r5,r6,lr} 44 tst lr,#1 45 moveq pc,lr 46 .word 0xe12fff1e @ bx lr 47 #endif 48 .size OPENSSL_atomic_add,.-OPENSSL_atomic_add 49 50 .globl OPENSSL_cleanse 51 .type OPENSSL_cleanse,%function 52 OPENSSL_cleanse: 53 eor ip,ip,ip 54 cmp r1,#7 55 #ifdef __thumb2__ 56 itt hs 57 #endif 58 subhs r1,r1,#4 59 bhs .Lot 60 cmp r1,#0 61 beq .Lcleanse_done 62 .Little: 63 strb ip,[r0],#1 64 subs r1,r1,#1 65 bhi .Little 66 b .Lcleanse_done 67 68 .Lot: tst r0,#3 69 beq .Laligned 70 strb ip,[r0],#1 71 sub r1,r1,#1 72 b .Lot 73 .Laligned: 74 str ip,[r0],#4 75 subs r1,r1,#4 76 bhs .Laligned 77 adds r1,r1,#4 78 bne .Little 79 .Lcleanse_done: 80 #if __ARM_ARCH__>=5 81 bx lr 82 #else 83 tst lr,#1 84 moveq pc,lr 85 .word 0xe12fff1e @ bx lr 86 #endif 87 .size OPENSSL_cleanse,.-OPENSSL_cleanse 88 89 .globl CRYPTO_memcmp 90 .type CRYPTO_memcmp,%function 91 .align 4 92 CRYPTO_memcmp: 93 eor ip,ip,ip 94 cmp r2,#0 95 beq .Lno_data 96 stmdb sp!,{r4,r5} 97 98 .Loop_cmp: 99 ldrb r4,[r0],#1 100 ldrb r5,[r1],#1 101 eor r4,r4,r5 102 orr ip,ip,r4 103 subs r2,r2,#1 104 bne .Loop_cmp 105 106 ldmia sp!,{r4,r5} 107 .Lno_data: 108 rsb r0,ip,#0 109 mov r0,r0,lsr#31 110 #if __ARM_ARCH__>=5 111 bx lr 112 #else 113 tst lr,#1 114 moveq pc,lr 115 .word 0xe12fff1e @ bx lr 116 #endif 117 .size CRYPTO_memcmp,.-CRYPTO_memcmp 118 119 #if __ARM_MAX_ARCH__>=7 120 .arch armv7-a 121 .fpu neon 122 123 .align 5 124 .globl _armv7_neon_probe 125 .type _armv7_neon_probe,%function 126 _armv7_neon_probe: 127 vorr q0,q0,q0 128 bx lr 129 .size _armv7_neon_probe,.-_armv7_neon_probe 130 131 .globl _armv7_tick 132 .type _armv7_tick,%function 133 _armv7_tick: 134 #ifdef __APPLE__ 135 mrrc p15,0,r0,r1,c14 @ CNTPCT 136 #else 137 mrrc p15,1,r0,r1,c14 @ CNTVCT 138 #endif 139 bx lr 140 .size _armv7_tick,.-_armv7_tick 141 142 .globl _armv8_aes_probe 143 .type _armv8_aes_probe,%function 144 _armv8_aes_probe: 145 #if defined(__thumb2__) && !defined(__APPLE__) 146 .byte 0xb0,0xff,0x00,0x03 @ aese.8 q0,q0 147 #else 148 .byte 0x00,0x03,0xb0,0xf3 @ aese.8 q0,q0 149 #endif 150 bx lr 151 .size _armv8_aes_probe,.-_armv8_aes_probe 152 153 .globl _armv8_sha1_probe 154 .type _armv8_sha1_probe,%function 155 _armv8_sha1_probe: 156 #if defined(__thumb2__) && !defined(__APPLE__) 157 .byte 0x00,0xef,0x40,0x0c @ sha1c.32 q0,q0,q0 158 #else 159 .byte 0x40,0x0c,0x00,0xf2 @ sha1c.32 q0,q0,q0 160 #endif 161 bx lr 162 .size _armv8_sha1_probe,.-_armv8_sha1_probe 163 164 .globl _armv8_sha256_probe 165 .type _armv8_sha256_probe,%function 166 _armv8_sha256_probe: 167 #if defined(__thumb2__) && !defined(__APPLE__) 168 .byte 0x00,0xff,0x40,0x0c @ sha256h.32 q0,q0,q0 169 #else 170 .byte 0x40,0x0c,0x00,0xf3 @ sha256h.32 q0,q0,q0 171 #endif 172 bx lr 173 .size _armv8_sha256_probe,.-_armv8_sha256_probe 174 .globl _armv8_pmull_probe 175 .type _armv8_pmull_probe,%function 176 _armv8_pmull_probe: 177 #if defined(__thumb2__) && !defined(__APPLE__) 178 .byte 0xa0,0xef,0x00,0x0e @ vmull.p64 q0,d0,d0 179 #else 180 .byte 0x00,0x0e,0xa0,0xf2 @ vmull.p64 q0,d0,d0 181 #endif 182 bx lr 183 .size _armv8_pmull_probe,.-_armv8_pmull_probe 184 #endif 185 186 .globl OPENSSL_wipe_cpu 187 .type OPENSSL_wipe_cpu,%function 188 OPENSSL_wipe_cpu: 189 #if __ARM_MAX_ARCH__>=7 190 ldr r0,.LOPENSSL_armcap 191 adr r1,.LOPENSSL_armcap 192 ldr r0,[r1,r0] 193 #ifdef __APPLE__ 194 ldr r0,[r0] 195 #endif 196 #endif 197 eor r2,r2,r2 198 eor r3,r3,r3 199 eor ip,ip,ip 200 #if __ARM_MAX_ARCH__>=7 201 tst r0,#1 202 beq .Lwipe_done 203 veor q0, q0, q0 204 veor q1, q1, q1 205 veor q2, q2, q2 206 veor q3, q3, q3 207 veor q8, q8, q8 208 veor q9, q9, q9 209 veor q10, q10, q10 210 veor q11, q11, q11 211 veor q12, q12, q12 212 veor q13, q13, q13 213 veor q14, q14, q14 214 veor q15, q15, q15 215 .Lwipe_done: 216 #endif 217 mov r0,sp 218 #if __ARM_ARCH__>=5 219 bx lr 220 #else 221 tst lr,#1 222 moveq pc,lr 223 .word 0xe12fff1e @ bx lr 224 #endif 225 .size OPENSSL_wipe_cpu,.-OPENSSL_wipe_cpu 226 227 .globl OPENSSL_instrument_bus 228 .type OPENSSL_instrument_bus,%function 229 OPENSSL_instrument_bus: 230 eor r0,r0,r0 231 #if __ARM_ARCH__>=5 232 bx lr 233 #else 234 tst lr,#1 235 moveq pc,lr 236 .word 0xe12fff1e @ bx lr 237 #endif 238 .size OPENSSL_instrument_bus,.-OPENSSL_instrument_bus 239 240 .globl OPENSSL_instrument_bus2 241 .type OPENSSL_instrument_bus2,%function 242 OPENSSL_instrument_bus2: 243 eor r0,r0,r0 244 #if __ARM_ARCH__>=5 245 bx lr 246 #else 247 tst lr,#1 248 moveq pc,lr 249 .word 0xe12fff1e @ bx lr 250 #endif 251 .size OPENSSL_instrument_bus2,.-OPENSSL_instrument_bus2 252 253 .align 5 254 #if __ARM_MAX_ARCH__>=7 255 .LOPENSSL_armcap: 256 .word OPENSSL_armcap_P-. 257 #endif 258 #if __ARM_ARCH__>=6 259 .align 5 260 #else 261 .Lspinlock: 262 .word atomic_add_spinlock-.Lspinlock 263 .align 5 264 265 .data 266 .align 2 267 atomic_add_spinlock: 268 .word 0 269 #endif 270 271 .comm OPENSSL_armcap_P,4,4 272 .hidden OPENSSL_armcap_P 273