1 #if __ARM_ARCH_4__ || __ARM_ARCH_4T__ || __ARM_ARCH == 4
2 #define BLX "mov lr,pc\n\tbx"
3 #else
4 #define BLX "blx"
5 #endif
6
7 extern hidden uintptr_t __a_cas_ptr, __a_barrier_ptr;
8
9 #if ((__ARM_ARCH_6__ || __ARM_ARCH_6K__ || __ARM_ARCH_6KZ__ || __ARM_ARCH_6ZK__) && !__thumb__) \
10 || __ARM_ARCH_6T2__ || __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH >= 7
11
12 #define a_ll a_ll
a_ll(volatile int *p)13 static inline int a_ll(volatile int *p)
14 {
15 int v;
16 __asm__ __volatile__ ("ldrex %0, %1" : "=r"(v) : "Q"(*p));
17 return v;
18 }
19
20 #define a_sc a_sc
a_sc(volatile int *p, int v)21 static inline int a_sc(volatile int *p, int v)
22 {
23 int r;
24 __asm__ __volatile__ ("strex %0,%2,%1" : "=&r"(r), "=Q"(*p) : "r"(v) : "memory");
25 return !r;
26 }
27
28 #if __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH >= 7
29
30 #define a_barrier a_barrier
a_barrier()31 static inline void a_barrier()
32 {
33 __asm__ __volatile__ ("dmb ish" : : : "memory");
34 }
35
36 #endif
37
38 #define a_pre_llsc a_barrier
39 #define a_post_llsc a_barrier
40
41 #else
42
43 #define a_cas a_cas
a_cas(volatile int *p, int t, int s)44 static inline int a_cas(volatile int *p, int t, int s)
45 {
46 for (;;) {
47 register int r0 __asm__("r0") = t;
48 register int r1 __asm__("r1") = s;
49 register volatile int *r2 __asm__("r2") = p;
50 register uintptr_t r3 __asm__("r3") = __a_cas_ptr;
51 int old;
52 __asm__ __volatile__ (
53 BLX " r3"
54 : "+r"(r0), "+r"(r3) : "r"(r1), "r"(r2)
55 : "memory", "lr", "ip", "cc" );
56 if (!r0) return t;
57 if ((old=*p)!=t) return old;
58 }
59 }
60
61 #endif
62
63 #ifndef a_barrier
64 #define a_barrier a_barrier
a_barrier()65 static inline void a_barrier()
66 {
67 register uintptr_t ip __asm__("ip") = __a_barrier_ptr;
68 __asm__ __volatile__( BLX " ip" : "+r"(ip) : : "memory", "cc", "lr" );
69 }
70 #endif
71
72 #define a_crash a_crash
a_crash()73 static inline void a_crash()
74 {
75 __asm__ __volatile__(
76 #ifndef __thumb__
77 ".word 0xe7f000f0"
78 #else
79 ".short 0xdeff"
80 #endif
81 : : : "memory");
82 }
83
84 #if __ARM_ARCH >= 5 && (!__thumb__ || __thumb2__)
85
86 #define a_clz_32 a_clz_32
a_clz_32(uint32_t x)87 static inline int a_clz_32(uint32_t x)
88 {
89 __asm__ ("clz %0, %1" : "=r"(x) : "r"(x));
90 return x;
91 }
92
93 #if __ARM_ARCH_6T2__ || __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH >= 7
94
95 #define a_ctz_32 a_ctz_32
a_ctz_32(uint32_t x)96 static inline int a_ctz_32(uint32_t x)
97 {
98 uint32_t xr;
99 __asm__ ("rbit %0, %1" : "=r"(xr) : "r"(x));
100 return a_clz_32(xr);
101 }
102
103 #endif
104
105 #endif
106