1{
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12    {"name": "ARRAY_2D_TILED_THICK", "value": 7},
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18    {"name": "ARRAY_3D_TILED_THICK", "value": 13},
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102    {"name": "FORCE_OPT_ENABLE_IF_SRC_ARGB_0", "value": 4},
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113    {"name": "CB_RESOLVE", "value": 3},
114    {"name": "CB_DECOMPRESS", "value": 4},
115    {"name": "CB_FMASK_DECOMPRESS", "value": 5},
116    {"name": "CB_DCC_DECOMPRESS", "value": 6}
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128    {"name": "CB_PERF_OP_FILTER_SEL_NEEDS_DESTINATION", "value": 1},
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242  "ConservativeZExport": {
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246    {"name": "EXPORT_GREATER_THAN_Z", "value": 2},
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258  "EXCP_EN": {
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284    {"name": "FORCE_RESERVED", "value": 3}
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322    {"name": "IMG_DATA_FORMAT_BG_RG", "value": 33},
323    {"name": "IMG_DATA_FORMAT_5_9_9_9", "value": 34},
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327    {"name": "IMG_DATA_FORMAT_BC4", "value": 38},
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332    {"name": "IMG_DATA_FORMAT_RESERVED_43", "value": 43},
333    {"name": "IMG_DATA_FORMAT_FMASK8_S2_F1", "value": 44},
334    {"name": "IMG_DATA_FORMAT_FMASK8_S4_F1", "value": 45},
335    {"name": "IMG_DATA_FORMAT_FMASK8_S8_F1", "value": 46},
336    {"name": "IMG_DATA_FORMAT_FMASK8_S2_F2", "value": 47},
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338    {"name": "IMG_DATA_FORMAT_FMASK8_S4_F4", "value": 49},
339    {"name": "IMG_DATA_FORMAT_FMASK16_S16_F1", "value": 50},
340    {"name": "IMG_DATA_FORMAT_FMASK16_S8_F2", "value": 51},
341    {"name": "IMG_DATA_FORMAT_FMASK32_S16_F2", "value": 52},
342    {"name": "IMG_DATA_FORMAT_FMASK32_S8_F4", "value": 53},
343    {"name": "IMG_DATA_FORMAT_FMASK32_S8_F8", "value": 54},
344    {"name": "IMG_DATA_FORMAT_FMASK64_S16_F4", "value": 55},
345    {"name": "IMG_DATA_FORMAT_FMASK64_S16_F8", "value": 56},
346    {"name": "IMG_DATA_FORMAT_4_4", "value": 57},
347    {"name": "IMG_DATA_FORMAT_6_5_5", "value": 58},
348    {"name": "IMG_DATA_FORMAT_1", "value": 59},
349    {"name": "IMG_DATA_FORMAT_1_REVERSED", "value": 60},
350    {"name": "IMG_DATA_FORMAT_32_AS_8", "value": 61},
351    {"name": "IMG_DATA_FORMAT_32_AS_8_8", "value": 62},
352    {"name": "IMG_DATA_FORMAT_32_AS_32_32_32_32", "value": 63}
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354  },
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358    {"name": "IMG_NUM_FORMAT_SNORM", "value": 1},
359    {"name": "IMG_NUM_FORMAT_USCALED", "value": 2},
360    {"name": "IMG_NUM_FORMAT_SSCALED", "value": 3},
361    {"name": "IMG_NUM_FORMAT_UINT", "value": 4},
362    {"name": "IMG_NUM_FORMAT_SINT", "value": 5},
363    {"name": "IMG_NUM_FORMAT_RESERVED_6", "value": 6},
364    {"name": "IMG_NUM_FORMAT_FLOAT", "value": 7},
365    {"name": "IMG_NUM_FORMAT_RESERVED_8", "value": 8},
366    {"name": "IMG_NUM_FORMAT_SRGB", "value": 9},
367    {"name": "IMG_NUM_FORMAT_RESERVED_10", "value": 10},
368    {"name": "IMG_NUM_FORMAT_RESERVED_11", "value": 11},
369    {"name": "IMG_NUM_FORMAT_RESERVED_12", "value": 12},
370    {"name": "IMG_NUM_FORMAT_RESERVED_13", "value": 13},
371    {"name": "IMG_NUM_FORMAT_RESERVED_14", "value": 14},
372    {"name": "IMG_NUM_FORMAT_RESERVED_15", "value": 15}
373   ]
374  },
375  "MacroTileAspect": {
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378    {"name": "ADDR_SURF_MACRO_ASPECT_2", "value": 1},
379    {"name": "ADDR_SURF_MACRO_ASPECT_4", "value": 2},
380    {"name": "ADDR_SURF_MACRO_ASPECT_8", "value": 3}
381   ]
382  },
383  "MicroTileMode": {
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385    {"name": "ADDR_SURF_DISPLAY_MICRO_TILING", "value": 0},
386    {"name": "ADDR_SURF_THIN_MICRO_TILING", "value": 1},
387    {"name": "ADDR_SURF_DEPTH_MICRO_TILING", "value": 2},
388    {"name": "ADDR_SURF_ROTATED_MICRO_TILING", "value": 3},
389    {"name": "ADDR_SURF_THICK_MICRO_TILING", "value": 4}
390   ]
391  },
392  "NumBanks": {
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395    {"name": "ADDR_SURF_4_BANK", "value": 1},
396    {"name": "ADDR_SURF_8_BANK", "value": 2},
397    {"name": "ADDR_SURF_16_BANK", "value": 3}
398   ]
399  },
400  "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE": {
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402    {"name": "X_DRAW_POINTS", "value": 0},
403    {"name": "X_DRAW_LINES", "value": 1},
404    {"name": "X_DRAW_TRIANGLES", "value": 2}
405   ]
406  },
407  "PA_SU_SC_MODE_CNTL__POLY_MODE": {
408   "entries": [
409    {"name": "X_DISABLE_POLY_MODE", "value": 0},
410    {"name": "X_DUAL_MODE", "value": 1}
411   ]
412  },
413  "PA_SU_VTX_CNTL__ROUND_MODE": {
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415    {"name": "X_TRUNCATE", "value": 0},
416    {"name": "X_ROUND", "value": 1},
417    {"name": "X_ROUND_TO_EVEN", "value": 2},
418    {"name": "X_ROUND_TO_ODD", "value": 3}
419   ]
420  },
421  "PipeConfig": {
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424    {"name": "ADDR_SURF_P2_RESERVED0", "value": 1},
425    {"name": "ADDR_SURF_P2_RESERVED1", "value": 2},
426    {"name": "ADDR_SURF_P2_RESERVED2", "value": 3},
427    {"name": "ADDR_SURF_P4_8x16", "value": 4},
428    {"name": "ADDR_SURF_P4_16x16", "value": 5},
429    {"name": "ADDR_SURF_P4_16x32", "value": 6},
430    {"name": "ADDR_SURF_P4_32x32", "value": 7},
431    {"name": "ADDR_SURF_P8_16x16_8x16", "value": 8},
432    {"name": "ADDR_SURF_P8_16x32_8x16", "value": 9},
433    {"name": "ADDR_SURF_P8_32x32_8x16", "value": 10},
434    {"name": "ADDR_SURF_P8_16x32_16x16", "value": 11},
435    {"name": "ADDR_SURF_P8_32x32_16x16", "value": 12},
436    {"name": "ADDR_SURF_P8_32x32_16x32", "value": 13},
437    {"name": "ADDR_SURF_P8_32x64_32x32", "value": 14},
438    {"name": "ADDR_SURF_P8_RESERVED0", "value": 15},
439    {"name": "ADDR_SURF_P16_32x32_8x16", "value": 16},
440    {"name": "ADDR_SURF_P16_32x32_16x16", "value": 17}
441   ]
442  },
443  "PkrMap": {
444   "entries": [
445    {"name": "RASTER_CONFIG_PKR_MAP_0", "value": 0},
446    {"name": "RASTER_CONFIG_PKR_MAP_1", "value": 1},
447    {"name": "RASTER_CONFIG_PKR_MAP_2", "value": 2},
448    {"name": "RASTER_CONFIG_PKR_MAP_3", "value": 3}
449   ]
450  },
451  "PkrXsel": {
452   "entries": [
453    {"name": "RASTER_CONFIG_PKR_XSEL_0", "value": 0},
454    {"name": "RASTER_CONFIG_PKR_XSEL_1", "value": 1},
455    {"name": "RASTER_CONFIG_PKR_XSEL_2", "value": 2},
456    {"name": "RASTER_CONFIG_PKR_XSEL_3", "value": 3}
457   ]
458  },
459  "PkrXsel2": {
460   "entries": [
461    {"name": "RASTER_CONFIG_PKR_XSEL2_0", "value": 0},
462    {"name": "RASTER_CONFIG_PKR_XSEL2_1", "value": 1},
463    {"name": "RASTER_CONFIG_PKR_XSEL2_2", "value": 2},
464    {"name": "RASTER_CONFIG_PKR_XSEL2_3", "value": 3}
465   ]
466  },
467  "PkrYsel": {
468   "entries": [
469    {"name": "RASTER_CONFIG_PKR_YSEL_0", "value": 0},
470    {"name": "RASTER_CONFIG_PKR_YSEL_1", "value": 1},
471    {"name": "RASTER_CONFIG_PKR_YSEL_2", "value": 2},
472    {"name": "RASTER_CONFIG_PKR_YSEL_3", "value": 3}
473   ]
474  },
475  "QUANT_MODE": {
476   "entries": [
477    {"name": "X_16_8_FIXED_POINT_1_16TH", "value": 0},
478    {"name": "X_16_8_FIXED_POINT_1_8TH", "value": 1},
479    {"name": "X_16_8_FIXED_POINT_1_4TH", "value": 2},
480    {"name": "X_16_8_FIXED_POINT_1_2", "value": 3},
481    {"name": "X_16_8_FIXED_POINT_1", "value": 4},
482    {"name": "X_16_8_FIXED_POINT_1_256TH", "value": 5},
483    {"name": "X_14_10_FIXED_POINT_1_1024TH", "value": 6},
484    {"name": "X_12_12_FIXED_POINT_1_4096TH", "value": 7}
485   ]
486  },
487  "ROP3": {
488   "entries": [
489    {"name": "ROP3_CLEAR", "value": 0},
490    {"name": "X_0X05", "value": 5},
491    {"name": "X_0X0A", "value": 10},
492    {"name": "X_0X0F", "value": 15},
493    {"name": "ROP3_NOR", "value": 17},
494    {"name": "ROP3_AND_INVERTED", "value": 34},
495    {"name": "ROP3_COPY_INVERTED", "value": 51},
496    {"name": "ROP3_AND_REVERSE", "value": 68},
497    {"name": "X_0X50", "value": 80},
498    {"name": "ROP3_INVERT", "value": 85},
499    {"name": "X_0X5A", "value": 90},
500    {"name": "X_0X5F", "value": 95},
501    {"name": "ROP3_XOR", "value": 102},
502    {"name": "ROP3_NAND", "value": 119},
503    {"name": "ROP3_AND", "value": 136},
504    {"name": "ROP3_EQUIVALENT", "value": 153},
505    {"name": "X_0XA0", "value": 160},
506    {"name": "X_0XA5", "value": 165},
507    {"name": "ROP3_NO_OP", "value": 170},
508    {"name": "X_0XAF", "value": 175},
509    {"name": "ROP3_OR_INVERTED", "value": 187},
510    {"name": "ROP3_COPY", "value": 204},
511    {"name": "ROP3_OR_REVERSE", "value": 221},
512    {"name": "ROP3_OR", "value": 238},
513    {"name": "X_0XF0", "value": 240},
514    {"name": "X_0XF5", "value": 245},
515    {"name": "X_0XFA", "value": 250},
516    {"name": "ROP3_SET", "value": 255}
517   ]
518  },
519  "RbMap": {
520   "entries": [
521    {"name": "RASTER_CONFIG_RB_MAP_0", "value": 0},
522    {"name": "RASTER_CONFIG_RB_MAP_1", "value": 1},
523    {"name": "RASTER_CONFIG_RB_MAP_2", "value": 2},
524    {"name": "RASTER_CONFIG_RB_MAP_3", "value": 3}
525   ]
526  },
527  "RbXsel": {
528   "entries": [
529    {"name": "RASTER_CONFIG_RB_XSEL_0", "value": 0},
530    {"name": "RASTER_CONFIG_RB_XSEL_1", "value": 1}
531   ]
532  },
533  "RbXsel2": {
534   "entries": [
535    {"name": "RASTER_CONFIG_RB_XSEL2_0", "value": 0},
536    {"name": "RASTER_CONFIG_RB_XSEL2_1", "value": 1},
537    {"name": "RASTER_CONFIG_RB_XSEL2_2", "value": 2},
538    {"name": "RASTER_CONFIG_RB_XSEL2_3", "value": 3}
539   ]
540  },
541  "RbYsel": {
542   "entries": [
543    {"name": "RASTER_CONFIG_RB_YSEL_0", "value": 0},
544    {"name": "RASTER_CONFIG_RB_YSEL_1", "value": 1}
545   ]
546  },
547  "SPI_PNT_SPRITE_OVERRIDE": {
548   "entries": [
549    {"name": "SPI_PNT_SPRITE_SEL_0", "value": 0},
550    {"name": "SPI_PNT_SPRITE_SEL_1", "value": 1},
551    {"name": "SPI_PNT_SPRITE_SEL_S", "value": 2},
552    {"name": "SPI_PNT_SPRITE_SEL_T", "value": 3},
553    {"name": "SPI_PNT_SPRITE_SEL_NONE", "value": 4}
554   ]
555  },
556  "SPI_SHADER_EX_FORMAT": {
557   "entries": [
558    {"name": "SPI_SHADER_ZERO", "value": 0},
559    {"name": "SPI_SHADER_32_R", "value": 1},
560    {"name": "SPI_SHADER_32_GR", "value": 2},
561    {"name": "SPI_SHADER_32_AR", "value": 3},
562    {"name": "SPI_SHADER_FP16_ABGR", "value": 4},
563    {"name": "SPI_SHADER_UNORM16_ABGR", "value": 5},
564    {"name": "SPI_SHADER_SNORM16_ABGR", "value": 6},
565    {"name": "SPI_SHADER_UINT16_ABGR", "value": 7},
566    {"name": "SPI_SHADER_SINT16_ABGR", "value": 8},
567    {"name": "SPI_SHADER_32_ABGR", "value": 9}
568   ]
569  },
570  "SPI_SHADER_FORMAT": {
571   "entries": [
572    {"name": "SPI_SHADER_NONE", "value": 0},
573    {"name": "SPI_SHADER_1COMP", "value": 1},
574    {"name": "SPI_SHADER_2COMP", "value": 2},
575    {"name": "SPI_SHADER_4COMPRESS", "value": 3},
576    {"name": "SPI_SHADER_4COMP", "value": 4}
577   ]
578  },
579  "SPM_PERFMON_STATE": {
580   "entries": [
581    {"name": "STRM_PERFMON_STATE_DISABLE_AND_RESET", "value": 0},
582    {"name": "STRM_PERFMON_STATE_START_COUNTING", "value": 1},
583    {"name": "STRM_PERFMON_STATE_STOP_COUNTING", "value": 2},
584    {"name": "STRM_PERFMON_STATE_RESERVED_3", "value": 3},
585    {"name": "STRM_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM", "value": 4},
586    {"name": "STRM_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM", "value": 5}
587   ]
588  },
589  "SQ_IMG_FILTER_TYPE": {
590   "entries": [
591    {"name": "SQ_IMG_FILTER_MODE_BLEND", "value": 0},
592    {"name": "SQ_IMG_FILTER_MODE_MIN", "value": 1},
593    {"name": "SQ_IMG_FILTER_MODE_MAX", "value": 2}
594   ]
595  },
596  "SQ_RSRC_BUF_TYPE": {
597   "entries": [
598    {"name": "SQ_RSRC_BUF", "value": 0},
599    {"name": "SQ_RSRC_BUF_RSVD_1", "value": 1},
600    {"name": "SQ_RSRC_BUF_RSVD_2", "value": 2},
601    {"name": "SQ_RSRC_BUF_RSVD_3", "value": 3}
602   ]
603  },
604  "SQ_RSRC_IMG_TYPE": {
605   "entries": [
606    {"name": "SQ_RSRC_IMG_RSVD_0", "value": 0},
607    {"name": "SQ_RSRC_IMG_RSVD_1", "value": 1},
608    {"name": "SQ_RSRC_IMG_RSVD_2", "value": 2},
609    {"name": "SQ_RSRC_IMG_RSVD_3", "value": 3},
610    {"name": "SQ_RSRC_IMG_RSVD_4", "value": 4},
611    {"name": "SQ_RSRC_IMG_RSVD_5", "value": 5},
612    {"name": "SQ_RSRC_IMG_RSVD_6", "value": 6},
613    {"name": "SQ_RSRC_IMG_RSVD_7", "value": 7},
614    {"name": "SQ_RSRC_IMG_1D", "value": 8},
615    {"name": "SQ_RSRC_IMG_2D", "value": 9},
616    {"name": "SQ_RSRC_IMG_3D", "value": 10},
617    {"name": "SQ_RSRC_IMG_CUBE", "value": 11},
618    {"name": "SQ_RSRC_IMG_1D_ARRAY", "value": 12},
619    {"name": "SQ_RSRC_IMG_2D_ARRAY", "value": 13},
620    {"name": "SQ_RSRC_IMG_2D_MSAA", "value": 14},
621    {"name": "SQ_RSRC_IMG_2D_MSAA_ARRAY", "value": 15}
622   ]
623  },
624  "SQ_SEL_XYZW01": {
625   "entries": [
626    {"name": "SQ_SEL_0", "value": 0},
627    {"name": "SQ_SEL_1", "value": 1},
628    {"name": "SQ_SEL_RESERVED_0", "value": 2},
629    {"name": "SQ_SEL_RESERVED_1", "value": 3},
630    {"name": "SQ_SEL_X", "value": 4},
631    {"name": "SQ_SEL_Y", "value": 5},
632    {"name": "SQ_SEL_Z", "value": 6},
633    {"name": "SQ_SEL_W", "value": 7}
634   ]
635  },
636  "SQ_TEX_BORDER_COLOR": {
637   "entries": [
638    {"name": "SQ_TEX_BORDER_COLOR_TRANS_BLACK", "value": 0},
639    {"name": "SQ_TEX_BORDER_COLOR_OPAQUE_BLACK", "value": 1},
640    {"name": "SQ_TEX_BORDER_COLOR_OPAQUE_WHITE", "value": 2},
641    {"name": "SQ_TEX_BORDER_COLOR_REGISTER", "value": 3}
642   ]
643  },
644  "SQ_TEX_CLAMP": {
645   "entries": [
646    {"name": "SQ_TEX_WRAP", "value": 0},
647    {"name": "SQ_TEX_MIRROR", "value": 1},
648    {"name": "SQ_TEX_CLAMP_LAST_TEXEL", "value": 2},
649    {"name": "SQ_TEX_MIRROR_ONCE_LAST_TEXEL", "value": 3},
650    {"name": "SQ_TEX_CLAMP_HALF_BORDER", "value": 4},
651    {"name": "SQ_TEX_MIRROR_ONCE_HALF_BORDER", "value": 5},
652    {"name": "SQ_TEX_CLAMP_BORDER", "value": 6},
653    {"name": "SQ_TEX_MIRROR_ONCE_BORDER", "value": 7}
654   ]
655  },
656  "SQ_TEX_DEPTH_COMPARE": {
657   "entries": [
658    {"name": "SQ_TEX_DEPTH_COMPARE_NEVER", "value": 0},
659    {"name": "SQ_TEX_DEPTH_COMPARE_LESS", "value": 1},
660    {"name": "SQ_TEX_DEPTH_COMPARE_EQUAL", "value": 2},
661    {"name": "SQ_TEX_DEPTH_COMPARE_LESSEQUAL", "value": 3},
662    {"name": "SQ_TEX_DEPTH_COMPARE_GREATER", "value": 4},
663    {"name": "SQ_TEX_DEPTH_COMPARE_NOTEQUAL", "value": 5},
664    {"name": "SQ_TEX_DEPTH_COMPARE_GREATEREQUAL", "value": 6},
665    {"name": "SQ_TEX_DEPTH_COMPARE_ALWAYS", "value": 7}
666   ]
667  },
668  "SQ_TEX_MIP_FILTER": {
669   "entries": [
670    {"name": "SQ_TEX_MIP_FILTER_NONE", "value": 0},
671    {"name": "SQ_TEX_MIP_FILTER_POINT", "value": 1},
672    {"name": "SQ_TEX_MIP_FILTER_LINEAR", "value": 2},
673    {"name": "SQ_TEX_MIP_FILTER_POINT_ANISO_ADJ", "value": 3}
674   ]
675  },
676  "SQ_TEX_XY_FILTER": {
677   "entries": [
678    {"name": "SQ_TEX_XY_FILTER_POINT", "value": 0},
679    {"name": "SQ_TEX_XY_FILTER_BILINEAR", "value": 1},
680    {"name": "SQ_TEX_XY_FILTER_ANISO_POINT", "value": 2},
681    {"name": "SQ_TEX_XY_FILTER_ANISO_BILINEAR", "value": 3}
682   ]
683  },
684  "SQ_TEX_Z_FILTER": {
685   "entries": [
686    {"name": "SQ_TEX_Z_FILTER_NONE", "value": 0},
687    {"name": "SQ_TEX_Z_FILTER_POINT", "value": 1},
688    {"name": "SQ_TEX_Z_FILTER_LINEAR", "value": 2}
689   ]
690  },
691  "ScMap": {
692   "entries": [
693    {"name": "RASTER_CONFIG_SC_MAP_0", "value": 0},
694    {"name": "RASTER_CONFIG_SC_MAP_1", "value": 1},
695    {"name": "RASTER_CONFIG_SC_MAP_2", "value": 2},
696    {"name": "RASTER_CONFIG_SC_MAP_3", "value": 3}
697   ]
698  },
699  "ScXsel": {
700   "entries": [
701    {"name": "RASTER_CONFIG_SC_XSEL_8_WIDE_TILE", "value": 0},
702    {"name": "RASTER_CONFIG_SC_XSEL_16_WIDE_TILE", "value": 1},
703    {"name": "RASTER_CONFIG_SC_XSEL_32_WIDE_TILE", "value": 2},
704    {"name": "RASTER_CONFIG_SC_XSEL_64_WIDE_TILE", "value": 3}
705   ]
706  },
707  "ScYsel": {
708   "entries": [
709    {"name": "RASTER_CONFIG_SC_YSEL_8_WIDE_TILE", "value": 0},
710    {"name": "RASTER_CONFIG_SC_YSEL_16_WIDE_TILE", "value": 1},
711    {"name": "RASTER_CONFIG_SC_YSEL_32_WIDE_TILE", "value": 2},
712    {"name": "RASTER_CONFIG_SC_YSEL_64_WIDE_TILE", "value": 3}
713   ]
714  },
715  "SeMap": {
716   "entries": [
717    {"name": "RASTER_CONFIG_SE_MAP_0", "value": 0},
718    {"name": "RASTER_CONFIG_SE_MAP_1", "value": 1},
719    {"name": "RASTER_CONFIG_SE_MAP_2", "value": 2},
720    {"name": "RASTER_CONFIG_SE_MAP_3", "value": 3}
721   ]
722  },
723  "SePairMap": {
724   "entries": [
725    {"name": "RASTER_CONFIG_SE_PAIR_MAP_0", "value": 0},
726    {"name": "RASTER_CONFIG_SE_PAIR_MAP_1", "value": 1},
727    {"name": "RASTER_CONFIG_SE_PAIR_MAP_2", "value": 2},
728    {"name": "RASTER_CONFIG_SE_PAIR_MAP_3", "value": 3}
729   ]
730  },
731  "SePairXsel": {
732   "entries": [
733    {"name": "RASTER_CONFIG_SE_PAIR_XSEL_8_WIDE_TILE", "value": 0},
734    {"name": "RASTER_CONFIG_SE_PAIR_XSEL_16_WIDE_TILE", "value": 1},
735    {"name": "RASTER_CONFIG_SE_PAIR_XSEL_32_WIDE_TILE", "value": 2},
736    {"name": "RASTER_CONFIG_SE_PAIR_XSEL_64_WIDE_TILE", "value": 3}
737   ]
738  },
739  "SePairYsel": {
740   "entries": [
741    {"name": "RASTER_CONFIG_SE_PAIR_YSEL_8_WIDE_TILE", "value": 0},
742    {"name": "RASTER_CONFIG_SE_PAIR_YSEL_16_WIDE_TILE", "value": 1},
743    {"name": "RASTER_CONFIG_SE_PAIR_YSEL_32_WIDE_TILE", "value": 2},
744    {"name": "RASTER_CONFIG_SE_PAIR_YSEL_64_WIDE_TILE", "value": 3}
745   ]
746  },
747  "SeXsel": {
748   "entries": [
749    {"name": "RASTER_CONFIG_SE_XSEL_8_WIDE_TILE", "value": 0},
750    {"name": "RASTER_CONFIG_SE_XSEL_16_WIDE_TILE", "value": 1},
751    {"name": "RASTER_CONFIG_SE_XSEL_32_WIDE_TILE", "value": 2},
752    {"name": "RASTER_CONFIG_SE_XSEL_64_WIDE_TILE", "value": 3}
753   ]
754  },
755  "SeYsel": {
756   "entries": [
757    {"name": "RASTER_CONFIG_SE_YSEL_8_WIDE_TILE", "value": 0},
758    {"name": "RASTER_CONFIG_SE_YSEL_16_WIDE_TILE", "value": 1},
759    {"name": "RASTER_CONFIG_SE_YSEL_32_WIDE_TILE", "value": 2},
760    {"name": "RASTER_CONFIG_SE_YSEL_64_WIDE_TILE", "value": 3}
761   ]
762  },
763  "StencilFormat": {
764   "entries": [
765    {"name": "STENCIL_INVALID", "value": 0},
766    {"name": "STENCIL_8", "value": 1}
767   ]
768  },
769  "StencilOp": {
770   "entries": [
771    {"name": "STENCIL_KEEP", "value": 0},
772    {"name": "STENCIL_ZERO", "value": 1},
773    {"name": "STENCIL_ONES", "value": 2},
774    {"name": "STENCIL_REPLACE_TEST", "value": 3},
775    {"name": "STENCIL_REPLACE_OP", "value": 4},
776    {"name": "STENCIL_ADD_CLAMP", "value": 5},
777    {"name": "STENCIL_SUB_CLAMP", "value": 6},
778    {"name": "STENCIL_INVERT", "value": 7},
779    {"name": "STENCIL_ADD_WRAP", "value": 8},
780    {"name": "STENCIL_SUB_WRAP", "value": 9},
781    {"name": "STENCIL_AND", "value": 10},
782    {"name": "STENCIL_OR", "value": 11},
783    {"name": "STENCIL_XOR", "value": 12},
784    {"name": "STENCIL_NAND", "value": 13},
785    {"name": "STENCIL_NOR", "value": 14},
786    {"name": "STENCIL_XNOR", "value": 15}
787   ]
788  },
789  "SurfaceEndian": {
790   "entries": [
791    {"name": "ENDIAN_NONE", "value": 0},
792    {"name": "ENDIAN_8IN16", "value": 1},
793    {"name": "ENDIAN_8IN32", "value": 2},
794    {"name": "ENDIAN_8IN64", "value": 3}
795   ]
796  },
797  "SurfaceNumber": {
798   "entries": [
799    {"name": "NUMBER_UNORM", "value": 0},
800    {"name": "NUMBER_SNORM", "value": 1},
801    {"name": "NUMBER_USCALED", "value": 2},
802    {"name": "NUMBER_SSCALED", "value": 3},
803    {"name": "NUMBER_UINT", "value": 4},
804    {"name": "NUMBER_SINT", "value": 5},
805    {"name": "NUMBER_SRGB", "value": 6},
806    {"name": "NUMBER_FLOAT", "value": 7}
807   ]
808  },
809  "SurfaceSwap": {
810   "entries": [
811    {"name": "SWAP_STD", "value": 0},
812    {"name": "SWAP_ALT", "value": 1},
813    {"name": "SWAP_STD_REV", "value": 2},
814    {"name": "SWAP_ALT_REV", "value": 3}
815   ]
816  },
817  "TileSplit": {
818   "entries": [
819    {"name": "ADDR_SURF_TILE_SPLIT_64B", "value": 0},
820    {"name": "ADDR_SURF_TILE_SPLIT_128B", "value": 1},
821    {"name": "ADDR_SURF_TILE_SPLIT_256B", "value": 2},
822    {"name": "ADDR_SURF_TILE_SPLIT_512B", "value": 3},
823    {"name": "ADDR_SURF_TILE_SPLIT_1KB", "value": 4},
824    {"name": "ADDR_SURF_TILE_SPLIT_2KB", "value": 5},
825    {"name": "ADDR_SURF_TILE_SPLIT_4KB", "value": 6}
826   ]
827  },
828  "VGT_DIST_MODE": {
829   "entries": [
830    {"name": "NO_DIST", "value": 0},
831    {"name": "PATCHES", "value": 1},
832    {"name": "DONUTS", "value": 2}
833   ]
834  },
835  "VGT_DI_MAJOR_MODE_SELECT": {
836   "entries": [
837    {"name": "DI_MAJOR_MODE_0", "value": 0},
838    {"name": "DI_MAJOR_MODE_1", "value": 1}
839   ]
840  },
841  "VGT_DI_PRIM_TYPE": {
842   "entries": [
843    {"name": "DI_PT_NONE", "value": 0},
844    {"name": "DI_PT_POINTLIST", "value": 1},
845    {"name": "DI_PT_LINELIST", "value": 2},
846    {"name": "DI_PT_LINESTRIP", "value": 3},
847    {"name": "DI_PT_TRILIST", "value": 4},
848    {"name": "DI_PT_TRIFAN", "value": 5},
849    {"name": "DI_PT_TRISTRIP", "value": 6},
850    {"name": "DI_PT_UNUSED_0", "value": 7},
851    {"name": "DI_PT_UNUSED_1", "value": 8},
852    {"name": "DI_PT_PATCH", "value": 9},
853    {"name": "DI_PT_LINELIST_ADJ", "value": 10},
854    {"name": "DI_PT_LINESTRIP_ADJ", "value": 11},
855    {"name": "DI_PT_TRILIST_ADJ", "value": 12},
856    {"name": "DI_PT_TRISTRIP_ADJ", "value": 13},
857    {"name": "DI_PT_UNUSED_3", "value": 14},
858    {"name": "DI_PT_UNUSED_4", "value": 15},
859    {"name": "DI_PT_TRI_WITH_WFLAGS", "value": 16},
860    {"name": "DI_PT_RECTLIST", "value": 17},
861    {"name": "DI_PT_LINELOOP", "value": 18},
862    {"name": "DI_PT_QUADLIST", "value": 19},
863    {"name": "DI_PT_QUADSTRIP", "value": 20},
864    {"name": "DI_PT_POLYGON", "value": 21},
865    {"name": "DI_PT_2D_COPY_RECT_LIST_V0", "value": 22},
866    {"name": "DI_PT_2D_COPY_RECT_LIST_V1", "value": 23},
867    {"name": "DI_PT_2D_COPY_RECT_LIST_V2", "value": 24},
868    {"name": "DI_PT_2D_COPY_RECT_LIST_V3", "value": 25},
869    {"name": "DI_PT_2D_FILL_RECT_LIST", "value": 26},
870    {"name": "DI_PT_2D_LINE_STRIP", "value": 27},
871    {"name": "DI_PT_2D_TRI_STRIP", "value": 28}
872   ]
873  },
874  "VGT_DI_SOURCE_SELECT": {
875   "entries": [
876    {"name": "DI_SRC_SEL_DMA", "value": 0},
877    {"name": "DI_SRC_SEL_IMMEDIATE", "value": 1},
878    {"name": "DI_SRC_SEL_AUTO_INDEX", "value": 2},
879    {"name": "DI_SRC_SEL_RESERVED", "value": 3}
880   ]
881  },
882  "VGT_DMA_BUF_TYPE": {
883   "entries": [
884    {"name": "VGT_DMA_BUF_MEM", "value": 0},
885    {"name": "VGT_DMA_BUF_RING", "value": 1},
886    {"name": "VGT_DMA_BUF_SETUP", "value": 2},
887    {"name": "VGT_DMA_PTR_UPDATE", "value": 3}
888   ]
889  },
890  "VGT_DMA_SWAP_MODE": {
891   "entries": [
892    {"name": "VGT_DMA_SWAP_NONE", "value": 0},
893    {"name": "VGT_DMA_SWAP_16_BIT", "value": 1},
894    {"name": "VGT_DMA_SWAP_32_BIT", "value": 2},
895    {"name": "VGT_DMA_SWAP_WORD", "value": 3}
896   ]
897  },
898  "VGT_EVENT_TYPE": {
899   "entries": [
900    {"name": "Reserved_0x00", "value": 0},
901    {"name": "SAMPLE_STREAMOUTSTATS1", "value": 1},
902    {"name": "SAMPLE_STREAMOUTSTATS2", "value": 2},
903    {"name": "SAMPLE_STREAMOUTSTATS3", "value": 3},
904    {"name": "CACHE_FLUSH_TS", "value": 4},
905    {"name": "CONTEXT_DONE", "value": 5},
906    {"name": "CACHE_FLUSH", "value": 6},
907    {"name": "CS_PARTIAL_FLUSH", "value": 7},
908    {"name": "VGT_STREAMOUT_SYNC", "value": 8},
909    {"name": "Reserved_0x09", "value": 9},
910    {"name": "VGT_STREAMOUT_RESET", "value": 10},
911    {"name": "END_OF_PIPE_INCR_DE", "value": 11},
912    {"name": "END_OF_PIPE_IB_END", "value": 12},
913    {"name": "RST_PIX_CNT", "value": 13},
914    {"name": "Reserved_0x0E", "value": 14},
915    {"name": "VS_PARTIAL_FLUSH", "value": 15},
916    {"name": "PS_PARTIAL_FLUSH", "value": 16},
917    {"name": "FLUSH_HS_OUTPUT", "value": 17},
918    {"name": "FLUSH_LS_OUTPUT", "value": 18},
919    {"name": "Reserved_0x13", "value": 19},
920    {"name": "CACHE_FLUSH_AND_INV_TS_EVENT", "value": 20},
921    {"name": "ZPASS_DONE", "value": 21},
922    {"name": "CACHE_FLUSH_AND_INV_EVENT", "value": 22},
923    {"name": "PERFCOUNTER_START", "value": 23},
924    {"name": "PERFCOUNTER_STOP", "value": 24},
925    {"name": "PIPELINESTAT_START", "value": 25},
926    {"name": "PIPELINESTAT_STOP", "value": 26},
927    {"name": "PERFCOUNTER_SAMPLE", "value": 27},
928    {"name": "FLUSH_ES_OUTPUT", "value": 28},
929    {"name": "FLUSH_GS_OUTPUT", "value": 29},
930    {"name": "SAMPLE_PIPELINESTAT", "value": 30},
931    {"name": "SO_VGTSTREAMOUT_FLUSH", "value": 31},
932    {"name": "SAMPLE_STREAMOUTSTATS", "value": 32},
933    {"name": "RESET_VTX_CNT", "value": 33},
934    {"name": "BLOCK_CONTEXT_DONE", "value": 34},
935    {"name": "CS_CONTEXT_DONE", "value": 35},
936    {"name": "VGT_FLUSH", "value": 36},
937    {"name": "TGID_ROLLOVER", "value": 37},
938    {"name": "SQ_NON_EVENT", "value": 38},
939    {"name": "SC_SEND_DB_VPZ", "value": 39},
940    {"name": "BOTTOM_OF_PIPE_TS", "value": 40},
941    {"name": "FLUSH_SX_TS", "value": 41},
942    {"name": "DB_CACHE_FLUSH_AND_INV", "value": 42},
943    {"name": "FLUSH_AND_INV_DB_DATA_TS", "value": 43},
944    {"name": "FLUSH_AND_INV_DB_META", "value": 44},
945    {"name": "FLUSH_AND_INV_CB_DATA_TS", "value": 45},
946    {"name": "FLUSH_AND_INV_CB_META", "value": 46},
947    {"name": "CS_DONE", "value": 47},
948    {"name": "PS_DONE", "value": 48},
949    {"name": "FLUSH_AND_INV_CB_PIXEL_DATA", "value": 49},
950    {"name": "SX_CB_RAT_ACK_REQUEST", "value": 50},
951    {"name": "THREAD_TRACE_START", "value": 51},
952    {"name": "THREAD_TRACE_STOP", "value": 52},
953    {"name": "THREAD_TRACE_MARKER", "value": 53},
954    {"name": "THREAD_TRACE_FLUSH", "value": 54},
955    {"name": "THREAD_TRACE_FINISH", "value": 55},
956    {"name": "PIXEL_PIPE_STAT_CONTROL", "value": 56},
957    {"name": "PIXEL_PIPE_STAT_DUMP", "value": 57},
958    {"name": "PIXEL_PIPE_STAT_RESET", "value": 58},
959    {"name": "CONTEXT_SUSPEND", "value": 59},
960    {"name": "OFFCHIP_HS_DEALLOC", "value": 60}
961   ]
962  },
963  "VGT_GS_CUT_MODE": {
964   "entries": [
965    {"name": "GS_CUT_1024", "value": 0},
966    {"name": "GS_CUT_512", "value": 1},
967    {"name": "GS_CUT_256", "value": 2},
968    {"name": "GS_CUT_128", "value": 3}
969   ]
970  },
971  "VGT_GS_MODE_TYPE": {
972   "entries": [
973    {"name": "GS_OFF", "value": 0},
974    {"name": "GS_SCENARIO_A", "value": 1},
975    {"name": "GS_SCENARIO_B", "value": 2},
976    {"name": "GS_SCENARIO_G", "value": 3},
977    {"name": "GS_SCENARIO_C", "value": 4},
978    {"name": "SPRITE_EN", "value": 5}
979   ]
980  },
981  "VGT_GS_OUTPRIM_TYPE": {
982   "entries": [
983    {"name": "POINTLIST", "value": 0},
984    {"name": "LINESTRIP", "value": 1},
985    {"name": "TRISTRIP", "value": 2}
986   ]
987  },
988  "VGT_HS_OFFCHIP_PARAM__OFFCHIP_GRANULARITY": {
989   "entries": [
990    {"name": "X_8K_DWORDS", "value": 0},
991    {"name": "X_4K_DWORDS", "value": 1},
992    {"name": "X_2K_DWORDS", "value": 2},
993    {"name": "X_1K_DWORDS", "value": 3}
994   ]
995  },
996  "VGT_INDEX_TYPE_MODE": {
997   "entries": [
998    {"name": "VGT_INDEX_16", "value": 0},
999    {"name": "VGT_INDEX_32", "value": 1},
1000    {"name": "VGT_INDEX_8", "value": 2}
1001   ]
1002  },
1003  "VGT_RDREQ_POLICY": {
1004   "entries": [
1005    {"name": "VGT_POLICY_LRU", "value": 0},
1006    {"name": "VGT_POLICY_STREAM", "value": 1}
1007   ]
1008  },
1009  "VGT_STAGES_ES_EN": {
1010   "entries": [
1011    {"name": "ES_STAGE_OFF", "value": 0},
1012    {"name": "ES_STAGE_DS", "value": 1},
1013    {"name": "ES_STAGE_REAL", "value": 2},
1014    {"name": "RESERVED_ES", "value": 3}
1015   ]
1016  },
1017  "VGT_STAGES_GS_EN": {
1018   "entries": [
1019    {"name": "GS_STAGE_OFF", "value": 0},
1020    {"name": "GS_STAGE_ON", "value": 1}
1021   ]
1022  },
1023  "VGT_STAGES_HS_EN": {
1024   "entries": [
1025    {"name": "HS_STAGE_OFF", "value": 0},
1026    {"name": "HS_STAGE_ON", "value": 1}
1027   ]
1028  },
1029  "VGT_STAGES_LS_EN": {
1030   "entries": [
1031    {"name": "LS_STAGE_OFF", "value": 0},
1032    {"name": "LS_STAGE_ON", "value": 1},
1033    {"name": "CS_STAGE_ON", "value": 2},
1034    {"name": "RESERVED_LS", "value": 3}
1035   ]
1036  },
1037  "VGT_STAGES_VS_EN": {
1038   "entries": [
1039    {"name": "VS_STAGE_REAL", "value": 0},
1040    {"name": "VS_STAGE_DS", "value": 1},
1041    {"name": "VS_STAGE_COPY_SHADER", "value": 2},
1042    {"name": "RESERVED_VS", "value": 3}
1043   ]
1044  },
1045  "VGT_TESS_PARTITION": {
1046   "entries": [
1047    {"name": "PART_INTEGER", "value": 0},
1048    {"name": "PART_POW2", "value": 1},
1049    {"name": "PART_FRAC_ODD", "value": 2},
1050    {"name": "PART_FRAC_EVEN", "value": 3}
1051   ]
1052  },
1053  "VGT_TESS_TOPOLOGY": {
1054   "entries": [
1055    {"name": "OUTPUT_POINT", "value": 0},
1056    {"name": "OUTPUT_LINE", "value": 1},
1057    {"name": "OUTPUT_TRIANGLE_CW", "value": 2},
1058    {"name": "OUTPUT_TRIANGLE_CCW", "value": 3}
1059   ]
1060  },
1061  "VGT_TESS_TYPE": {
1062   "entries": [
1063    {"name": "TESS_ISOLINE", "value": 0},
1064    {"name": "TESS_TRIANGLE", "value": 1},
1065    {"name": "TESS_QUAD", "value": 2}
1066   ]
1067  },
1068  "ZFormat": {
1069   "entries": [
1070    {"name": "Z_INVALID", "value": 0},
1071    {"name": "Z_16", "value": 1},
1072    {"name": "Z_24", "value": 2},
1073    {"name": "Z_32_FLOAT", "value": 3}
1074   ]
1075  },
1076  "ZLimitSumm": {
1077   "entries": [
1078    {"name": "FORCE_SUMM_OFF", "value": 0},
1079    {"name": "FORCE_SUMM_MINZ", "value": 1},
1080    {"name": "FORCE_SUMM_MAXZ", "value": 2},
1081    {"name": "FORCE_SUMM_BOTH", "value": 3}
1082   ]
1083  },
1084  "ZOrder": {
1085   "entries": [
1086    {"name": "LATE_Z", "value": 0},
1087    {"name": "EARLY_Z_THEN_LATE_Z", "value": 1},
1088    {"name": "RE_Z", "value": 2},
1089    {"name": "EARLY_Z_THEN_RE_Z", "value": 3}
1090   ]
1091  }
1092 },
1093 "register_mappings": [
1094  {
1095   "chips": ["gfx8"],
1096   "map": {"at": 68, "to": "mm"},
1097   "name": "SQ_WAVE_MODE",
1098   "type_ref": "SQ_WAVE_MODE"
1099  },
1100  {
1101   "chips": ["gfx8"],
1102   "map": {"at": 72, "to": "mm"},
1103   "name": "SQ_WAVE_STATUS",
1104   "type_ref": "SQ_WAVE_STATUS"
1105  },
1106  {
1107   "chips": ["gfx8"],
1108   "map": {"at": 76, "to": "mm"},
1109   "name": "SQ_WAVE_TRAPSTS",
1110   "type_ref": "SQ_WAVE_TRAPSTS"
1111  },
1112  {
1113   "chips": ["gfx8"],
1114   "map": {"at": 80, "to": "mm"},
1115   "name": "SQ_WAVE_HW_ID",
1116   "type_ref": "SQ_WAVE_HW_ID"
1117  },
1118  {
1119   "chips": ["gfx8"],
1120   "map": {"at": 84, "to": "mm"},
1121   "name": "SQ_WAVE_GPR_ALLOC",
1122   "type_ref": "SQ_WAVE_GPR_ALLOC"
1123  },
1124  {
1125   "chips": ["gfx8"],
1126   "map": {"at": 88, "to": "mm"},
1127   "name": "SQ_WAVE_LDS_ALLOC",
1128   "type_ref": "SQ_WAVE_LDS_ALLOC"
1129  },
1130  {
1131   "chips": ["gfx8"],
1132   "map": {"at": 92, "to": "mm"},
1133   "name": "SQ_WAVE_IB_STS",
1134   "type_ref": "SQ_WAVE_IB_STS"
1135  },
1136  {
1137   "chips": ["gfx8"],
1138   "map": {"at": 96, "to": "mm"},
1139   "name": "SQ_WAVE_PC_LO"
1140  },
1141  {
1142   "chips": ["gfx8"],
1143   "map": {"at": 100, "to": "mm"},
1144   "name": "SQ_WAVE_PC_HI",
1145   "type_ref": "SQ_WAVE_PC_HI"
1146  },
1147  {
1148   "chips": ["gfx8"],
1149   "map": {"at": 104, "to": "mm"},
1150   "name": "SQ_WAVE_INST_DW0"
1151  },
1152  {
1153   "chips": ["gfx8"],
1154   "map": {"at": 108, "to": "mm"},
1155   "name": "SQ_WAVE_INST_DW1"
1156  },
1157  {
1158   "chips": ["gfx8"],
1159   "map": {"at": 112, "to": "mm"},
1160   "name": "SQ_WAVE_IB_DBG0",
1161   "type_ref": "SQ_WAVE_IB_DBG0"
1162  },
1163  {
1164   "chips": ["gfx8"],
1165   "map": {"at": 116, "to": "mm"},
1166   "name": "SQ_WAVE_IB_DBG1",
1167   "type_ref": "SQ_WAVE_IB_DBG1"
1168  },
1169  {
1170   "chips": ["gfx8"],
1171   "map": {"at": 2480, "to": "mm"},
1172   "name": "SQ_WAVE_TBA_LO"
1173  },
1174  {
1175   "chips": ["gfx8"],
1176   "map": {"at": 2484, "to": "mm"},
1177   "name": "SQ_WAVE_TBA_HI",
1178   "type_ref": "SQ_WAVE_TBA_HI"
1179  },
1180  {
1181   "chips": ["gfx8"],
1182   "map": {"at": 2488, "to": "mm"},
1183   "name": "SQ_WAVE_TMA_LO"
1184  },
1185  {
1186   "chips": ["gfx8"],
1187   "map": {"at": 2492, "to": "mm"},
1188   "name": "SQ_WAVE_TMA_HI",
1189   "type_ref": "SQ_WAVE_TBA_HI"
1190  },
1191  {
1192   "chips": ["gfx8"],
1193   "map": {"at": 2496, "to": "mm"},
1194   "name": "SQ_WAVE_TTMP0"
1195  },
1196  {
1197   "chips": ["gfx8"],
1198   "map": {"at": 2500, "to": "mm"},
1199   "name": "SQ_WAVE_TTMP1"
1200  },
1201  {
1202   "chips": ["gfx8"],
1203   "map": {"at": 2504, "to": "mm"},
1204   "name": "SQ_WAVE_TTMP2"
1205  },
1206  {
1207   "chips": ["gfx8"],
1208   "map": {"at": 2508, "to": "mm"},
1209   "name": "SQ_WAVE_TTMP3"
1210  },
1211  {
1212   "chips": ["gfx8"],
1213   "map": {"at": 2512, "to": "mm"},
1214   "name": "SQ_WAVE_TTMP4"
1215  },
1216  {
1217   "chips": ["gfx8"],
1218   "map": {"at": 2516, "to": "mm"},
1219   "name": "SQ_WAVE_TTMP5"
1220  },
1221  {
1222   "chips": ["gfx8"],
1223   "map": {"at": 2520, "to": "mm"},
1224   "name": "SQ_WAVE_TTMP6"
1225  },
1226  {
1227   "chips": ["gfx8"],
1228   "map": {"at": 2524, "to": "mm"},
1229   "name": "SQ_WAVE_TTMP7"
1230  },
1231  {
1232   "chips": ["gfx8"],
1233   "map": {"at": 2528, "to": "mm"},
1234   "name": "SQ_WAVE_TTMP8"
1235  },
1236  {
1237   "chips": ["gfx8"],
1238   "map": {"at": 2532, "to": "mm"},
1239   "name": "SQ_WAVE_TTMP9"
1240  },
1241  {
1242   "chips": ["gfx8"],
1243   "map": {"at": 2536, "to": "mm"},
1244   "name": "SQ_WAVE_TTMP10"
1245  },
1246  {
1247   "chips": ["gfx8"],
1248   "map": {"at": 2540, "to": "mm"},
1249   "name": "SQ_WAVE_TTMP11"
1250  },
1251  {
1252   "chips": ["gfx8"],
1253   "map": {"at": 2544, "to": "mm"},
1254   "name": "SQ_WAVE_M0"
1255  },
1256  {
1257   "chips": ["gfx8"],
1258   "map": {"at": 2552, "to": "mm"},
1259   "name": "SQ_WAVE_EXEC_LO"
1260  },
1261  {
1262   "chips": ["gfx8"],
1263   "map": {"at": 2556, "to": "mm"},
1264   "name": "SQ_WAVE_EXEC_HI"
1265  },
1266  {
1267   "chips": ["gfx8"],
1268   "map": {"at": 32776, "to": "mm"},
1269   "name": "GRBM_STATUS2",
1270   "type_ref": "GRBM_STATUS2"
1271  },
1272  {
1273   "chips": ["gfx8"],
1274   "map": {"at": 32784, "to": "mm"},
1275   "name": "GRBM_STATUS",
1276   "type_ref": "GRBM_STATUS"
1277  },
1278  {
1279   "chips": ["gfx8"],
1280   "map": {"at": 32788, "to": "mm"},
1281   "name": "GRBM_STATUS_SE0",
1282   "type_ref": "GRBM_STATUS_SE0"
1283  },
1284  {
1285   "chips": ["gfx8"],
1286   "map": {"at": 32792, "to": "mm"},
1287   "name": "GRBM_STATUS_SE1",
1288   "type_ref": "GRBM_STATUS_SE0"
1289  },
1290  {
1291   "chips": ["gfx8"],
1292   "map": {"at": 32824, "to": "mm"},
1293   "name": "GRBM_STATUS_SE2",
1294   "type_ref": "GRBM_STATUS_SE0"
1295  },
1296  {
1297   "chips": ["gfx8"],
1298   "map": {"at": 32828, "to": "mm"},
1299   "name": "GRBM_STATUS_SE3",
1300   "type_ref": "GRBM_STATUS_SE0"
1301  },
1302  {
1303   "chips": ["gfx8"],
1304   "map": {"at": 33296, "to": "mm"},
1305   "name": "CP_CPC_STATUS",
1306   "type_ref": "CP_CPC_STATUS"
1307  },
1308  {
1309   "chips": ["gfx8"],
1310   "map": {"at": 33300, "to": "mm"},
1311   "name": "CP_CPC_BUSY_STAT",
1312   "type_ref": "CP_CPC_BUSY_STAT"
1313  },
1314  {
1315   "chips": ["gfx8"],
1316   "map": {"at": 33304, "to": "mm"},
1317   "name": "CP_CPC_STALLED_STAT1",
1318   "type_ref": "CP_CPC_STALLED_STAT1"
1319  },
1320  {
1321   "chips": ["gfx8"],
1322   "map": {"at": 33308, "to": "mm"},
1323   "name": "CP_CPF_STATUS",
1324   "type_ref": "CP_CPF_STATUS"
1325  },
1326  {
1327   "chips": ["gfx8"],
1328   "map": {"at": 33312, "to": "mm"},
1329   "name": "CP_CPF_BUSY_STAT",
1330   "type_ref": "CP_CPF_BUSY_STAT"
1331  },
1332  {
1333   "chips": ["gfx8"],
1334   "map": {"at": 33316, "to": "mm"},
1335   "name": "CP_CPF_STALLED_STAT1",
1336   "type_ref": "CP_CPF_STALLED_STAT1"
1337  },
1338  {
1339   "chips": ["gfx8"],
1340   "map": {"at": 33324, "to": "mm"},
1341   "name": "CP_CPC_GRBM_FREE_COUNT",
1342   "type_ref": "CP_CPC_GRBM_FREE_COUNT"
1343  },
1344  {
1345   "chips": ["gfx8"],
1346   "map": {"at": 33344, "to": "mm"},
1347   "name": "CP_CPC_SCRATCH_INDEX",
1348   "type_ref": "CP_CPC_SCRATCH_INDEX"
1349  },
1350  {
1351   "chips": ["gfx8"],
1352   "map": {"at": 33348, "to": "mm"},
1353   "name": "CP_CPC_SCRATCH_DATA"
1354  },
1355  {
1356   "chips": ["gfx8"],
1357   "map": {"at": 33436, "to": "mm"},
1358   "name": "CP_CPC_HALT_HYST_COUNT",
1359   "type_ref": "CP_CPC_HALT_HYST_COUNT"
1360  },
1361  {
1362   "chips": ["gfx8"],
1363   "map": {"at": 36416, "to": "mm"},
1364   "name": "SQ_THREAD_TRACE_CNTR"
1365  },
1366  {
1367   "chips": ["gfx8"],
1368   "map": {"at": 36608, "to": "mm"},
1369   "name": "SQ_BUF_RSRC_WORD0"
1370  },
1371  {
1372   "chips": ["gfx8"],
1373   "map": {"at": 36612, "to": "mm"},
1374   "name": "SQ_BUF_RSRC_WORD1",
1375   "type_ref": "SQ_BUF_RSRC_WORD1"
1376  },
1377  {
1378   "chips": ["gfx8"],
1379   "map": {"at": 36616, "to": "mm"},
1380   "name": "SQ_BUF_RSRC_WORD2"
1381  },
1382  {
1383   "chips": ["gfx8"],
1384   "map": {"at": 36620, "to": "mm"},
1385   "name": "SQ_BUF_RSRC_WORD3",
1386   "type_ref": "SQ_BUF_RSRC_WORD3"
1387  },
1388  {
1389   "chips": ["gfx8"],
1390   "map": {"at": 36624, "to": "mm"},
1391   "name": "SQ_IMG_RSRC_WORD0"
1392  },
1393  {
1394   "chips": ["gfx8"],
1395   "map": {"at": 36628, "to": "mm"},
1396   "name": "SQ_IMG_RSRC_WORD1",
1397   "type_ref": "SQ_IMG_RSRC_WORD1"
1398  },
1399  {
1400   "chips": ["gfx8"],
1401   "map": {"at": 36632, "to": "mm"},
1402   "name": "SQ_IMG_RSRC_WORD2",
1403   "type_ref": "SQ_IMG_RSRC_WORD2"
1404  },
1405  {
1406   "chips": ["gfx8"],
1407   "map": {"at": 36636, "to": "mm"},
1408   "name": "SQ_IMG_RSRC_WORD3",
1409   "type_ref": "SQ_IMG_RSRC_WORD3"
1410  },
1411  {
1412   "chips": ["gfx8"],
1413   "map": {"at": 36640, "to": "mm"},
1414   "name": "SQ_IMG_RSRC_WORD4",
1415   "type_ref": "SQ_IMG_RSRC_WORD4"
1416  },
1417  {
1418   "chips": ["gfx8"],
1419   "map": {"at": 36644, "to": "mm"},
1420   "name": "SQ_IMG_RSRC_WORD5",
1421   "type_ref": "SQ_IMG_RSRC_WORD5"
1422  },
1423  {
1424   "chips": ["gfx8"],
1425   "map": {"at": 36648, "to": "mm"},
1426   "name": "SQ_IMG_RSRC_WORD6",
1427   "type_ref": "SQ_IMG_RSRC_WORD6"
1428  },
1429  {
1430   "chips": ["gfx8"],
1431   "map": {"at": 36652, "to": "mm"},
1432   "name": "SQ_IMG_RSRC_WORD7"
1433  },
1434  {
1435   "chips": ["gfx8"],
1436   "map": {"at": 36656, "to": "mm"},
1437   "name": "SQ_IMG_SAMP_WORD0",
1438   "type_ref": "SQ_IMG_SAMP_WORD0"
1439  },
1440  {
1441   "chips": ["gfx8"],
1442   "map": {"at": 36660, "to": "mm"},
1443   "name": "SQ_IMG_SAMP_WORD1",
1444   "type_ref": "SQ_IMG_SAMP_WORD1"
1445  },
1446  {
1447   "chips": ["gfx8"],
1448   "map": {"at": 36664, "to": "mm"},
1449   "name": "SQ_IMG_SAMP_WORD2",
1450   "type_ref": "SQ_IMG_SAMP_WORD2"
1451  },
1452  {
1453   "chips": ["gfx8"],
1454   "map": {"at": 36668, "to": "mm"},
1455   "name": "SQ_IMG_SAMP_WORD3",
1456   "type_ref": "SQ_IMG_SAMP_WORD3"
1457  },
1458  {
1459   "chips": ["gfx8"],
1460   "map": {"at": 37120, "to": "mm"},
1461   "name": "SPI_CONFIG_CNTL",
1462   "type_ref": "SPI_CONFIG_CNTL"
1463  },
1464  {
1465   "chips": ["gfx8"],
1466   "map": {"at": 39160, "to": "mm"},
1467   "name": "GB_ADDR_CONFIG",
1468   "type_ref": "GB_ADDR_CONFIG"
1469  },
1470  {
1471   "chips": ["gfx8"],
1472   "map": {"at": 39184, "to": "mm"},
1473   "name": "GB_TILE_MODE0",
1474   "type_ref": "GB_TILE_MODE0"
1475  },
1476  {
1477   "chips": ["gfx8"],
1478   "map": {"at": 39188, "to": "mm"},
1479   "name": "GB_TILE_MODE1",
1480   "type_ref": "GB_TILE_MODE0"
1481  },
1482  {
1483   "chips": ["gfx8"],
1484   "map": {"at": 39192, "to": "mm"},
1485   "name": "GB_TILE_MODE2",
1486   "type_ref": "GB_TILE_MODE0"
1487  },
1488  {
1489   "chips": ["gfx8"],
1490   "map": {"at": 39196, "to": "mm"},
1491   "name": "GB_TILE_MODE3",
1492   "type_ref": "GB_TILE_MODE0"
1493  },
1494  {
1495   "chips": ["gfx8"],
1496   "map": {"at": 39200, "to": "mm"},
1497   "name": "GB_TILE_MODE4",
1498   "type_ref": "GB_TILE_MODE0"
1499  },
1500  {
1501   "chips": ["gfx8"],
1502   "map": {"at": 39204, "to": "mm"},
1503   "name": "GB_TILE_MODE5",
1504   "type_ref": "GB_TILE_MODE0"
1505  },
1506  {
1507   "chips": ["gfx8"],
1508   "map": {"at": 39208, "to": "mm"},
1509   "name": "GB_TILE_MODE6",
1510   "type_ref": "GB_TILE_MODE0"
1511  },
1512  {
1513   "chips": ["gfx8"],
1514   "map": {"at": 39212, "to": "mm"},
1515   "name": "GB_TILE_MODE7",
1516   "type_ref": "GB_TILE_MODE0"
1517  },
1518  {
1519   "chips": ["gfx8"],
1520   "map": {"at": 39216, "to": "mm"},
1521   "name": "GB_TILE_MODE8",
1522   "type_ref": "GB_TILE_MODE0"
1523  },
1524  {
1525   "chips": ["gfx8"],
1526   "map": {"at": 39220, "to": "mm"},
1527   "name": "GB_TILE_MODE9",
1528   "type_ref": "GB_TILE_MODE0"
1529  },
1530  {
1531   "chips": ["gfx8"],
1532   "map": {"at": 39224, "to": "mm"},
1533   "name": "GB_TILE_MODE10",
1534   "type_ref": "GB_TILE_MODE0"
1535  },
1536  {
1537   "chips": ["gfx8"],
1538   "map": {"at": 39228, "to": "mm"},
1539   "name": "GB_TILE_MODE11",
1540   "type_ref": "GB_TILE_MODE0"
1541  },
1542  {
1543   "chips": ["gfx8"],
1544   "map": {"at": 39232, "to": "mm"},
1545   "name": "GB_TILE_MODE12",
1546   "type_ref": "GB_TILE_MODE0"
1547  },
1548  {
1549   "chips": ["gfx8"],
1550   "map": {"at": 39236, "to": "mm"},
1551   "name": "GB_TILE_MODE13",
1552   "type_ref": "GB_TILE_MODE0"
1553  },
1554  {
1555   "chips": ["gfx8"],
1556   "map": {"at": 39240, "to": "mm"},
1557   "name": "GB_TILE_MODE14",
1558   "type_ref": "GB_TILE_MODE0"
1559  },
1560  {
1561   "chips": ["gfx8"],
1562   "map": {"at": 39244, "to": "mm"},
1563   "name": "GB_TILE_MODE15",
1564   "type_ref": "GB_TILE_MODE0"
1565  },
1566  {
1567   "chips": ["gfx8"],
1568   "map": {"at": 39248, "to": "mm"},
1569   "name": "GB_TILE_MODE16",
1570   "type_ref": "GB_TILE_MODE0"
1571  },
1572  {
1573   "chips": ["gfx8"],
1574   "map": {"at": 39252, "to": "mm"},
1575   "name": "GB_TILE_MODE17",
1576   "type_ref": "GB_TILE_MODE0"
1577  },
1578  {
1579   "chips": ["gfx8"],
1580   "map": {"at": 39256, "to": "mm"},
1581   "name": "GB_TILE_MODE18",
1582   "type_ref": "GB_TILE_MODE0"
1583  },
1584  {
1585   "chips": ["gfx8"],
1586   "map": {"at": 39260, "to": "mm"},
1587   "name": "GB_TILE_MODE19",
1588   "type_ref": "GB_TILE_MODE0"
1589  },
1590  {
1591   "chips": ["gfx8"],
1592   "map": {"at": 39264, "to": "mm"},
1593   "name": "GB_TILE_MODE20",
1594   "type_ref": "GB_TILE_MODE0"
1595  },
1596  {
1597   "chips": ["gfx8"],
1598   "map": {"at": 39268, "to": "mm"},
1599   "name": "GB_TILE_MODE21",
1600   "type_ref": "GB_TILE_MODE0"
1601  },
1602  {
1603   "chips": ["gfx8"],
1604   "map": {"at": 39272, "to": "mm"},
1605   "name": "GB_TILE_MODE22",
1606   "type_ref": "GB_TILE_MODE0"
1607  },
1608  {
1609   "chips": ["gfx8"],
1610   "map": {"at": 39276, "to": "mm"},
1611   "name": "GB_TILE_MODE23",
1612   "type_ref": "GB_TILE_MODE0"
1613  },
1614  {
1615   "chips": ["gfx8"],
1616   "map": {"at": 39280, "to": "mm"},
1617   "name": "GB_TILE_MODE24",
1618   "type_ref": "GB_TILE_MODE0"
1619  },
1620  {
1621   "chips": ["gfx8"],
1622   "map": {"at": 39284, "to": "mm"},
1623   "name": "GB_TILE_MODE25",
1624   "type_ref": "GB_TILE_MODE0"
1625  },
1626  {
1627   "chips": ["gfx8"],
1628   "map": {"at": 39288, "to": "mm"},
1629   "name": "GB_TILE_MODE26",
1630   "type_ref": "GB_TILE_MODE0"
1631  },
1632  {
1633   "chips": ["gfx8"],
1634   "map": {"at": 39292, "to": "mm"},
1635   "name": "GB_TILE_MODE27",
1636   "type_ref": "GB_TILE_MODE0"
1637  },
1638  {
1639   "chips": ["gfx8"],
1640   "map": {"at": 39296, "to": "mm"},
1641   "name": "GB_TILE_MODE28",
1642   "type_ref": "GB_TILE_MODE0"
1643  },
1644  {
1645   "chips": ["gfx8"],
1646   "map": {"at": 39300, "to": "mm"},
1647   "name": "GB_TILE_MODE29",
1648   "type_ref": "GB_TILE_MODE0"
1649  },
1650  {
1651   "chips": ["gfx8"],
1652   "map": {"at": 39304, "to": "mm"},
1653   "name": "GB_TILE_MODE30",
1654   "type_ref": "GB_TILE_MODE0"
1655  },
1656  {
1657   "chips": ["gfx8"],
1658   "map": {"at": 39308, "to": "mm"},
1659   "name": "GB_TILE_MODE31",
1660   "type_ref": "GB_TILE_MODE0"
1661  },
1662  {
1663   "chips": ["gfx8"],
1664   "map": {"at": 39312, "to": "mm"},
1665   "name": "GB_MACROTILE_MODE0",
1666   "type_ref": "GB_MACROTILE_MODE0"
1667  },
1668  {
1669   "chips": ["gfx8"],
1670   "map": {"at": 39316, "to": "mm"},
1671   "name": "GB_MACROTILE_MODE1",
1672   "type_ref": "GB_MACROTILE_MODE0"
1673  },
1674  {
1675   "chips": ["gfx8"],
1676   "map": {"at": 39320, "to": "mm"},
1677   "name": "GB_MACROTILE_MODE2",
1678   "type_ref": "GB_MACROTILE_MODE0"
1679  },
1680  {
1681   "chips": ["gfx8"],
1682   "map": {"at": 39324, "to": "mm"},
1683   "name": "GB_MACROTILE_MODE3",
1684   "type_ref": "GB_MACROTILE_MODE0"
1685  },
1686  {
1687   "chips": ["gfx8"],
1688   "map": {"at": 39328, "to": "mm"},
1689   "name": "GB_MACROTILE_MODE4",
1690   "type_ref": "GB_MACROTILE_MODE0"
1691  },
1692  {
1693   "chips": ["gfx8"],
1694   "map": {"at": 39332, "to": "mm"},
1695   "name": "GB_MACROTILE_MODE5",
1696   "type_ref": "GB_MACROTILE_MODE0"
1697  },
1698  {
1699   "chips": ["gfx8"],
1700   "map": {"at": 39336, "to": "mm"},
1701   "name": "GB_MACROTILE_MODE6",
1702   "type_ref": "GB_MACROTILE_MODE0"
1703  },
1704  {
1705   "chips": ["gfx8"],
1706   "map": {"at": 39340, "to": "mm"},
1707   "name": "GB_MACROTILE_MODE7",
1708   "type_ref": "GB_MACROTILE_MODE0"
1709  },
1710  {
1711   "chips": ["gfx8"],
1712   "map": {"at": 39344, "to": "mm"},
1713   "name": "GB_MACROTILE_MODE8",
1714   "type_ref": "GB_MACROTILE_MODE0"
1715  },
1716  {
1717   "chips": ["gfx8"],
1718   "map": {"at": 39348, "to": "mm"},
1719   "name": "GB_MACROTILE_MODE9",
1720   "type_ref": "GB_MACROTILE_MODE0"
1721  },
1722  {
1723   "chips": ["gfx8"],
1724   "map": {"at": 39352, "to": "mm"},
1725   "name": "GB_MACROTILE_MODE10",
1726   "type_ref": "GB_MACROTILE_MODE0"
1727  },
1728  {
1729   "chips": ["gfx8"],
1730   "map": {"at": 39356, "to": "mm"},
1731   "name": "GB_MACROTILE_MODE11",
1732   "type_ref": "GB_MACROTILE_MODE0"
1733  },
1734  {
1735   "chips": ["gfx8"],
1736   "map": {"at": 39360, "to": "mm"},
1737   "name": "GB_MACROTILE_MODE12",
1738   "type_ref": "GB_MACROTILE_MODE0"
1739  },
1740  {
1741   "chips": ["gfx8"],
1742   "map": {"at": 39364, "to": "mm"},
1743   "name": "GB_MACROTILE_MODE13",
1744   "type_ref": "GB_MACROTILE_MODE0"
1745  },
1746  {
1747   "chips": ["gfx8"],
1748   "map": {"at": 39368, "to": "mm"},
1749   "name": "GB_MACROTILE_MODE14",
1750   "type_ref": "GB_MACROTILE_MODE0"
1751  },
1752  {
1753   "chips": ["gfx8"],
1754   "map": {"at": 39372, "to": "mm"},
1755   "name": "GB_MACROTILE_MODE15",
1756   "type_ref": "GB_MACROTILE_MODE0"
1757  },
1758  {
1759   "chips": ["gfx8"],
1760   "map": {"at": 45056, "to": "mm"},
1761   "name": "SPI_SHADER_TBA_LO_PS"
1762  },
1763  {
1764   "chips": ["gfx8"],
1765   "map": {"at": 45060, "to": "mm"},
1766   "name": "SPI_SHADER_TBA_HI_PS",
1767   "type_ref": "SPI_SHADER_TBA_HI_PS"
1768  },
1769  {
1770   "chips": ["gfx8"],
1771   "map": {"at": 45064, "to": "mm"},
1772   "name": "SPI_SHADER_TMA_LO_PS"
1773  },
1774  {
1775   "chips": ["gfx8"],
1776   "map": {"at": 45068, "to": "mm"},
1777   "name": "SPI_SHADER_TMA_HI_PS",
1778   "type_ref": "SPI_SHADER_TBA_HI_PS"
1779  },
1780  {
1781   "chips": ["gfx8"],
1782   "map": {"at": 45084, "to": "mm"},
1783   "name": "SPI_SHADER_PGM_RSRC3_PS",
1784   "type_ref": "SPI_SHADER_PGM_RSRC3_PS"
1785  },
1786  {
1787   "chips": ["gfx8"],
1788   "map": {"at": 45088, "to": "mm"},
1789   "name": "SPI_SHADER_PGM_LO_PS"
1790  },
1791  {
1792   "chips": ["gfx8"],
1793   "map": {"at": 45092, "to": "mm"},
1794   "name": "SPI_SHADER_PGM_HI_PS",
1795   "type_ref": "SPI_SHADER_TBA_HI_PS"
1796  },
1797  {
1798   "chips": ["gfx8"],
1799   "map": {"at": 45096, "to": "mm"},
1800   "name": "SPI_SHADER_PGM_RSRC1_PS",
1801   "type_ref": "SPI_SHADER_PGM_RSRC1_PS"
1802  },
1803  {
1804   "chips": ["gfx8"],
1805   "map": {"at": 45100, "to": "mm"},
1806   "name": "SPI_SHADER_PGM_RSRC2_PS",
1807   "type_ref": "SPI_SHADER_PGM_RSRC2_PS"
1808  },
1809  {
1810   "chips": ["gfx8"],
1811   "map": {"at": 45104, "to": "mm"},
1812   "name": "SPI_SHADER_USER_DATA_PS_0"
1813  },
1814  {
1815   "chips": ["gfx8"],
1816   "map": {"at": 45108, "to": "mm"},
1817   "name": "SPI_SHADER_USER_DATA_PS_1"
1818  },
1819  {
1820   "chips": ["gfx8"],
1821   "map": {"at": 45112, "to": "mm"},
1822   "name": "SPI_SHADER_USER_DATA_PS_2"
1823  },
1824  {
1825   "chips": ["gfx8"],
1826   "map": {"at": 45116, "to": "mm"},
1827   "name": "SPI_SHADER_USER_DATA_PS_3"
1828  },
1829  {
1830   "chips": ["gfx8"],
1831   "map": {"at": 45120, "to": "mm"},
1832   "name": "SPI_SHADER_USER_DATA_PS_4"
1833  },
1834  {
1835   "chips": ["gfx8"],
1836   "map": {"at": 45124, "to": "mm"},
1837   "name": "SPI_SHADER_USER_DATA_PS_5"
1838  },
1839  {
1840   "chips": ["gfx8"],
1841   "map": {"at": 45128, "to": "mm"},
1842   "name": "SPI_SHADER_USER_DATA_PS_6"
1843  },
1844  {
1845   "chips": ["gfx8"],
1846   "map": {"at": 45132, "to": "mm"},
1847   "name": "SPI_SHADER_USER_DATA_PS_7"
1848  },
1849  {
1850   "chips": ["gfx8"],
1851   "map": {"at": 45136, "to": "mm"},
1852   "name": "SPI_SHADER_USER_DATA_PS_8"
1853  },
1854  {
1855   "chips": ["gfx8"],
1856   "map": {"at": 45140, "to": "mm"},
1857   "name": "SPI_SHADER_USER_DATA_PS_9"
1858  },
1859  {
1860   "chips": ["gfx8"],
1861   "map": {"at": 45144, "to": "mm"},
1862   "name": "SPI_SHADER_USER_DATA_PS_10"
1863  },
1864  {
1865   "chips": ["gfx8"],
1866   "map": {"at": 45148, "to": "mm"},
1867   "name": "SPI_SHADER_USER_DATA_PS_11"
1868  },
1869  {
1870   "chips": ["gfx8"],
1871   "map": {"at": 45152, "to": "mm"},
1872   "name": "SPI_SHADER_USER_DATA_PS_12"
1873  },
1874  {
1875   "chips": ["gfx8"],
1876   "map": {"at": 45156, "to": "mm"},
1877   "name": "SPI_SHADER_USER_DATA_PS_13"
1878  },
1879  {
1880   "chips": ["gfx8"],
1881   "map": {"at": 45160, "to": "mm"},
1882   "name": "SPI_SHADER_USER_DATA_PS_14"
1883  },
1884  {
1885   "chips": ["gfx8"],
1886   "map": {"at": 45164, "to": "mm"},
1887   "name": "SPI_SHADER_USER_DATA_PS_15"
1888  },
1889  {
1890   "chips": ["gfx8"],
1891   "map": {"at": 45312, "to": "mm"},
1892   "name": "SPI_SHADER_TBA_LO_VS"
1893  },
1894  {
1895   "chips": ["gfx8"],
1896   "map": {"at": 45316, "to": "mm"},
1897   "name": "SPI_SHADER_TBA_HI_VS",
1898   "type_ref": "SPI_SHADER_TBA_HI_PS"
1899  },
1900  {
1901   "chips": ["gfx8"],
1902   "map": {"at": 45320, "to": "mm"},
1903   "name": "SPI_SHADER_TMA_LO_VS"
1904  },
1905  {
1906   "chips": ["gfx8"],
1907   "map": {"at": 45324, "to": "mm"},
1908   "name": "SPI_SHADER_TMA_HI_VS",
1909   "type_ref": "SPI_SHADER_TBA_HI_PS"
1910  },
1911  {
1912   "chips": ["gfx8"],
1913   "map": {"at": 45336, "to": "mm"},
1914   "name": "SPI_SHADER_PGM_RSRC3_VS",
1915   "type_ref": "SPI_SHADER_PGM_RSRC3_PS"
1916  },
1917  {
1918   "chips": ["gfx8"],
1919   "map": {"at": 45340, "to": "mm"},
1920   "name": "SPI_SHADER_LATE_ALLOC_VS",
1921   "type_ref": "SPI_SHADER_LATE_ALLOC_VS"
1922  },
1923  {
1924   "chips": ["gfx8"],
1925   "map": {"at": 45344, "to": "mm"},
1926   "name": "SPI_SHADER_PGM_LO_VS"
1927  },
1928  {
1929   "chips": ["gfx8"],
1930   "map": {"at": 45348, "to": "mm"},
1931   "name": "SPI_SHADER_PGM_HI_VS",
1932   "type_ref": "SPI_SHADER_TBA_HI_PS"
1933  },
1934  {
1935   "chips": ["gfx8"],
1936   "map": {"at": 45352, "to": "mm"},
1937   "name": "SPI_SHADER_PGM_RSRC1_VS",
1938   "type_ref": "SPI_SHADER_PGM_RSRC1_VS"
1939  },
1940  {
1941   "chips": ["gfx8"],
1942   "map": {"at": 45356, "to": "mm"},
1943   "name": "SPI_SHADER_PGM_RSRC2_VS",
1944   "type_ref": "SPI_SHADER_PGM_RSRC2_VS"
1945  },
1946  {
1947   "chips": ["gfx8"],
1948   "map": {"at": 45360, "to": "mm"},
1949   "name": "SPI_SHADER_USER_DATA_VS_0"
1950  },
1951  {
1952   "chips": ["gfx8"],
1953   "map": {"at": 45364, "to": "mm"},
1954   "name": "SPI_SHADER_USER_DATA_VS_1"
1955  },
1956  {
1957   "chips": ["gfx8"],
1958   "map": {"at": 45368, "to": "mm"},
1959   "name": "SPI_SHADER_USER_DATA_VS_2"
1960  },
1961  {
1962   "chips": ["gfx8"],
1963   "map": {"at": 45372, "to": "mm"},
1964   "name": "SPI_SHADER_USER_DATA_VS_3"
1965  },
1966  {
1967   "chips": ["gfx8"],
1968   "map": {"at": 45376, "to": "mm"},
1969   "name": "SPI_SHADER_USER_DATA_VS_4"
1970  },
1971  {
1972   "chips": ["gfx8"],
1973   "map": {"at": 45380, "to": "mm"},
1974   "name": "SPI_SHADER_USER_DATA_VS_5"
1975  },
1976  {
1977   "chips": ["gfx8"],
1978   "map": {"at": 45384, "to": "mm"},
1979   "name": "SPI_SHADER_USER_DATA_VS_6"
1980  },
1981  {
1982   "chips": ["gfx8"],
1983   "map": {"at": 45388, "to": "mm"},
1984   "name": "SPI_SHADER_USER_DATA_VS_7"
1985  },
1986  {
1987   "chips": ["gfx8"],
1988   "map": {"at": 45392, "to": "mm"},
1989   "name": "SPI_SHADER_USER_DATA_VS_8"
1990  },
1991  {
1992   "chips": ["gfx8"],
1993   "map": {"at": 45396, "to": "mm"},
1994   "name": "SPI_SHADER_USER_DATA_VS_9"
1995  },
1996  {
1997   "chips": ["gfx8"],
1998   "map": {"at": 45400, "to": "mm"},
1999   "name": "SPI_SHADER_USER_DATA_VS_10"
2000  },
2001  {
2002   "chips": ["gfx8"],
2003   "map": {"at": 45404, "to": "mm"},
2004   "name": "SPI_SHADER_USER_DATA_VS_11"
2005  },
2006  {
2007   "chips": ["gfx8"],
2008   "map": {"at": 45408, "to": "mm"},
2009   "name": "SPI_SHADER_USER_DATA_VS_12"
2010  },
2011  {
2012   "chips": ["gfx8"],
2013   "map": {"at": 45412, "to": "mm"},
2014   "name": "SPI_SHADER_USER_DATA_VS_13"
2015  },
2016  {
2017   "chips": ["gfx8"],
2018   "map": {"at": 45416, "to": "mm"},
2019   "name": "SPI_SHADER_USER_DATA_VS_14"
2020  },
2021  {
2022   "chips": ["gfx8"],
2023   "map": {"at": 45420, "to": "mm"},
2024   "name": "SPI_SHADER_USER_DATA_VS_15"
2025  },
2026  {
2027   "chips": ["gfx8"],
2028   "map": {"at": 45552, "to": "mm"},
2029   "name": "SPI_SHADER_PGM_RSRC2_ES_VS",
2030   "type_ref": "SPI_SHADER_PGM_RSRC2_ES_VS"
2031  },
2032  {
2033   "chips": ["gfx8"],
2034   "map": {"at": 45556, "to": "mm"},
2035   "name": "SPI_SHADER_PGM_RSRC2_LS_VS",
2036   "type_ref": "SPI_SHADER_PGM_RSRC2_LS_VS"
2037  },
2038  {
2039   "chips": ["gfx8"],
2040   "map": {"at": 45568, "to": "mm"},
2041   "name": "SPI_SHADER_TBA_LO_GS"
2042  },
2043  {
2044   "chips": ["gfx8"],
2045   "map": {"at": 45572, "to": "mm"},
2046   "name": "SPI_SHADER_TBA_HI_GS",
2047   "type_ref": "SPI_SHADER_TBA_HI_PS"
2048  },
2049  {
2050   "chips": ["gfx8"],
2051   "map": {"at": 45576, "to": "mm"},
2052   "name": "SPI_SHADER_TMA_LO_GS"
2053  },
2054  {
2055   "chips": ["gfx8"],
2056   "map": {"at": 45580, "to": "mm"},
2057   "name": "SPI_SHADER_TMA_HI_GS",
2058   "type_ref": "SPI_SHADER_TBA_HI_PS"
2059  },
2060  {
2061   "chips": ["gfx8"],
2062   "map": {"at": 45596, "to": "mm"},
2063   "name": "SPI_SHADER_PGM_RSRC3_GS",
2064   "type_ref": "SPI_SHADER_PGM_RSRC3_GS"
2065  },
2066  {
2067   "chips": ["gfx8"],
2068   "map": {"at": 45600, "to": "mm"},
2069   "name": "SPI_SHADER_PGM_LO_GS"
2070  },
2071  {
2072   "chips": ["gfx8"],
2073   "map": {"at": 45604, "to": "mm"},
2074   "name": "SPI_SHADER_PGM_HI_GS",
2075   "type_ref": "SPI_SHADER_TBA_HI_PS"
2076  },
2077  {
2078   "chips": ["gfx8"],
2079   "map": {"at": 45608, "to": "mm"},
2080   "name": "SPI_SHADER_PGM_RSRC1_GS",
2081   "type_ref": "SPI_SHADER_PGM_RSRC1_GS"
2082  },
2083  {
2084   "chips": ["gfx8"],
2085   "map": {"at": 45612, "to": "mm"},
2086   "name": "SPI_SHADER_PGM_RSRC2_GS",
2087   "type_ref": "SPI_SHADER_PGM_RSRC2_GS"
2088  },
2089  {
2090   "chips": ["gfx8"],
2091   "map": {"at": 45616, "to": "mm"},
2092   "name": "SPI_SHADER_USER_DATA_GS_0"
2093  },
2094  {
2095   "chips": ["gfx8"],
2096   "map": {"at": 45620, "to": "mm"},
2097   "name": "SPI_SHADER_USER_DATA_GS_1"
2098  },
2099  {
2100   "chips": ["gfx8"],
2101   "map": {"at": 45624, "to": "mm"},
2102   "name": "SPI_SHADER_USER_DATA_GS_2"
2103  },
2104  {
2105   "chips": ["gfx8"],
2106   "map": {"at": 45628, "to": "mm"},
2107   "name": "SPI_SHADER_USER_DATA_GS_3"
2108  },
2109  {
2110   "chips": ["gfx8"],
2111   "map": {"at": 45632, "to": "mm"},
2112   "name": "SPI_SHADER_USER_DATA_GS_4"
2113  },
2114  {
2115   "chips": ["gfx8"],
2116   "map": {"at": 45636, "to": "mm"},
2117   "name": "SPI_SHADER_USER_DATA_GS_5"
2118  },
2119  {
2120   "chips": ["gfx8"],
2121   "map": {"at": 45640, "to": "mm"},
2122   "name": "SPI_SHADER_USER_DATA_GS_6"
2123  },
2124  {
2125   "chips": ["gfx8"],
2126   "map": {"at": 45644, "to": "mm"},
2127   "name": "SPI_SHADER_USER_DATA_GS_7"
2128  },
2129  {
2130   "chips": ["gfx8"],
2131   "map": {"at": 45648, "to": "mm"},
2132   "name": "SPI_SHADER_USER_DATA_GS_8"
2133  },
2134  {
2135   "chips": ["gfx8"],
2136   "map": {"at": 45652, "to": "mm"},
2137   "name": "SPI_SHADER_USER_DATA_GS_9"
2138  },
2139  {
2140   "chips": ["gfx8"],
2141   "map": {"at": 45656, "to": "mm"},
2142   "name": "SPI_SHADER_USER_DATA_GS_10"
2143  },
2144  {
2145   "chips": ["gfx8"],
2146   "map": {"at": 45660, "to": "mm"},
2147   "name": "SPI_SHADER_USER_DATA_GS_11"
2148  },
2149  {
2150   "chips": ["gfx8"],
2151   "map": {"at": 45664, "to": "mm"},
2152   "name": "SPI_SHADER_USER_DATA_GS_12"
2153  },
2154  {
2155   "chips": ["gfx8"],
2156   "map": {"at": 45668, "to": "mm"},
2157   "name": "SPI_SHADER_USER_DATA_GS_13"
2158  },
2159  {
2160   "chips": ["gfx8"],
2161   "map": {"at": 45672, "to": "mm"},
2162   "name": "SPI_SHADER_USER_DATA_GS_14"
2163  },
2164  {
2165   "chips": ["gfx8"],
2166   "map": {"at": 45676, "to": "mm"},
2167   "name": "SPI_SHADER_USER_DATA_GS_15"
2168  },
2169  {
2170   "chips": ["gfx8"],
2171   "map": {"at": 45808, "to": "mm"},
2172   "name": "SPI_SHADER_PGM_RSRC2_ES_GS",
2173   "type_ref": "SPI_SHADER_PGM_RSRC2_ES_VS"
2174  },
2175  {
2176   "chips": ["gfx8"],
2177   "map": {"at": 45824, "to": "mm"},
2178   "name": "SPI_SHADER_TBA_LO_ES"
2179  },
2180  {
2181   "chips": ["gfx8"],
2182   "map": {"at": 45828, "to": "mm"},
2183   "name": "SPI_SHADER_TBA_HI_ES",
2184   "type_ref": "SPI_SHADER_TBA_HI_PS"
2185  },
2186  {
2187   "chips": ["gfx8"],
2188   "map": {"at": 45832, "to": "mm"},
2189   "name": "SPI_SHADER_TMA_LO_ES"
2190  },
2191  {
2192   "chips": ["gfx8"],
2193   "map": {"at": 45836, "to": "mm"},
2194   "name": "SPI_SHADER_TMA_HI_ES",
2195   "type_ref": "SPI_SHADER_TBA_HI_PS"
2196  },
2197  {
2198   "chips": ["gfx8"],
2199   "map": {"at": 45852, "to": "mm"},
2200   "name": "SPI_SHADER_PGM_RSRC3_ES",
2201   "type_ref": "SPI_SHADER_PGM_RSRC3_GS"
2202  },
2203  {
2204   "chips": ["gfx8"],
2205   "map": {"at": 45856, "to": "mm"},
2206   "name": "SPI_SHADER_PGM_LO_ES"
2207  },
2208  {
2209   "chips": ["gfx8"],
2210   "map": {"at": 45860, "to": "mm"},
2211   "name": "SPI_SHADER_PGM_HI_ES",
2212   "type_ref": "SPI_SHADER_TBA_HI_PS"
2213  },
2214  {
2215   "chips": ["gfx8"],
2216   "map": {"at": 45864, "to": "mm"},
2217   "name": "SPI_SHADER_PGM_RSRC1_ES",
2218   "type_ref": "SPI_SHADER_PGM_RSRC1_VS"
2219  },
2220  {
2221   "chips": ["gfx8"],
2222   "map": {"at": 45868, "to": "mm"},
2223   "name": "SPI_SHADER_PGM_RSRC2_ES",
2224   "type_ref": "SPI_SHADER_PGM_RSRC2_ES_VS"
2225  },
2226  {
2227   "chips": ["gfx8"],
2228   "map": {"at": 45872, "to": "mm"},
2229   "name": "SPI_SHADER_USER_DATA_ES_0"
2230  },
2231  {
2232   "chips": ["gfx8"],
2233   "map": {"at": 45876, "to": "mm"},
2234   "name": "SPI_SHADER_USER_DATA_ES_1"
2235  },
2236  {
2237   "chips": ["gfx8"],
2238   "map": {"at": 45880, "to": "mm"},
2239   "name": "SPI_SHADER_USER_DATA_ES_2"
2240  },
2241  {
2242   "chips": ["gfx8"],
2243   "map": {"at": 45884, "to": "mm"},
2244   "name": "SPI_SHADER_USER_DATA_ES_3"
2245  },
2246  {
2247   "chips": ["gfx8"],
2248   "map": {"at": 45888, "to": "mm"},
2249   "name": "SPI_SHADER_USER_DATA_ES_4"
2250  },
2251  {
2252   "chips": ["gfx8"],
2253   "map": {"at": 45892, "to": "mm"},
2254   "name": "SPI_SHADER_USER_DATA_ES_5"
2255  },
2256  {
2257   "chips": ["gfx8"],
2258   "map": {"at": 45896, "to": "mm"},
2259   "name": "SPI_SHADER_USER_DATA_ES_6"
2260  },
2261  {
2262   "chips": ["gfx8"],
2263   "map": {"at": 45900, "to": "mm"},
2264   "name": "SPI_SHADER_USER_DATA_ES_7"
2265  },
2266  {
2267   "chips": ["gfx8"],
2268   "map": {"at": 45904, "to": "mm"},
2269   "name": "SPI_SHADER_USER_DATA_ES_8"
2270  },
2271  {
2272   "chips": ["gfx8"],
2273   "map": {"at": 45908, "to": "mm"},
2274   "name": "SPI_SHADER_USER_DATA_ES_9"
2275  },
2276  {
2277   "chips": ["gfx8"],
2278   "map": {"at": 45912, "to": "mm"},
2279   "name": "SPI_SHADER_USER_DATA_ES_10"
2280  },
2281  {
2282   "chips": ["gfx8"],
2283   "map": {"at": 45916, "to": "mm"},
2284   "name": "SPI_SHADER_USER_DATA_ES_11"
2285  },
2286  {
2287   "chips": ["gfx8"],
2288   "map": {"at": 45920, "to": "mm"},
2289   "name": "SPI_SHADER_USER_DATA_ES_12"
2290  },
2291  {
2292   "chips": ["gfx8"],
2293   "map": {"at": 45924, "to": "mm"},
2294   "name": "SPI_SHADER_USER_DATA_ES_13"
2295  },
2296  {
2297   "chips": ["gfx8"],
2298   "map": {"at": 45928, "to": "mm"},
2299   "name": "SPI_SHADER_USER_DATA_ES_14"
2300  },
2301  {
2302   "chips": ["gfx8"],
2303   "map": {"at": 45932, "to": "mm"},
2304   "name": "SPI_SHADER_USER_DATA_ES_15"
2305  },
2306  {
2307   "chips": ["gfx8"],
2308   "map": {"at": 46068, "to": "mm"},
2309   "name": "SPI_SHADER_PGM_RSRC2_LS_ES",
2310   "type_ref": "SPI_SHADER_PGM_RSRC2_LS_VS"
2311  },
2312  {
2313   "chips": ["gfx8"],
2314   "map": {"at": 46080, "to": "mm"},
2315   "name": "SPI_SHADER_TBA_LO_HS"
2316  },
2317  {
2318   "chips": ["gfx8"],
2319   "map": {"at": 46084, "to": "mm"},
2320   "name": "SPI_SHADER_TBA_HI_HS",
2321   "type_ref": "SPI_SHADER_TBA_HI_PS"
2322  },
2323  {
2324   "chips": ["gfx8"],
2325   "map": {"at": 46088, "to": "mm"},
2326   "name": "SPI_SHADER_TMA_LO_HS"
2327  },
2328  {
2329   "chips": ["gfx8"],
2330   "map": {"at": 46092, "to": "mm"},
2331   "name": "SPI_SHADER_TMA_HI_HS",
2332   "type_ref": "SPI_SHADER_TBA_HI_PS"
2333  },
2334  {
2335   "chips": ["gfx8"],
2336   "map": {"at": 46108, "to": "mm"},
2337   "name": "SPI_SHADER_PGM_RSRC3_HS",
2338   "type_ref": "SPI_SHADER_PGM_RSRC3_HS"
2339  },
2340  {
2341   "chips": ["gfx8"],
2342   "map": {"at": 46112, "to": "mm"},
2343   "name": "SPI_SHADER_PGM_LO_HS"
2344  },
2345  {
2346   "chips": ["gfx8"],
2347   "map": {"at": 46116, "to": "mm"},
2348   "name": "SPI_SHADER_PGM_HI_HS",
2349   "type_ref": "SPI_SHADER_TBA_HI_PS"
2350  },
2351  {
2352   "chips": ["gfx8"],
2353   "map": {"at": 46120, "to": "mm"},
2354   "name": "SPI_SHADER_PGM_RSRC1_HS",
2355   "type_ref": "SPI_SHADER_PGM_RSRC1_HS"
2356  },
2357  {
2358   "chips": ["gfx8"],
2359   "map": {"at": 46124, "to": "mm"},
2360   "name": "SPI_SHADER_PGM_RSRC2_HS",
2361   "type_ref": "SPI_SHADER_PGM_RSRC2_HS"
2362  },
2363  {
2364   "chips": ["gfx8"],
2365   "map": {"at": 46128, "to": "mm"},
2366   "name": "SPI_SHADER_USER_DATA_HS_0"
2367  },
2368  {
2369   "chips": ["gfx8"],
2370   "map": {"at": 46132, "to": "mm"},
2371   "name": "SPI_SHADER_USER_DATA_HS_1"
2372  },
2373  {
2374   "chips": ["gfx8"],
2375   "map": {"at": 46136, "to": "mm"},
2376   "name": "SPI_SHADER_USER_DATA_HS_2"
2377  },
2378  {
2379   "chips": ["gfx8"],
2380   "map": {"at": 46140, "to": "mm"},
2381   "name": "SPI_SHADER_USER_DATA_HS_3"
2382  },
2383  {
2384   "chips": ["gfx8"],
2385   "map": {"at": 46144, "to": "mm"},
2386   "name": "SPI_SHADER_USER_DATA_HS_4"
2387  },
2388  {
2389   "chips": ["gfx8"],
2390   "map": {"at": 46148, "to": "mm"},
2391   "name": "SPI_SHADER_USER_DATA_HS_5"
2392  },
2393  {
2394   "chips": ["gfx8"],
2395   "map": {"at": 46152, "to": "mm"},
2396   "name": "SPI_SHADER_USER_DATA_HS_6"
2397  },
2398  {
2399   "chips": ["gfx8"],
2400   "map": {"at": 46156, "to": "mm"},
2401   "name": "SPI_SHADER_USER_DATA_HS_7"
2402  },
2403  {
2404   "chips": ["gfx8"],
2405   "map": {"at": 46160, "to": "mm"},
2406   "name": "SPI_SHADER_USER_DATA_HS_8"
2407  },
2408  {
2409   "chips": ["gfx8"],
2410   "map": {"at": 46164, "to": "mm"},
2411   "name": "SPI_SHADER_USER_DATA_HS_9"
2412  },
2413  {
2414   "chips": ["gfx8"],
2415   "map": {"at": 46168, "to": "mm"},
2416   "name": "SPI_SHADER_USER_DATA_HS_10"
2417  },
2418  {
2419   "chips": ["gfx8"],
2420   "map": {"at": 46172, "to": "mm"},
2421   "name": "SPI_SHADER_USER_DATA_HS_11"
2422  },
2423  {
2424   "chips": ["gfx8"],
2425   "map": {"at": 46176, "to": "mm"},
2426   "name": "SPI_SHADER_USER_DATA_HS_12"
2427  },
2428  {
2429   "chips": ["gfx8"],
2430   "map": {"at": 46180, "to": "mm"},
2431   "name": "SPI_SHADER_USER_DATA_HS_13"
2432  },
2433  {
2434   "chips": ["gfx8"],
2435   "map": {"at": 46184, "to": "mm"},
2436   "name": "SPI_SHADER_USER_DATA_HS_14"
2437  },
2438  {
2439   "chips": ["gfx8"],
2440   "map": {"at": 46188, "to": "mm"},
2441   "name": "SPI_SHADER_USER_DATA_HS_15"
2442  },
2443  {
2444   "chips": ["gfx8"],
2445   "map": {"at": 46324, "to": "mm"},
2446   "name": "SPI_SHADER_PGM_RSRC2_LS_HS",
2447   "type_ref": "SPI_SHADER_PGM_RSRC2_LS_VS"
2448  },
2449  {
2450   "chips": ["gfx8"],
2451   "map": {"at": 46336, "to": "mm"},
2452   "name": "SPI_SHADER_TBA_LO_LS"
2453  },
2454  {
2455   "chips": ["gfx8"],
2456   "map": {"at": 46340, "to": "mm"},
2457   "name": "SPI_SHADER_TBA_HI_LS",
2458   "type_ref": "SPI_SHADER_TBA_HI_PS"
2459  },
2460  {
2461   "chips": ["gfx8"],
2462   "map": {"at": 46344, "to": "mm"},
2463   "name": "SPI_SHADER_TMA_LO_LS"
2464  },
2465  {
2466   "chips": ["gfx8"],
2467   "map": {"at": 46348, "to": "mm"},
2468   "name": "SPI_SHADER_TMA_HI_LS",
2469   "type_ref": "SPI_SHADER_TBA_HI_PS"
2470  },
2471  {
2472   "chips": ["gfx8"],
2473   "map": {"at": 46364, "to": "mm"},
2474   "name": "SPI_SHADER_PGM_RSRC3_LS",
2475   "type_ref": "SPI_SHADER_PGM_RSRC3_GS"
2476  },
2477  {
2478   "chips": ["gfx8"],
2479   "map": {"at": 46368, "to": "mm"},
2480   "name": "SPI_SHADER_PGM_LO_LS"
2481  },
2482  {
2483   "chips": ["gfx8"],
2484   "map": {"at": 46372, "to": "mm"},
2485   "name": "SPI_SHADER_PGM_HI_LS",
2486   "type_ref": "SPI_SHADER_TBA_HI_PS"
2487  },
2488  {
2489   "chips": ["gfx8"],
2490   "map": {"at": 46376, "to": "mm"},
2491   "name": "SPI_SHADER_PGM_RSRC1_LS",
2492   "type_ref": "SPI_SHADER_PGM_RSRC1_LS"
2493  },
2494  {
2495   "chips": ["gfx8"],
2496   "map": {"at": 46380, "to": "mm"},
2497   "name": "SPI_SHADER_PGM_RSRC2_LS",
2498   "type_ref": "SPI_SHADER_PGM_RSRC2_LS_VS"
2499  },
2500  {
2501   "chips": ["gfx8"],
2502   "map": {"at": 46384, "to": "mm"},
2503   "name": "SPI_SHADER_USER_DATA_LS_0"
2504  },
2505  {
2506   "chips": ["gfx8"],
2507   "map": {"at": 46388, "to": "mm"},
2508   "name": "SPI_SHADER_USER_DATA_LS_1"
2509  },
2510  {
2511   "chips": ["gfx8"],
2512   "map": {"at": 46392, "to": "mm"},
2513   "name": "SPI_SHADER_USER_DATA_LS_2"
2514  },
2515  {
2516   "chips": ["gfx8"],
2517   "map": {"at": 46396, "to": "mm"},
2518   "name": "SPI_SHADER_USER_DATA_LS_3"
2519  },
2520  {
2521   "chips": ["gfx8"],
2522   "map": {"at": 46400, "to": "mm"},
2523   "name": "SPI_SHADER_USER_DATA_LS_4"
2524  },
2525  {
2526   "chips": ["gfx8"],
2527   "map": {"at": 46404, "to": "mm"},
2528   "name": "SPI_SHADER_USER_DATA_LS_5"
2529  },
2530  {
2531   "chips": ["gfx8"],
2532   "map": {"at": 46408, "to": "mm"},
2533   "name": "SPI_SHADER_USER_DATA_LS_6"
2534  },
2535  {
2536   "chips": ["gfx8"],
2537   "map": {"at": 46412, "to": "mm"},
2538   "name": "SPI_SHADER_USER_DATA_LS_7"
2539  },
2540  {
2541   "chips": ["gfx8"],
2542   "map": {"at": 46416, "to": "mm"},
2543   "name": "SPI_SHADER_USER_DATA_LS_8"
2544  },
2545  {
2546   "chips": ["gfx8"],
2547   "map": {"at": 46420, "to": "mm"},
2548   "name": "SPI_SHADER_USER_DATA_LS_9"
2549  },
2550  {
2551   "chips": ["gfx8"],
2552   "map": {"at": 46424, "to": "mm"},
2553   "name": "SPI_SHADER_USER_DATA_LS_10"
2554  },
2555  {
2556   "chips": ["gfx8"],
2557   "map": {"at": 46428, "to": "mm"},
2558   "name": "SPI_SHADER_USER_DATA_LS_11"
2559  },
2560  {
2561   "chips": ["gfx8"],
2562   "map": {"at": 46432, "to": "mm"},
2563   "name": "SPI_SHADER_USER_DATA_LS_12"
2564  },
2565  {
2566   "chips": ["gfx8"],
2567   "map": {"at": 46436, "to": "mm"},
2568   "name": "SPI_SHADER_USER_DATA_LS_13"
2569  },
2570  {
2571   "chips": ["gfx8"],
2572   "map": {"at": 46440, "to": "mm"},
2573   "name": "SPI_SHADER_USER_DATA_LS_14"
2574  },
2575  {
2576   "chips": ["gfx8"],
2577   "map": {"at": 46444, "to": "mm"},
2578   "name": "SPI_SHADER_USER_DATA_LS_15"
2579  },
2580  {
2581   "chips": ["gfx8"],
2582   "map": {"at": 47104, "to": "mm"},
2583   "name": "COMPUTE_DISPATCH_INITIATOR",
2584   "type_ref": "COMPUTE_DISPATCH_INITIATOR"
2585  },
2586  {
2587   "chips": ["gfx8"],
2588   "map": {"at": 47108, "to": "mm"},
2589   "name": "COMPUTE_DIM_X"
2590  },
2591  {
2592   "chips": ["gfx8"],
2593   "map": {"at": 47112, "to": "mm"},
2594   "name": "COMPUTE_DIM_Y"
2595  },
2596  {
2597   "chips": ["gfx8"],
2598   "map": {"at": 47116, "to": "mm"},
2599   "name": "COMPUTE_DIM_Z"
2600  },
2601  {
2602   "chips": ["gfx8"],
2603   "map": {"at": 47120, "to": "mm"},
2604   "name": "COMPUTE_START_X"
2605  },
2606  {
2607   "chips": ["gfx8"],
2608   "map": {"at": 47124, "to": "mm"},
2609   "name": "COMPUTE_START_Y"
2610  },
2611  {
2612   "chips": ["gfx8"],
2613   "map": {"at": 47128, "to": "mm"},
2614   "name": "COMPUTE_START_Z"
2615  },
2616  {
2617   "chips": ["gfx8"],
2618   "map": {"at": 47132, "to": "mm"},
2619   "name": "COMPUTE_NUM_THREAD_X",
2620   "type_ref": "COMPUTE_NUM_THREAD_X"
2621  },
2622  {
2623   "chips": ["gfx8"],
2624   "map": {"at": 47136, "to": "mm"},
2625   "name": "COMPUTE_NUM_THREAD_Y",
2626   "type_ref": "COMPUTE_NUM_THREAD_X"
2627  },
2628  {
2629   "chips": ["gfx8"],
2630   "map": {"at": 47140, "to": "mm"},
2631   "name": "COMPUTE_NUM_THREAD_Z",
2632   "type_ref": "COMPUTE_NUM_THREAD_X"
2633  },
2634  {
2635   "chips": ["gfx8"],
2636   "map": {"at": 47144, "to": "mm"},
2637   "name": "COMPUTE_PIPELINESTAT_ENABLE",
2638   "type_ref": "COMPUTE_PIPELINESTAT_ENABLE"
2639  },
2640  {
2641   "chips": ["gfx8"],
2642   "map": {"at": 47148, "to": "mm"},
2643   "name": "COMPUTE_PERFCOUNT_ENABLE",
2644   "type_ref": "COMPUTE_PERFCOUNT_ENABLE"
2645  },
2646  {
2647   "chips": ["gfx8"],
2648   "map": {"at": 47152, "to": "mm"},
2649   "name": "COMPUTE_PGM_LO"
2650  },
2651  {
2652   "chips": ["gfx8"],
2653   "map": {"at": 47156, "to": "mm"},
2654   "name": "COMPUTE_PGM_HI",
2655   "type_ref": "COMPUTE_PGM_HI"
2656  },
2657  {
2658   "chips": ["gfx8"],
2659   "map": {"at": 47160, "to": "mm"},
2660   "name": "COMPUTE_TBA_LO"
2661  },
2662  {
2663   "chips": ["gfx8"],
2664   "map": {"at": 47164, "to": "mm"},
2665   "name": "COMPUTE_TBA_HI",
2666   "type_ref": "COMPUTE_TBA_HI"
2667  },
2668  {
2669   "chips": ["gfx8"],
2670   "map": {"at": 47168, "to": "mm"},
2671   "name": "COMPUTE_TMA_LO"
2672  },
2673  {
2674   "chips": ["gfx8"],
2675   "map": {"at": 47172, "to": "mm"},
2676   "name": "COMPUTE_TMA_HI",
2677   "type_ref": "COMPUTE_TBA_HI"
2678  },
2679  {
2680   "chips": ["gfx8"],
2681   "map": {"at": 47176, "to": "mm"},
2682   "name": "COMPUTE_PGM_RSRC1",
2683   "type_ref": "COMPUTE_PGM_RSRC1"
2684  },
2685  {
2686   "chips": ["gfx8"],
2687   "map": {"at": 47180, "to": "mm"},
2688   "name": "COMPUTE_PGM_RSRC2",
2689   "type_ref": "COMPUTE_PGM_RSRC2"
2690  },
2691  {
2692   "chips": ["gfx8"],
2693   "map": {"at": 47184, "to": "mm"},
2694   "name": "COMPUTE_VMID",
2695   "type_ref": "COMPUTE_VMID"
2696  },
2697  {
2698   "chips": ["gfx8"],
2699   "map": {"at": 47188, "to": "mm"},
2700   "name": "COMPUTE_RESOURCE_LIMITS",
2701   "type_ref": "COMPUTE_RESOURCE_LIMITS"
2702  },
2703  {
2704   "chips": ["gfx8"],
2705   "map": {"at": 47192, "to": "mm"},
2706   "name": "COMPUTE_STATIC_THREAD_MGMT_SE0",
2707   "type_ref": "COMPUTE_STATIC_THREAD_MGMT_SE0"
2708  },
2709  {
2710   "chips": ["gfx8"],
2711   "map": {"at": 47196, "to": "mm"},
2712   "name": "COMPUTE_STATIC_THREAD_MGMT_SE1",
2713   "type_ref": "COMPUTE_STATIC_THREAD_MGMT_SE0"
2714  },
2715  {
2716   "chips": ["gfx8"],
2717   "map": {"at": 47200, "to": "mm"},
2718   "name": "COMPUTE_TMPRING_SIZE",
2719   "type_ref": "COMPUTE_TMPRING_SIZE"
2720  },
2721  {
2722   "chips": ["gfx8"],
2723   "map": {"at": 47204, "to": "mm"},
2724   "name": "COMPUTE_STATIC_THREAD_MGMT_SE2",
2725   "type_ref": "COMPUTE_STATIC_THREAD_MGMT_SE0"
2726  },
2727  {
2728   "chips": ["gfx8"],
2729   "map": {"at": 47208, "to": "mm"},
2730   "name": "COMPUTE_STATIC_THREAD_MGMT_SE3",
2731   "type_ref": "COMPUTE_STATIC_THREAD_MGMT_SE0"
2732  },
2733  {
2734   "chips": ["gfx8"],
2735   "map": {"at": 47212, "to": "mm"},
2736   "name": "COMPUTE_RESTART_X"
2737  },
2738  {
2739   "chips": ["gfx8"],
2740   "map": {"at": 47216, "to": "mm"},
2741   "name": "COMPUTE_RESTART_Y"
2742  },
2743  {
2744   "chips": ["gfx8"],
2745   "map": {"at": 47220, "to": "mm"},
2746   "name": "COMPUTE_RESTART_Z"
2747  },
2748  {
2749   "chips": ["gfx8"],
2750   "map": {"at": 47224, "to": "mm"},
2751   "name": "COMPUTE_THREAD_TRACE_ENABLE",
2752   "type_ref": "COMPUTE_THREAD_TRACE_ENABLE"
2753  },
2754  {
2755   "chips": ["gfx8"],
2756   "map": {"at": 47228, "to": "mm"},
2757   "name": "COMPUTE_MISC_RESERVED",
2758   "type_ref": "COMPUTE_MISC_RESERVED"
2759  },
2760  {
2761   "chips": ["gfx8"],
2762   "map": {"at": 47232, "to": "mm"},
2763   "name": "COMPUTE_DISPATCH_ID"
2764  },
2765  {
2766   "chips": ["gfx8"],
2767   "map": {"at": 47236, "to": "mm"},
2768   "name": "COMPUTE_THREADGROUP_ID"
2769  },
2770  {
2771   "chips": ["gfx8"],
2772   "map": {"at": 47240, "to": "mm"},
2773   "name": "COMPUTE_RELAUNCH",
2774   "type_ref": "COMPUTE_RELAUNCH"
2775  },
2776  {
2777   "chips": ["gfx8"],
2778   "map": {"at": 47244, "to": "mm"},
2779   "name": "COMPUTE_WAVE_RESTORE_ADDR_LO"
2780  },
2781  {
2782   "chips": ["gfx8"],
2783   "map": {"at": 47248, "to": "mm"},
2784   "name": "COMPUTE_WAVE_RESTORE_ADDR_HI",
2785   "type_ref": "COMPUTE_WAVE_RESTORE_ADDR_HI"
2786  },
2787  {
2788   "chips": ["gfx8"],
2789   "map": {"at": 47252, "to": "mm"},
2790   "name": "COMPUTE_WAVE_RESTORE_CONTROL",
2791   "type_ref": "COMPUTE_WAVE_RESTORE_CONTROL"
2792  },
2793  {
2794   "chips": ["gfx8"],
2795   "map": {"at": 47360, "to": "mm"},
2796   "name": "COMPUTE_USER_DATA_0"
2797  },
2798  {
2799   "chips": ["gfx8"],
2800   "map": {"at": 47364, "to": "mm"},
2801   "name": "COMPUTE_USER_DATA_1"
2802  },
2803  {
2804   "chips": ["gfx8"],
2805   "map": {"at": 47368, "to": "mm"},
2806   "name": "COMPUTE_USER_DATA_2"
2807  },
2808  {
2809   "chips": ["gfx8"],
2810   "map": {"at": 47372, "to": "mm"},
2811   "name": "COMPUTE_USER_DATA_3"
2812  },
2813  {
2814   "chips": ["gfx8"],
2815   "map": {"at": 47376, "to": "mm"},
2816   "name": "COMPUTE_USER_DATA_4"
2817  },
2818  {
2819   "chips": ["gfx8"],
2820   "map": {"at": 47380, "to": "mm"},
2821   "name": "COMPUTE_USER_DATA_5"
2822  },
2823  {
2824   "chips": ["gfx8"],
2825   "map": {"at": 47384, "to": "mm"},
2826   "name": "COMPUTE_USER_DATA_6"
2827  },
2828  {
2829   "chips": ["gfx8"],
2830   "map": {"at": 47388, "to": "mm"},
2831   "name": "COMPUTE_USER_DATA_7"
2832  },
2833  {
2834   "chips": ["gfx8"],
2835   "map": {"at": 47392, "to": "mm"},
2836   "name": "COMPUTE_USER_DATA_8"
2837  },
2838  {
2839   "chips": ["gfx8"],
2840   "map": {"at": 47396, "to": "mm"},
2841   "name": "COMPUTE_USER_DATA_9"
2842  },
2843  {
2844   "chips": ["gfx8"],
2845   "map": {"at": 47400, "to": "mm"},
2846   "name": "COMPUTE_USER_DATA_10"
2847  },
2848  {
2849   "chips": ["gfx8"],
2850   "map": {"at": 47404, "to": "mm"},
2851   "name": "COMPUTE_USER_DATA_11"
2852  },
2853  {
2854   "chips": ["gfx8"],
2855   "map": {"at": 47408, "to": "mm"},
2856   "name": "COMPUTE_USER_DATA_12"
2857  },
2858  {
2859   "chips": ["gfx8"],
2860   "map": {"at": 47412, "to": "mm"},
2861   "name": "COMPUTE_USER_DATA_13"
2862  },
2863  {
2864   "chips": ["gfx8"],
2865   "map": {"at": 47416, "to": "mm"},
2866   "name": "COMPUTE_USER_DATA_14"
2867  },
2868  {
2869   "chips": ["gfx8"],
2870   "map": {"at": 47420, "to": "mm"},
2871   "name": "COMPUTE_USER_DATA_15"
2872  },
2873  {
2874   "chips": ["gfx8"],
2875   "map": {"at": 47612, "to": "mm"},
2876   "name": "COMPUTE_NOWHERE"
2877  },
2878  {
2879   "chips": ["gfx8"],
2880   "map": {"at": 163840, "to": "mm"},
2881   "name": "DB_RENDER_CONTROL",
2882   "type_ref": "DB_RENDER_CONTROL"
2883  },
2884  {
2885   "chips": ["gfx8"],
2886   "map": {"at": 163844, "to": "mm"},
2887   "name": "DB_COUNT_CONTROL",
2888   "type_ref": "DB_COUNT_CONTROL"
2889  },
2890  {
2891   "chips": ["gfx8"],
2892   "map": {"at": 163848, "to": "mm"},
2893   "name": "DB_DEPTH_VIEW",
2894   "type_ref": "DB_DEPTH_VIEW"
2895  },
2896  {
2897   "chips": ["gfx8"],
2898   "map": {"at": 163852, "to": "mm"},
2899   "name": "DB_RENDER_OVERRIDE",
2900   "type_ref": "DB_RENDER_OVERRIDE"
2901  },
2902  {
2903   "chips": ["gfx8"],
2904   "map": {"at": 163856, "to": "mm"},
2905   "name": "DB_RENDER_OVERRIDE2",
2906   "type_ref": "DB_RENDER_OVERRIDE2"
2907  },
2908  {
2909   "chips": ["gfx8"],
2910   "map": {"at": 163860, "to": "mm"},
2911   "name": "DB_HTILE_DATA_BASE"
2912  },
2913  {
2914   "chips": ["gfx8"],
2915   "map": {"at": 163872, "to": "mm"},
2916   "name": "DB_DEPTH_BOUNDS_MIN"
2917  },
2918  {
2919   "chips": ["gfx8"],
2920   "map": {"at": 163876, "to": "mm"},
2921   "name": "DB_DEPTH_BOUNDS_MAX"
2922  },
2923  {
2924   "chips": ["gfx8"],
2925   "map": {"at": 163880, "to": "mm"},
2926   "name": "DB_STENCIL_CLEAR",
2927   "type_ref": "DB_STENCIL_CLEAR"
2928  },
2929  {
2930   "chips": ["gfx8"],
2931   "map": {"at": 163884, "to": "mm"},
2932   "name": "DB_DEPTH_CLEAR"
2933  },
2934  {
2935   "chips": ["gfx8"],
2936   "map": {"at": 163888, "to": "mm"},
2937   "name": "PA_SC_SCREEN_SCISSOR_TL",
2938   "type_ref": "PA_SC_SCREEN_SCISSOR_TL"
2939  },
2940  {
2941   "chips": ["gfx8"],
2942   "map": {"at": 163892, "to": "mm"},
2943   "name": "PA_SC_SCREEN_SCISSOR_BR",
2944   "type_ref": "PA_SC_SCREEN_SCISSOR_BR"
2945  },
2946  {
2947   "chips": ["gfx8"],
2948   "map": {"at": 163900, "to": "mm"},
2949   "name": "DB_DEPTH_INFO",
2950   "type_ref": "DB_DEPTH_INFO"
2951  },
2952  {
2953   "chips": ["gfx8"],
2954   "map": {"at": 163904, "to": "mm"},
2955   "name": "DB_Z_INFO",
2956   "type_ref": "DB_Z_INFO"
2957  },
2958  {
2959   "chips": ["gfx8"],
2960   "map": {"at": 163908, "to": "mm"},
2961   "name": "DB_STENCIL_INFO",
2962   "type_ref": "DB_STENCIL_INFO"
2963  },
2964  {
2965   "chips": ["gfx8"],
2966   "map": {"at": 163912, "to": "mm"},
2967   "name": "DB_Z_READ_BASE"
2968  },
2969  {
2970   "chips": ["gfx8"],
2971   "map": {"at": 163916, "to": "mm"},
2972   "name": "DB_STENCIL_READ_BASE"
2973  },
2974  {
2975   "chips": ["gfx8"],
2976   "map": {"at": 163920, "to": "mm"},
2977   "name": "DB_Z_WRITE_BASE"
2978  },
2979  {
2980   "chips": ["gfx8"],
2981   "map": {"at": 163924, "to": "mm"},
2982   "name": "DB_STENCIL_WRITE_BASE"
2983  },
2984  {
2985   "chips": ["gfx8"],
2986   "map": {"at": 163928, "to": "mm"},
2987   "name": "DB_DEPTH_SIZE",
2988   "type_ref": "DB_DEPTH_SIZE"
2989  },
2990  {
2991   "chips": ["gfx8"],
2992   "map": {"at": 163932, "to": "mm"},
2993   "name": "DB_DEPTH_SLICE",
2994   "type_ref": "DB_DEPTH_SLICE"
2995  },
2996  {
2997   "chips": ["gfx8"],
2998   "map": {"at": 163968, "to": "mm"},
2999   "name": "TA_BC_BASE_ADDR"
3000  },
3001  {
3002   "chips": ["gfx8"],
3003   "map": {"at": 163972, "to": "mm"},
3004   "name": "TA_BC_BASE_ADDR_HI",
3005   "type_ref": "TA_BC_BASE_ADDR_HI"
3006  },
3007  {
3008   "chips": ["gfx8"],
3009   "map": {"at": 164328, "to": "mm"},
3010   "name": "COHER_DEST_BASE_HI_0"
3011  },
3012  {
3013   "chips": ["gfx8"],
3014   "map": {"at": 164332, "to": "mm"},
3015   "name": "COHER_DEST_BASE_HI_1"
3016  },
3017  {
3018   "chips": ["gfx8"],
3019   "map": {"at": 164336, "to": "mm"},
3020   "name": "COHER_DEST_BASE_HI_2"
3021  },
3022  {
3023   "chips": ["gfx8"],
3024   "map": {"at": 164340, "to": "mm"},
3025   "name": "COHER_DEST_BASE_HI_3"
3026  },
3027  {
3028   "chips": ["gfx8"],
3029   "map": {"at": 164344, "to": "mm"},
3030   "name": "COHER_DEST_BASE_2"
3031  },
3032  {
3033   "chips": ["gfx8"],
3034   "map": {"at": 164348, "to": "mm"},
3035   "name": "COHER_DEST_BASE_3"
3036  },
3037  {
3038   "chips": ["gfx8"],
3039   "map": {"at": 164352, "to": "mm"},
3040   "name": "PA_SC_WINDOW_OFFSET",
3041   "type_ref": "PA_SC_WINDOW_OFFSET"
3042  },
3043  {
3044   "chips": ["gfx8"],
3045   "map": {"at": 164356, "to": "mm"},
3046   "name": "PA_SC_WINDOW_SCISSOR_TL",
3047   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3048  },
3049  {
3050   "chips": ["gfx8"],
3051   "map": {"at": 164360, "to": "mm"},
3052   "name": "PA_SC_WINDOW_SCISSOR_BR",
3053   "type_ref": "PA_SC_CLIPRECT_0_BR"
3054  },
3055  {
3056   "chips": ["gfx8"],
3057   "map": {"at": 164364, "to": "mm"},
3058   "name": "PA_SC_CLIPRECT_RULE",
3059   "type_ref": "PA_SC_CLIPRECT_RULE"
3060  },
3061  {
3062   "chips": ["gfx8"],
3063   "map": {"at": 164368, "to": "mm"},
3064   "name": "PA_SC_CLIPRECT_0_TL",
3065   "type_ref": "PA_SC_CLIPRECT_0_TL"
3066  },
3067  {
3068   "chips": ["gfx8"],
3069   "map": {"at": 164372, "to": "mm"},
3070   "name": "PA_SC_CLIPRECT_0_BR",
3071   "type_ref": "PA_SC_CLIPRECT_0_BR"
3072  },
3073  {
3074   "chips": ["gfx8"],
3075   "map": {"at": 164376, "to": "mm"},
3076   "name": "PA_SC_CLIPRECT_1_TL",
3077   "type_ref": "PA_SC_CLIPRECT_0_TL"
3078  },
3079  {
3080   "chips": ["gfx8"],
3081   "map": {"at": 164380, "to": "mm"},
3082   "name": "PA_SC_CLIPRECT_1_BR",
3083   "type_ref": "PA_SC_CLIPRECT_0_BR"
3084  },
3085  {
3086   "chips": ["gfx8"],
3087   "map": {"at": 164384, "to": "mm"},
3088   "name": "PA_SC_CLIPRECT_2_TL",
3089   "type_ref": "PA_SC_CLIPRECT_0_TL"
3090  },
3091  {
3092   "chips": ["gfx8"],
3093   "map": {"at": 164388, "to": "mm"},
3094   "name": "PA_SC_CLIPRECT_2_BR",
3095   "type_ref": "PA_SC_CLIPRECT_0_BR"
3096  },
3097  {
3098   "chips": ["gfx8"],
3099   "map": {"at": 164392, "to": "mm"},
3100   "name": "PA_SC_CLIPRECT_3_TL",
3101   "type_ref": "PA_SC_CLIPRECT_0_TL"
3102  },
3103  {
3104   "chips": ["gfx8"],
3105   "map": {"at": 164396, "to": "mm"},
3106   "name": "PA_SC_CLIPRECT_3_BR",
3107   "type_ref": "PA_SC_CLIPRECT_0_BR"
3108  },
3109  {
3110   "chips": ["gfx8"],
3111   "map": {"at": 164400, "to": "mm"},
3112   "name": "PA_SC_EDGERULE",
3113   "type_ref": "PA_SC_EDGERULE"
3114  },
3115  {
3116   "chips": ["gfx8"],
3117   "map": {"at": 164404, "to": "mm"},
3118   "name": "PA_SU_HARDWARE_SCREEN_OFFSET",
3119   "type_ref": "PA_SU_HARDWARE_SCREEN_OFFSET"
3120  },
3121  {
3122   "chips": ["gfx8"],
3123   "map": {"at": 164408, "to": "mm"},
3124   "name": "CB_TARGET_MASK",
3125   "type_ref": "CB_TARGET_MASK"
3126  },
3127  {
3128   "chips": ["gfx8"],
3129   "map": {"at": 164412, "to": "mm"},
3130   "name": "CB_SHADER_MASK",
3131   "type_ref": "CB_SHADER_MASK"
3132  },
3133  {
3134   "chips": ["gfx8"],
3135   "map": {"at": 164416, "to": "mm"},
3136   "name": "PA_SC_GENERIC_SCISSOR_TL",
3137   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3138  },
3139  {
3140   "chips": ["gfx8"],
3141   "map": {"at": 164420, "to": "mm"},
3142   "name": "PA_SC_GENERIC_SCISSOR_BR",
3143   "type_ref": "PA_SC_CLIPRECT_0_BR"
3144  },
3145  {
3146   "chips": ["gfx8"],
3147   "map": {"at": 164424, "to": "mm"},
3148   "name": "COHER_DEST_BASE_0"
3149  },
3150  {
3151   "chips": ["gfx8"],
3152   "map": {"at": 164428, "to": "mm"},
3153   "name": "COHER_DEST_BASE_1"
3154  },
3155  {
3156   "chips": ["gfx8"],
3157   "map": {"at": 164432, "to": "mm"},
3158   "name": "PA_SC_VPORT_SCISSOR_0_TL",
3159   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3160  },
3161  {
3162   "chips": ["gfx8"],
3163   "map": {"at": 164436, "to": "mm"},
3164   "name": "PA_SC_VPORT_SCISSOR_0_BR",
3165   "type_ref": "PA_SC_CLIPRECT_0_BR"
3166  },
3167  {
3168   "chips": ["gfx8"],
3169   "map": {"at": 164440, "to": "mm"},
3170   "name": "PA_SC_VPORT_SCISSOR_1_TL",
3171   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3172  },
3173  {
3174   "chips": ["gfx8"],
3175   "map": {"at": 164444, "to": "mm"},
3176   "name": "PA_SC_VPORT_SCISSOR_1_BR",
3177   "type_ref": "PA_SC_CLIPRECT_0_BR"
3178  },
3179  {
3180   "chips": ["gfx8"],
3181   "map": {"at": 164448, "to": "mm"},
3182   "name": "PA_SC_VPORT_SCISSOR_2_TL",
3183   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3184  },
3185  {
3186   "chips": ["gfx8"],
3187   "map": {"at": 164452, "to": "mm"},
3188   "name": "PA_SC_VPORT_SCISSOR_2_BR",
3189   "type_ref": "PA_SC_CLIPRECT_0_BR"
3190  },
3191  {
3192   "chips": ["gfx8"],
3193   "map": {"at": 164456, "to": "mm"},
3194   "name": "PA_SC_VPORT_SCISSOR_3_TL",
3195   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3196  },
3197  {
3198   "chips": ["gfx8"],
3199   "map": {"at": 164460, "to": "mm"},
3200   "name": "PA_SC_VPORT_SCISSOR_3_BR",
3201   "type_ref": "PA_SC_CLIPRECT_0_BR"
3202  },
3203  {
3204   "chips": ["gfx8"],
3205   "map": {"at": 164464, "to": "mm"},
3206   "name": "PA_SC_VPORT_SCISSOR_4_TL",
3207   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3208  },
3209  {
3210   "chips": ["gfx8"],
3211   "map": {"at": 164468, "to": "mm"},
3212   "name": "PA_SC_VPORT_SCISSOR_4_BR",
3213   "type_ref": "PA_SC_CLIPRECT_0_BR"
3214  },
3215  {
3216   "chips": ["gfx8"],
3217   "map": {"at": 164472, "to": "mm"},
3218   "name": "PA_SC_VPORT_SCISSOR_5_TL",
3219   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3220  },
3221  {
3222   "chips": ["gfx8"],
3223   "map": {"at": 164476, "to": "mm"},
3224   "name": "PA_SC_VPORT_SCISSOR_5_BR",
3225   "type_ref": "PA_SC_CLIPRECT_0_BR"
3226  },
3227  {
3228   "chips": ["gfx8"],
3229   "map": {"at": 164480, "to": "mm"},
3230   "name": "PA_SC_VPORT_SCISSOR_6_TL",
3231   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3232  },
3233  {
3234   "chips": ["gfx8"],
3235   "map": {"at": 164484, "to": "mm"},
3236   "name": "PA_SC_VPORT_SCISSOR_6_BR",
3237   "type_ref": "PA_SC_CLIPRECT_0_BR"
3238  },
3239  {
3240   "chips": ["gfx8"],
3241   "map": {"at": 164488, "to": "mm"},
3242   "name": "PA_SC_VPORT_SCISSOR_7_TL",
3243   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3244  },
3245  {
3246   "chips": ["gfx8"],
3247   "map": {"at": 164492, "to": "mm"},
3248   "name": "PA_SC_VPORT_SCISSOR_7_BR",
3249   "type_ref": "PA_SC_CLIPRECT_0_BR"
3250  },
3251  {
3252   "chips": ["gfx8"],
3253   "map": {"at": 164496, "to": "mm"},
3254   "name": "PA_SC_VPORT_SCISSOR_8_TL",
3255   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3256  },
3257  {
3258   "chips": ["gfx8"],
3259   "map": {"at": 164500, "to": "mm"},
3260   "name": "PA_SC_VPORT_SCISSOR_8_BR",
3261   "type_ref": "PA_SC_CLIPRECT_0_BR"
3262  },
3263  {
3264   "chips": ["gfx8"],
3265   "map": {"at": 164504, "to": "mm"},
3266   "name": "PA_SC_VPORT_SCISSOR_9_TL",
3267   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3268  },
3269  {
3270   "chips": ["gfx8"],
3271   "map": {"at": 164508, "to": "mm"},
3272   "name": "PA_SC_VPORT_SCISSOR_9_BR",
3273   "type_ref": "PA_SC_CLIPRECT_0_BR"
3274  },
3275  {
3276   "chips": ["gfx8"],
3277   "map": {"at": 164512, "to": "mm"},
3278   "name": "PA_SC_VPORT_SCISSOR_10_TL",
3279   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3280  },
3281  {
3282   "chips": ["gfx8"],
3283   "map": {"at": 164516, "to": "mm"},
3284   "name": "PA_SC_VPORT_SCISSOR_10_BR",
3285   "type_ref": "PA_SC_CLIPRECT_0_BR"
3286  },
3287  {
3288   "chips": ["gfx8"],
3289   "map": {"at": 164520, "to": "mm"},
3290   "name": "PA_SC_VPORT_SCISSOR_11_TL",
3291   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3292  },
3293  {
3294   "chips": ["gfx8"],
3295   "map": {"at": 164524, "to": "mm"},
3296   "name": "PA_SC_VPORT_SCISSOR_11_BR",
3297   "type_ref": "PA_SC_CLIPRECT_0_BR"
3298  },
3299  {
3300   "chips": ["gfx8"],
3301   "map": {"at": 164528, "to": "mm"},
3302   "name": "PA_SC_VPORT_SCISSOR_12_TL",
3303   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3304  },
3305  {
3306   "chips": ["gfx8"],
3307   "map": {"at": 164532, "to": "mm"},
3308   "name": "PA_SC_VPORT_SCISSOR_12_BR",
3309   "type_ref": "PA_SC_CLIPRECT_0_BR"
3310  },
3311  {
3312   "chips": ["gfx8"],
3313   "map": {"at": 164536, "to": "mm"},
3314   "name": "PA_SC_VPORT_SCISSOR_13_TL",
3315   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3316  },
3317  {
3318   "chips": ["gfx8"],
3319   "map": {"at": 164540, "to": "mm"},
3320   "name": "PA_SC_VPORT_SCISSOR_13_BR",
3321   "type_ref": "PA_SC_CLIPRECT_0_BR"
3322  },
3323  {
3324   "chips": ["gfx8"],
3325   "map": {"at": 164544, "to": "mm"},
3326   "name": "PA_SC_VPORT_SCISSOR_14_TL",
3327   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3328  },
3329  {
3330   "chips": ["gfx8"],
3331   "map": {"at": 164548, "to": "mm"},
3332   "name": "PA_SC_VPORT_SCISSOR_14_BR",
3333   "type_ref": "PA_SC_CLIPRECT_0_BR"
3334  },
3335  {
3336   "chips": ["gfx8"],
3337   "map": {"at": 164552, "to": "mm"},
3338   "name": "PA_SC_VPORT_SCISSOR_15_TL",
3339   "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3340  },
3341  {
3342   "chips": ["gfx8"],
3343   "map": {"at": 164556, "to": "mm"},
3344   "name": "PA_SC_VPORT_SCISSOR_15_BR",
3345   "type_ref": "PA_SC_CLIPRECT_0_BR"
3346  },
3347  {
3348   "chips": ["gfx8"],
3349   "map": {"at": 164560, "to": "mm"},
3350   "name": "PA_SC_VPORT_ZMIN_0"
3351  },
3352  {
3353   "chips": ["gfx8"],
3354   "map": {"at": 164564, "to": "mm"},
3355   "name": "PA_SC_VPORT_ZMAX_0"
3356  },
3357  {
3358   "chips": ["gfx8"],
3359   "map": {"at": 164568, "to": "mm"},
3360   "name": "PA_SC_VPORT_ZMIN_1"
3361  },
3362  {
3363   "chips": ["gfx8"],
3364   "map": {"at": 164572, "to": "mm"},
3365   "name": "PA_SC_VPORT_ZMAX_1"
3366  },
3367  {
3368   "chips": ["gfx8"],
3369   "map": {"at": 164576, "to": "mm"},
3370   "name": "PA_SC_VPORT_ZMIN_2"
3371  },
3372  {
3373   "chips": ["gfx8"],
3374   "map": {"at": 164580, "to": "mm"},
3375   "name": "PA_SC_VPORT_ZMAX_2"
3376  },
3377  {
3378   "chips": ["gfx8"],
3379   "map": {"at": 164584, "to": "mm"},
3380   "name": "PA_SC_VPORT_ZMIN_3"
3381  },
3382  {
3383   "chips": ["gfx8"],
3384   "map": {"at": 164588, "to": "mm"},
3385   "name": "PA_SC_VPORT_ZMAX_3"
3386  },
3387  {
3388   "chips": ["gfx8"],
3389   "map": {"at": 164592, "to": "mm"},
3390   "name": "PA_SC_VPORT_ZMIN_4"
3391  },
3392  {
3393   "chips": ["gfx8"],
3394   "map": {"at": 164596, "to": "mm"},
3395   "name": "PA_SC_VPORT_ZMAX_4"
3396  },
3397  {
3398   "chips": ["gfx8"],
3399   "map": {"at": 164600, "to": "mm"},
3400   "name": "PA_SC_VPORT_ZMIN_5"
3401  },
3402  {
3403   "chips": ["gfx8"],
3404   "map": {"at": 164604, "to": "mm"},
3405   "name": "PA_SC_VPORT_ZMAX_5"
3406  },
3407  {
3408   "chips": ["gfx8"],
3409   "map": {"at": 164608, "to": "mm"},
3410   "name": "PA_SC_VPORT_ZMIN_6"
3411  },
3412  {
3413   "chips": ["gfx8"],
3414   "map": {"at": 164612, "to": "mm"},
3415   "name": "PA_SC_VPORT_ZMAX_6"
3416  },
3417  {
3418   "chips": ["gfx8"],
3419   "map": {"at": 164616, "to": "mm"},
3420   "name": "PA_SC_VPORT_ZMIN_7"
3421  },
3422  {
3423   "chips": ["gfx8"],
3424   "map": {"at": 164620, "to": "mm"},
3425   "name": "PA_SC_VPORT_ZMAX_7"
3426  },
3427  {
3428   "chips": ["gfx8"],
3429   "map": {"at": 164624, "to": "mm"},
3430   "name": "PA_SC_VPORT_ZMIN_8"
3431  },
3432  {
3433   "chips": ["gfx8"],
3434   "map": {"at": 164628, "to": "mm"},
3435   "name": "PA_SC_VPORT_ZMAX_8"
3436  },
3437  {
3438   "chips": ["gfx8"],
3439   "map": {"at": 164632, "to": "mm"},
3440   "name": "PA_SC_VPORT_ZMIN_9"
3441  },
3442  {
3443   "chips": ["gfx8"],
3444   "map": {"at": 164636, "to": "mm"},
3445   "name": "PA_SC_VPORT_ZMAX_9"
3446  },
3447  {
3448   "chips": ["gfx8"],
3449   "map": {"at": 164640, "to": "mm"},
3450   "name": "PA_SC_VPORT_ZMIN_10"
3451  },
3452  {
3453   "chips": ["gfx8"],
3454   "map": {"at": 164644, "to": "mm"},
3455   "name": "PA_SC_VPORT_ZMAX_10"
3456  },
3457  {
3458   "chips": ["gfx8"],
3459   "map": {"at": 164648, "to": "mm"},
3460   "name": "PA_SC_VPORT_ZMIN_11"
3461  },
3462  {
3463   "chips": ["gfx8"],
3464   "map": {"at": 164652, "to": "mm"},
3465   "name": "PA_SC_VPORT_ZMAX_11"
3466  },
3467  {
3468   "chips": ["gfx8"],
3469   "map": {"at": 164656, "to": "mm"},
3470   "name": "PA_SC_VPORT_ZMIN_12"
3471  },
3472  {
3473   "chips": ["gfx8"],
3474   "map": {"at": 164660, "to": "mm"},
3475   "name": "PA_SC_VPORT_ZMAX_12"
3476  },
3477  {
3478   "chips": ["gfx8"],
3479   "map": {"at": 164664, "to": "mm"},
3480   "name": "PA_SC_VPORT_ZMIN_13"
3481  },
3482  {
3483   "chips": ["gfx8"],
3484   "map": {"at": 164668, "to": "mm"},
3485   "name": "PA_SC_VPORT_ZMAX_13"
3486  },
3487  {
3488   "chips": ["gfx8"],
3489   "map": {"at": 164672, "to": "mm"},
3490   "name": "PA_SC_VPORT_ZMIN_14"
3491  },
3492  {
3493   "chips": ["gfx8"],
3494   "map": {"at": 164676, "to": "mm"},
3495   "name": "PA_SC_VPORT_ZMAX_14"
3496  },
3497  {
3498   "chips": ["gfx8"],
3499   "map": {"at": 164680, "to": "mm"},
3500   "name": "PA_SC_VPORT_ZMIN_15"
3501  },
3502  {
3503   "chips": ["gfx8"],
3504   "map": {"at": 164684, "to": "mm"},
3505   "name": "PA_SC_VPORT_ZMAX_15"
3506  },
3507  {
3508   "chips": ["gfx8"],
3509   "map": {"at": 164688, "to": "mm"},
3510   "name": "PA_SC_RASTER_CONFIG",
3511   "type_ref": "PA_SC_RASTER_CONFIG"
3512  },
3513  {
3514   "chips": ["gfx8"],
3515   "map": {"at": 164692, "to": "mm"},
3516   "name": "PA_SC_RASTER_CONFIG_1",
3517   "type_ref": "PA_SC_RASTER_CONFIG_1"
3518  },
3519  {
3520   "chips": ["gfx8"],
3521   "map": {"at": 164696, "to": "mm"},
3522   "name": "PA_SC_SCREEN_EXTENT_CONTROL",
3523   "type_ref": "PA_SC_SCREEN_EXTENT_CONTROL"
3524  },
3525  {
3526   "chips": ["gfx8"],
3527   "map": {"at": 164704, "to": "mm"},
3528   "name": "CP_PERFMON_CNTX_CNTL",
3529   "type_ref": "CP_PERFMON_CNTX_CNTL"
3530  },
3531  {
3532   "chips": ["gfx8"],
3533   "map": {"at": 164708, "to": "mm"},
3534   "name": "CP_RINGID",
3535   "type_ref": "CP_RINGID"
3536  },
3537  {
3538   "chips": ["gfx8"],
3539   "map": {"at": 164712, "to": "mm"},
3540   "name": "CP_VMID",
3541   "type_ref": "CP_VMID"
3542  },
3543  {
3544   "chips": ["gfx8"],
3545   "map": {"at": 164864, "to": "mm"},
3546   "name": "VGT_MAX_VTX_INDX"
3547  },
3548  {
3549   "chips": ["gfx8"],
3550   "map": {"at": 164868, "to": "mm"},
3551   "name": "VGT_MIN_VTX_INDX"
3552  },
3553  {
3554   "chips": ["gfx8"],
3555   "map": {"at": 164872, "to": "mm"},
3556   "name": "VGT_INDX_OFFSET"
3557  },
3558  {
3559   "chips": ["gfx8"],
3560   "map": {"at": 164876, "to": "mm"},
3561   "name": "VGT_MULTI_PRIM_IB_RESET_INDX"
3562  },
3563  {
3564   "chips": ["gfx8"],
3565   "map": {"at": 164884, "to": "mm"},
3566   "name": "CB_BLEND_RED"
3567  },
3568  {
3569   "chips": ["gfx8"],
3570   "map": {"at": 164888, "to": "mm"},
3571   "name": "CB_BLEND_GREEN"
3572  },
3573  {
3574   "chips": ["gfx8"],
3575   "map": {"at": 164892, "to": "mm"},
3576   "name": "CB_BLEND_BLUE"
3577  },
3578  {
3579   "chips": ["gfx8"],
3580   "map": {"at": 164896, "to": "mm"},
3581   "name": "CB_BLEND_ALPHA"
3582  },
3583  {
3584   "chips": ["gfx8"],
3585   "map": {"at": 164900, "to": "mm"},
3586   "name": "CB_DCC_CONTROL",
3587   "type_ref": "CB_DCC_CONTROL"
3588  },
3589  {
3590   "chips": ["gfx8"],
3591   "map": {"at": 164908, "to": "mm"},
3592   "name": "DB_STENCIL_CONTROL",
3593   "type_ref": "DB_STENCIL_CONTROL"
3594  },
3595  {
3596   "chips": ["gfx8"],
3597   "map": {"at": 164912, "to": "mm"},
3598   "name": "DB_STENCILREFMASK",
3599   "type_ref": "DB_STENCILREFMASK"
3600  },
3601  {
3602   "chips": ["gfx8"],
3603   "map": {"at": 164916, "to": "mm"},
3604   "name": "DB_STENCILREFMASK_BF",
3605   "type_ref": "DB_STENCILREFMASK_BF"
3606  },
3607  {
3608   "chips": ["gfx8"],
3609   "map": {"at": 164924, "to": "mm"},
3610   "name": "PA_CL_VPORT_XSCALE"
3611  },
3612  {
3613   "chips": ["gfx8"],
3614   "map": {"at": 164928, "to": "mm"},
3615   "name": "PA_CL_VPORT_XOFFSET"
3616  },
3617  {
3618   "chips": ["gfx8"],
3619   "map": {"at": 164932, "to": "mm"},
3620   "name": "PA_CL_VPORT_YSCALE"
3621  },
3622  {
3623   "chips": ["gfx8"],
3624   "map": {"at": 164936, "to": "mm"},
3625   "name": "PA_CL_VPORT_YOFFSET"
3626  },
3627  {
3628   "chips": ["gfx8"],
3629   "map": {"at": 164940, "to": "mm"},
3630   "name": "PA_CL_VPORT_ZSCALE"
3631  },
3632  {
3633   "chips": ["gfx8"],
3634   "map": {"at": 164944, "to": "mm"},
3635   "name": "PA_CL_VPORT_ZOFFSET"
3636  },
3637  {
3638   "chips": ["gfx8"],
3639   "map": {"at": 164948, "to": "mm"},
3640   "name": "PA_CL_VPORT_XSCALE_1"
3641  },
3642  {
3643   "chips": ["gfx8"],
3644   "map": {"at": 164952, "to": "mm"},
3645   "name": "PA_CL_VPORT_XOFFSET_1"
3646  },
3647  {
3648   "chips": ["gfx8"],
3649   "map": {"at": 164956, "to": "mm"},
3650   "name": "PA_CL_VPORT_YSCALE_1"
3651  },
3652  {
3653   "chips": ["gfx8"],
3654   "map": {"at": 164960, "to": "mm"},
3655   "name": "PA_CL_VPORT_YOFFSET_1"
3656  },
3657  {
3658   "chips": ["gfx8"],
3659   "map": {"at": 164964, "to": "mm"},
3660   "name": "PA_CL_VPORT_ZSCALE_1"
3661  },
3662  {
3663   "chips": ["gfx8"],
3664   "map": {"at": 164968, "to": "mm"},
3665   "name": "PA_CL_VPORT_ZOFFSET_1"
3666  },
3667  {
3668   "chips": ["gfx8"],
3669   "map": {"at": 164972, "to": "mm"},
3670   "name": "PA_CL_VPORT_XSCALE_2"
3671  },
3672  {
3673   "chips": ["gfx8"],
3674   "map": {"at": 164976, "to": "mm"},
3675   "name": "PA_CL_VPORT_XOFFSET_2"
3676  },
3677  {
3678   "chips": ["gfx8"],
3679   "map": {"at": 164980, "to": "mm"},
3680   "name": "PA_CL_VPORT_YSCALE_2"
3681  },
3682  {
3683   "chips": ["gfx8"],
3684   "map": {"at": 164984, "to": "mm"},
3685   "name": "PA_CL_VPORT_YOFFSET_2"
3686  },
3687  {
3688   "chips": ["gfx8"],
3689   "map": {"at": 164988, "to": "mm"},
3690   "name": "PA_CL_VPORT_ZSCALE_2"
3691  },
3692  {
3693   "chips": ["gfx8"],
3694   "map": {"at": 164992, "to": "mm"},
3695   "name": "PA_CL_VPORT_ZOFFSET_2"
3696  },
3697  {
3698   "chips": ["gfx8"],
3699   "map": {"at": 164996, "to": "mm"},
3700   "name": "PA_CL_VPORT_XSCALE_3"
3701  },
3702  {
3703   "chips": ["gfx8"],
3704   "map": {"at": 165000, "to": "mm"},
3705   "name": "PA_CL_VPORT_XOFFSET_3"
3706  },
3707  {
3708   "chips": ["gfx8"],
3709   "map": {"at": 165004, "to": "mm"},
3710   "name": "PA_CL_VPORT_YSCALE_3"
3711  },
3712  {
3713   "chips": ["gfx8"],
3714   "map": {"at": 165008, "to": "mm"},
3715   "name": "PA_CL_VPORT_YOFFSET_3"
3716  },
3717  {
3718   "chips": ["gfx8"],
3719   "map": {"at": 165012, "to": "mm"},
3720   "name": "PA_CL_VPORT_ZSCALE_3"
3721  },
3722  {
3723   "chips": ["gfx8"],
3724   "map": {"at": 165016, "to": "mm"},
3725   "name": "PA_CL_VPORT_ZOFFSET_3"
3726  },
3727  {
3728   "chips": ["gfx8"],
3729   "map": {"at": 165020, "to": "mm"},
3730   "name": "PA_CL_VPORT_XSCALE_4"
3731  },
3732  {
3733   "chips": ["gfx8"],
3734   "map": {"at": 165024, "to": "mm"},
3735   "name": "PA_CL_VPORT_XOFFSET_4"
3736  },
3737  {
3738   "chips": ["gfx8"],
3739   "map": {"at": 165028, "to": "mm"},
3740   "name": "PA_CL_VPORT_YSCALE_4"
3741  },
3742  {
3743   "chips": ["gfx8"],
3744   "map": {"at": 165032, "to": "mm"},
3745   "name": "PA_CL_VPORT_YOFFSET_4"
3746  },
3747  {
3748   "chips": ["gfx8"],
3749   "map": {"at": 165036, "to": "mm"},
3750   "name": "PA_CL_VPORT_ZSCALE_4"
3751  },
3752  {
3753   "chips": ["gfx8"],
3754   "map": {"at": 165040, "to": "mm"},
3755   "name": "PA_CL_VPORT_ZOFFSET_4"
3756  },
3757  {
3758   "chips": ["gfx8"],
3759   "map": {"at": 165044, "to": "mm"},
3760   "name": "PA_CL_VPORT_XSCALE_5"
3761  },
3762  {
3763   "chips": ["gfx8"],
3764   "map": {"at": 165048, "to": "mm"},
3765   "name": "PA_CL_VPORT_XOFFSET_5"
3766  },
3767  {
3768   "chips": ["gfx8"],
3769   "map": {"at": 165052, "to": "mm"},
3770   "name": "PA_CL_VPORT_YSCALE_5"
3771  },
3772  {
3773   "chips": ["gfx8"],
3774   "map": {"at": 165056, "to": "mm"},
3775   "name": "PA_CL_VPORT_YOFFSET_5"
3776  },
3777  {
3778   "chips": ["gfx8"],
3779   "map": {"at": 165060, "to": "mm"},
3780   "name": "PA_CL_VPORT_ZSCALE_5"
3781  },
3782  {
3783   "chips": ["gfx8"],
3784   "map": {"at": 165064, "to": "mm"},
3785   "name": "PA_CL_VPORT_ZOFFSET_5"
3786  },
3787  {
3788   "chips": ["gfx8"],
3789   "map": {"at": 165068, "to": "mm"},
3790   "name": "PA_CL_VPORT_XSCALE_6"
3791  },
3792  {
3793   "chips": ["gfx8"],
3794   "map": {"at": 165072, "to": "mm"},
3795   "name": "PA_CL_VPORT_XOFFSET_6"
3796  },
3797  {
3798   "chips": ["gfx8"],
3799   "map": {"at": 165076, "to": "mm"},
3800   "name": "PA_CL_VPORT_YSCALE_6"
3801  },
3802  {
3803   "chips": ["gfx8"],
3804   "map": {"at": 165080, "to": "mm"},
3805   "name": "PA_CL_VPORT_YOFFSET_6"
3806  },
3807  {
3808   "chips": ["gfx8"],
3809   "map": {"at": 165084, "to": "mm"},
3810   "name": "PA_CL_VPORT_ZSCALE_6"
3811  },
3812  {
3813   "chips": ["gfx8"],
3814   "map": {"at": 165088, "to": "mm"},
3815   "name": "PA_CL_VPORT_ZOFFSET_6"
3816  },
3817  {
3818   "chips": ["gfx8"],
3819   "map": {"at": 165092, "to": "mm"},
3820   "name": "PA_CL_VPORT_XSCALE_7"
3821  },
3822  {
3823   "chips": ["gfx8"],
3824   "map": {"at": 165096, "to": "mm"},
3825   "name": "PA_CL_VPORT_XOFFSET_7"
3826  },
3827  {
3828   "chips": ["gfx8"],
3829   "map": {"at": 165100, "to": "mm"},
3830   "name": "PA_CL_VPORT_YSCALE_7"
3831  },
3832  {
3833   "chips": ["gfx8"],
3834   "map": {"at": 165104, "to": "mm"},
3835   "name": "PA_CL_VPORT_YOFFSET_7"
3836  },
3837  {
3838   "chips": ["gfx8"],
3839   "map": {"at": 165108, "to": "mm"},
3840   "name": "PA_CL_VPORT_ZSCALE_7"
3841  },
3842  {
3843   "chips": ["gfx8"],
3844   "map": {"at": 165112, "to": "mm"},
3845   "name": "PA_CL_VPORT_ZOFFSET_7"
3846  },
3847  {
3848   "chips": ["gfx8"],
3849   "map": {"at": 165116, "to": "mm"},
3850   "name": "PA_CL_VPORT_XSCALE_8"
3851  },
3852  {
3853   "chips": ["gfx8"],
3854   "map": {"at": 165120, "to": "mm"},
3855   "name": "PA_CL_VPORT_XOFFSET_8"
3856  },
3857  {
3858   "chips": ["gfx8"],
3859   "map": {"at": 165124, "to": "mm"},
3860   "name": "PA_CL_VPORT_YSCALE_8"
3861  },
3862  {
3863   "chips": ["gfx8"],
3864   "map": {"at": 165128, "to": "mm"},
3865   "name": "PA_CL_VPORT_YOFFSET_8"
3866  },
3867  {
3868   "chips": ["gfx8"],
3869   "map": {"at": 165132, "to": "mm"},
3870   "name": "PA_CL_VPORT_ZSCALE_8"
3871  },
3872  {
3873   "chips": ["gfx8"],
3874   "map": {"at": 165136, "to": "mm"},
3875   "name": "PA_CL_VPORT_ZOFFSET_8"
3876  },
3877  {
3878   "chips": ["gfx8"],
3879   "map": {"at": 165140, "to": "mm"},
3880   "name": "PA_CL_VPORT_XSCALE_9"
3881  },
3882  {
3883   "chips": ["gfx8"],
3884   "map": {"at": 165144, "to": "mm"},
3885   "name": "PA_CL_VPORT_XOFFSET_9"
3886  },
3887  {
3888   "chips": ["gfx8"],
3889   "map": {"at": 165148, "to": "mm"},
3890   "name": "PA_CL_VPORT_YSCALE_9"
3891  },
3892  {
3893   "chips": ["gfx8"],
3894   "map": {"at": 165152, "to": "mm"},
3895   "name": "PA_CL_VPORT_YOFFSET_9"
3896  },
3897  {
3898   "chips": ["gfx8"],
3899   "map": {"at": 165156, "to": "mm"},
3900   "name": "PA_CL_VPORT_ZSCALE_9"
3901  },
3902  {
3903   "chips": ["gfx8"],
3904   "map": {"at": 165160, "to": "mm"},
3905   "name": "PA_CL_VPORT_ZOFFSET_9"
3906  },
3907  {
3908   "chips": ["gfx8"],
3909   "map": {"at": 165164, "to": "mm"},
3910   "name": "PA_CL_VPORT_XSCALE_10"
3911  },
3912  {
3913   "chips": ["gfx8"],
3914   "map": {"at": 165168, "to": "mm"},
3915   "name": "PA_CL_VPORT_XOFFSET_10"
3916  },
3917  {
3918   "chips": ["gfx8"],
3919   "map": {"at": 165172, "to": "mm"},
3920   "name": "PA_CL_VPORT_YSCALE_10"
3921  },
3922  {
3923   "chips": ["gfx8"],
3924   "map": {"at": 165176, "to": "mm"},
3925   "name": "PA_CL_VPORT_YOFFSET_10"
3926  },
3927  {
3928   "chips": ["gfx8"],
3929   "map": {"at": 165180, "to": "mm"},
3930   "name": "PA_CL_VPORT_ZSCALE_10"
3931  },
3932  {
3933   "chips": ["gfx8"],
3934   "map": {"at": 165184, "to": "mm"},
3935   "name": "PA_CL_VPORT_ZOFFSET_10"
3936  },
3937  {
3938   "chips": ["gfx8"],
3939   "map": {"at": 165188, "to": "mm"},
3940   "name": "PA_CL_VPORT_XSCALE_11"
3941  },
3942  {
3943   "chips": ["gfx8"],
3944   "map": {"at": 165192, "to": "mm"},
3945   "name": "PA_CL_VPORT_XOFFSET_11"
3946  },
3947  {
3948   "chips": ["gfx8"],
3949   "map": {"at": 165196, "to": "mm"},
3950   "name": "PA_CL_VPORT_YSCALE_11"
3951  },
3952  {
3953   "chips": ["gfx8"],
3954   "map": {"at": 165200, "to": "mm"},
3955   "name": "PA_CL_VPORT_YOFFSET_11"
3956  },
3957  {
3958   "chips": ["gfx8"],
3959   "map": {"at": 165204, "to": "mm"},
3960   "name": "PA_CL_VPORT_ZSCALE_11"
3961  },
3962  {
3963   "chips": ["gfx8"],
3964   "map": {"at": 165208, "to": "mm"},
3965   "name": "PA_CL_VPORT_ZOFFSET_11"
3966  },
3967  {
3968   "chips": ["gfx8"],
3969   "map": {"at": 165212, "to": "mm"},
3970   "name": "PA_CL_VPORT_XSCALE_12"
3971  },
3972  {
3973   "chips": ["gfx8"],
3974   "map": {"at": 165216, "to": "mm"},
3975   "name": "PA_CL_VPORT_XOFFSET_12"
3976  },
3977  {
3978   "chips": ["gfx8"],
3979   "map": {"at": 165220, "to": "mm"},
3980   "name": "PA_CL_VPORT_YSCALE_12"
3981  },
3982  {
3983   "chips": ["gfx8"],
3984   "map": {"at": 165224, "to": "mm"},
3985   "name": "PA_CL_VPORT_YOFFSET_12"
3986  },
3987  {
3988   "chips": ["gfx8"],
3989   "map": {"at": 165228, "to": "mm"},
3990   "name": "PA_CL_VPORT_ZSCALE_12"
3991  },
3992  {
3993   "chips": ["gfx8"],
3994   "map": {"at": 165232, "to": "mm"},
3995   "name": "PA_CL_VPORT_ZOFFSET_12"
3996  },
3997  {
3998   "chips": ["gfx8"],
3999   "map": {"at": 165236, "to": "mm"},
4000   "name": "PA_CL_VPORT_XSCALE_13"
4001  },
4002  {
4003   "chips": ["gfx8"],
4004   "map": {"at": 165240, "to": "mm"},
4005   "name": "PA_CL_VPORT_XOFFSET_13"
4006  },
4007  {
4008   "chips": ["gfx8"],
4009   "map": {"at": 165244, "to": "mm"},
4010   "name": "PA_CL_VPORT_YSCALE_13"
4011  },
4012  {
4013   "chips": ["gfx8"],
4014   "map": {"at": 165248, "to": "mm"},
4015   "name": "PA_CL_VPORT_YOFFSET_13"
4016  },
4017  {
4018   "chips": ["gfx8"],
4019   "map": {"at": 165252, "to": "mm"},
4020   "name": "PA_CL_VPORT_ZSCALE_13"
4021  },
4022  {
4023   "chips": ["gfx8"],
4024   "map": {"at": 165256, "to": "mm"},
4025   "name": "PA_CL_VPORT_ZOFFSET_13"
4026  },
4027  {
4028   "chips": ["gfx8"],
4029   "map": {"at": 165260, "to": "mm"},
4030   "name": "PA_CL_VPORT_XSCALE_14"
4031  },
4032  {
4033   "chips": ["gfx8"],
4034   "map": {"at": 165264, "to": "mm"},
4035   "name": "PA_CL_VPORT_XOFFSET_14"
4036  },
4037  {
4038   "chips": ["gfx8"],
4039   "map": {"at": 165268, "to": "mm"},
4040   "name": "PA_CL_VPORT_YSCALE_14"
4041  },
4042  {
4043   "chips": ["gfx8"],
4044   "map": {"at": 165272, "to": "mm"},
4045   "name": "PA_CL_VPORT_YOFFSET_14"
4046  },
4047  {
4048   "chips": ["gfx8"],
4049   "map": {"at": 165276, "to": "mm"},
4050   "name": "PA_CL_VPORT_ZSCALE_14"
4051  },
4052  {
4053   "chips": ["gfx8"],
4054   "map": {"at": 165280, "to": "mm"},
4055   "name": "PA_CL_VPORT_ZOFFSET_14"
4056  },
4057  {
4058   "chips": ["gfx8"],
4059   "map": {"at": 165284, "to": "mm"},
4060   "name": "PA_CL_VPORT_XSCALE_15"
4061  },
4062  {
4063   "chips": ["gfx8"],
4064   "map": {"at": 165288, "to": "mm"},
4065   "name": "PA_CL_VPORT_XOFFSET_15"
4066  },
4067  {
4068   "chips": ["gfx8"],
4069   "map": {"at": 165292, "to": "mm"},
4070   "name": "PA_CL_VPORT_YSCALE_15"
4071  },
4072  {
4073   "chips": ["gfx8"],
4074   "map": {"at": 165296, "to": "mm"},
4075   "name": "PA_CL_VPORT_YOFFSET_15"
4076  },
4077  {
4078   "chips": ["gfx8"],
4079   "map": {"at": 165300, "to": "mm"},
4080   "name": "PA_CL_VPORT_ZSCALE_15"
4081  },
4082  {
4083   "chips": ["gfx8"],
4084   "map": {"at": 165304, "to": "mm"},
4085   "name": "PA_CL_VPORT_ZOFFSET_15"
4086  },
4087  {
4088   "chips": ["gfx8"],
4089   "map": {"at": 165308, "to": "mm"},
4090   "name": "PA_CL_UCP_0_X"
4091  },
4092  {
4093   "chips": ["gfx8"],
4094   "map": {"at": 165312, "to": "mm"},
4095   "name": "PA_CL_UCP_0_Y"
4096  },
4097  {
4098   "chips": ["gfx8"],
4099   "map": {"at": 165316, "to": "mm"},
4100   "name": "PA_CL_UCP_0_Z"
4101  },
4102  {
4103   "chips": ["gfx8"],
4104   "map": {"at": 165320, "to": "mm"},
4105   "name": "PA_CL_UCP_0_W"
4106  },
4107  {
4108   "chips": ["gfx8"],
4109   "map": {"at": 165324, "to": "mm"},
4110   "name": "PA_CL_UCP_1_X"
4111  },
4112  {
4113   "chips": ["gfx8"],
4114   "map": {"at": 165328, "to": "mm"},
4115   "name": "PA_CL_UCP_1_Y"
4116  },
4117  {
4118   "chips": ["gfx8"],
4119   "map": {"at": 165332, "to": "mm"},
4120   "name": "PA_CL_UCP_1_Z"
4121  },
4122  {
4123   "chips": ["gfx8"],
4124   "map": {"at": 165336, "to": "mm"},
4125   "name": "PA_CL_UCP_1_W"
4126  },
4127  {
4128   "chips": ["gfx8"],
4129   "map": {"at": 165340, "to": "mm"},
4130   "name": "PA_CL_UCP_2_X"
4131  },
4132  {
4133   "chips": ["gfx8"],
4134   "map": {"at": 165344, "to": "mm"},
4135   "name": "PA_CL_UCP_2_Y"
4136  },
4137  {
4138   "chips": ["gfx8"],
4139   "map": {"at": 165348, "to": "mm"},
4140   "name": "PA_CL_UCP_2_Z"
4141  },
4142  {
4143   "chips": ["gfx8"],
4144   "map": {"at": 165352, "to": "mm"},
4145   "name": "PA_CL_UCP_2_W"
4146  },
4147  {
4148   "chips": ["gfx8"],
4149   "map": {"at": 165356, "to": "mm"},
4150   "name": "PA_CL_UCP_3_X"
4151  },
4152  {
4153   "chips": ["gfx8"],
4154   "map": {"at": 165360, "to": "mm"},
4155   "name": "PA_CL_UCP_3_Y"
4156  },
4157  {
4158   "chips": ["gfx8"],
4159   "map": {"at": 165364, "to": "mm"},
4160   "name": "PA_CL_UCP_3_Z"
4161  },
4162  {
4163   "chips": ["gfx8"],
4164   "map": {"at": 165368, "to": "mm"},
4165   "name": "PA_CL_UCP_3_W"
4166  },
4167  {
4168   "chips": ["gfx8"],
4169   "map": {"at": 165372, "to": "mm"},
4170   "name": "PA_CL_UCP_4_X"
4171  },
4172  {
4173   "chips": ["gfx8"],
4174   "map": {"at": 165376, "to": "mm"},
4175   "name": "PA_CL_UCP_4_Y"
4176  },
4177  {
4178   "chips": ["gfx8"],
4179   "map": {"at": 165380, "to": "mm"},
4180   "name": "PA_CL_UCP_4_Z"
4181  },
4182  {
4183   "chips": ["gfx8"],
4184   "map": {"at": 165384, "to": "mm"},
4185   "name": "PA_CL_UCP_4_W"
4186  },
4187  {
4188   "chips": ["gfx8"],
4189   "map": {"at": 165388, "to": "mm"},
4190   "name": "PA_CL_UCP_5_X"
4191  },
4192  {
4193   "chips": ["gfx8"],
4194   "map": {"at": 165392, "to": "mm"},
4195   "name": "PA_CL_UCP_5_Y"
4196  },
4197  {
4198   "chips": ["gfx8"],
4199   "map": {"at": 165396, "to": "mm"},
4200   "name": "PA_CL_UCP_5_Z"
4201  },
4202  {
4203   "chips": ["gfx8"],
4204   "map": {"at": 165400, "to": "mm"},
4205   "name": "PA_CL_UCP_5_W"
4206  },
4207  {
4208   "chips": ["gfx8"],
4209   "map": {"at": 165444, "to": "mm"},
4210   "name": "SPI_PS_INPUT_CNTL_0",
4211   "type_ref": "SPI_PS_INPUT_CNTL_0"
4212  },
4213  {
4214   "chips": ["gfx8"],
4215   "map": {"at": 165448, "to": "mm"},
4216   "name": "SPI_PS_INPUT_CNTL_1",
4217   "type_ref": "SPI_PS_INPUT_CNTL_0"
4218  },
4219  {
4220   "chips": ["gfx8"],
4221   "map": {"at": 165452, "to": "mm"},
4222   "name": "SPI_PS_INPUT_CNTL_2",
4223   "type_ref": "SPI_PS_INPUT_CNTL_0"
4224  },
4225  {
4226   "chips": ["gfx8"],
4227   "map": {"at": 165456, "to": "mm"},
4228   "name": "SPI_PS_INPUT_CNTL_3",
4229   "type_ref": "SPI_PS_INPUT_CNTL_0"
4230  },
4231  {
4232   "chips": ["gfx8"],
4233   "map": {"at": 165460, "to": "mm"},
4234   "name": "SPI_PS_INPUT_CNTL_4",
4235   "type_ref": "SPI_PS_INPUT_CNTL_0"
4236  },
4237  {
4238   "chips": ["gfx8"],
4239   "map": {"at": 165464, "to": "mm"},
4240   "name": "SPI_PS_INPUT_CNTL_5",
4241   "type_ref": "SPI_PS_INPUT_CNTL_0"
4242  },
4243  {
4244   "chips": ["gfx8"],
4245   "map": {"at": 165468, "to": "mm"},
4246   "name": "SPI_PS_INPUT_CNTL_6",
4247   "type_ref": "SPI_PS_INPUT_CNTL_0"
4248  },
4249  {
4250   "chips": ["gfx8"],
4251   "map": {"at": 165472, "to": "mm"},
4252   "name": "SPI_PS_INPUT_CNTL_7",
4253   "type_ref": "SPI_PS_INPUT_CNTL_0"
4254  },
4255  {
4256   "chips": ["gfx8"],
4257   "map": {"at": 165476, "to": "mm"},
4258   "name": "SPI_PS_INPUT_CNTL_8",
4259   "type_ref": "SPI_PS_INPUT_CNTL_0"
4260  },
4261  {
4262   "chips": ["gfx8"],
4263   "map": {"at": 165480, "to": "mm"},
4264   "name": "SPI_PS_INPUT_CNTL_9",
4265   "type_ref": "SPI_PS_INPUT_CNTL_0"
4266  },
4267  {
4268   "chips": ["gfx8"],
4269   "map": {"at": 165484, "to": "mm"},
4270   "name": "SPI_PS_INPUT_CNTL_10",
4271   "type_ref": "SPI_PS_INPUT_CNTL_0"
4272  },
4273  {
4274   "chips": ["gfx8"],
4275   "map": {"at": 165488, "to": "mm"},
4276   "name": "SPI_PS_INPUT_CNTL_11",
4277   "type_ref": "SPI_PS_INPUT_CNTL_0"
4278  },
4279  {
4280   "chips": ["gfx8"],
4281   "map": {"at": 165492, "to": "mm"},
4282   "name": "SPI_PS_INPUT_CNTL_12",
4283   "type_ref": "SPI_PS_INPUT_CNTL_0"
4284  },
4285  {
4286   "chips": ["gfx8"],
4287   "map": {"at": 165496, "to": "mm"},
4288   "name": "SPI_PS_INPUT_CNTL_13",
4289   "type_ref": "SPI_PS_INPUT_CNTL_0"
4290  },
4291  {
4292   "chips": ["gfx8"],
4293   "map": {"at": 165500, "to": "mm"},
4294   "name": "SPI_PS_INPUT_CNTL_14",
4295   "type_ref": "SPI_PS_INPUT_CNTL_0"
4296  },
4297  {
4298   "chips": ["gfx8"],
4299   "map": {"at": 165504, "to": "mm"},
4300   "name": "SPI_PS_INPUT_CNTL_15",
4301   "type_ref": "SPI_PS_INPUT_CNTL_0"
4302  },
4303  {
4304   "chips": ["gfx8"],
4305   "map": {"at": 165508, "to": "mm"},
4306   "name": "SPI_PS_INPUT_CNTL_16",
4307   "type_ref": "SPI_PS_INPUT_CNTL_0"
4308  },
4309  {
4310   "chips": ["gfx8"],
4311   "map": {"at": 165512, "to": "mm"},
4312   "name": "SPI_PS_INPUT_CNTL_17",
4313   "type_ref": "SPI_PS_INPUT_CNTL_0"
4314  },
4315  {
4316   "chips": ["gfx8"],
4317   "map": {"at": 165516, "to": "mm"},
4318   "name": "SPI_PS_INPUT_CNTL_18",
4319   "type_ref": "SPI_PS_INPUT_CNTL_0"
4320  },
4321  {
4322   "chips": ["gfx8"],
4323   "map": {"at": 165520, "to": "mm"},
4324   "name": "SPI_PS_INPUT_CNTL_19",
4325   "type_ref": "SPI_PS_INPUT_CNTL_0"
4326  },
4327  {
4328   "chips": ["gfx8"],
4329   "map": {"at": 165524, "to": "mm"},
4330   "name": "SPI_PS_INPUT_CNTL_20",
4331   "type_ref": "SPI_PS_INPUT_CNTL_20"
4332  },
4333  {
4334   "chips": ["gfx8"],
4335   "map": {"at": 165528, "to": "mm"},
4336   "name": "SPI_PS_INPUT_CNTL_21",
4337   "type_ref": "SPI_PS_INPUT_CNTL_20"
4338  },
4339  {
4340   "chips": ["gfx8"],
4341   "map": {"at": 165532, "to": "mm"},
4342   "name": "SPI_PS_INPUT_CNTL_22",
4343   "type_ref": "SPI_PS_INPUT_CNTL_20"
4344  },
4345  {
4346   "chips": ["gfx8"],
4347   "map": {"at": 165536, "to": "mm"},
4348   "name": "SPI_PS_INPUT_CNTL_23",
4349   "type_ref": "SPI_PS_INPUT_CNTL_20"
4350  },
4351  {
4352   "chips": ["gfx8"],
4353   "map": {"at": 165540, "to": "mm"},
4354   "name": "SPI_PS_INPUT_CNTL_24",
4355   "type_ref": "SPI_PS_INPUT_CNTL_20"
4356  },
4357  {
4358   "chips": ["gfx8"],
4359   "map": {"at": 165544, "to": "mm"},
4360   "name": "SPI_PS_INPUT_CNTL_25",
4361   "type_ref": "SPI_PS_INPUT_CNTL_20"
4362  },
4363  {
4364   "chips": ["gfx8"],
4365   "map": {"at": 165548, "to": "mm"},
4366   "name": "SPI_PS_INPUT_CNTL_26",
4367   "type_ref": "SPI_PS_INPUT_CNTL_20"
4368  },
4369  {
4370   "chips": ["gfx8"],
4371   "map": {"at": 165552, "to": "mm"},
4372   "name": "SPI_PS_INPUT_CNTL_27",
4373   "type_ref": "SPI_PS_INPUT_CNTL_20"
4374  },
4375  {
4376   "chips": ["gfx8"],
4377   "map": {"at": 165556, "to": "mm"},
4378   "name": "SPI_PS_INPUT_CNTL_28",
4379   "type_ref": "SPI_PS_INPUT_CNTL_20"
4380  },
4381  {
4382   "chips": ["gfx8"],
4383   "map": {"at": 165560, "to": "mm"},
4384   "name": "SPI_PS_INPUT_CNTL_29",
4385   "type_ref": "SPI_PS_INPUT_CNTL_20"
4386  },
4387  {
4388   "chips": ["gfx8"],
4389   "map": {"at": 165564, "to": "mm"},
4390   "name": "SPI_PS_INPUT_CNTL_30",
4391   "type_ref": "SPI_PS_INPUT_CNTL_20"
4392  },
4393  {
4394   "chips": ["gfx8"],
4395   "map": {"at": 165568, "to": "mm"},
4396   "name": "SPI_PS_INPUT_CNTL_31",
4397   "type_ref": "SPI_PS_INPUT_CNTL_20"
4398  },
4399  {
4400   "chips": ["gfx8"],
4401   "map": {"at": 165572, "to": "mm"},
4402   "name": "SPI_VS_OUT_CONFIG",
4403   "type_ref": "SPI_VS_OUT_CONFIG"
4404  },
4405  {
4406   "chips": ["gfx8"],
4407   "map": {"at": 165580, "to": "mm"},
4408   "name": "SPI_PS_INPUT_ENA",
4409   "type_ref": "SPI_PS_INPUT_ENA"
4410  },
4411  {
4412   "chips": ["gfx8"],
4413   "map": {"at": 165584, "to": "mm"},
4414   "name": "SPI_PS_INPUT_ADDR",
4415   "type_ref": "SPI_PS_INPUT_ENA"
4416  },
4417  {
4418   "chips": ["gfx8"],
4419   "map": {"at": 165588, "to": "mm"},
4420   "name": "SPI_INTERP_CONTROL_0",
4421   "type_ref": "SPI_INTERP_CONTROL_0"
4422  },
4423  {
4424   "chips": ["gfx8"],
4425   "map": {"at": 165592, "to": "mm"},
4426   "name": "SPI_PS_IN_CONTROL",
4427   "type_ref": "SPI_PS_IN_CONTROL"
4428  },
4429  {
4430   "chips": ["gfx8"],
4431   "map": {"at": 165600, "to": "mm"},
4432   "name": "SPI_BARYC_CNTL",
4433   "type_ref": "SPI_BARYC_CNTL"
4434  },
4435  {
4436   "chips": ["gfx8"],
4437   "map": {"at": 165608, "to": "mm"},
4438   "name": "SPI_TMPRING_SIZE",
4439   "type_ref": "COMPUTE_TMPRING_SIZE"
4440  },
4441  {
4442   "chips": ["gfx8"],
4443   "map": {"at": 165644, "to": "mm"},
4444   "name": "SPI_SHADER_POS_FORMAT",
4445   "type_ref": "SPI_SHADER_POS_FORMAT"
4446  },
4447  {
4448   "chips": ["gfx8"],
4449   "map": {"at": 165648, "to": "mm"},
4450   "name": "SPI_SHADER_Z_FORMAT",
4451   "type_ref": "SPI_SHADER_Z_FORMAT"
4452  },
4453  {
4454   "chips": ["gfx8"],
4455   "map": {"at": 165652, "to": "mm"},
4456   "name": "SPI_SHADER_COL_FORMAT",
4457   "type_ref": "SPI_SHADER_COL_FORMAT"
4458  },
4459  {
4460   "chips": ["gfx8"],
4461   "map": {"at": 165760, "to": "mm"},
4462   "name": "CB_BLEND0_CONTROL",
4463   "type_ref": "CB_BLEND0_CONTROL"
4464  },
4465  {
4466   "chips": ["gfx8"],
4467   "map": {"at": 165764, "to": "mm"},
4468   "name": "CB_BLEND1_CONTROL",
4469   "type_ref": "CB_BLEND0_CONTROL"
4470  },
4471  {
4472   "chips": ["gfx8"],
4473   "map": {"at": 165768, "to": "mm"},
4474   "name": "CB_BLEND2_CONTROL",
4475   "type_ref": "CB_BLEND0_CONTROL"
4476  },
4477  {
4478   "chips": ["gfx8"],
4479   "map": {"at": 165772, "to": "mm"},
4480   "name": "CB_BLEND3_CONTROL",
4481   "type_ref": "CB_BLEND0_CONTROL"
4482  },
4483  {
4484   "chips": ["gfx8"],
4485   "map": {"at": 165776, "to": "mm"},
4486   "name": "CB_BLEND4_CONTROL",
4487   "type_ref": "CB_BLEND0_CONTROL"
4488  },
4489  {
4490   "chips": ["gfx8"],
4491   "map": {"at": 165780, "to": "mm"},
4492   "name": "CB_BLEND5_CONTROL",
4493   "type_ref": "CB_BLEND0_CONTROL"
4494  },
4495  {
4496   "chips": ["gfx8"],
4497   "map": {"at": 165784, "to": "mm"},
4498   "name": "CB_BLEND6_CONTROL",
4499   "type_ref": "CB_BLEND0_CONTROL"
4500  },
4501  {
4502   "chips": ["gfx8"],
4503   "map": {"at": 165788, "to": "mm"},
4504   "name": "CB_BLEND7_CONTROL",
4505   "type_ref": "CB_BLEND0_CONTROL"
4506  },
4507  {
4508   "chips": ["gfx8"],
4509   "map": {"at": 165836, "to": "mm"},
4510   "name": "CS_COPY_STATE",
4511   "type_ref": "CS_COPY_STATE"
4512  },
4513  {
4514   "chips": ["gfx8"],
4515   "map": {"at": 165840, "to": "mm"},
4516   "name": "GFX_COPY_STATE",
4517   "type_ref": "CS_COPY_STATE"
4518  },
4519  {
4520   "chips": ["gfx8"],
4521   "map": {"at": 165844, "to": "mm"},
4522   "name": "PA_CL_POINT_X_RAD"
4523  },
4524  {
4525   "chips": ["gfx8"],
4526   "map": {"at": 165848, "to": "mm"},
4527   "name": "PA_CL_POINT_Y_RAD"
4528  },
4529  {
4530   "chips": ["gfx8"],
4531   "map": {"at": 165852, "to": "mm"},
4532   "name": "PA_CL_POINT_SIZE"
4533  },
4534  {
4535   "chips": ["gfx8"],
4536   "map": {"at": 165856, "to": "mm"},
4537   "name": "PA_CL_POINT_CULL_RAD"
4538  },
4539  {
4540   "chips": ["gfx8"],
4541   "map": {"at": 165860, "to": "mm"},
4542   "name": "VGT_DMA_BASE_HI",
4543   "type_ref": "VGT_DMA_BASE_HI"
4544  },
4545  {
4546   "chips": ["gfx8"],
4547   "map": {"at": 165864, "to": "mm"},
4548   "name": "VGT_DMA_BASE"
4549  },
4550  {
4551   "chips": ["gfx8"],
4552   "map": {"at": 165872, "to": "mm"},
4553   "name": "VGT_DRAW_INITIATOR",
4554   "type_ref": "VGT_DRAW_INITIATOR"
4555  },
4556  {
4557   "chips": ["gfx8"],
4558   "map": {"at": 165876, "to": "mm"},
4559   "name": "VGT_IMMED_DATA"
4560  },
4561  {
4562   "chips": ["gfx8"],
4563   "map": {"at": 165880, "to": "mm"},
4564   "name": "VGT_EVENT_ADDRESS_REG",
4565   "type_ref": "VGT_EVENT_ADDRESS_REG"
4566  },
4567  {
4568   "chips": ["gfx8"],
4569   "map": {"at": 165888, "to": "mm"},
4570   "name": "DB_DEPTH_CONTROL",
4571   "type_ref": "DB_DEPTH_CONTROL"
4572  },
4573  {
4574   "chips": ["gfx8"],
4575   "map": {"at": 165892, "to": "mm"},
4576   "name": "DB_EQAA",
4577   "type_ref": "DB_EQAA"
4578  },
4579  {
4580   "chips": ["gfx8"],
4581   "map": {"at": 165896, "to": "mm"},
4582   "name": "CB_COLOR_CONTROL",
4583   "type_ref": "CB_COLOR_CONTROL"
4584  },
4585  {
4586   "chips": ["gfx8"],
4587   "map": {"at": 165900, "to": "mm"},
4588   "name": "DB_SHADER_CONTROL",
4589   "type_ref": "DB_SHADER_CONTROL"
4590  },
4591  {
4592   "chips": ["gfx8"],
4593   "map": {"at": 165904, "to": "mm"},
4594   "name": "PA_CL_CLIP_CNTL",
4595   "type_ref": "PA_CL_CLIP_CNTL"
4596  },
4597  {
4598   "chips": ["gfx8"],
4599   "map": {"at": 165908, "to": "mm"},
4600   "name": "PA_SU_SC_MODE_CNTL",
4601   "type_ref": "PA_SU_SC_MODE_CNTL"
4602  },
4603  {
4604   "chips": ["gfx8"],
4605   "map": {"at": 165912, "to": "mm"},
4606   "name": "PA_CL_VTE_CNTL",
4607   "type_ref": "PA_CL_VTE_CNTL"
4608  },
4609  {
4610   "chips": ["gfx8"],
4611   "map": {"at": 165916, "to": "mm"},
4612   "name": "PA_CL_VS_OUT_CNTL",
4613   "type_ref": "PA_CL_VS_OUT_CNTL"
4614  },
4615  {
4616   "chips": ["gfx8"],
4617   "map": {"at": 165920, "to": "mm"},
4618   "name": "PA_CL_NANINF_CNTL",
4619   "type_ref": "PA_CL_NANINF_CNTL"
4620  },
4621  {
4622   "chips": ["gfx8"],
4623   "map": {"at": 165924, "to": "mm"},
4624   "name": "PA_SU_LINE_STIPPLE_CNTL",
4625   "type_ref": "PA_SU_LINE_STIPPLE_CNTL"
4626  },
4627  {
4628   "chips": ["gfx8"],
4629   "map": {"at": 165928, "to": "mm"},
4630   "name": "PA_SU_LINE_STIPPLE_SCALE"
4631  },
4632  {
4633   "chips": ["gfx8"],
4634   "map": {"at": 165932, "to": "mm"},
4635   "name": "PA_SU_PRIM_FILTER_CNTL",
4636   "type_ref": "PA_SU_PRIM_FILTER_CNTL"
4637  },
4638  {
4639   "chips": ["gfx8"],
4640   "map": {"at": 166400, "to": "mm"},
4641   "name": "PA_SU_POINT_SIZE",
4642   "type_ref": "PA_SU_POINT_SIZE"
4643  },
4644  {
4645   "chips": ["gfx8"],
4646   "map": {"at": 166404, "to": "mm"},
4647   "name": "PA_SU_POINT_MINMAX",
4648   "type_ref": "PA_SU_POINT_MINMAX"
4649  },
4650  {
4651   "chips": ["gfx8"],
4652   "map": {"at": 166408, "to": "mm"},
4653   "name": "PA_SU_LINE_CNTL",
4654   "type_ref": "PA_SU_LINE_CNTL"
4655  },
4656  {
4657   "chips": ["gfx8"],
4658   "map": {"at": 166412, "to": "mm"},
4659   "name": "PA_SC_LINE_STIPPLE",
4660   "type_ref": "PA_SC_LINE_STIPPLE"
4661  },
4662  {
4663   "chips": ["gfx8"],
4664   "map": {"at": 166416, "to": "mm"},
4665   "name": "VGT_OUTPUT_PATH_CNTL",
4666   "type_ref": "VGT_OUTPUT_PATH_CNTL"
4667  },
4668  {
4669   "chips": ["gfx8"],
4670   "map": {"at": 166420, "to": "mm"},
4671   "name": "VGT_HOS_CNTL",
4672   "type_ref": "VGT_HOS_CNTL"
4673  },
4674  {
4675   "chips": ["gfx8"],
4676   "map": {"at": 166424, "to": "mm"},
4677   "name": "VGT_HOS_MAX_TESS_LEVEL"
4678  },
4679  {
4680   "chips": ["gfx8"],
4681   "map": {"at": 166428, "to": "mm"},
4682   "name": "VGT_HOS_MIN_TESS_LEVEL"
4683  },
4684  {
4685   "chips": ["gfx8"],
4686   "map": {"at": 166432, "to": "mm"},
4687   "name": "VGT_HOS_REUSE_DEPTH",
4688   "type_ref": "VGT_HOS_REUSE_DEPTH"
4689  },
4690  {
4691   "chips": ["gfx8"],
4692   "map": {"at": 166436, "to": "mm"},
4693   "name": "VGT_GROUP_PRIM_TYPE",
4694   "type_ref": "VGT_GROUP_PRIM_TYPE"
4695  },
4696  {
4697   "chips": ["gfx8"],
4698   "map": {"at": 166440, "to": "mm"},
4699   "name": "VGT_GROUP_FIRST_DECR",
4700   "type_ref": "VGT_GROUP_FIRST_DECR"
4701  },
4702  {
4703   "chips": ["gfx8"],
4704   "map": {"at": 166444, "to": "mm"},
4705   "name": "VGT_GROUP_DECR",
4706   "type_ref": "VGT_GROUP_DECR"
4707  },
4708  {
4709   "chips": ["gfx8"],
4710   "map": {"at": 166448, "to": "mm"},
4711   "name": "VGT_GROUP_VECT_0_CNTL",
4712   "type_ref": "VGT_GROUP_VECT_0_CNTL"
4713  },
4714  {
4715   "chips": ["gfx8"],
4716   "map": {"at": 166452, "to": "mm"},
4717   "name": "VGT_GROUP_VECT_1_CNTL",
4718   "type_ref": "VGT_GROUP_VECT_0_CNTL"
4719  },
4720  {
4721   "chips": ["gfx8"],
4722   "map": {"at": 166456, "to": "mm"},
4723   "name": "VGT_GROUP_VECT_0_FMT_CNTL",
4724   "type_ref": "VGT_GROUP_VECT_0_FMT_CNTL"
4725  },
4726  {
4727   "chips": ["gfx8"],
4728   "map": {"at": 166460, "to": "mm"},
4729   "name": "VGT_GROUP_VECT_1_FMT_CNTL",
4730   "type_ref": "VGT_GROUP_VECT_0_FMT_CNTL"
4731  },
4732  {
4733   "chips": ["gfx8"],
4734   "map": {"at": 166464, "to": "mm"},
4735   "name": "VGT_GS_MODE",
4736   "type_ref": "VGT_GS_MODE"
4737  },
4738  {
4739   "chips": ["gfx8"],
4740   "map": {"at": 166468, "to": "mm"},
4741   "name": "VGT_GS_ONCHIP_CNTL",
4742   "type_ref": "VGT_GS_ONCHIP_CNTL"
4743  },
4744  {
4745   "chips": ["gfx8"],
4746   "map": {"at": 166472, "to": "mm"},
4747   "name": "PA_SC_MODE_CNTL_0",
4748   "type_ref": "PA_SC_MODE_CNTL_0"
4749  },
4750  {
4751   "chips": ["gfx8"],
4752   "map": {"at": 166476, "to": "mm"},
4753   "name": "PA_SC_MODE_CNTL_1",
4754   "type_ref": "PA_SC_MODE_CNTL_1"
4755  },
4756  {
4757   "chips": ["gfx8"],
4758   "map": {"at": 166480, "to": "mm"},
4759   "name": "VGT_ENHANCE"
4760  },
4761  {
4762   "chips": ["gfx8"],
4763   "map": {"at": 166484, "to": "mm"},
4764   "name": "VGT_GS_PER_ES",
4765   "type_ref": "VGT_GS_PER_ES"
4766  },
4767  {
4768   "chips": ["gfx8"],
4769   "map": {"at": 166488, "to": "mm"},
4770   "name": "VGT_ES_PER_GS",
4771   "type_ref": "VGT_ES_PER_GS"
4772  },
4773  {
4774   "chips": ["gfx8"],
4775   "map": {"at": 166492, "to": "mm"},
4776   "name": "VGT_GS_PER_VS",
4777   "type_ref": "VGT_GS_PER_VS"
4778  },
4779  {
4780   "chips": ["gfx8"],
4781   "map": {"at": 166496, "to": "mm"},
4782   "name": "VGT_GSVS_RING_OFFSET_1",
4783   "type_ref": "VGT_GSVS_RING_OFFSET_1"
4784  },
4785  {
4786   "chips": ["gfx8"],
4787   "map": {"at": 166500, "to": "mm"},
4788   "name": "VGT_GSVS_RING_OFFSET_2",
4789   "type_ref": "VGT_GSVS_RING_OFFSET_1"
4790  },
4791  {
4792   "chips": ["gfx8"],
4793   "map": {"at": 166504, "to": "mm"},
4794   "name": "VGT_GSVS_RING_OFFSET_3",
4795   "type_ref": "VGT_GSVS_RING_OFFSET_1"
4796  },
4797  {
4798   "chips": ["gfx8"],
4799   "map": {"at": 166508, "to": "mm"},
4800   "name": "VGT_GS_OUT_PRIM_TYPE",
4801   "type_ref": "VGT_GS_OUT_PRIM_TYPE"
4802  },
4803  {
4804   "chips": ["gfx8"],
4805   "map": {"at": 166512, "to": "mm"},
4806   "name": "IA_ENHANCE"
4807  },
4808  {
4809   "chips": ["gfx8"],
4810   "map": {"at": 166516, "to": "mm"},
4811   "name": "VGT_DMA_SIZE"
4812  },
4813  {
4814   "chips": ["gfx8"],
4815   "map": {"at": 166520, "to": "mm"},
4816   "name": "VGT_DMA_MAX_SIZE"
4817  },
4818  {
4819   "chips": ["gfx8"],
4820   "map": {"at": 166524, "to": "mm"},
4821   "name": "VGT_DMA_INDEX_TYPE",
4822   "type_ref": "VGT_DMA_INDEX_TYPE"
4823  },
4824  {
4825   "chips": ["gfx8"],
4826   "map": {"at": 166528, "to": "mm"},
4827   "name": "WD_ENHANCE"
4828  },
4829  {
4830   "chips": ["gfx8"],
4831   "map": {"at": 166532, "to": "mm"},
4832   "name": "VGT_PRIMITIVEID_EN",
4833   "type_ref": "VGT_PRIMITIVEID_EN"
4834  },
4835  {
4836   "chips": ["gfx8"],
4837   "map": {"at": 166536, "to": "mm"},
4838   "name": "VGT_DMA_NUM_INSTANCES"
4839  },
4840  {
4841   "chips": ["gfx8"],
4842   "map": {"at": 166540, "to": "mm"},
4843   "name": "VGT_PRIMITIVEID_RESET"
4844  },
4845  {
4846   "chips": ["gfx8"],
4847   "map": {"at": 166544, "to": "mm"},
4848   "name": "VGT_EVENT_INITIATOR",
4849   "type_ref": "VGT_EVENT_INITIATOR"
4850  },
4851  {
4852   "chips": ["gfx8"],
4853   "map": {"at": 166548, "to": "mm"},
4854   "name": "VGT_MULTI_PRIM_IB_RESET_EN",
4855   "type_ref": "VGT_MULTI_PRIM_IB_RESET_EN"
4856  },
4857  {
4858   "chips": ["gfx8"],
4859   "map": {"at": 166560, "to": "mm"},
4860   "name": "VGT_INSTANCE_STEP_RATE_0"
4861  },
4862  {
4863   "chips": ["gfx8"],
4864   "map": {"at": 166564, "to": "mm"},
4865   "name": "VGT_INSTANCE_STEP_RATE_1"
4866  },
4867  {
4868   "chips": ["gfx8"],
4869   "map": {"at": 166568, "to": "mm"},
4870   "name": "IA_MULTI_VGT_PARAM",
4871   "type_ref": "IA_MULTI_VGT_PARAM"
4872  },
4873  {
4874   "chips": ["gfx8"],
4875   "map": {"at": 166572, "to": "mm"},
4876   "name": "VGT_ESGS_RING_ITEMSIZE",
4877   "type_ref": "VGT_ESGS_RING_ITEMSIZE"
4878  },
4879  {
4880   "chips": ["gfx8"],
4881   "map": {"at": 166576, "to": "mm"},
4882   "name": "VGT_GSVS_RING_ITEMSIZE",
4883   "type_ref": "VGT_ESGS_RING_ITEMSIZE"
4884  },
4885  {
4886   "chips": ["gfx8"],
4887   "map": {"at": 166580, "to": "mm"},
4888   "name": "VGT_REUSE_OFF",
4889   "type_ref": "VGT_REUSE_OFF"
4890  },
4891  {
4892   "chips": ["gfx8"],
4893   "map": {"at": 166584, "to": "mm"},
4894   "name": "VGT_VTX_CNT_EN",
4895   "type_ref": "VGT_VTX_CNT_EN"
4896  },
4897  {
4898   "chips": ["gfx8"],
4899   "map": {"at": 166588, "to": "mm"},
4900   "name": "DB_HTILE_SURFACE",
4901   "type_ref": "DB_HTILE_SURFACE"
4902  },
4903  {
4904   "chips": ["gfx8"],
4905   "map": {"at": 166592, "to": "mm"},
4906   "name": "DB_SRESULTS_COMPARE_STATE0",
4907   "type_ref": "DB_SRESULTS_COMPARE_STATE0"
4908  },
4909  {
4910   "chips": ["gfx8"],
4911   "map": {"at": 166596, "to": "mm"},
4912   "name": "DB_SRESULTS_COMPARE_STATE1",
4913   "type_ref": "DB_SRESULTS_COMPARE_STATE1"
4914  },
4915  {
4916   "chips": ["gfx8"],
4917   "map": {"at": 166600, "to": "mm"},
4918   "name": "DB_PRELOAD_CONTROL",
4919   "type_ref": "DB_PRELOAD_CONTROL"
4920  },
4921  {
4922   "chips": ["gfx8"],
4923   "map": {"at": 166608, "to": "mm"},
4924   "name": "VGT_STRMOUT_BUFFER_SIZE_0"
4925  },
4926  {
4927   "chips": ["gfx8"],
4928   "map": {"at": 166612, "to": "mm"},
4929   "name": "VGT_STRMOUT_VTX_STRIDE_0",
4930   "type_ref": "VGT_STRMOUT_VTX_STRIDE_0"
4931  },
4932  {
4933   "chips": ["gfx8"],
4934   "map": {"at": 166620, "to": "mm"},
4935   "name": "VGT_STRMOUT_BUFFER_OFFSET_0"
4936  },
4937  {
4938   "chips": ["gfx8"],
4939   "map": {"at": 166624, "to": "mm"},
4940   "name": "VGT_STRMOUT_BUFFER_SIZE_1"
4941  },
4942  {
4943   "chips": ["gfx8"],
4944   "map": {"at": 166628, "to": "mm"},
4945   "name": "VGT_STRMOUT_VTX_STRIDE_1",
4946   "type_ref": "VGT_STRMOUT_VTX_STRIDE_0"
4947  },
4948  {
4949   "chips": ["gfx8"],
4950   "map": {"at": 166636, "to": "mm"},
4951   "name": "VGT_STRMOUT_BUFFER_OFFSET_1"
4952  },
4953  {
4954   "chips": ["gfx8"],
4955   "map": {"at": 166640, "to": "mm"},
4956   "name": "VGT_STRMOUT_BUFFER_SIZE_2"
4957  },
4958  {
4959   "chips": ["gfx8"],
4960   "map": {"at": 166644, "to": "mm"},
4961   "name": "VGT_STRMOUT_VTX_STRIDE_2",
4962   "type_ref": "VGT_STRMOUT_VTX_STRIDE_0"
4963  },
4964  {
4965   "chips": ["gfx8"],
4966   "map": {"at": 166652, "to": "mm"},
4967   "name": "VGT_STRMOUT_BUFFER_OFFSET_2"
4968  },
4969  {
4970   "chips": ["gfx8"],
4971   "map": {"at": 166656, "to": "mm"},
4972   "name": "VGT_STRMOUT_BUFFER_SIZE_3"
4973  },
4974  {
4975   "chips": ["gfx8"],
4976   "map": {"at": 166660, "to": "mm"},
4977   "name": "VGT_STRMOUT_VTX_STRIDE_3",
4978   "type_ref": "VGT_STRMOUT_VTX_STRIDE_0"
4979  },
4980  {
4981   "chips": ["gfx8"],
4982   "map": {"at": 166668, "to": "mm"},
4983   "name": "VGT_STRMOUT_BUFFER_OFFSET_3"
4984  },
4985  {
4986   "chips": ["gfx8"],
4987   "map": {"at": 166696, "to": "mm"},
4988   "name": "VGT_STRMOUT_DRAW_OPAQUE_OFFSET"
4989  },
4990  {
4991   "chips": ["gfx8"],
4992   "map": {"at": 166700, "to": "mm"},
4993   "name": "VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE"
4994  },
4995  {
4996   "chips": ["gfx8"],
4997   "map": {"at": 166704, "to": "mm"},
4998   "name": "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE",
4999   "type_ref": "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE"
5000  },
5001  {
5002   "chips": ["gfx8"],
5003   "map": {"at": 166712, "to": "mm"},
5004   "name": "VGT_GS_MAX_VERT_OUT",
5005   "type_ref": "VGT_GS_MAX_VERT_OUT"
5006  },
5007  {
5008   "chips": ["gfx8"],
5009   "map": {"at": 166736, "to": "mm"},
5010   "name": "VGT_TESS_DISTRIBUTION",
5011   "type_ref": "VGT_TESS_DISTRIBUTION"
5012  },
5013  {
5014   "chips": ["gfx8"],
5015   "map": {"at": 166740, "to": "mm"},
5016   "name": "VGT_SHADER_STAGES_EN",
5017   "type_ref": "VGT_SHADER_STAGES_EN"
5018  },
5019  {
5020   "chips": ["gfx8"],
5021   "map": {"at": 166744, "to": "mm"},
5022   "name": "VGT_LS_HS_CONFIG",
5023   "type_ref": "VGT_LS_HS_CONFIG"
5024  },
5025  {
5026   "chips": ["gfx8"],
5027   "map": {"at": 166748, "to": "mm"},
5028   "name": "VGT_GS_VERT_ITEMSIZE",
5029   "type_ref": "VGT_ESGS_RING_ITEMSIZE"
5030  },
5031  {
5032   "chips": ["gfx8"],
5033   "map": {"at": 166752, "to": "mm"},
5034   "name": "VGT_GS_VERT_ITEMSIZE_1",
5035   "type_ref": "VGT_ESGS_RING_ITEMSIZE"
5036  },
5037  {
5038   "chips": ["gfx8"],
5039   "map": {"at": 166756, "to": "mm"},
5040   "name": "VGT_GS_VERT_ITEMSIZE_2",
5041   "type_ref": "VGT_ESGS_RING_ITEMSIZE"
5042  },
5043  {
5044   "chips": ["gfx8"],
5045   "map": {"at": 166760, "to": "mm"},
5046   "name": "VGT_GS_VERT_ITEMSIZE_3",
5047   "type_ref": "VGT_ESGS_RING_ITEMSIZE"
5048  },
5049  {
5050   "chips": ["gfx8"],
5051   "map": {"at": 166764, "to": "mm"},
5052   "name": "VGT_TF_PARAM",
5053   "type_ref": "VGT_TF_PARAM"
5054  },
5055  {
5056   "chips": ["gfx8"],
5057   "map": {"at": 166768, "to": "mm"},
5058   "name": "DB_ALPHA_TO_MASK",
5059   "type_ref": "DB_ALPHA_TO_MASK"
5060  },
5061  {
5062   "chips": ["gfx8"],
5063   "map": {"at": 166772, "to": "mm"},
5064   "name": "VGT_DISPATCH_DRAW_INDEX"
5065  },
5066  {
5067   "chips": ["gfx8"],
5068   "map": {"at": 166776, "to": "mm"},
5069   "name": "PA_SU_POLY_OFFSET_DB_FMT_CNTL",
5070   "type_ref": "PA_SU_POLY_OFFSET_DB_FMT_CNTL"
5071  },
5072  {
5073   "chips": ["gfx8"],
5074   "map": {"at": 166780, "to": "mm"},
5075   "name": "PA_SU_POLY_OFFSET_CLAMP"
5076  },
5077  {
5078   "chips": ["gfx8"],
5079   "map": {"at": 166784, "to": "mm"},
5080   "name": "PA_SU_POLY_OFFSET_FRONT_SCALE"
5081  },
5082  {
5083   "chips": ["gfx8"],
5084   "map": {"at": 166788, "to": "mm"},
5085   "name": "PA_SU_POLY_OFFSET_FRONT_OFFSET"
5086  },
5087  {
5088   "chips": ["gfx8"],
5089   "map": {"at": 166792, "to": "mm"},
5090   "name": "PA_SU_POLY_OFFSET_BACK_SCALE"
5091  },
5092  {
5093   "chips": ["gfx8"],
5094   "map": {"at": 166796, "to": "mm"},
5095   "name": "PA_SU_POLY_OFFSET_BACK_OFFSET"
5096  },
5097  {
5098   "chips": ["gfx8"],
5099   "map": {"at": 166800, "to": "mm"},
5100   "name": "VGT_GS_INSTANCE_CNT",
5101   "type_ref": "VGT_GS_INSTANCE_CNT"
5102  },
5103  {
5104   "chips": ["gfx8"],
5105   "map": {"at": 166804, "to": "mm"},
5106   "name": "VGT_STRMOUT_CONFIG",
5107   "type_ref": "VGT_STRMOUT_CONFIG"
5108  },
5109  {
5110   "chips": ["gfx8"],
5111   "map": {"at": 166808, "to": "mm"},
5112   "name": "VGT_STRMOUT_BUFFER_CONFIG",
5113   "type_ref": "VGT_STRMOUT_BUFFER_CONFIG"
5114  },
5115  {
5116   "chips": ["gfx8"],
5117   "map": {"at": 166868, "to": "mm"},
5118   "name": "PA_SC_CENTROID_PRIORITY_0",
5119   "type_ref": "PA_SC_CENTROID_PRIORITY_0"
5120  },
5121  {
5122   "chips": ["gfx8"],
5123   "map": {"at": 166872, "to": "mm"},
5124   "name": "PA_SC_CENTROID_PRIORITY_1",
5125   "type_ref": "PA_SC_CENTROID_PRIORITY_1"
5126  },
5127  {
5128   "chips": ["gfx8"],
5129   "map": {"at": 166876, "to": "mm"},
5130   "name": "PA_SC_LINE_CNTL",
5131   "type_ref": "PA_SC_LINE_CNTL"
5132  },
5133  {
5134   "chips": ["gfx8"],
5135   "map": {"at": 166880, "to": "mm"},
5136   "name": "PA_SC_AA_CONFIG",
5137   "type_ref": "PA_SC_AA_CONFIG"
5138  },
5139  {
5140   "chips": ["gfx8"],
5141   "map": {"at": 166884, "to": "mm"},
5142   "name": "PA_SU_VTX_CNTL",
5143   "type_ref": "PA_SU_VTX_CNTL"
5144  },
5145  {
5146   "chips": ["gfx8"],
5147   "map": {"at": 166888, "to": "mm"},
5148   "name": "PA_CL_GB_VERT_CLIP_ADJ"
5149  },
5150  {
5151   "chips": ["gfx8"],
5152   "map": {"at": 166892, "to": "mm"},
5153   "name": "PA_CL_GB_VERT_DISC_ADJ"
5154  },
5155  {
5156   "chips": ["gfx8"],
5157   "map": {"at": 166896, "to": "mm"},
5158   "name": "PA_CL_GB_HORZ_CLIP_ADJ"
5159  },
5160  {
5161   "chips": ["gfx8"],
5162   "map": {"at": 166900, "to": "mm"},
5163   "name": "PA_CL_GB_HORZ_DISC_ADJ"
5164  },
5165  {
5166   "chips": ["gfx8"],
5167   "map": {"at": 166904, "to": "mm"},
5168   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0",
5169   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0"
5170  },
5171  {
5172   "chips": ["gfx8"],
5173   "map": {"at": 166908, "to": "mm"},
5174   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1",
5175   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1"
5176  },
5177  {
5178   "chips": ["gfx8"],
5179   "map": {"at": 166912, "to": "mm"},
5180   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2",
5181   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2"
5182  },
5183  {
5184   "chips": ["gfx8"],
5185   "map": {"at": 166916, "to": "mm"},
5186   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3",
5187   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3"
5188  },
5189  {
5190   "chips": ["gfx8"],
5191   "map": {"at": 166920, "to": "mm"},
5192   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0",
5193   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0"
5194  },
5195  {
5196   "chips": ["gfx8"],
5197   "map": {"at": 166924, "to": "mm"},
5198   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1",
5199   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1"
5200  },
5201  {
5202   "chips": ["gfx8"],
5203   "map": {"at": 166928, "to": "mm"},
5204   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2",
5205   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2"
5206  },
5207  {
5208   "chips": ["gfx8"],
5209   "map": {"at": 166932, "to": "mm"},
5210   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3",
5211   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3"
5212  },
5213  {
5214   "chips": ["gfx8"],
5215   "map": {"at": 166936, "to": "mm"},
5216   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0",
5217   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0"
5218  },
5219  {
5220   "chips": ["gfx8"],
5221   "map": {"at": 166940, "to": "mm"},
5222   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1",
5223   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1"
5224  },
5225  {
5226   "chips": ["gfx8"],
5227   "map": {"at": 166944, "to": "mm"},
5228   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2",
5229   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2"
5230  },
5231  {
5232   "chips": ["gfx8"],
5233   "map": {"at": 166948, "to": "mm"},
5234   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3",
5235   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3"
5236  },
5237  {
5238   "chips": ["gfx8"],
5239   "map": {"at": 166952, "to": "mm"},
5240   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0",
5241   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0"
5242  },
5243  {
5244   "chips": ["gfx8"],
5245   "map": {"at": 166956, "to": "mm"},
5246   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1",
5247   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1"
5248  },
5249  {
5250   "chips": ["gfx8"],
5251   "map": {"at": 166960, "to": "mm"},
5252   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2",
5253   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2"
5254  },
5255  {
5256   "chips": ["gfx8"],
5257   "map": {"at": 166964, "to": "mm"},
5258   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3",
5259   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3"
5260  },
5261  {
5262   "chips": ["gfx8"],
5263   "map": {"at": 166968, "to": "mm"},
5264   "name": "PA_SC_AA_MASK_X0Y0_X1Y0",
5265   "type_ref": "PA_SC_AA_MASK_X0Y0_X1Y0"
5266  },
5267  {
5268   "chips": ["gfx8"],
5269   "map": {"at": 166972, "to": "mm"},
5270   "name": "PA_SC_AA_MASK_X0Y1_X1Y1",
5271   "type_ref": "PA_SC_AA_MASK_X0Y1_X1Y1"
5272  },
5273  {
5274   "chips": ["gfx8"],
5275   "map": {"at": 167000, "to": "mm"},
5276   "name": "VGT_VERTEX_REUSE_BLOCK_CNTL",
5277   "type_ref": "VGT_VERTEX_REUSE_BLOCK_CNTL"
5278  },
5279  {
5280   "chips": ["gfx8"],
5281   "map": {"at": 167004, "to": "mm"},
5282   "name": "VGT_OUT_DEALLOC_CNTL",
5283   "type_ref": "VGT_OUT_DEALLOC_CNTL"
5284  },
5285  {
5286   "chips": ["gfx8"],
5287   "map": {"at": 167008, "to": "mm"},
5288   "name": "CB_COLOR0_BASE"
5289  },
5290  {
5291   "chips": ["gfx8"],
5292   "map": {"at": 167012, "to": "mm"},
5293   "name": "CB_COLOR0_PITCH",
5294   "type_ref": "CB_COLOR0_PITCH"
5295  },
5296  {
5297   "chips": ["gfx8"],
5298   "map": {"at": 167016, "to": "mm"},
5299   "name": "CB_COLOR0_SLICE",
5300   "type_ref": "CB_COLOR0_SLICE"
5301  },
5302  {
5303   "chips": ["gfx8"],
5304   "map": {"at": 167020, "to": "mm"},
5305   "name": "CB_COLOR0_VIEW",
5306   "type_ref": "CB_COLOR0_VIEW"
5307  },
5308  {
5309   "chips": ["gfx8"],
5310   "map": {"at": 167024, "to": "mm"},
5311   "name": "CB_COLOR0_INFO",
5312   "type_ref": "CB_COLOR0_INFO"
5313  },
5314  {
5315   "chips": ["gfx8"],
5316   "map": {"at": 167028, "to": "mm"},
5317   "name": "CB_COLOR0_ATTRIB",
5318   "type_ref": "CB_COLOR0_ATTRIB"
5319  },
5320  {
5321   "chips": ["gfx8"],
5322   "map": {"at": 167032, "to": "mm"},
5323   "name": "CB_COLOR0_DCC_CONTROL",
5324   "type_ref": "CB_COLOR0_DCC_CONTROL"
5325  },
5326  {
5327   "chips": ["gfx8"],
5328   "map": {"at": 167036, "to": "mm"},
5329   "name": "CB_COLOR0_CMASK"
5330  },
5331  {
5332   "chips": ["gfx8"],
5333   "map": {"at": 167040, "to": "mm"},
5334   "name": "CB_COLOR0_CMASK_SLICE",
5335   "type_ref": "CB_COLOR0_CMASK_SLICE"
5336  },
5337  {
5338   "chips": ["gfx8"],
5339   "map": {"at": 167044, "to": "mm"},
5340   "name": "CB_COLOR0_FMASK"
5341  },
5342  {
5343   "chips": ["gfx8"],
5344   "map": {"at": 167048, "to": "mm"},
5345   "name": "CB_COLOR0_FMASK_SLICE",
5346   "type_ref": "CB_COLOR0_SLICE"
5347  },
5348  {
5349   "chips": ["gfx8"],
5350   "map": {"at": 167052, "to": "mm"},
5351   "name": "CB_COLOR0_CLEAR_WORD0"
5352  },
5353  {
5354   "chips": ["gfx8"],
5355   "map": {"at": 167056, "to": "mm"},
5356   "name": "CB_COLOR0_CLEAR_WORD1"
5357  },
5358  {
5359   "chips": ["gfx8"],
5360   "map": {"at": 167060, "to": "mm"},
5361   "name": "CB_COLOR0_DCC_BASE"
5362  },
5363  {
5364   "chips": ["gfx8"],
5365   "map": {"at": 167068, "to": "mm"},
5366   "name": "CB_COLOR1_BASE"
5367  },
5368  {
5369   "chips": ["gfx8"],
5370   "map": {"at": 167072, "to": "mm"},
5371   "name": "CB_COLOR1_PITCH",
5372   "type_ref": "CB_COLOR0_PITCH"
5373  },
5374  {
5375   "chips": ["gfx8"],
5376   "map": {"at": 167076, "to": "mm"},
5377   "name": "CB_COLOR1_SLICE",
5378   "type_ref": "CB_COLOR0_SLICE"
5379  },
5380  {
5381   "chips": ["gfx8"],
5382   "map": {"at": 167080, "to": "mm"},
5383   "name": "CB_COLOR1_VIEW",
5384   "type_ref": "CB_COLOR0_VIEW"
5385  },
5386  {
5387   "chips": ["gfx8"],
5388   "map": {"at": 167084, "to": "mm"},
5389   "name": "CB_COLOR1_INFO",
5390   "type_ref": "CB_COLOR0_INFO"
5391  },
5392  {
5393   "chips": ["gfx8"],
5394   "map": {"at": 167088, "to": "mm"},
5395   "name": "CB_COLOR1_ATTRIB",
5396   "type_ref": "CB_COLOR0_ATTRIB"
5397  },
5398  {
5399   "chips": ["gfx8"],
5400   "map": {"at": 167092, "to": "mm"},
5401   "name": "CB_COLOR1_DCC_CONTROL",
5402   "type_ref": "CB_COLOR0_DCC_CONTROL"
5403  },
5404  {
5405   "chips": ["gfx8"],
5406   "map": {"at": 167096, "to": "mm"},
5407   "name": "CB_COLOR1_CMASK"
5408  },
5409  {
5410   "chips": ["gfx8"],
5411   "map": {"at": 167100, "to": "mm"},
5412   "name": "CB_COLOR1_CMASK_SLICE",
5413   "type_ref": "CB_COLOR0_CMASK_SLICE"
5414  },
5415  {
5416   "chips": ["gfx8"],
5417   "map": {"at": 167104, "to": "mm"},
5418   "name": "CB_COLOR1_FMASK"
5419  },
5420  {
5421   "chips": ["gfx8"],
5422   "map": {"at": 167108, "to": "mm"},
5423   "name": "CB_COLOR1_FMASK_SLICE",
5424   "type_ref": "CB_COLOR0_SLICE"
5425  },
5426  {
5427   "chips": ["gfx8"],
5428   "map": {"at": 167112, "to": "mm"},
5429   "name": "CB_COLOR1_CLEAR_WORD0"
5430  },
5431  {
5432   "chips": ["gfx8"],
5433   "map": {"at": 167116, "to": "mm"},
5434   "name": "CB_COLOR1_CLEAR_WORD1"
5435  },
5436  {
5437   "chips": ["gfx8"],
5438   "map": {"at": 167120, "to": "mm"},
5439   "name": "CB_COLOR1_DCC_BASE"
5440  },
5441  {
5442   "chips": ["gfx8"],
5443   "map": {"at": 167128, "to": "mm"},
5444   "name": "CB_COLOR2_BASE"
5445  },
5446  {
5447   "chips": ["gfx8"],
5448   "map": {"at": 167132, "to": "mm"},
5449   "name": "CB_COLOR2_PITCH",
5450   "type_ref": "CB_COLOR0_PITCH"
5451  },
5452  {
5453   "chips": ["gfx8"],
5454   "map": {"at": 167136, "to": "mm"},
5455   "name": "CB_COLOR2_SLICE",
5456   "type_ref": "CB_COLOR0_SLICE"
5457  },
5458  {
5459   "chips": ["gfx8"],
5460   "map": {"at": 167140, "to": "mm"},
5461   "name": "CB_COLOR2_VIEW",
5462   "type_ref": "CB_COLOR0_VIEW"
5463  },
5464  {
5465   "chips": ["gfx8"],
5466   "map": {"at": 167144, "to": "mm"},
5467   "name": "CB_COLOR2_INFO",
5468   "type_ref": "CB_COLOR0_INFO"
5469  },
5470  {
5471   "chips": ["gfx8"],
5472   "map": {"at": 167148, "to": "mm"},
5473   "name": "CB_COLOR2_ATTRIB",
5474   "type_ref": "CB_COLOR0_ATTRIB"
5475  },
5476  {
5477   "chips": ["gfx8"],
5478   "map": {"at": 167152, "to": "mm"},
5479   "name": "CB_COLOR2_DCC_CONTROL",
5480   "type_ref": "CB_COLOR0_DCC_CONTROL"
5481  },
5482  {
5483   "chips": ["gfx8"],
5484   "map": {"at": 167156, "to": "mm"},
5485   "name": "CB_COLOR2_CMASK"
5486  },
5487  {
5488   "chips": ["gfx8"],
5489   "map": {"at": 167160, "to": "mm"},
5490   "name": "CB_COLOR2_CMASK_SLICE",
5491   "type_ref": "CB_COLOR0_CMASK_SLICE"
5492  },
5493  {
5494   "chips": ["gfx8"],
5495   "map": {"at": 167164, "to": "mm"},
5496   "name": "CB_COLOR2_FMASK"
5497  },
5498  {
5499   "chips": ["gfx8"],
5500   "map": {"at": 167168, "to": "mm"},
5501   "name": "CB_COLOR2_FMASK_SLICE",
5502   "type_ref": "CB_COLOR0_SLICE"
5503  },
5504  {
5505   "chips": ["gfx8"],
5506   "map": {"at": 167172, "to": "mm"},
5507   "name": "CB_COLOR2_CLEAR_WORD0"
5508  },
5509  {
5510   "chips": ["gfx8"],
5511   "map": {"at": 167176, "to": "mm"},
5512   "name": "CB_COLOR2_CLEAR_WORD1"
5513  },
5514  {
5515   "chips": ["gfx8"],
5516   "map": {"at": 167180, "to": "mm"},
5517   "name": "CB_COLOR2_DCC_BASE"
5518  },
5519  {
5520   "chips": ["gfx8"],
5521   "map": {"at": 167188, "to": "mm"},
5522   "name": "CB_COLOR3_BASE"
5523  },
5524  {
5525   "chips": ["gfx8"],
5526   "map": {"at": 167192, "to": "mm"},
5527   "name": "CB_COLOR3_PITCH",
5528   "type_ref": "CB_COLOR0_PITCH"
5529  },
5530  {
5531   "chips": ["gfx8"],
5532   "map": {"at": 167196, "to": "mm"},
5533   "name": "CB_COLOR3_SLICE",
5534   "type_ref": "CB_COLOR0_SLICE"
5535  },
5536  {
5537   "chips": ["gfx8"],
5538   "map": {"at": 167200, "to": "mm"},
5539   "name": "CB_COLOR3_VIEW",
5540   "type_ref": "CB_COLOR0_VIEW"
5541  },
5542  {
5543   "chips": ["gfx8"],
5544   "map": {"at": 167204, "to": "mm"},
5545   "name": "CB_COLOR3_INFO",
5546   "type_ref": "CB_COLOR0_INFO"
5547  },
5548  {
5549   "chips": ["gfx8"],
5550   "map": {"at": 167208, "to": "mm"},
5551   "name": "CB_COLOR3_ATTRIB",
5552   "type_ref": "CB_COLOR0_ATTRIB"
5553  },
5554  {
5555   "chips": ["gfx8"],
5556   "map": {"at": 167212, "to": "mm"},
5557   "name": "CB_COLOR3_DCC_CONTROL",
5558   "type_ref": "CB_COLOR0_DCC_CONTROL"
5559  },
5560  {
5561   "chips": ["gfx8"],
5562   "map": {"at": 167216, "to": "mm"},
5563   "name": "CB_COLOR3_CMASK"
5564  },
5565  {
5566   "chips": ["gfx8"],
5567   "map": {"at": 167220, "to": "mm"},
5568   "name": "CB_COLOR3_CMASK_SLICE",
5569   "type_ref": "CB_COLOR0_CMASK_SLICE"
5570  },
5571  {
5572   "chips": ["gfx8"],
5573   "map": {"at": 167224, "to": "mm"},
5574   "name": "CB_COLOR3_FMASK"
5575  },
5576  {
5577   "chips": ["gfx8"],
5578   "map": {"at": 167228, "to": "mm"},
5579   "name": "CB_COLOR3_FMASK_SLICE",
5580   "type_ref": "CB_COLOR0_SLICE"
5581  },
5582  {
5583   "chips": ["gfx8"],
5584   "map": {"at": 167232, "to": "mm"},
5585   "name": "CB_COLOR3_CLEAR_WORD0"
5586  },
5587  {
5588   "chips": ["gfx8"],
5589   "map": {"at": 167236, "to": "mm"},
5590   "name": "CB_COLOR3_CLEAR_WORD1"
5591  },
5592  {
5593   "chips": ["gfx8"],
5594   "map": {"at": 167240, "to": "mm"},
5595   "name": "CB_COLOR3_DCC_BASE"
5596  },
5597  {
5598   "chips": ["gfx8"],
5599   "map": {"at": 167248, "to": "mm"},
5600   "name": "CB_COLOR4_BASE"
5601  },
5602  {
5603   "chips": ["gfx8"],
5604   "map": {"at": 167252, "to": "mm"},
5605   "name": "CB_COLOR4_PITCH",
5606   "type_ref": "CB_COLOR0_PITCH"
5607  },
5608  {
5609   "chips": ["gfx8"],
5610   "map": {"at": 167256, "to": "mm"},
5611   "name": "CB_COLOR4_SLICE",
5612   "type_ref": "CB_COLOR0_SLICE"
5613  },
5614  {
5615   "chips": ["gfx8"],
5616   "map": {"at": 167260, "to": "mm"},
5617   "name": "CB_COLOR4_VIEW",
5618   "type_ref": "CB_COLOR0_VIEW"
5619  },
5620  {
5621   "chips": ["gfx8"],
5622   "map": {"at": 167264, "to": "mm"},
5623   "name": "CB_COLOR4_INFO",
5624   "type_ref": "CB_COLOR0_INFO"
5625  },
5626  {
5627   "chips": ["gfx8"],
5628   "map": {"at": 167268, "to": "mm"},
5629   "name": "CB_COLOR4_ATTRIB",
5630   "type_ref": "CB_COLOR0_ATTRIB"
5631  },
5632  {
5633   "chips": ["gfx8"],
5634   "map": {"at": 167272, "to": "mm"},
5635   "name": "CB_COLOR4_DCC_CONTROL",
5636   "type_ref": "CB_COLOR0_DCC_CONTROL"
5637  },
5638  {
5639   "chips": ["gfx8"],
5640   "map": {"at": 167276, "to": "mm"},
5641   "name": "CB_COLOR4_CMASK"
5642  },
5643  {
5644   "chips": ["gfx8"],
5645   "map": {"at": 167280, "to": "mm"},
5646   "name": "CB_COLOR4_CMASK_SLICE",
5647   "type_ref": "CB_COLOR0_CMASK_SLICE"
5648  },
5649  {
5650   "chips": ["gfx8"],
5651   "map": {"at": 167284, "to": "mm"},
5652   "name": "CB_COLOR4_FMASK"
5653  },
5654  {
5655   "chips": ["gfx8"],
5656   "map": {"at": 167288, "to": "mm"},
5657   "name": "CB_COLOR4_FMASK_SLICE",
5658   "type_ref": "CB_COLOR0_SLICE"
5659  },
5660  {
5661   "chips": ["gfx8"],
5662   "map": {"at": 167292, "to": "mm"},
5663   "name": "CB_COLOR4_CLEAR_WORD0"
5664  },
5665  {
5666   "chips": ["gfx8"],
5667   "map": {"at": 167296, "to": "mm"},
5668   "name": "CB_COLOR4_CLEAR_WORD1"
5669  },
5670  {
5671   "chips": ["gfx8"],
5672   "map": {"at": 167300, "to": "mm"},
5673   "name": "CB_COLOR4_DCC_BASE"
5674  },
5675  {
5676   "chips": ["gfx8"],
5677   "map": {"at": 167308, "to": "mm"},
5678   "name": "CB_COLOR5_BASE"
5679  },
5680  {
5681   "chips": ["gfx8"],
5682   "map": {"at": 167312, "to": "mm"},
5683   "name": "CB_COLOR5_PITCH",
5684   "type_ref": "CB_COLOR0_PITCH"
5685  },
5686  {
5687   "chips": ["gfx8"],
5688   "map": {"at": 167316, "to": "mm"},
5689   "name": "CB_COLOR5_SLICE",
5690   "type_ref": "CB_COLOR0_SLICE"
5691  },
5692  {
5693   "chips": ["gfx8"],
5694   "map": {"at": 167320, "to": "mm"},
5695   "name": "CB_COLOR5_VIEW",
5696   "type_ref": "CB_COLOR0_VIEW"
5697  },
5698  {
5699   "chips": ["gfx8"],
5700   "map": {"at": 167324, "to": "mm"},
5701   "name": "CB_COLOR5_INFO",
5702   "type_ref": "CB_COLOR0_INFO"
5703  },
5704  {
5705   "chips": ["gfx8"],
5706   "map": {"at": 167328, "to": "mm"},
5707   "name": "CB_COLOR5_ATTRIB",
5708   "type_ref": "CB_COLOR0_ATTRIB"
5709  },
5710  {
5711   "chips": ["gfx8"],
5712   "map": {"at": 167332, "to": "mm"},
5713   "name": "CB_COLOR5_DCC_CONTROL",
5714   "type_ref": "CB_COLOR0_DCC_CONTROL"
5715  },
5716  {
5717   "chips": ["gfx8"],
5718   "map": {"at": 167336, "to": "mm"},
5719   "name": "CB_COLOR5_CMASK"
5720  },
5721  {
5722   "chips": ["gfx8"],
5723   "map": {"at": 167340, "to": "mm"},
5724   "name": "CB_COLOR5_CMASK_SLICE",
5725   "type_ref": "CB_COLOR0_CMASK_SLICE"
5726  },
5727  {
5728   "chips": ["gfx8"],
5729   "map": {"at": 167344, "to": "mm"},
5730   "name": "CB_COLOR5_FMASK"
5731  },
5732  {
5733   "chips": ["gfx8"],
5734   "map": {"at": 167348, "to": "mm"},
5735   "name": "CB_COLOR5_FMASK_SLICE",
5736   "type_ref": "CB_COLOR0_SLICE"
5737  },
5738  {
5739   "chips": ["gfx8"],
5740   "map": {"at": 167352, "to": "mm"},
5741   "name": "CB_COLOR5_CLEAR_WORD0"
5742  },
5743  {
5744   "chips": ["gfx8"],
5745   "map": {"at": 167356, "to": "mm"},
5746   "name": "CB_COLOR5_CLEAR_WORD1"
5747  },
5748  {
5749   "chips": ["gfx8"],
5750   "map": {"at": 167360, "to": "mm"},
5751   "name": "CB_COLOR5_DCC_BASE"
5752  },
5753  {
5754   "chips": ["gfx8"],
5755   "map": {"at": 167368, "to": "mm"},
5756   "name": "CB_COLOR6_BASE"
5757  },
5758  {
5759   "chips": ["gfx8"],
5760   "map": {"at": 167372, "to": "mm"},
5761   "name": "CB_COLOR6_PITCH",
5762   "type_ref": "CB_COLOR0_PITCH"
5763  },
5764  {
5765   "chips": ["gfx8"],
5766   "map": {"at": 167376, "to": "mm"},
5767   "name": "CB_COLOR6_SLICE",
5768   "type_ref": "CB_COLOR0_SLICE"
5769  },
5770  {
5771   "chips": ["gfx8"],
5772   "map": {"at": 167380, "to": "mm"},
5773   "name": "CB_COLOR6_VIEW",
5774   "type_ref": "CB_COLOR0_VIEW"
5775  },
5776  {
5777   "chips": ["gfx8"],
5778   "map": {"at": 167384, "to": "mm"},
5779   "name": "CB_COLOR6_INFO",
5780   "type_ref": "CB_COLOR0_INFO"
5781  },
5782  {
5783   "chips": ["gfx8"],
5784   "map": {"at": 167388, "to": "mm"},
5785   "name": "CB_COLOR6_ATTRIB",
5786   "type_ref": "CB_COLOR0_ATTRIB"
5787  },
5788  {
5789   "chips": ["gfx8"],
5790   "map": {"at": 167392, "to": "mm"},
5791   "name": "CB_COLOR6_DCC_CONTROL",
5792   "type_ref": "CB_COLOR0_DCC_CONTROL"
5793  },
5794  {
5795   "chips": ["gfx8"],
5796   "map": {"at": 167396, "to": "mm"},
5797   "name": "CB_COLOR6_CMASK"
5798  },
5799  {
5800   "chips": ["gfx8"],
5801   "map": {"at": 167400, "to": "mm"},
5802   "name": "CB_COLOR6_CMASK_SLICE",
5803   "type_ref": "CB_COLOR0_CMASK_SLICE"
5804  },
5805  {
5806   "chips": ["gfx8"],
5807   "map": {"at": 167404, "to": "mm"},
5808   "name": "CB_COLOR6_FMASK"
5809  },
5810  {
5811   "chips": ["gfx8"],
5812   "map": {"at": 167408, "to": "mm"},
5813   "name": "CB_COLOR6_FMASK_SLICE",
5814   "type_ref": "CB_COLOR0_SLICE"
5815  },
5816  {
5817   "chips": ["gfx8"],
5818   "map": {"at": 167412, "to": "mm"},
5819   "name": "CB_COLOR6_CLEAR_WORD0"
5820  },
5821  {
5822   "chips": ["gfx8"],
5823   "map": {"at": 167416, "to": "mm"},
5824   "name": "CB_COLOR6_CLEAR_WORD1"
5825  },
5826  {
5827   "chips": ["gfx8"],
5828   "map": {"at": 167420, "to": "mm"},
5829   "name": "CB_COLOR6_DCC_BASE"
5830  },
5831  {
5832   "chips": ["gfx8"],
5833   "map": {"at": 167428, "to": "mm"},
5834   "name": "CB_COLOR7_BASE"
5835  },
5836  {
5837   "chips": ["gfx8"],
5838   "map": {"at": 167432, "to": "mm"},
5839   "name": "CB_COLOR7_PITCH",
5840   "type_ref": "CB_COLOR0_PITCH"
5841  },
5842  {
5843   "chips": ["gfx8"],
5844   "map": {"at": 167436, "to": "mm"},
5845   "name": "CB_COLOR7_SLICE",
5846   "type_ref": "CB_COLOR0_SLICE"
5847  },
5848  {
5849   "chips": ["gfx8"],
5850   "map": {"at": 167440, "to": "mm"},
5851   "name": "CB_COLOR7_VIEW",
5852   "type_ref": "CB_COLOR0_VIEW"
5853  },
5854  {
5855   "chips": ["gfx8"],
5856   "map": {"at": 167444, "to": "mm"},
5857   "name": "CB_COLOR7_INFO",
5858   "type_ref": "CB_COLOR0_INFO"
5859  },
5860  {
5861   "chips": ["gfx8"],
5862   "map": {"at": 167448, "to": "mm"},
5863   "name": "CB_COLOR7_ATTRIB",
5864   "type_ref": "CB_COLOR0_ATTRIB"
5865  },
5866  {
5867   "chips": ["gfx8"],
5868   "map": {"at": 167452, "to": "mm"},
5869   "name": "CB_COLOR7_DCC_CONTROL",
5870   "type_ref": "CB_COLOR0_DCC_CONTROL"
5871  },
5872  {
5873   "chips": ["gfx8"],
5874   "map": {"at": 167456, "to": "mm"},
5875   "name": "CB_COLOR7_CMASK"
5876  },
5877  {
5878   "chips": ["gfx8"],
5879   "map": {"at": 167460, "to": "mm"},
5880   "name": "CB_COLOR7_CMASK_SLICE",
5881   "type_ref": "CB_COLOR0_CMASK_SLICE"
5882  },
5883  {
5884   "chips": ["gfx8"],
5885   "map": {"at": 167464, "to": "mm"},
5886   "name": "CB_COLOR7_FMASK"
5887  },
5888  {
5889   "chips": ["gfx8"],
5890   "map": {"at": 167468, "to": "mm"},
5891   "name": "CB_COLOR7_FMASK_SLICE",
5892   "type_ref": "CB_COLOR0_SLICE"
5893  },
5894  {
5895   "chips": ["gfx8"],
5896   "map": {"at": 167472, "to": "mm"},
5897   "name": "CB_COLOR7_CLEAR_WORD0"
5898  },
5899  {
5900   "chips": ["gfx8"],
5901   "map": {"at": 167476, "to": "mm"},
5902   "name": "CB_COLOR7_CLEAR_WORD1"
5903  },
5904  {
5905   "chips": ["gfx8"],
5906   "map": {"at": 167480, "to": "mm"},
5907   "name": "CB_COLOR7_DCC_BASE"
5908  },
5909  {
5910   "chips": ["gfx8"],
5911   "map": {"at": 196608, "to": "mm"},
5912   "name": "CP_EOP_DONE_ADDR_LO",
5913   "type_ref": "CP_EOP_DONE_ADDR_LO"
5914  },
5915  {
5916   "chips": ["gfx8"],
5917   "map": {"at": 196612, "to": "mm"},
5918   "name": "CP_EOP_DONE_ADDR_HI",
5919   "type_ref": "CP_EOP_DONE_ADDR_HI"
5920  },
5921  {
5922   "chips": ["gfx8"],
5923   "map": {"at": 196616, "to": "mm"},
5924   "name": "CP_EOP_DONE_DATA_LO"
5925  },
5926  {
5927   "chips": ["gfx8"],
5928   "map": {"at": 196620, "to": "mm"},
5929   "name": "CP_EOP_DONE_DATA_HI"
5930  },
5931  {
5932   "chips": ["gfx8"],
5933   "map": {"at": 196624, "to": "mm"},
5934   "name": "CP_EOP_LAST_FENCE_LO"
5935  },
5936  {
5937   "chips": ["gfx8"],
5938   "map": {"at": 196628, "to": "mm"},
5939   "name": "CP_EOP_LAST_FENCE_HI"
5940  },
5941  {
5942   "chips": ["gfx8"],
5943   "map": {"at": 196632, "to": "mm"},
5944   "name": "CP_STREAM_OUT_ADDR_LO",
5945   "type_ref": "CP_STREAM_OUT_ADDR_LO"
5946  },
5947  {
5948   "chips": ["gfx8"],
5949   "map": {"at": 196636, "to": "mm"},
5950   "name": "CP_STREAM_OUT_ADDR_HI",
5951   "type_ref": "CP_STREAM_OUT_ADDR_HI"
5952  },
5953  {
5954   "chips": ["gfx8"],
5955   "map": {"at": 196640, "to": "mm"},
5956   "name": "CP_NUM_PRIM_WRITTEN_COUNT0_LO"
5957  },
5958  {
5959   "chips": ["gfx8"],
5960   "map": {"at": 196644, "to": "mm"},
5961   "name": "CP_NUM_PRIM_WRITTEN_COUNT0_HI"
5962  },
5963  {
5964   "chips": ["gfx8"],
5965   "map": {"at": 196648, "to": "mm"},
5966   "name": "CP_NUM_PRIM_NEEDED_COUNT0_LO"
5967  },
5968  {
5969   "chips": ["gfx8"],
5970   "map": {"at": 196652, "to": "mm"},
5971   "name": "CP_NUM_PRIM_NEEDED_COUNT0_HI"
5972  },
5973  {
5974   "chips": ["gfx8"],
5975   "map": {"at": 196656, "to": "mm"},
5976   "name": "CP_NUM_PRIM_WRITTEN_COUNT1_LO"
5977  },
5978  {
5979   "chips": ["gfx8"],
5980   "map": {"at": 196660, "to": "mm"},
5981   "name": "CP_NUM_PRIM_WRITTEN_COUNT1_HI"
5982  },
5983  {
5984   "chips": ["gfx8"],
5985   "map": {"at": 196664, "to": "mm"},
5986   "name": "CP_NUM_PRIM_NEEDED_COUNT1_LO"
5987  },
5988  {
5989   "chips": ["gfx8"],
5990   "map": {"at": 196668, "to": "mm"},
5991   "name": "CP_NUM_PRIM_NEEDED_COUNT1_HI"
5992  },
5993  {
5994   "chips": ["gfx8"],
5995   "map": {"at": 196672, "to": "mm"},
5996   "name": "CP_NUM_PRIM_WRITTEN_COUNT2_LO"
5997  },
5998  {
5999   "chips": ["gfx8"],
6000   "map": {"at": 196676, "to": "mm"},
6001   "name": "CP_NUM_PRIM_WRITTEN_COUNT2_HI"
6002  },
6003  {
6004   "chips": ["gfx8"],
6005   "map": {"at": 196680, "to": "mm"},
6006   "name": "CP_NUM_PRIM_NEEDED_COUNT2_LO"
6007  },
6008  {
6009   "chips": ["gfx8"],
6010   "map": {"at": 196684, "to": "mm"},
6011   "name": "CP_NUM_PRIM_NEEDED_COUNT2_HI"
6012  },
6013  {
6014   "chips": ["gfx8"],
6015   "map": {"at": 196688, "to": "mm"},
6016   "name": "CP_NUM_PRIM_WRITTEN_COUNT3_LO"
6017  },
6018  {
6019   "chips": ["gfx8"],
6020   "map": {"at": 196692, "to": "mm"},
6021   "name": "CP_NUM_PRIM_WRITTEN_COUNT3_HI"
6022  },
6023  {
6024   "chips": ["gfx8"],
6025   "map": {"at": 196696, "to": "mm"},
6026   "name": "CP_NUM_PRIM_NEEDED_COUNT3_LO"
6027  },
6028  {
6029   "chips": ["gfx8"],
6030   "map": {"at": 196700, "to": "mm"},
6031   "name": "CP_NUM_PRIM_NEEDED_COUNT3_HI"
6032  },
6033  {
6034   "chips": ["gfx8"],
6035   "map": {"at": 196704, "to": "mm"},
6036   "name": "CP_PIPE_STATS_ADDR_LO",
6037   "type_ref": "CP_PIPE_STATS_ADDR_LO"
6038  },
6039  {
6040   "chips": ["gfx8"],
6041   "map": {"at": 196708, "to": "mm"},
6042   "name": "CP_PIPE_STATS_ADDR_HI",
6043   "type_ref": "CP_PIPE_STATS_ADDR_HI"
6044  },
6045  {
6046   "chips": ["gfx8"],
6047   "map": {"at": 196712, "to": "mm"},
6048   "name": "CP_VGT_IAVERT_COUNT_LO"
6049  },
6050  {
6051   "chips": ["gfx8"],
6052   "map": {"at": 196716, "to": "mm"},
6053   "name": "CP_VGT_IAVERT_COUNT_HI"
6054  },
6055  {
6056   "chips": ["gfx8"],
6057   "map": {"at": 196720, "to": "mm"},
6058   "name": "CP_VGT_IAPRIM_COUNT_LO"
6059  },
6060  {
6061   "chips": ["gfx8"],
6062   "map": {"at": 196724, "to": "mm"},
6063   "name": "CP_VGT_IAPRIM_COUNT_HI"
6064  },
6065  {
6066   "chips": ["gfx8"],
6067   "map": {"at": 196728, "to": "mm"},
6068   "name": "CP_VGT_GSPRIM_COUNT_LO"
6069  },
6070  {
6071   "chips": ["gfx8"],
6072   "map": {"at": 196732, "to": "mm"},
6073   "name": "CP_VGT_GSPRIM_COUNT_HI"
6074  },
6075  {
6076   "chips": ["gfx8"],
6077   "map": {"at": 196736, "to": "mm"},
6078   "name": "CP_VGT_VSINVOC_COUNT_LO"
6079  },
6080  {
6081   "chips": ["gfx8"],
6082   "map": {"at": 196740, "to": "mm"},
6083   "name": "CP_VGT_VSINVOC_COUNT_HI"
6084  },
6085  {
6086   "chips": ["gfx8"],
6087   "map": {"at": 196744, "to": "mm"},
6088   "name": "CP_VGT_GSINVOC_COUNT_LO"
6089  },
6090  {
6091   "chips": ["gfx8"],
6092   "map": {"at": 196748, "to": "mm"},
6093   "name": "CP_VGT_GSINVOC_COUNT_HI"
6094  },
6095  {
6096   "chips": ["gfx8"],
6097   "map": {"at": 196752, "to": "mm"},
6098   "name": "CP_VGT_HSINVOC_COUNT_LO"
6099  },
6100  {
6101   "chips": ["gfx8"],
6102   "map": {"at": 196756, "to": "mm"},
6103   "name": "CP_VGT_HSINVOC_COUNT_HI"
6104  },
6105  {
6106   "chips": ["gfx8"],
6107   "map": {"at": 196760, "to": "mm"},
6108   "name": "CP_VGT_DSINVOC_COUNT_LO"
6109  },
6110  {
6111   "chips": ["gfx8"],
6112   "map": {"at": 196764, "to": "mm"},
6113   "name": "CP_VGT_DSINVOC_COUNT_HI"
6114  },
6115  {
6116   "chips": ["gfx8"],
6117   "map": {"at": 196768, "to": "mm"},
6118   "name": "CP_PA_CINVOC_COUNT_LO"
6119  },
6120  {
6121   "chips": ["gfx8"],
6122   "map": {"at": 196772, "to": "mm"},
6123   "name": "CP_PA_CINVOC_COUNT_HI"
6124  },
6125  {
6126   "chips": ["gfx8"],
6127   "map": {"at": 196776, "to": "mm"},
6128   "name": "CP_PA_CPRIM_COUNT_LO"
6129  },
6130  {
6131   "chips": ["gfx8"],
6132   "map": {"at": 196780, "to": "mm"},
6133   "name": "CP_PA_CPRIM_COUNT_HI"
6134  },
6135  {
6136   "chips": ["gfx8"],
6137   "map": {"at": 196784, "to": "mm"},
6138   "name": "CP_SC_PSINVOC_COUNT0_LO"
6139  },
6140  {
6141   "chips": ["gfx8"],
6142   "map": {"at": 196788, "to": "mm"},
6143   "name": "CP_SC_PSINVOC_COUNT0_HI"
6144  },
6145  {
6146   "chips": ["gfx8"],
6147   "map": {"at": 196792, "to": "mm"},
6148   "name": "CP_SC_PSINVOC_COUNT1_LO"
6149  },
6150  {
6151   "chips": ["gfx8"],
6152   "map": {"at": 196796, "to": "mm"},
6153   "name": "CP_SC_PSINVOC_COUNT1_HI"
6154  },
6155  {
6156   "chips": ["gfx8"],
6157   "map": {"at": 196800, "to": "mm"},
6158   "name": "CP_VGT_CSINVOC_COUNT_LO"
6159  },
6160  {
6161   "chips": ["gfx8"],
6162   "map": {"at": 196804, "to": "mm"},
6163   "name": "CP_VGT_CSINVOC_COUNT_HI"
6164  },
6165  {
6166   "chips": ["gfx8"],
6167   "map": {"at": 196852, "to": "mm"},
6168   "name": "CP_PIPE_STATS_CONTROL",
6169   "type_ref": "CP_PIPE_STATS_CONTROL"
6170  },
6171  {
6172   "chips": ["gfx8"],
6173   "map": {"at": 196856, "to": "mm"},
6174   "name": "CP_STREAM_OUT_CONTROL",
6175   "type_ref": "CP_PIPE_STATS_CONTROL"
6176  },
6177  {
6178   "chips": ["gfx8"],
6179   "map": {"at": 196860, "to": "mm"},
6180   "name": "CP_STRMOUT_CNTL",
6181   "type_ref": "CP_STRMOUT_CNTL"
6182  },
6183  {
6184   "chips": ["gfx8"],
6185   "map": {"at": 196864, "to": "mm"},
6186   "name": "SCRATCH_REG0"
6187  },
6188  {
6189   "chips": ["gfx8"],
6190   "map": {"at": 196868, "to": "mm"},
6191   "name": "SCRATCH_REG1"
6192  },
6193  {
6194   "chips": ["gfx8"],
6195   "map": {"at": 196872, "to": "mm"},
6196   "name": "SCRATCH_REG2"
6197  },
6198  {
6199   "chips": ["gfx8"],
6200   "map": {"at": 196876, "to": "mm"},
6201   "name": "SCRATCH_REG3"
6202  },
6203  {
6204   "chips": ["gfx8"],
6205   "map": {"at": 196880, "to": "mm"},
6206   "name": "SCRATCH_REG4"
6207  },
6208  {
6209   "chips": ["gfx8"],
6210   "map": {"at": 196884, "to": "mm"},
6211   "name": "SCRATCH_REG5"
6212  },
6213  {
6214   "chips": ["gfx8"],
6215   "map": {"at": 196888, "to": "mm"},
6216   "name": "SCRATCH_REG6"
6217  },
6218  {
6219   "chips": ["gfx8"],
6220   "map": {"at": 196892, "to": "mm"},
6221   "name": "SCRATCH_REG7"
6222  },
6223  {
6224   "chips": ["gfx8"],
6225   "map": {"at": 196928, "to": "mm"},
6226   "name": "SCRATCH_UMSK",
6227   "type_ref": "SCRATCH_UMSK"
6228  },
6229  {
6230   "chips": ["gfx8"],
6231   "map": {"at": 196932, "to": "mm"},
6232   "name": "SCRATCH_ADDR"
6233  },
6234  {
6235   "chips": ["gfx8"],
6236   "map": {"at": 196936, "to": "mm"},
6237   "name": "CP_PFP_ATOMIC_PREOP_LO"
6238  },
6239  {
6240   "chips": ["gfx8"],
6241   "map": {"at": 196940, "to": "mm"},
6242   "name": "CP_PFP_ATOMIC_PREOP_HI"
6243  },
6244  {
6245   "chips": ["gfx8"],
6246   "map": {"at": 196944, "to": "mm"},
6247   "name": "CP_PFP_GDS_ATOMIC0_PREOP_LO"
6248  },
6249  {
6250   "chips": ["gfx8"],
6251   "map": {"at": 196948, "to": "mm"},
6252   "name": "CP_PFP_GDS_ATOMIC0_PREOP_HI"
6253  },
6254  {
6255   "chips": ["gfx8"],
6256   "map": {"at": 196952, "to": "mm"},
6257   "name": "CP_PFP_GDS_ATOMIC1_PREOP_LO"
6258  },
6259  {
6260   "chips": ["gfx8"],
6261   "map": {"at": 196956, "to": "mm"},
6262   "name": "CP_PFP_GDS_ATOMIC1_PREOP_HI"
6263  },
6264  {
6265   "chips": ["gfx8"],
6266   "map": {"at": 196960, "to": "mm"},
6267   "name": "CP_APPEND_ADDR_LO",
6268   "type_ref": "CP_APPEND_ADDR_LO"
6269  },
6270  {
6271   "chips": ["gfx8"],
6272   "map": {"at": 196964, "to": "mm"},
6273   "name": "CP_APPEND_ADDR_HI",
6274   "type_ref": "CP_APPEND_ADDR_HI"
6275  },
6276  {
6277   "chips": ["gfx8"],
6278   "map": {"at": 196968, "to": "mm"},
6279   "name": "CP_APPEND_DATA"
6280  },
6281  {
6282   "chips": ["gfx8"],
6283   "map": {"at": 196972, "to": "mm"},
6284   "name": "CP_APPEND_LAST_CS_FENCE"
6285  },
6286  {
6287   "chips": ["gfx8"],
6288   "map": {"at": 196976, "to": "mm"},
6289   "name": "CP_APPEND_LAST_PS_FENCE"
6290  },
6291  {
6292   "chips": ["gfx8"],
6293   "map": {"at": 196980, "to": "mm"},
6294   "name": "CP_ATOMIC_PREOP_LO"
6295  },
6296  {
6297   "chips": ["gfx8"],
6298   "map": {"at": 196984, "to": "mm"},
6299   "name": "CP_ATOMIC_PREOP_HI"
6300  },
6301  {
6302   "chips": ["gfx8"],
6303   "map": {"at": 196988, "to": "mm"},
6304   "name": "CP_GDS_ATOMIC0_PREOP_LO"
6305  },
6306  {
6307   "chips": ["gfx8"],
6308   "map": {"at": 196992, "to": "mm"},
6309   "name": "CP_GDS_ATOMIC0_PREOP_HI"
6310  },
6311  {
6312   "chips": ["gfx8"],
6313   "map": {"at": 196996, "to": "mm"},
6314   "name": "CP_GDS_ATOMIC1_PREOP_LO"
6315  },
6316  {
6317   "chips": ["gfx8"],
6318   "map": {"at": 197000, "to": "mm"},
6319   "name": "CP_GDS_ATOMIC1_PREOP_HI"
6320  },
6321  {
6322   "chips": ["gfx8"],
6323   "map": {"at": 197028, "to": "mm"},
6324   "name": "CP_ME_MC_WADDR_LO",
6325   "type_ref": "CP_ME_MC_WADDR_LO"
6326  },
6327  {
6328   "chips": ["gfx8"],
6329   "map": {"at": 197032, "to": "mm"},
6330   "name": "CP_ME_MC_WADDR_HI",
6331   "type_ref": "CP_ME_MC_WADDR_HI"
6332  },
6333  {
6334   "chips": ["gfx8"],
6335   "map": {"at": 197036, "to": "mm"},
6336   "name": "CP_ME_MC_WDATA_LO"
6337  },
6338  {
6339   "chips": ["gfx8"],
6340   "map": {"at": 197040, "to": "mm"},
6341   "name": "CP_ME_MC_WDATA_HI"
6342  },
6343  {
6344   "chips": ["gfx8"],
6345   "map": {"at": 197044, "to": "mm"},
6346   "name": "CP_ME_MC_RADDR_LO",
6347   "type_ref": "CP_ME_MC_RADDR_LO"
6348  },
6349  {
6350   "chips": ["gfx8"],
6351   "map": {"at": 197048, "to": "mm"},
6352   "name": "CP_ME_MC_RADDR_HI",
6353   "type_ref": "CP_ME_MC_RADDR_HI"
6354  },
6355  {
6356   "chips": ["gfx8"],
6357   "map": {"at": 197052, "to": "mm"},
6358   "name": "CP_SEM_WAIT_TIMER"
6359  },
6360  {
6361   "chips": ["gfx8"],
6362   "map": {"at": 197056, "to": "mm"},
6363   "name": "CP_SIG_SEM_ADDR_LO",
6364   "type_ref": "CP_SIG_SEM_ADDR_LO"
6365  },
6366  {
6367   "chips": ["gfx8"],
6368   "map": {"at": 197060, "to": "mm"},
6369   "name": "CP_SIG_SEM_ADDR_HI",
6370   "type_ref": "CP_SIG_SEM_ADDR_HI"
6371  },
6372  {
6373   "chips": ["gfx8"],
6374   "map": {"at": 197072, "to": "mm"},
6375   "name": "CP_WAIT_REG_MEM_TIMEOUT"
6376  },
6377  {
6378   "chips": ["gfx8"],
6379   "map": {"at": 197076, "to": "mm"},
6380   "name": "CP_WAIT_SEM_ADDR_LO",
6381   "type_ref": "CP_SIG_SEM_ADDR_LO"
6382  },
6383  {
6384   "chips": ["gfx8"],
6385   "map": {"at": 197080, "to": "mm"},
6386   "name": "CP_WAIT_SEM_ADDR_HI",
6387   "type_ref": "CP_SIG_SEM_ADDR_HI"
6388  },
6389  {
6390   "chips": ["gfx8"],
6391   "map": {"at": 197084, "to": "mm"},
6392   "name": "CP_DMA_PFP_CONTROL",
6393   "type_ref": "CP_DMA_ME_CONTROL"
6394  },
6395  {
6396   "chips": ["gfx8"],
6397   "map": {"at": 197088, "to": "mm"},
6398   "name": "CP_DMA_ME_CONTROL",
6399   "type_ref": "CP_DMA_ME_CONTROL"
6400  },
6401  {
6402   "chips": ["gfx8"],
6403   "map": {"at": 197092, "to": "mm"},
6404   "name": "CP_COHER_BASE_HI",
6405   "type_ref": "CP_COHER_BASE_HI"
6406  },
6407  {
6408   "chips": ["gfx8"],
6409   "map": {"at": 197100, "to": "mm"},
6410   "name": "CP_COHER_START_DELAY",
6411   "type_ref": "CP_COHER_START_DELAY"
6412  },
6413  {
6414   "chips": ["gfx8"],
6415   "map": {"at": 197104, "to": "mm"},
6416   "name": "CP_COHER_CNTL",
6417   "type_ref": "CP_COHER_CNTL"
6418  },
6419  {
6420   "chips": ["gfx8"],
6421   "map": {"at": 197108, "to": "mm"},
6422   "name": "CP_COHER_SIZE"
6423  },
6424  {
6425   "chips": ["gfx8"],
6426   "map": {"at": 197112, "to": "mm"},
6427   "name": "CP_COHER_BASE"
6428  },
6429  {
6430   "chips": ["gfx8"],
6431   "map": {"at": 197116, "to": "mm"},
6432   "name": "CP_COHER_STATUS",
6433   "type_ref": "CP_COHER_STATUS"
6434  },
6435  {
6436   "chips": ["gfx8"],
6437   "map": {"at": 197120, "to": "mm"},
6438   "name": "CP_DMA_ME_SRC_ADDR"
6439  },
6440  {
6441   "chips": ["gfx8"],
6442   "map": {"at": 197124, "to": "mm"},
6443   "name": "CP_DMA_ME_SRC_ADDR_HI",
6444   "type_ref": "CP_DMA_ME_SRC_ADDR_HI"
6445  },
6446  {
6447   "chips": ["gfx8"],
6448   "map": {"at": 197128, "to": "mm"},
6449   "name": "CP_DMA_ME_DST_ADDR"
6450  },
6451  {
6452   "chips": ["gfx8"],
6453   "map": {"at": 197132, "to": "mm"},
6454   "name": "CP_DMA_ME_DST_ADDR_HI",
6455   "type_ref": "CP_DMA_ME_DST_ADDR_HI"
6456  },
6457  {
6458   "chips": ["gfx8"],
6459   "map": {"at": 197136, "to": "mm"},
6460   "name": "CP_DMA_ME_COMMAND",
6461   "type_ref": "CP_DMA_ME_COMMAND"
6462  },
6463  {
6464   "chips": ["gfx8"],
6465   "map": {"at": 197140, "to": "mm"},
6466   "name": "CP_DMA_PFP_SRC_ADDR"
6467  },
6468  {
6469   "chips": ["gfx8"],
6470   "map": {"at": 197144, "to": "mm"},
6471   "name": "CP_DMA_PFP_SRC_ADDR_HI",
6472   "type_ref": "CP_DMA_ME_SRC_ADDR_HI"
6473  },
6474  {
6475   "chips": ["gfx8"],
6476   "map": {"at": 197148, "to": "mm"},
6477   "name": "CP_DMA_PFP_DST_ADDR"
6478  },
6479  {
6480   "chips": ["gfx8"],
6481   "map": {"at": 197152, "to": "mm"},
6482   "name": "CP_DMA_PFP_DST_ADDR_HI",
6483   "type_ref": "CP_DMA_ME_DST_ADDR_HI"
6484  },
6485  {
6486   "chips": ["gfx8"],
6487   "map": {"at": 197156, "to": "mm"},
6488   "name": "CP_DMA_PFP_COMMAND",
6489   "type_ref": "CP_DMA_ME_COMMAND"
6490  },
6491  {
6492   "chips": ["gfx8"],
6493   "map": {"at": 197160, "to": "mm"},
6494   "name": "CP_DMA_CNTL",
6495   "type_ref": "CP_DMA_CNTL"
6496  },
6497  {
6498   "chips": ["gfx8"],
6499   "map": {"at": 197164, "to": "mm"},
6500   "name": "CP_DMA_READ_TAGS",
6501   "type_ref": "CP_DMA_READ_TAGS"
6502  },
6503  {
6504   "chips": ["gfx8"],
6505   "map": {"at": 197168, "to": "mm"},
6506   "name": "CP_COHER_SIZE_HI",
6507   "type_ref": "CP_COHER_SIZE_HI"
6508  },
6509  {
6510   "chips": ["gfx8"],
6511   "map": {"at": 197172, "to": "mm"},
6512   "name": "CP_PFP_IB_CONTROL",
6513   "type_ref": "CP_PFP_IB_CONTROL"
6514  },
6515  {
6516   "chips": ["gfx8"],
6517   "map": {"at": 197176, "to": "mm"},
6518   "name": "CP_PFP_LOAD_CONTROL",
6519   "type_ref": "CP_PFP_LOAD_CONTROL"
6520  },
6521  {
6522   "chips": ["gfx8"],
6523   "map": {"at": 197180, "to": "mm"},
6524   "name": "CP_SCRATCH_INDEX",
6525   "type_ref": "CP_SCRATCH_INDEX"
6526  },
6527  {
6528   "chips": ["gfx8"],
6529   "map": {"at": 197184, "to": "mm"},
6530   "name": "CP_SCRATCH_DATA"
6531  },
6532  {
6533   "chips": ["gfx8"],
6534   "map": {"at": 197188, "to": "mm"},
6535   "name": "CP_RB_OFFSET",
6536   "type_ref": "CP_RB_OFFSET"
6537  },
6538  {
6539   "chips": ["gfx8"],
6540   "map": {"at": 197192, "to": "mm"},
6541   "name": "CP_IB1_OFFSET",
6542   "type_ref": "CP_IB1_OFFSET"
6543  },
6544  {
6545   "chips": ["gfx8"],
6546   "map": {"at": 197196, "to": "mm"},
6547   "name": "CP_IB2_OFFSET",
6548   "type_ref": "CP_IB2_OFFSET"
6549  },
6550  {
6551   "chips": ["gfx8"],
6552   "map": {"at": 197200, "to": "mm"},
6553   "name": "CP_IB1_PREAMBLE_BEGIN",
6554   "type_ref": "CP_IB1_PREAMBLE_BEGIN"
6555  },
6556  {
6557   "chips": ["gfx8"],
6558   "map": {"at": 197204, "to": "mm"},
6559   "name": "CP_IB1_PREAMBLE_END",
6560   "type_ref": "CP_IB1_PREAMBLE_END"
6561  },
6562  {
6563   "chips": ["gfx8"],
6564   "map": {"at": 197208, "to": "mm"},
6565   "name": "CP_IB2_PREAMBLE_BEGIN",
6566   "type_ref": "CP_IB2_PREAMBLE_BEGIN"
6567  },
6568  {
6569   "chips": ["gfx8"],
6570   "map": {"at": 197212, "to": "mm"},
6571   "name": "CP_IB2_PREAMBLE_END",
6572   "type_ref": "CP_IB2_PREAMBLE_END"
6573  },
6574  {
6575   "chips": ["gfx8"],
6576   "map": {"at": 197216, "to": "mm"},
6577   "name": "CP_CE_IB1_OFFSET",
6578   "type_ref": "CP_IB1_OFFSET"
6579  },
6580  {
6581   "chips": ["gfx8"],
6582   "map": {"at": 197220, "to": "mm"},
6583   "name": "CP_CE_IB2_OFFSET",
6584   "type_ref": "CP_IB2_OFFSET"
6585  },
6586  {
6587   "chips": ["gfx8"],
6588   "map": {"at": 197224, "to": "mm"},
6589   "name": "CP_CE_COUNTER"
6590  },
6591  {
6592   "chips": ["gfx8"],
6593   "map": {"at": 197228, "to": "mm"},
6594   "name": "CP_CE_RB_OFFSET",
6595   "type_ref": "CP_RB_OFFSET"
6596  },
6597  {
6598   "chips": ["gfx8"],
6599   "map": {"at": 197388, "to": "mm"},
6600   "name": "CP_CE_INIT_BASE_LO",
6601   "type_ref": "CP_CE_INIT_BASE_LO"
6602  },
6603  {
6604   "chips": ["gfx8"],
6605   "map": {"at": 197392, "to": "mm"},
6606   "name": "CP_CE_INIT_BASE_HI",
6607   "type_ref": "CP_CE_INIT_BASE_HI"
6608  },
6609  {
6610   "chips": ["gfx8"],
6611   "map": {"at": 197396, "to": "mm"},
6612   "name": "CP_CE_INIT_BUFSZ",
6613   "type_ref": "CP_CE_INIT_BUFSZ"
6614  },
6615  {
6616   "chips": ["gfx8"],
6617   "map": {"at": 197400, "to": "mm"},
6618   "name": "CP_CE_IB1_BASE_LO",
6619   "type_ref": "CP_CE_IB1_BASE_LO"
6620  },
6621  {
6622   "chips": ["gfx8"],
6623   "map": {"at": 197404, "to": "mm"},
6624   "name": "CP_CE_IB1_BASE_HI",
6625   "type_ref": "CP_CE_IB1_BASE_HI"
6626  },
6627  {
6628   "chips": ["gfx8"],
6629   "map": {"at": 197408, "to": "mm"},
6630   "name": "CP_CE_IB1_BUFSZ",
6631   "type_ref": "CP_CE_IB1_BUFSZ"
6632  },
6633  {
6634   "chips": ["gfx8"],
6635   "map": {"at": 197412, "to": "mm"},
6636   "name": "CP_CE_IB2_BASE_LO",
6637   "type_ref": "CP_CE_IB2_BASE_LO"
6638  },
6639  {
6640   "chips": ["gfx8"],
6641   "map": {"at": 197416, "to": "mm"},
6642   "name": "CP_CE_IB2_BASE_HI",
6643   "type_ref": "CP_CE_IB2_BASE_HI"
6644  },
6645  {
6646   "chips": ["gfx8"],
6647   "map": {"at": 197420, "to": "mm"},
6648   "name": "CP_CE_IB2_BUFSZ",
6649   "type_ref": "CP_CE_IB2_BUFSZ"
6650  },
6651  {
6652   "chips": ["gfx8"],
6653   "map": {"at": 197424, "to": "mm"},
6654   "name": "CP_IB1_BASE_LO",
6655   "type_ref": "CP_CE_IB1_BASE_LO"
6656  },
6657  {
6658   "chips": ["gfx8"],
6659   "map": {"at": 197428, "to": "mm"},
6660   "name": "CP_IB1_BASE_HI",
6661   "type_ref": "CP_CE_IB1_BASE_HI"
6662  },
6663  {
6664   "chips": ["gfx8"],
6665   "map": {"at": 197432, "to": "mm"},
6666   "name": "CP_IB1_BUFSZ",
6667   "type_ref": "CP_CE_IB1_BUFSZ"
6668  },
6669  {
6670   "chips": ["gfx8"],
6671   "map": {"at": 197436, "to": "mm"},
6672   "name": "CP_IB2_BASE_LO",
6673   "type_ref": "CP_CE_IB2_BASE_LO"
6674  },
6675  {
6676   "chips": ["gfx8"],
6677   "map": {"at": 197440, "to": "mm"},
6678   "name": "CP_IB2_BASE_HI",
6679   "type_ref": "CP_CE_IB2_BASE_HI"
6680  },
6681  {
6682   "chips": ["gfx8"],
6683   "map": {"at": 197444, "to": "mm"},
6684   "name": "CP_IB2_BUFSZ",
6685   "type_ref": "CP_CE_IB2_BUFSZ"
6686  },
6687  {
6688   "chips": ["gfx8"],
6689   "map": {"at": 197448, "to": "mm"},
6690   "name": "CP_ST_BASE_LO",
6691   "type_ref": "CP_ST_BASE_LO"
6692  },
6693  {
6694   "chips": ["gfx8"],
6695   "map": {"at": 197452, "to": "mm"},
6696   "name": "CP_ST_BASE_HI",
6697   "type_ref": "CP_ST_BASE_HI"
6698  },
6699  {
6700   "chips": ["gfx8"],
6701   "map": {"at": 197456, "to": "mm"},
6702   "name": "CP_ST_BUFSZ",
6703   "type_ref": "CP_ST_BUFSZ"
6704  },
6705  {
6706   "chips": ["gfx8"],
6707   "map": {"at": 197460, "to": "mm"},
6708   "name": "CP_EOP_DONE_EVENT_CNTL",
6709   "type_ref": "CP_EOP_DONE_EVENT_CNTL"
6710  },
6711  {
6712   "chips": ["gfx8"],
6713   "map": {"at": 197464, "to": "mm"},
6714   "name": "CP_EOP_DONE_DATA_CNTL",
6715   "type_ref": "CP_EOP_DONE_DATA_CNTL"
6716  },
6717  {
6718   "chips": ["gfx8"],
6719   "map": {"at": 197468, "to": "mm"},
6720   "name": "CP_EOP_DONE_CNTX_ID",
6721   "type_ref": "CP_EOP_DONE_CNTX_ID"
6722  },
6723  {
6724   "chips": ["gfx8"],
6725   "map": {"at": 197552, "to": "mm"},
6726   "name": "CP_PFP_COMPLETION_STATUS",
6727   "type_ref": "CP_PFP_COMPLETION_STATUS"
6728  },
6729  {
6730   "chips": ["gfx8"],
6731   "map": {"at": 197556, "to": "mm"},
6732   "name": "CP_CE_COMPLETION_STATUS",
6733   "type_ref": "CP_PFP_COMPLETION_STATUS"
6734  },
6735  {
6736   "chips": ["gfx8"],
6737   "map": {"at": 197560, "to": "mm"},
6738   "name": "CP_PRED_NOT_VISIBLE",
6739   "type_ref": "CP_PRED_NOT_VISIBLE"
6740  },
6741  {
6742   "chips": ["gfx8"],
6743   "map": {"at": 197568, "to": "mm"},
6744   "name": "CP_PFP_METADATA_BASE_ADDR"
6745  },
6746  {
6747   "chips": ["gfx8"],
6748   "map": {"at": 197572, "to": "mm"},
6749   "name": "CP_PFP_METADATA_BASE_ADDR_HI",
6750   "type_ref": "CP_EOP_DONE_ADDR_HI"
6751  },
6752  {
6753   "chips": ["gfx8"],
6754   "map": {"at": 197576, "to": "mm"},
6755   "name": "CP_CE_METADATA_BASE_ADDR"
6756  },
6757  {
6758   "chips": ["gfx8"],
6759   "map": {"at": 197580, "to": "mm"},
6760   "name": "CP_CE_METADATA_BASE_ADDR_HI",
6761   "type_ref": "CP_EOP_DONE_ADDR_HI"
6762  },
6763  {
6764   "chips": ["gfx8"],
6765   "map": {"at": 197584, "to": "mm"},
6766   "name": "CP_DRAW_INDX_INDR_ADDR"
6767  },
6768  {
6769   "chips": ["gfx8"],
6770   "map": {"at": 197588, "to": "mm"},
6771   "name": "CP_DRAW_INDX_INDR_ADDR_HI",
6772   "type_ref": "CP_EOP_DONE_ADDR_HI"
6773  },
6774  {
6775   "chips": ["gfx8"],
6776   "map": {"at": 197592, "to": "mm"},
6777   "name": "CP_DISPATCH_INDR_ADDR"
6778  },
6779  {
6780   "chips": ["gfx8"],
6781   "map": {"at": 197596, "to": "mm"},
6782   "name": "CP_DISPATCH_INDR_ADDR_HI",
6783   "type_ref": "CP_EOP_DONE_ADDR_HI"
6784  },
6785  {
6786   "chips": ["gfx8"],
6787   "map": {"at": 197600, "to": "mm"},
6788   "name": "CP_INDEX_BASE_ADDR"
6789  },
6790  {
6791   "chips": ["gfx8"],
6792   "map": {"at": 197604, "to": "mm"},
6793   "name": "CP_INDEX_BASE_ADDR_HI",
6794   "type_ref": "CP_EOP_DONE_ADDR_HI"
6795  },
6796  {
6797   "chips": ["gfx8"],
6798   "map": {"at": 197608, "to": "mm"},
6799   "name": "CP_INDEX_TYPE",
6800   "type_ref": "CP_INDEX_TYPE"
6801  },
6802  {
6803   "chips": ["gfx8"],
6804   "map": {"at": 197612, "to": "mm"},
6805   "name": "CP_GDS_BKUP_ADDR"
6806  },
6807  {
6808   "chips": ["gfx8"],
6809   "map": {"at": 197616, "to": "mm"},
6810   "name": "CP_GDS_BKUP_ADDR_HI",
6811   "type_ref": "CP_EOP_DONE_ADDR_HI"
6812  },
6813  {
6814   "chips": ["gfx8"],
6815   "map": {"at": 197620, "to": "mm"},
6816   "name": "CP_SAMPLE_STATUS",
6817   "type_ref": "CP_SAMPLE_STATUS"
6818  },
6819  {
6820   "chips": ["gfx8"],
6821   "map": {"at": 198656, "to": "mm"},
6822   "name": "GRBM_GFX_INDEX",
6823   "type_ref": "GRBM_GFX_INDEX"
6824  },
6825  {
6826   "chips": ["gfx8"],
6827   "map": {"at": 198912, "to": "mm"},
6828   "name": "VGT_ESGS_RING_SIZE"
6829  },
6830  {
6831   "chips": ["gfx8"],
6832   "map": {"at": 198916, "to": "mm"},
6833   "name": "VGT_GSVS_RING_SIZE"
6834  },
6835  {
6836   "chips": ["gfx8"],
6837   "map": {"at": 198920, "to": "mm"},
6838   "name": "VGT_PRIMITIVE_TYPE",
6839   "type_ref": "VGT_PRIMITIVE_TYPE"
6840  },
6841  {
6842   "chips": ["gfx8"],
6843   "map": {"at": 198924, "to": "mm"},
6844   "name": "VGT_INDEX_TYPE",
6845   "type_ref": "CP_INDEX_TYPE"
6846  },
6847  {
6848   "chips": ["gfx8"],
6849   "map": {"at": 198928, "to": "mm"},
6850   "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_0"
6851  },
6852  {
6853   "chips": ["gfx8"],
6854   "map": {"at": 198932, "to": "mm"},
6855   "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_1"
6856  },
6857  {
6858   "chips": ["gfx8"],
6859   "map": {"at": 198936, "to": "mm"},
6860   "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_2"
6861  },
6862  {
6863   "chips": ["gfx8"],
6864   "map": {"at": 198940, "to": "mm"},
6865   "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_3"
6866  },
6867  {
6868   "chips": ["gfx8"],
6869   "map": {"at": 198960, "to": "mm"},
6870   "name": "VGT_NUM_INDICES"
6871  },
6872  {
6873   "chips": ["gfx8"],
6874   "map": {"at": 198964, "to": "mm"},
6875   "name": "VGT_NUM_INSTANCES"
6876  },
6877  {
6878   "chips": ["gfx8"],
6879   "map": {"at": 198968, "to": "mm"},
6880   "name": "VGT_TF_RING_SIZE",
6881   "type_ref": "VGT_TF_RING_SIZE"
6882  },
6883  {
6884   "chips": ["gfx8"],
6885   "map": {"at": 198972, "to": "mm"},
6886   "name": "VGT_HS_OFFCHIP_PARAM",
6887   "type_ref": "VGT_HS_OFFCHIP_PARAM"
6888  },
6889  {
6890   "chips": ["gfx8"],
6891   "map": {"at": 198976, "to": "mm"},
6892   "name": "VGT_TF_MEMORY_BASE"
6893  },
6894  {
6895   "chips": ["gfx8"],
6896   "map": {"at": 199168, "to": "mm"},
6897   "name": "PA_SU_LINE_STIPPLE_VALUE",
6898   "type_ref": "PA_SU_LINE_STIPPLE_VALUE"
6899  },
6900  {
6901   "chips": ["gfx8"],
6902   "map": {"at": 199172, "to": "mm"},
6903   "name": "PA_SC_LINE_STIPPLE_STATE",
6904   "type_ref": "PA_SC_LINE_STIPPLE_STATE"
6905  },
6906  {
6907   "chips": ["gfx8"],
6908   "map": {"at": 199184, "to": "mm"},
6909   "name": "PA_SC_SCREEN_EXTENT_MIN_0",
6910   "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0"
6911  },
6912  {
6913   "chips": ["gfx8"],
6914   "map": {"at": 199188, "to": "mm"},
6915   "name": "PA_SC_SCREEN_EXTENT_MAX_0",
6916   "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0"
6917  },
6918  {
6919   "chips": ["gfx8"],
6920   "map": {"at": 199192, "to": "mm"},
6921   "name": "PA_SC_SCREEN_EXTENT_MIN_1",
6922   "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0"
6923  },
6924  {
6925   "chips": ["gfx8"],
6926   "map": {"at": 199212, "to": "mm"},
6927   "name": "PA_SC_SCREEN_EXTENT_MAX_1",
6928   "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0"
6929  },
6930  {
6931   "chips": ["gfx8"],
6932   "map": {"at": 199296, "to": "mm"},
6933   "name": "PA_SC_P3D_TRAP_SCREEN_HV_EN",
6934   "type_ref": "PA_SC_P3D_TRAP_SCREEN_HV_EN"
6935  },
6936  {
6937   "chips": ["gfx8"],
6938   "map": {"at": 199300, "to": "mm"},
6939   "name": "PA_SC_P3D_TRAP_SCREEN_H",
6940   "type_ref": "PA_SC_P3D_TRAP_SCREEN_H"
6941  },
6942  {
6943   "chips": ["gfx8"],
6944   "map": {"at": 199304, "to": "mm"},
6945   "name": "PA_SC_P3D_TRAP_SCREEN_V",
6946   "type_ref": "PA_SC_P3D_TRAP_SCREEN_V"
6947  },
6948  {
6949   "chips": ["gfx8"],
6950   "map": {"at": 199308, "to": "mm"},
6951   "name": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE",
6952   "type_ref": "CP_DRAW_OBJECT_COUNTER"
6953  },
6954  {
6955   "chips": ["gfx8"],
6956   "map": {"at": 199312, "to": "mm"},
6957   "name": "PA_SC_P3D_TRAP_SCREEN_COUNT",
6958   "type_ref": "CP_DRAW_OBJECT_COUNTER"
6959  },
6960  {
6961   "chips": ["gfx8"],
6962   "map": {"at": 199328, "to": "mm"},
6963   "name": "PA_SC_HP3D_TRAP_SCREEN_HV_EN",
6964   "type_ref": "PA_SC_P3D_TRAP_SCREEN_HV_EN"
6965  },
6966  {
6967   "chips": ["gfx8"],
6968   "map": {"at": 199332, "to": "mm"},
6969   "name": "PA_SC_HP3D_TRAP_SCREEN_H",
6970   "type_ref": "PA_SC_P3D_TRAP_SCREEN_H"
6971  },
6972  {
6973   "chips": ["gfx8"],
6974   "map": {"at": 199336, "to": "mm"},
6975   "name": "PA_SC_HP3D_TRAP_SCREEN_V",
6976   "type_ref": "PA_SC_P3D_TRAP_SCREEN_V"
6977  },
6978  {
6979   "chips": ["gfx8"],
6980   "map": {"at": 199340, "to": "mm"},
6981   "name": "PA_SC_HP3D_TRAP_SCREEN_OCCURRENCE",
6982   "type_ref": "CP_DRAW_OBJECT_COUNTER"
6983  },
6984  {
6985   "chips": ["gfx8"],
6986   "map": {"at": 199344, "to": "mm"},
6987   "name": "PA_SC_HP3D_TRAP_SCREEN_COUNT",
6988   "type_ref": "CP_DRAW_OBJECT_COUNTER"
6989  },
6990  {
6991   "chips": ["gfx8"],
6992   "map": {"at": 199360, "to": "mm"},
6993   "name": "PA_SC_TRAP_SCREEN_HV_EN",
6994   "type_ref": "PA_SC_P3D_TRAP_SCREEN_HV_EN"
6995  },
6996  {
6997   "chips": ["gfx8"],
6998   "map": {"at": 199364, "to": "mm"},
6999   "name": "PA_SC_TRAP_SCREEN_H",
7000   "type_ref": "PA_SC_P3D_TRAP_SCREEN_H"
7001  },
7002  {
7003   "chips": ["gfx8"],
7004   "map": {"at": 199368, "to": "mm"},
7005   "name": "PA_SC_TRAP_SCREEN_V",
7006   "type_ref": "PA_SC_P3D_TRAP_SCREEN_V"
7007  },
7008  {
7009   "chips": ["gfx8"],
7010   "map": {"at": 199372, "to": "mm"},
7011   "name": "PA_SC_TRAP_SCREEN_OCCURRENCE",
7012   "type_ref": "CP_DRAW_OBJECT_COUNTER"
7013  },
7014  {
7015   "chips": ["gfx8"],
7016   "map": {"at": 199376, "to": "mm"},
7017   "name": "PA_SC_TRAP_SCREEN_COUNT",
7018   "type_ref": "CP_DRAW_OBJECT_COUNTER"
7019  },
7020  {
7021   "chips": ["gfx8"],
7022   "map": {"at": 199872, "to": "mm"},
7023   "name": "SQ_THREAD_TRACE_BASE"
7024  },
7025  {
7026   "chips": ["gfx8"],
7027   "map": {"at": 199876, "to": "mm"},
7028   "name": "SQ_THREAD_TRACE_SIZE",
7029   "type_ref": "SQ_THREAD_TRACE_SIZE"
7030  },
7031  {
7032   "chips": ["gfx8"],
7033   "map": {"at": 199880, "to": "mm"},
7034   "name": "SQ_THREAD_TRACE_MASK",
7035   "type_ref": "SQ_THREAD_TRACE_MASK"
7036  },
7037  {
7038   "chips": ["gfx8"],
7039   "map": {"at": 199884, "to": "mm"},
7040   "name": "SQ_THREAD_TRACE_TOKEN_MASK",
7041   "type_ref": "SQ_THREAD_TRACE_TOKEN_MASK"
7042  },
7043  {
7044   "chips": ["gfx8"],
7045   "map": {"at": 199888, "to": "mm"},
7046   "name": "SQ_THREAD_TRACE_PERF_MASK",
7047   "type_ref": "SQ_PERFCOUNTER_MASK"
7048  },
7049  {
7050   "chips": ["gfx8"],
7051   "map": {"at": 199892, "to": "mm"},
7052   "name": "SQ_THREAD_TRACE_CTRL",
7053   "type_ref": "SQ_THREAD_TRACE_CTRL"
7054  },
7055  {
7056   "chips": ["gfx8"],
7057   "map": {"at": 199896, "to": "mm"},
7058   "name": "SQ_THREAD_TRACE_MODE",
7059   "type_ref": "SQ_THREAD_TRACE_MODE"
7060  },
7061  {
7062   "chips": ["gfx8"],
7063   "map": {"at": 199900, "to": "mm"},
7064   "name": "SQ_THREAD_TRACE_BASE2",
7065   "type_ref": "SQ_THREAD_TRACE_BASE2"
7066  },
7067  {
7068   "chips": ["gfx8"],
7069   "map": {"at": 199904, "to": "mm"},
7070   "name": "SQ_THREAD_TRACE_TOKEN_MASK2"
7071  },
7072  {
7073   "chips": ["gfx8"],
7074   "map": {"at": 199908, "to": "mm"},
7075   "name": "SQ_THREAD_TRACE_WPTR",
7076   "type_ref": "SQ_THREAD_TRACE_WPTR"
7077  },
7078  {
7079   "chips": ["gfx8"],
7080   "map": {"at": 199912, "to": "mm"},
7081   "name": "SQ_THREAD_TRACE_STATUS",
7082   "type_ref": "SQ_THREAD_TRACE_STATUS"
7083  },
7084  {
7085   "chips": ["gfx8"],
7086   "map": {"at": 199916, "to": "mm"},
7087   "name": "SQ_THREAD_TRACE_HIWATER",
7088   "type_ref": "SQ_THREAD_TRACE_HIWATER"
7089  },
7090  {
7091   "chips": ["gfx8"],
7092   "map": {"at": 199936, "to": "mm"},
7093   "name": "SQ_THREAD_TRACE_USERDATA_0"
7094  },
7095  {
7096   "chips": ["gfx8"],
7097   "map": {"at": 199940, "to": "mm"},
7098   "name": "SQ_THREAD_TRACE_USERDATA_1"
7099  },
7100  {
7101   "chips": ["gfx8"],
7102   "map": {"at": 199944, "to": "mm"},
7103   "name": "SQ_THREAD_TRACE_USERDATA_2"
7104  },
7105  {
7106   "chips": ["gfx8"],
7107   "map": {"at": 199948, "to": "mm"},
7108   "name": "SQ_THREAD_TRACE_USERDATA_3"
7109  },
7110  {
7111   "chips": ["gfx8"],
7112   "map": {"at": 199968, "to": "mm"},
7113   "name": "SQC_CACHES",
7114   "type_ref": "SQC_CACHES"
7115  },
7116  {
7117   "chips": ["gfx8"],
7118   "map": {"at": 199972, "to": "mm"},
7119   "name": "SQC_WRITEBACK",
7120   "type_ref": "SQC_WRITEBACK"
7121  },
7122  {
7123   "chips": ["gfx8"],
7124   "map": {"at": 200192, "to": "mm"},
7125   "name": "TA_CS_BC_BASE_ADDR"
7126  },
7127  {
7128   "chips": ["gfx8"],
7129   "map": {"at": 200196, "to": "mm"},
7130   "name": "TA_CS_BC_BASE_ADDR_HI",
7131   "type_ref": "TA_BC_BASE_ADDR_HI"
7132  },
7133  {
7134   "chips": ["gfx8"],
7135   "map": {"at": 200448, "to": "mm"},
7136   "name": "DB_OCCLUSION_COUNT0_LOW"
7137  },
7138  {
7139   "chips": ["gfx8"],
7140   "map": {"at": 200452, "to": "mm"},
7141   "name": "DB_OCCLUSION_COUNT0_HI",
7142   "type_ref": "DB_ZPASS_COUNT_HI"
7143  },
7144  {
7145   "chips": ["gfx8"],
7146   "map": {"at": 200456, "to": "mm"},
7147   "name": "DB_OCCLUSION_COUNT1_LOW"
7148  },
7149  {
7150   "chips": ["gfx8"],
7151   "map": {"at": 200460, "to": "mm"},
7152   "name": "DB_OCCLUSION_COUNT1_HI",
7153   "type_ref": "DB_ZPASS_COUNT_HI"
7154  },
7155  {
7156   "chips": ["gfx8"],
7157   "map": {"at": 200464, "to": "mm"},
7158   "name": "DB_OCCLUSION_COUNT2_LOW"
7159  },
7160  {
7161   "chips": ["gfx8"],
7162   "map": {"at": 200468, "to": "mm"},
7163   "name": "DB_OCCLUSION_COUNT2_HI",
7164   "type_ref": "DB_ZPASS_COUNT_HI"
7165  },
7166  {
7167   "chips": ["gfx8"],
7168   "map": {"at": 200472, "to": "mm"},
7169   "name": "DB_OCCLUSION_COUNT3_LOW"
7170  },
7171  {
7172   "chips": ["gfx8"],
7173   "map": {"at": 200476, "to": "mm"},
7174   "name": "DB_OCCLUSION_COUNT3_HI",
7175   "type_ref": "DB_ZPASS_COUNT_HI"
7176  },
7177  {
7178   "chips": ["gfx8"],
7179   "map": {"at": 200696, "to": "mm"},
7180   "name": "DB_ZPASS_COUNT_LOW"
7181  },
7182  {
7183   "chips": ["gfx8"],
7184   "map": {"at": 200700, "to": "mm"},
7185   "name": "DB_ZPASS_COUNT_HI",
7186   "type_ref": "DB_ZPASS_COUNT_HI"
7187  },
7188  {
7189   "chips": ["gfx8"],
7190   "map": {"at": 200704, "to": "mm"},
7191   "name": "GDS_RD_ADDR"
7192  },
7193  {
7194   "chips": ["gfx8"],
7195   "map": {"at": 200708, "to": "mm"},
7196   "name": "GDS_RD_DATA"
7197  },
7198  {
7199   "chips": ["gfx8"],
7200   "map": {"at": 200712, "to": "mm"},
7201   "name": "GDS_RD_BURST_ADDR"
7202  },
7203  {
7204   "chips": ["gfx8"],
7205   "map": {"at": 200716, "to": "mm"},
7206   "name": "GDS_RD_BURST_COUNT"
7207  },
7208  {
7209   "chips": ["gfx8"],
7210   "map": {"at": 200720, "to": "mm"},
7211   "name": "GDS_RD_BURST_DATA"
7212  },
7213  {
7214   "chips": ["gfx8"],
7215   "map": {"at": 200724, "to": "mm"},
7216   "name": "GDS_WR_ADDR"
7217  },
7218  {
7219   "chips": ["gfx8"],
7220   "map": {"at": 200728, "to": "mm"},
7221   "name": "GDS_WR_DATA"
7222  },
7223  {
7224   "chips": ["gfx8"],
7225   "map": {"at": 200732, "to": "mm"},
7226   "name": "GDS_WR_BURST_ADDR"
7227  },
7228  {
7229   "chips": ["gfx8"],
7230   "map": {"at": 200736, "to": "mm"},
7231   "name": "GDS_WR_BURST_DATA"
7232  },
7233  {
7234   "chips": ["gfx8"],
7235   "map": {"at": 200740, "to": "mm"},
7236   "name": "GDS_WRITE_COMPLETE"
7237  },
7238  {
7239   "chips": ["gfx8"],
7240   "map": {"at": 200744, "to": "mm"},
7241   "name": "GDS_ATOM_CNTL",
7242   "type_ref": "GDS_ATOM_CNTL"
7243  },
7244  {
7245   "chips": ["gfx8"],
7246   "map": {"at": 200748, "to": "mm"},
7247   "name": "GDS_ATOM_COMPLETE",
7248   "type_ref": "GDS_ATOM_COMPLETE"
7249  },
7250  {
7251   "chips": ["gfx8"],
7252   "map": {"at": 200752, "to": "mm"},
7253   "name": "GDS_ATOM_BASE",
7254   "type_ref": "GDS_ATOM_BASE"
7255  },
7256  {
7257   "chips": ["gfx8"],
7258   "map": {"at": 200756, "to": "mm"},
7259   "name": "GDS_ATOM_SIZE",
7260   "type_ref": "GDS_ATOM_SIZE"
7261  },
7262  {
7263   "chips": ["gfx8"],
7264   "map": {"at": 200760, "to": "mm"},
7265   "name": "GDS_ATOM_OFFSET0",
7266   "type_ref": "GDS_ATOM_OFFSET0"
7267  },
7268  {
7269   "chips": ["gfx8"],
7270   "map": {"at": 200764, "to": "mm"},
7271   "name": "GDS_ATOM_OFFSET1",
7272   "type_ref": "GDS_ATOM_OFFSET1"
7273  },
7274  {
7275   "chips": ["gfx8"],
7276   "map": {"at": 200768, "to": "mm"},
7277   "name": "GDS_ATOM_DST"
7278  },
7279  {
7280   "chips": ["gfx8"],
7281   "map": {"at": 200772, "to": "mm"},
7282   "name": "GDS_ATOM_OP",
7283   "type_ref": "GDS_ATOM_OP"
7284  },
7285  {
7286   "chips": ["gfx8"],
7287   "map": {"at": 200776, "to": "mm"},
7288   "name": "GDS_ATOM_SRC0"
7289  },
7290  {
7291   "chips": ["gfx8"],
7292   "map": {"at": 200780, "to": "mm"},
7293   "name": "GDS_ATOM_SRC0_U"
7294  },
7295  {
7296   "chips": ["gfx8"],
7297   "map": {"at": 200784, "to": "mm"},
7298   "name": "GDS_ATOM_SRC1"
7299  },
7300  {
7301   "chips": ["gfx8"],
7302   "map": {"at": 200788, "to": "mm"},
7303   "name": "GDS_ATOM_SRC1_U"
7304  },
7305  {
7306   "chips": ["gfx8"],
7307   "map": {"at": 200792, "to": "mm"},
7308   "name": "GDS_ATOM_READ0"
7309  },
7310  {
7311   "chips": ["gfx8"],
7312   "map": {"at": 200796, "to": "mm"},
7313   "name": "GDS_ATOM_READ0_U"
7314  },
7315  {
7316   "chips": ["gfx8"],
7317   "map": {"at": 200800, "to": "mm"},
7318   "name": "GDS_ATOM_READ1"
7319  },
7320  {
7321   "chips": ["gfx8"],
7322   "map": {"at": 200804, "to": "mm"},
7323   "name": "GDS_ATOM_READ1_U"
7324  },
7325  {
7326   "chips": ["gfx8"],
7327   "map": {"at": 200808, "to": "mm"},
7328   "name": "GDS_GWS_RESOURCE_CNTL",
7329   "type_ref": "GDS_GWS_RESOURCE_CNTL"
7330  },
7331  {
7332   "chips": ["gfx8"],
7333   "map": {"at": 200812, "to": "mm"},
7334   "name": "GDS_GWS_RESOURCE",
7335   "type_ref": "GDS_GWS_RESOURCE"
7336  },
7337  {
7338   "chips": ["gfx8"],
7339   "map": {"at": 200816, "to": "mm"},
7340   "name": "GDS_GWS_RESOURCE_CNT",
7341   "type_ref": "GDS_GWS_RESOURCE_CNT"
7342  },
7343  {
7344   "chips": ["gfx8"],
7345   "map": {"at": 200820, "to": "mm"},
7346   "name": "GDS_OA_CNTL",
7347   "type_ref": "GDS_OA_CNTL"
7348  },
7349  {
7350   "chips": ["gfx8"],
7351   "map": {"at": 200824, "to": "mm"},
7352   "name": "GDS_OA_COUNTER"
7353  },
7354  {
7355   "chips": ["gfx8"],
7356   "map": {"at": 200828, "to": "mm"},
7357   "name": "GDS_OA_ADDRESS",
7358   "type_ref": "GDS_OA_ADDRESS"
7359  },
7360  {
7361   "chips": ["gfx8"],
7362   "map": {"at": 200832, "to": "mm"},
7363   "name": "GDS_OA_INCDEC",
7364   "type_ref": "GDS_OA_INCDEC"
7365  },
7366  {
7367   "chips": ["gfx8"],
7368   "map": {"at": 200836, "to": "mm"},
7369   "name": "GDS_OA_RING_SIZE"
7370  },
7371  {
7372   "chips": ["gfx8"],
7373   "map": {"at": 212992, "to": "mm"},
7374   "name": "CPG_PERFCOUNTER1_LO"
7375  },
7376  {
7377   "chips": ["gfx8"],
7378   "map": {"at": 212996, "to": "mm"},
7379   "name": "CPG_PERFCOUNTER1_HI"
7380  },
7381  {
7382   "chips": ["gfx8"],
7383   "map": {"at": 213000, "to": "mm"},
7384   "name": "CPG_PERFCOUNTER0_LO"
7385  },
7386  {
7387   "chips": ["gfx8"],
7388   "map": {"at": 213004, "to": "mm"},
7389   "name": "CPG_PERFCOUNTER0_HI"
7390  },
7391  {
7392   "chips": ["gfx8"],
7393   "map": {"at": 213008, "to": "mm"},
7394   "name": "CPC_PERFCOUNTER1_LO"
7395  },
7396  {
7397   "chips": ["gfx8"],
7398   "map": {"at": 213012, "to": "mm"},
7399   "name": "CPC_PERFCOUNTER1_HI"
7400  },
7401  {
7402   "chips": ["gfx8"],
7403   "map": {"at": 213016, "to": "mm"},
7404   "name": "CPC_PERFCOUNTER0_LO"
7405  },
7406  {
7407   "chips": ["gfx8"],
7408   "map": {"at": 213020, "to": "mm"},
7409   "name": "CPC_PERFCOUNTER0_HI"
7410  },
7411  {
7412   "chips": ["gfx8"],
7413   "map": {"at": 213024, "to": "mm"},
7414   "name": "CPF_PERFCOUNTER1_LO"
7415  },
7416  {
7417   "chips": ["gfx8"],
7418   "map": {"at": 213028, "to": "mm"},
7419   "name": "CPF_PERFCOUNTER1_HI"
7420  },
7421  {
7422   "chips": ["gfx8"],
7423   "map": {"at": 213032, "to": "mm"},
7424   "name": "CPF_PERFCOUNTER0_LO"
7425  },
7426  {
7427   "chips": ["gfx8"],
7428   "map": {"at": 213036, "to": "mm"},
7429   "name": "CPF_PERFCOUNTER0_HI"
7430  },
7431  {
7432   "chips": ["gfx8"],
7433   "map": {"at": 213248, "to": "mm"},
7434   "name": "GRBM_PERFCOUNTER0_LO"
7435  },
7436  {
7437   "chips": ["gfx8"],
7438   "map": {"at": 213252, "to": "mm"},
7439   "name": "GRBM_PERFCOUNTER0_HI"
7440  },
7441  {
7442   "chips": ["gfx8"],
7443   "map": {"at": 213260, "to": "mm"},
7444   "name": "GRBM_PERFCOUNTER1_LO"
7445  },
7446  {
7447   "chips": ["gfx8"],
7448   "map": {"at": 213264, "to": "mm"},
7449   "name": "GRBM_PERFCOUNTER1_HI"
7450  },
7451  {
7452   "chips": ["gfx8"],
7453   "map": {"at": 213268, "to": "mm"},
7454   "name": "GRBM_SE0_PERFCOUNTER_LO"
7455  },
7456  {
7457   "chips": ["gfx8"],
7458   "map": {"at": 213272, "to": "mm"},
7459   "name": "GRBM_SE0_PERFCOUNTER_HI"
7460  },
7461  {
7462   "chips": ["gfx8"],
7463   "map": {"at": 213276, "to": "mm"},
7464   "name": "GRBM_SE1_PERFCOUNTER_LO"
7465  },
7466  {
7467   "chips": ["gfx8"],
7468   "map": {"at": 213280, "to": "mm"},
7469   "name": "GRBM_SE1_PERFCOUNTER_HI"
7470  },
7471  {
7472   "chips": ["gfx8"],
7473   "map": {"at": 213284, "to": "mm"},
7474   "name": "GRBM_SE2_PERFCOUNTER_LO"
7475  },
7476  {
7477   "chips": ["gfx8"],
7478   "map": {"at": 213288, "to": "mm"},
7479   "name": "GRBM_SE2_PERFCOUNTER_HI"
7480  },
7481  {
7482   "chips": ["gfx8"],
7483   "map": {"at": 213292, "to": "mm"},
7484   "name": "GRBM_SE3_PERFCOUNTER_LO"
7485  },
7486  {
7487   "chips": ["gfx8"],
7488   "map": {"at": 213296, "to": "mm"},
7489   "name": "GRBM_SE3_PERFCOUNTER_HI"
7490  },
7491  {
7492   "chips": ["gfx8"],
7493   "map": {"at": 213504, "to": "mm"},
7494   "name": "WD_PERFCOUNTER0_LO"
7495  },
7496  {
7497   "chips": ["gfx8"],
7498   "map": {"at": 213508, "to": "mm"},
7499   "name": "WD_PERFCOUNTER0_HI"
7500  },
7501  {
7502   "chips": ["gfx8"],
7503   "map": {"at": 213512, "to": "mm"},
7504   "name": "WD_PERFCOUNTER1_LO"
7505  },
7506  {
7507   "chips": ["gfx8"],
7508   "map": {"at": 213516, "to": "mm"},
7509   "name": "WD_PERFCOUNTER1_HI"
7510  },
7511  {
7512   "chips": ["gfx8"],
7513   "map": {"at": 213520, "to": "mm"},
7514   "name": "WD_PERFCOUNTER2_LO"
7515  },
7516  {
7517   "chips": ["gfx8"],
7518   "map": {"at": 213524, "to": "mm"},
7519   "name": "WD_PERFCOUNTER2_HI"
7520  },
7521  {
7522   "chips": ["gfx8"],
7523   "map": {"at": 213528, "to": "mm"},
7524   "name": "WD_PERFCOUNTER3_LO"
7525  },
7526  {
7527   "chips": ["gfx8"],
7528   "map": {"at": 213532, "to": "mm"},
7529   "name": "WD_PERFCOUNTER3_HI"
7530  },
7531  {
7532   "chips": ["gfx8"],
7533   "map": {"at": 213536, "to": "mm"},
7534   "name": "IA_PERFCOUNTER0_LO"
7535  },
7536  {
7537   "chips": ["gfx8"],
7538   "map": {"at": 213540, "to": "mm"},
7539   "name": "IA_PERFCOUNTER0_HI"
7540  },
7541  {
7542   "chips": ["gfx8"],
7543   "map": {"at": 213544, "to": "mm"},
7544   "name": "IA_PERFCOUNTER1_LO"
7545  },
7546  {
7547   "chips": ["gfx8"],
7548   "map": {"at": 213548, "to": "mm"},
7549   "name": "IA_PERFCOUNTER1_HI"
7550  },
7551  {
7552   "chips": ["gfx8"],
7553   "map": {"at": 213552, "to": "mm"},
7554   "name": "IA_PERFCOUNTER2_LO"
7555  },
7556  {
7557   "chips": ["gfx8"],
7558   "map": {"at": 213556, "to": "mm"},
7559   "name": "IA_PERFCOUNTER2_HI"
7560  },
7561  {
7562   "chips": ["gfx8"],
7563   "map": {"at": 213560, "to": "mm"},
7564   "name": "IA_PERFCOUNTER3_LO"
7565  },
7566  {
7567   "chips": ["gfx8"],
7568   "map": {"at": 213564, "to": "mm"},
7569   "name": "IA_PERFCOUNTER3_HI"
7570  },
7571  {
7572   "chips": ["gfx8"],
7573   "map": {"at": 213568, "to": "mm"},
7574   "name": "VGT_PERFCOUNTER0_LO"
7575  },
7576  {
7577   "chips": ["gfx8"],
7578   "map": {"at": 213572, "to": "mm"},
7579   "name": "VGT_PERFCOUNTER0_HI"
7580  },
7581  {
7582   "chips": ["gfx8"],
7583   "map": {"at": 213576, "to": "mm"},
7584   "name": "VGT_PERFCOUNTER1_LO"
7585  },
7586  {
7587   "chips": ["gfx8"],
7588   "map": {"at": 213580, "to": "mm"},
7589   "name": "VGT_PERFCOUNTER1_HI"
7590  },
7591  {
7592   "chips": ["gfx8"],
7593   "map": {"at": 213584, "to": "mm"},
7594   "name": "VGT_PERFCOUNTER2_LO"
7595  },
7596  {
7597   "chips": ["gfx8"],
7598   "map": {"at": 213588, "to": "mm"},
7599   "name": "VGT_PERFCOUNTER2_HI"
7600  },
7601  {
7602   "chips": ["gfx8"],
7603   "map": {"at": 213592, "to": "mm"},
7604   "name": "VGT_PERFCOUNTER3_LO"
7605  },
7606  {
7607   "chips": ["gfx8"],
7608   "map": {"at": 213596, "to": "mm"},
7609   "name": "VGT_PERFCOUNTER3_HI"
7610  },
7611  {
7612   "chips": ["gfx8"],
7613   "map": {"at": 214016, "to": "mm"},
7614   "name": "PA_SU_PERFCOUNTER0_LO"
7615  },
7616  {
7617   "chips": ["gfx8"],
7618   "map": {"at": 214020, "to": "mm"},
7619   "name": "PA_SU_PERFCOUNTER0_HI",
7620   "type_ref": "PA_SU_PERFCOUNTER0_HI"
7621  },
7622  {
7623   "chips": ["gfx8"],
7624   "map": {"at": 214024, "to": "mm"},
7625   "name": "PA_SU_PERFCOUNTER1_LO"
7626  },
7627  {
7628   "chips": ["gfx8"],
7629   "map": {"at": 214028, "to": "mm"},
7630   "name": "PA_SU_PERFCOUNTER1_HI",
7631   "type_ref": "PA_SU_PERFCOUNTER0_HI"
7632  },
7633  {
7634   "chips": ["gfx8"],
7635   "map": {"at": 214032, "to": "mm"},
7636   "name": "PA_SU_PERFCOUNTER2_LO"
7637  },
7638  {
7639   "chips": ["gfx8"],
7640   "map": {"at": 214036, "to": "mm"},
7641   "name": "PA_SU_PERFCOUNTER2_HI",
7642   "type_ref": "PA_SU_PERFCOUNTER0_HI"
7643  },
7644  {
7645   "chips": ["gfx8"],
7646   "map": {"at": 214040, "to": "mm"},
7647   "name": "PA_SU_PERFCOUNTER3_LO"
7648  },
7649  {
7650   "chips": ["gfx8"],
7651   "map": {"at": 214044, "to": "mm"},
7652   "name": "PA_SU_PERFCOUNTER3_HI",
7653   "type_ref": "PA_SU_PERFCOUNTER0_HI"
7654  },
7655  {
7656   "chips": ["gfx8"],
7657   "map": {"at": 214272, "to": "mm"},
7658   "name": "PA_SC_PERFCOUNTER0_LO"
7659  },
7660  {
7661   "chips": ["gfx8"],
7662   "map": {"at": 214276, "to": "mm"},
7663   "name": "PA_SC_PERFCOUNTER0_HI"
7664  },
7665  {
7666   "chips": ["gfx8"],
7667   "map": {"at": 214280, "to": "mm"},
7668   "name": "PA_SC_PERFCOUNTER1_LO"
7669  },
7670  {
7671   "chips": ["gfx8"],
7672   "map": {"at": 214284, "to": "mm"},
7673   "name": "PA_SC_PERFCOUNTER1_HI"
7674  },
7675  {
7676   "chips": ["gfx8"],
7677   "map": {"at": 214288, "to": "mm"},
7678   "name": "PA_SC_PERFCOUNTER2_LO"
7679  },
7680  {
7681   "chips": ["gfx8"],
7682   "map": {"at": 214292, "to": "mm"},
7683   "name": "PA_SC_PERFCOUNTER2_HI"
7684  },
7685  {
7686   "chips": ["gfx8"],
7687   "map": {"at": 214296, "to": "mm"},
7688   "name": "PA_SC_PERFCOUNTER3_LO"
7689  },
7690  {
7691   "chips": ["gfx8"],
7692   "map": {"at": 214300, "to": "mm"},
7693   "name": "PA_SC_PERFCOUNTER3_HI"
7694  },
7695  {
7696   "chips": ["gfx8"],
7697   "map": {"at": 214304, "to": "mm"},
7698   "name": "PA_SC_PERFCOUNTER4_LO"
7699  },
7700  {
7701   "chips": ["gfx8"],
7702   "map": {"at": 214308, "to": "mm"},
7703   "name": "PA_SC_PERFCOUNTER4_HI"
7704  },
7705  {
7706   "chips": ["gfx8"],
7707   "map": {"at": 214312, "to": "mm"},
7708   "name": "PA_SC_PERFCOUNTER5_LO"
7709  },
7710  {
7711   "chips": ["gfx8"],
7712   "map": {"at": 214316, "to": "mm"},
7713   "name": "PA_SC_PERFCOUNTER5_HI"
7714  },
7715  {
7716   "chips": ["gfx8"],
7717   "map": {"at": 214320, "to": "mm"},
7718   "name": "PA_SC_PERFCOUNTER6_LO"
7719  },
7720  {
7721   "chips": ["gfx8"],
7722   "map": {"at": 214324, "to": "mm"},
7723   "name": "PA_SC_PERFCOUNTER6_HI"
7724  },
7725  {
7726   "chips": ["gfx8"],
7727   "map": {"at": 214328, "to": "mm"},
7728   "name": "PA_SC_PERFCOUNTER7_LO"
7729  },
7730  {
7731   "chips": ["gfx8"],
7732   "map": {"at": 214332, "to": "mm"},
7733   "name": "PA_SC_PERFCOUNTER7_HI"
7734  },
7735  {
7736   "chips": ["gfx8"],
7737   "map": {"at": 214528, "to": "mm"},
7738   "name": "SPI_PERFCOUNTER0_HI"
7739  },
7740  {
7741   "chips": ["gfx8"],
7742   "map": {"at": 214532, "to": "mm"},
7743   "name": "SPI_PERFCOUNTER0_LO"
7744  },
7745  {
7746   "chips": ["gfx8"],
7747   "map": {"at": 214536, "to": "mm"},
7748   "name": "SPI_PERFCOUNTER1_HI"
7749  },
7750  {
7751   "chips": ["gfx8"],
7752   "map": {"at": 214540, "to": "mm"},
7753   "name": "SPI_PERFCOUNTER1_LO"
7754  },
7755  {
7756   "chips": ["gfx8"],
7757   "map": {"at": 214544, "to": "mm"},
7758   "name": "SPI_PERFCOUNTER2_HI"
7759  },
7760  {
7761   "chips": ["gfx8"],
7762   "map": {"at": 214548, "to": "mm"},
7763   "name": "SPI_PERFCOUNTER2_LO"
7764  },
7765  {
7766   "chips": ["gfx8"],
7767   "map": {"at": 214552, "to": "mm"},
7768   "name": "SPI_PERFCOUNTER3_HI"
7769  },
7770  {
7771   "chips": ["gfx8"],
7772   "map": {"at": 214556, "to": "mm"},
7773   "name": "SPI_PERFCOUNTER3_LO"
7774  },
7775  {
7776   "chips": ["gfx8"],
7777   "map": {"at": 214560, "to": "mm"},
7778   "name": "SPI_PERFCOUNTER4_HI"
7779  },
7780  {
7781   "chips": ["gfx8"],
7782   "map": {"at": 214564, "to": "mm"},
7783   "name": "SPI_PERFCOUNTER4_LO"
7784  },
7785  {
7786   "chips": ["gfx8"],
7787   "map": {"at": 214568, "to": "mm"},
7788   "name": "SPI_PERFCOUNTER5_HI"
7789  },
7790  {
7791   "chips": ["gfx8"],
7792   "map": {"at": 214572, "to": "mm"},
7793   "name": "SPI_PERFCOUNTER5_LO"
7794  },
7795  {
7796   "chips": ["gfx8"],
7797   "map": {"at": 214784, "to": "mm"},
7798   "name": "SQ_PERFCOUNTER0_LO"
7799  },
7800  {
7801   "chips": ["gfx8"],
7802   "map": {"at": 214788, "to": "mm"},
7803   "name": "SQ_PERFCOUNTER0_HI"
7804  },
7805  {
7806   "chips": ["gfx8"],
7807   "map": {"at": 214792, "to": "mm"},
7808   "name": "SQ_PERFCOUNTER1_LO"
7809  },
7810  {
7811   "chips": ["gfx8"],
7812   "map": {"at": 214796, "to": "mm"},
7813   "name": "SQ_PERFCOUNTER1_HI"
7814  },
7815  {
7816   "chips": ["gfx8"],
7817   "map": {"at": 214800, "to": "mm"},
7818   "name": "SQ_PERFCOUNTER2_LO"
7819  },
7820  {
7821   "chips": ["gfx8"],
7822   "map": {"at": 214804, "to": "mm"},
7823   "name": "SQ_PERFCOUNTER2_HI"
7824  },
7825  {
7826   "chips": ["gfx8"],
7827   "map": {"at": 214808, "to": "mm"},
7828   "name": "SQ_PERFCOUNTER3_LO"
7829  },
7830  {
7831   "chips": ["gfx8"],
7832   "map": {"at": 214812, "to": "mm"},
7833   "name": "SQ_PERFCOUNTER3_HI"
7834  },
7835  {
7836   "chips": ["gfx8"],
7837   "map": {"at": 214816, "to": "mm"},
7838   "name": "SQ_PERFCOUNTER4_LO"
7839  },
7840  {
7841   "chips": ["gfx8"],
7842   "map": {"at": 214820, "to": "mm"},
7843   "name": "SQ_PERFCOUNTER4_HI"
7844  },
7845  {
7846   "chips": ["gfx8"],
7847   "map": {"at": 214824, "to": "mm"},
7848   "name": "SQ_PERFCOUNTER5_LO"
7849  },
7850  {
7851   "chips": ["gfx8"],
7852   "map": {"at": 214828, "to": "mm"},
7853   "name": "SQ_PERFCOUNTER5_HI"
7854  },
7855  {
7856   "chips": ["gfx8"],
7857   "map": {"at": 214832, "to": "mm"},
7858   "name": "SQ_PERFCOUNTER6_LO"
7859  },
7860  {
7861   "chips": ["gfx8"],
7862   "map": {"at": 214836, "to": "mm"},
7863   "name": "SQ_PERFCOUNTER6_HI"
7864  },
7865  {
7866   "chips": ["gfx8"],
7867   "map": {"at": 214840, "to": "mm"},
7868   "name": "SQ_PERFCOUNTER7_LO"
7869  },
7870  {
7871   "chips": ["gfx8"],
7872   "map": {"at": 214844, "to": "mm"},
7873   "name": "SQ_PERFCOUNTER7_HI"
7874  },
7875  {
7876   "chips": ["gfx8"],
7877   "map": {"at": 214848, "to": "mm"},
7878   "name": "SQ_PERFCOUNTER8_LO"
7879  },
7880  {
7881   "chips": ["gfx8"],
7882   "map": {"at": 214852, "to": "mm"},
7883   "name": "SQ_PERFCOUNTER8_HI"
7884  },
7885  {
7886   "chips": ["gfx8"],
7887   "map": {"at": 214856, "to": "mm"},
7888   "name": "SQ_PERFCOUNTER9_LO"
7889  },
7890  {
7891   "chips": ["gfx8"],
7892   "map": {"at": 214860, "to": "mm"},
7893   "name": "SQ_PERFCOUNTER9_HI"
7894  },
7895  {
7896   "chips": ["gfx8"],
7897   "map": {"at": 214864, "to": "mm"},
7898   "name": "SQ_PERFCOUNTER10_LO"
7899  },
7900  {
7901   "chips": ["gfx8"],
7902   "map": {"at": 214868, "to": "mm"},
7903   "name": "SQ_PERFCOUNTER10_HI"
7904  },
7905  {
7906   "chips": ["gfx8"],
7907   "map": {"at": 214872, "to": "mm"},
7908   "name": "SQ_PERFCOUNTER11_LO"
7909  },
7910  {
7911   "chips": ["gfx8"],
7912   "map": {"at": 214876, "to": "mm"},
7913   "name": "SQ_PERFCOUNTER11_HI"
7914  },
7915  {
7916   "chips": ["gfx8"],
7917   "map": {"at": 214880, "to": "mm"},
7918   "name": "SQ_PERFCOUNTER12_LO"
7919  },
7920  {
7921   "chips": ["gfx8"],
7922   "map": {"at": 214884, "to": "mm"},
7923   "name": "SQ_PERFCOUNTER12_HI"
7924  },
7925  {
7926   "chips": ["gfx8"],
7927   "map": {"at": 214888, "to": "mm"},
7928   "name": "SQ_PERFCOUNTER13_LO"
7929  },
7930  {
7931   "chips": ["gfx8"],
7932   "map": {"at": 214892, "to": "mm"},
7933   "name": "SQ_PERFCOUNTER13_HI"
7934  },
7935  {
7936   "chips": ["gfx8"],
7937   "map": {"at": 214896, "to": "mm"},
7938   "name": "SQ_PERFCOUNTER14_LO"
7939  },
7940  {
7941   "chips": ["gfx8"],
7942   "map": {"at": 214900, "to": "mm"},
7943   "name": "SQ_PERFCOUNTER14_HI"
7944  },
7945  {
7946   "chips": ["gfx8"],
7947   "map": {"at": 214904, "to": "mm"},
7948   "name": "SQ_PERFCOUNTER15_LO"
7949  },
7950  {
7951   "chips": ["gfx8"],
7952   "map": {"at": 214908, "to": "mm"},
7953   "name": "SQ_PERFCOUNTER15_HI"
7954  },
7955  {
7956   "chips": ["gfx8"],
7957   "map": {"at": 215296, "to": "mm"},
7958   "name": "SX_PERFCOUNTER0_LO"
7959  },
7960  {
7961   "chips": ["gfx8"],
7962   "map": {"at": 215300, "to": "mm"},
7963   "name": "SX_PERFCOUNTER0_HI"
7964  },
7965  {
7966   "chips": ["gfx8"],
7967   "map": {"at": 215304, "to": "mm"},
7968   "name": "SX_PERFCOUNTER1_LO"
7969  },
7970  {
7971   "chips": ["gfx8"],
7972   "map": {"at": 215308, "to": "mm"},
7973   "name": "SX_PERFCOUNTER1_HI"
7974  },
7975  {
7976   "chips": ["gfx8"],
7977   "map": {"at": 215312, "to": "mm"},
7978   "name": "SX_PERFCOUNTER2_LO"
7979  },
7980  {
7981   "chips": ["gfx8"],
7982   "map": {"at": 215316, "to": "mm"},
7983   "name": "SX_PERFCOUNTER2_HI"
7984  },
7985  {
7986   "chips": ["gfx8"],
7987   "map": {"at": 215320, "to": "mm"},
7988   "name": "SX_PERFCOUNTER3_LO"
7989  },
7990  {
7991   "chips": ["gfx8"],
7992   "map": {"at": 215324, "to": "mm"},
7993   "name": "SX_PERFCOUNTER3_HI"
7994  },
7995  {
7996   "chips": ["gfx8"],
7997   "map": {"at": 215552, "to": "mm"},
7998   "name": "GDS_PERFCOUNTER0_LO"
7999  },
8000  {
8001   "chips": ["gfx8"],
8002   "map": {"at": 215556, "to": "mm"},
8003   "name": "GDS_PERFCOUNTER0_HI"
8004  },
8005  {
8006   "chips": ["gfx8"],
8007   "map": {"at": 215560, "to": "mm"},
8008   "name": "GDS_PERFCOUNTER1_LO"
8009  },
8010  {
8011   "chips": ["gfx8"],
8012   "map": {"at": 215564, "to": "mm"},
8013   "name": "GDS_PERFCOUNTER1_HI"
8014  },
8015  {
8016   "chips": ["gfx8"],
8017   "map": {"at": 215568, "to": "mm"},
8018   "name": "GDS_PERFCOUNTER2_LO"
8019  },
8020  {
8021   "chips": ["gfx8"],
8022   "map": {"at": 215572, "to": "mm"},
8023   "name": "GDS_PERFCOUNTER2_HI"
8024  },
8025  {
8026   "chips": ["gfx8"],
8027   "map": {"at": 215576, "to": "mm"},
8028   "name": "GDS_PERFCOUNTER3_LO"
8029  },
8030  {
8031   "chips": ["gfx8"],
8032   "map": {"at": 215580, "to": "mm"},
8033   "name": "GDS_PERFCOUNTER3_HI"
8034  },
8035  {
8036   "chips": ["gfx8"],
8037   "map": {"at": 215808, "to": "mm"},
8038   "name": "TA_PERFCOUNTER0_LO"
8039  },
8040  {
8041   "chips": ["gfx8"],
8042   "map": {"at": 215812, "to": "mm"},
8043   "name": "TA_PERFCOUNTER0_HI"
8044  },
8045  {
8046   "chips": ["gfx8"],
8047   "map": {"at": 215816, "to": "mm"},
8048   "name": "TA_PERFCOUNTER1_LO"
8049  },
8050  {
8051   "chips": ["gfx8"],
8052   "map": {"at": 215820, "to": "mm"},
8053   "name": "TA_PERFCOUNTER1_HI"
8054  },
8055  {
8056   "chips": ["gfx8"],
8057   "map": {"at": 216064, "to": "mm"},
8058   "name": "TD_PERFCOUNTER0_LO"
8059  },
8060  {
8061   "chips": ["gfx8"],
8062   "map": {"at": 216068, "to": "mm"},
8063   "name": "TD_PERFCOUNTER0_HI"
8064  },
8065  {
8066   "chips": ["gfx8"],
8067   "map": {"at": 216072, "to": "mm"},
8068   "name": "TD_PERFCOUNTER1_LO"
8069  },
8070  {
8071   "chips": ["gfx8"],
8072   "map": {"at": 216076, "to": "mm"},
8073   "name": "TD_PERFCOUNTER1_HI"
8074  },
8075  {
8076   "chips": ["gfx8"],
8077   "map": {"at": 216320, "to": "mm"},
8078   "name": "TCP_PERFCOUNTER0_LO"
8079  },
8080  {
8081   "chips": ["gfx8"],
8082   "map": {"at": 216324, "to": "mm"},
8083   "name": "TCP_PERFCOUNTER0_HI"
8084  },
8085  {
8086   "chips": ["gfx8"],
8087   "map": {"at": 216328, "to": "mm"},
8088   "name": "TCP_PERFCOUNTER1_LO"
8089  },
8090  {
8091   "chips": ["gfx8"],
8092   "map": {"at": 216332, "to": "mm"},
8093   "name": "TCP_PERFCOUNTER1_HI"
8094  },
8095  {
8096   "chips": ["gfx8"],
8097   "map": {"at": 216336, "to": "mm"},
8098   "name": "TCP_PERFCOUNTER2_LO"
8099  },
8100  {
8101   "chips": ["gfx8"],
8102   "map": {"at": 216340, "to": "mm"},
8103   "name": "TCP_PERFCOUNTER2_HI"
8104  },
8105  {
8106   "chips": ["gfx8"],
8107   "map": {"at": 216344, "to": "mm"},
8108   "name": "TCP_PERFCOUNTER3_LO"
8109  },
8110  {
8111   "chips": ["gfx8"],
8112   "map": {"at": 216348, "to": "mm"},
8113   "name": "TCP_PERFCOUNTER3_HI"
8114  },
8115  {
8116   "chips": ["gfx8"],
8117   "map": {"at": 216576, "to": "mm"},
8118   "name": "TCC_PERFCOUNTER0_LO"
8119  },
8120  {
8121   "chips": ["gfx8"],
8122   "map": {"at": 216580, "to": "mm"},
8123   "name": "TCC_PERFCOUNTER0_HI"
8124  },
8125  {
8126   "chips": ["gfx8"],
8127   "map": {"at": 216584, "to": "mm"},
8128   "name": "TCC_PERFCOUNTER1_LO"
8129  },
8130  {
8131   "chips": ["gfx8"],
8132   "map": {"at": 216588, "to": "mm"},
8133   "name": "TCC_PERFCOUNTER1_HI"
8134  },
8135  {
8136   "chips": ["gfx8"],
8137   "map": {"at": 216592, "to": "mm"},
8138   "name": "TCC_PERFCOUNTER2_LO"
8139  },
8140  {
8141   "chips": ["gfx8"],
8142   "map": {"at": 216596, "to": "mm"},
8143   "name": "TCC_PERFCOUNTER2_HI"
8144  },
8145  {
8146   "chips": ["gfx8"],
8147   "map": {"at": 216600, "to": "mm"},
8148   "name": "TCC_PERFCOUNTER3_LO"
8149  },
8150  {
8151   "chips": ["gfx8"],
8152   "map": {"at": 216604, "to": "mm"},
8153   "name": "TCC_PERFCOUNTER3_HI"
8154  },
8155  {
8156   "chips": ["gfx8"],
8157   "map": {"at": 216640, "to": "mm"},
8158   "name": "TCA_PERFCOUNTER0_LO"
8159  },
8160  {
8161   "chips": ["gfx8"],
8162   "map": {"at": 216644, "to": "mm"},
8163   "name": "TCA_PERFCOUNTER0_HI"
8164  },
8165  {
8166   "chips": ["gfx8"],
8167   "map": {"at": 216648, "to": "mm"},
8168   "name": "TCA_PERFCOUNTER1_LO"
8169  },
8170  {
8171   "chips": ["gfx8"],
8172   "map": {"at": 216652, "to": "mm"},
8173   "name": "TCA_PERFCOUNTER1_HI"
8174  },
8175  {
8176   "chips": ["gfx8"],
8177   "map": {"at": 216656, "to": "mm"},
8178   "name": "TCA_PERFCOUNTER2_LO"
8179  },
8180  {
8181   "chips": ["gfx8"],
8182   "map": {"at": 216660, "to": "mm"},
8183   "name": "TCA_PERFCOUNTER2_HI"
8184  },
8185  {
8186   "chips": ["gfx8"],
8187   "map": {"at": 216664, "to": "mm"},
8188   "name": "TCA_PERFCOUNTER3_LO"
8189  },
8190  {
8191   "chips": ["gfx8"],
8192   "map": {"at": 216668, "to": "mm"},
8193   "name": "TCA_PERFCOUNTER3_HI"
8194  },
8195  {
8196   "chips": ["gfx8"],
8197   "map": {"at": 217112, "to": "mm"},
8198   "name": "CB_PERFCOUNTER0_LO"
8199  },
8200  {
8201   "chips": ["gfx8"],
8202   "map": {"at": 217116, "to": "mm"},
8203   "name": "CB_PERFCOUNTER0_HI"
8204  },
8205  {
8206   "chips": ["gfx8"],
8207   "map": {"at": 217120, "to": "mm"},
8208   "name": "CB_PERFCOUNTER1_LO"
8209  },
8210  {
8211   "chips": ["gfx8"],
8212   "map": {"at": 217124, "to": "mm"},
8213   "name": "CB_PERFCOUNTER1_HI"
8214  },
8215  {
8216   "chips": ["gfx8"],
8217   "map": {"at": 217128, "to": "mm"},
8218   "name": "CB_PERFCOUNTER2_LO"
8219  },
8220  {
8221   "chips": ["gfx8"],
8222   "map": {"at": 217132, "to": "mm"},
8223   "name": "CB_PERFCOUNTER2_HI"
8224  },
8225  {
8226   "chips": ["gfx8"],
8227   "map": {"at": 217136, "to": "mm"},
8228   "name": "CB_PERFCOUNTER3_LO"
8229  },
8230  {
8231   "chips": ["gfx8"],
8232   "map": {"at": 217140, "to": "mm"},
8233   "name": "CB_PERFCOUNTER3_HI"
8234  },
8235  {
8236   "chips": ["gfx8"],
8237   "map": {"at": 217344, "to": "mm"},
8238   "name": "DB_PERFCOUNTER0_LO"
8239  },
8240  {
8241   "chips": ["gfx8"],
8242   "map": {"at": 217348, "to": "mm"},
8243   "name": "DB_PERFCOUNTER0_HI"
8244  },
8245  {
8246   "chips": ["gfx8"],
8247   "map": {"at": 217352, "to": "mm"},
8248   "name": "DB_PERFCOUNTER1_LO"
8249  },
8250  {
8251   "chips": ["gfx8"],
8252   "map": {"at": 217356, "to": "mm"},
8253   "name": "DB_PERFCOUNTER1_HI"
8254  },
8255  {
8256   "chips": ["gfx8"],
8257   "map": {"at": 217360, "to": "mm"},
8258   "name": "DB_PERFCOUNTER2_LO"
8259  },
8260  {
8261   "chips": ["gfx8"],
8262   "map": {"at": 217364, "to": "mm"},
8263   "name": "DB_PERFCOUNTER2_HI"
8264  },
8265  {
8266   "chips": ["gfx8"],
8267   "map": {"at": 217368, "to": "mm"},
8268   "name": "DB_PERFCOUNTER3_LO"
8269  },
8270  {
8271   "chips": ["gfx8"],
8272   "map": {"at": 217372, "to": "mm"},
8273   "name": "DB_PERFCOUNTER3_HI"
8274  },
8275  {
8276   "chips": ["gfx8"],
8277   "map": {"at": 217600, "to": "mm"},
8278   "name": "RLC_PERFCOUNTER0_LO"
8279  },
8280  {
8281   "chips": ["gfx8"],
8282   "map": {"at": 217604, "to": "mm"},
8283   "name": "RLC_PERFCOUNTER0_HI"
8284  },
8285  {
8286   "chips": ["gfx8"],
8287   "map": {"at": 217608, "to": "mm"},
8288   "name": "RLC_PERFCOUNTER1_LO"
8289  },
8290  {
8291   "chips": ["gfx8"],
8292   "map": {"at": 217612, "to": "mm"},
8293   "name": "RLC_PERFCOUNTER1_HI"
8294  },
8295  {
8296   "chips": ["gfx8"],
8297   "map": {"at": 221184, "to": "mm"},
8298   "name": "CPG_PERFCOUNTER1_SELECT",
8299   "type_ref": "CPG_PERFCOUNTER1_SELECT"
8300  },
8301  {
8302   "chips": ["gfx8"],
8303   "map": {"at": 221188, "to": "mm"},
8304   "name": "CPG_PERFCOUNTER0_SELECT1",
8305   "type_ref": "CPG_PERFCOUNTER0_SELECT1"
8306  },
8307  {
8308   "chips": ["gfx8"],
8309   "map": {"at": 221192, "to": "mm"},
8310   "name": "CPG_PERFCOUNTER0_SELECT",
8311   "type_ref": "CPG_PERFCOUNTER0_SELECT"
8312  },
8313  {
8314   "chips": ["gfx8"],
8315   "map": {"at": 221196, "to": "mm"},
8316   "name": "CPC_PERFCOUNTER1_SELECT",
8317   "type_ref": "CPG_PERFCOUNTER1_SELECT"
8318  },
8319  {
8320   "chips": ["gfx8"],
8321   "map": {"at": 221200, "to": "mm"},
8322   "name": "CPC_PERFCOUNTER0_SELECT1",
8323   "type_ref": "CPG_PERFCOUNTER0_SELECT1"
8324  },
8325  {
8326   "chips": ["gfx8"],
8327   "map": {"at": 221204, "to": "mm"},
8328   "name": "CPF_PERFCOUNTER1_SELECT",
8329   "type_ref": "CPG_PERFCOUNTER1_SELECT"
8330  },
8331  {
8332   "chips": ["gfx8"],
8333   "map": {"at": 221208, "to": "mm"},
8334   "name": "CPF_PERFCOUNTER0_SELECT1",
8335   "type_ref": "CPG_PERFCOUNTER0_SELECT1"
8336  },
8337  {
8338   "chips": ["gfx8"],
8339   "map": {"at": 221212, "to": "mm"},
8340   "name": "CPF_PERFCOUNTER0_SELECT",
8341   "type_ref": "CPG_PERFCOUNTER0_SELECT"
8342  },
8343  {
8344   "chips": ["gfx8"],
8345   "map": {"at": 221216, "to": "mm"},
8346   "name": "CP_PERFMON_CNTL",
8347   "type_ref": "CP_PERFMON_CNTL"
8348  },
8349  {
8350   "chips": ["gfx8"],
8351   "map": {"at": 221220, "to": "mm"},
8352   "name": "CPC_PERFCOUNTER0_SELECT",
8353   "type_ref": "CPG_PERFCOUNTER0_SELECT"
8354  },
8355  {
8356   "chips": ["gfx8"],
8357   "map": {"at": 221248, "to": "mm"},
8358   "name": "CP_DRAW_OBJECT"
8359  },
8360  {
8361   "chips": ["gfx8"],
8362   "map": {"at": 221252, "to": "mm"},
8363   "name": "CP_DRAW_OBJECT_COUNTER",
8364   "type_ref": "CP_DRAW_OBJECT_COUNTER"
8365  },
8366  {
8367   "chips": ["gfx8"],
8368   "map": {"at": 221256, "to": "mm"},
8369   "name": "CP_DRAW_WINDOW_MASK_HI"
8370  },
8371  {
8372   "chips": ["gfx8"],
8373   "map": {"at": 221260, "to": "mm"},
8374   "name": "CP_DRAW_WINDOW_HI"
8375  },
8376  {
8377   "chips": ["gfx8"],
8378   "map": {"at": 221264, "to": "mm"},
8379   "name": "CP_DRAW_WINDOW_LO",
8380   "type_ref": "CP_DRAW_WINDOW_LO"
8381  },
8382  {
8383   "chips": ["gfx8"],
8384   "map": {"at": 221268, "to": "mm"},
8385   "name": "CP_DRAW_WINDOW_CNTL",
8386   "type_ref": "CP_DRAW_WINDOW_CNTL"
8387  },
8388  {
8389   "chips": ["gfx8"],
8390   "map": {"at": 221440, "to": "mm"},
8391   "name": "GRBM_PERFCOUNTER0_SELECT",
8392   "type_ref": "GRBM_PERFCOUNTER0_SELECT"
8393  },
8394  {
8395   "chips": ["gfx8"],
8396   "map": {"at": 221444, "to": "mm"},
8397   "name": "GRBM_PERFCOUNTER1_SELECT",
8398   "type_ref": "GRBM_PERFCOUNTER0_SELECT"
8399  },
8400  {
8401   "chips": ["gfx8"],
8402   "map": {"at": 221448, "to": "mm"},
8403   "name": "GRBM_SE0_PERFCOUNTER_SELECT",
8404   "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT"
8405  },
8406  {
8407   "chips": ["gfx8"],
8408   "map": {"at": 221452, "to": "mm"},
8409   "name": "GRBM_SE1_PERFCOUNTER_SELECT",
8410   "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT"
8411  },
8412  {
8413   "chips": ["gfx8"],
8414   "map": {"at": 221456, "to": "mm"},
8415   "name": "GRBM_SE2_PERFCOUNTER_SELECT",
8416   "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT"
8417  },
8418  {
8419   "chips": ["gfx8"],
8420   "map": {"at": 221460, "to": "mm"},
8421   "name": "GRBM_SE3_PERFCOUNTER_SELECT",
8422   "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT"
8423  },
8424  {
8425   "chips": ["gfx8"],
8426   "map": {"at": 221696, "to": "mm"},
8427   "name": "WD_PERFCOUNTER0_SELECT",
8428   "type_ref": "VGT_PERFCOUNTER2_SELECT"
8429  },
8430  {
8431   "chips": ["gfx8"],
8432   "map": {"at": 221700, "to": "mm"},
8433   "name": "WD_PERFCOUNTER1_SELECT",
8434   "type_ref": "VGT_PERFCOUNTER2_SELECT"
8435  },
8436  {
8437   "chips": ["gfx8"],
8438   "map": {"at": 221704, "to": "mm"},
8439   "name": "WD_PERFCOUNTER2_SELECT",
8440   "type_ref": "VGT_PERFCOUNTER2_SELECT"
8441  },
8442  {
8443   "chips": ["gfx8"],
8444   "map": {"at": 221708, "to": "mm"},
8445   "name": "WD_PERFCOUNTER3_SELECT",
8446   "type_ref": "VGT_PERFCOUNTER2_SELECT"
8447  },
8448  {
8449   "chips": ["gfx8"],
8450   "map": {"at": 221712, "to": "mm"},
8451   "name": "IA_PERFCOUNTER0_SELECT",
8452   "type_ref": "DB_PERFCOUNTER0_SELECT"
8453  },
8454  {
8455   "chips": ["gfx8"],
8456   "map": {"at": 221716, "to": "mm"},
8457   "name": "IA_PERFCOUNTER1_SELECT",
8458   "type_ref": "VGT_PERFCOUNTER2_SELECT"
8459  },
8460  {
8461   "chips": ["gfx8"],
8462   "map": {"at": 221720, "to": "mm"},
8463   "name": "IA_PERFCOUNTER2_SELECT",
8464   "type_ref": "VGT_PERFCOUNTER2_SELECT"
8465  },
8466  {
8467   "chips": ["gfx8"],
8468   "map": {"at": 221724, "to": "mm"},
8469   "name": "IA_PERFCOUNTER3_SELECT",
8470   "type_ref": "VGT_PERFCOUNTER2_SELECT"
8471  },
8472  {
8473   "chips": ["gfx8"],
8474   "map": {"at": 221728, "to": "mm"},
8475   "name": "IA_PERFCOUNTER0_SELECT1",
8476   "type_ref": "DB_PERFCOUNTER0_SELECT1"
8477  },
8478  {
8479   "chips": ["gfx8"],
8480   "map": {"at": 221744, "to": "mm"},
8481   "name": "VGT_PERFCOUNTER0_SELECT",
8482   "type_ref": "DB_PERFCOUNTER0_SELECT"
8483  },
8484  {
8485   "chips": ["gfx8"],
8486   "map": {"at": 221748, "to": "mm"},
8487   "name": "VGT_PERFCOUNTER1_SELECT",
8488   "type_ref": "DB_PERFCOUNTER0_SELECT"
8489  },
8490  {
8491   "chips": ["gfx8"],
8492   "map": {"at": 221752, "to": "mm"},
8493   "name": "VGT_PERFCOUNTER2_SELECT",
8494   "type_ref": "VGT_PERFCOUNTER2_SELECT"
8495  },
8496  {
8497   "chips": ["gfx8"],
8498   "map": {"at": 221756, "to": "mm"},
8499   "name": "VGT_PERFCOUNTER3_SELECT",
8500   "type_ref": "VGT_PERFCOUNTER2_SELECT"
8501  },
8502  {
8503   "chips": ["gfx8"],
8504   "map": {"at": 221760, "to": "mm"},
8505   "name": "VGT_PERFCOUNTER0_SELECT1",
8506   "type_ref": "DB_PERFCOUNTER0_SELECT1"
8507  },
8508  {
8509   "chips": ["gfx8"],
8510   "map": {"at": 221764, "to": "mm"},
8511   "name": "VGT_PERFCOUNTER1_SELECT1",
8512   "type_ref": "DB_PERFCOUNTER0_SELECT1"
8513  },
8514  {
8515   "chips": ["gfx8"],
8516   "map": {"at": 221776, "to": "mm"},
8517   "name": "VGT_PERFCOUNTER_SEID_MASK",
8518   "type_ref": "VGT_PERFCOUNTER_SEID_MASK"
8519  },
8520  {
8521   "chips": ["gfx8"],
8522   "map": {"at": 222208, "to": "mm"},
8523   "name": "PA_SU_PERFCOUNTER0_SELECT",
8524   "type_ref": "PA_SU_PERFCOUNTER0_SELECT"
8525  },
8526  {
8527   "chips": ["gfx8"],
8528   "map": {"at": 222212, "to": "mm"},
8529   "name": "PA_SU_PERFCOUNTER0_SELECT1",
8530   "type_ref": "PA_SU_PERFCOUNTER0_SELECT1"
8531  },
8532  {
8533   "chips": ["gfx8"],
8534   "map": {"at": 222216, "to": "mm"},
8535   "name": "PA_SU_PERFCOUNTER1_SELECT",
8536   "type_ref": "PA_SU_PERFCOUNTER0_SELECT"
8537  },
8538  {
8539   "chips": ["gfx8"],
8540   "map": {"at": 222220, "to": "mm"},
8541   "name": "PA_SU_PERFCOUNTER1_SELECT1",
8542   "type_ref": "PA_SU_PERFCOUNTER0_SELECT1"
8543  },
8544  {
8545   "chips": ["gfx8"],
8546   "map": {"at": 222224, "to": "mm"},
8547   "name": "PA_SU_PERFCOUNTER2_SELECT",
8548   "type_ref": "PA_SU_PERFCOUNTER2_SELECT"
8549  },
8550  {
8551   "chips": ["gfx8"],
8552   "map": {"at": 222228, "to": "mm"},
8553   "name": "PA_SU_PERFCOUNTER3_SELECT",
8554   "type_ref": "PA_SU_PERFCOUNTER2_SELECT"
8555  },
8556  {
8557   "chips": ["gfx8"],
8558   "map": {"at": 222464, "to": "mm"},
8559   "name": "PA_SC_PERFCOUNTER0_SELECT",
8560   "type_ref": "PA_SU_PERFCOUNTER0_SELECT"
8561  },
8562  {
8563   "chips": ["gfx8"],
8564   "map": {"at": 222468, "to": "mm"},
8565   "name": "PA_SC_PERFCOUNTER0_SELECT1",
8566   "type_ref": "PA_SU_PERFCOUNTER0_SELECT1"
8567  },
8568  {
8569   "chips": ["gfx8"],
8570   "map": {"at": 222472, "to": "mm"},
8571   "name": "PA_SC_PERFCOUNTER1_SELECT",
8572   "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
8573  },
8574  {
8575   "chips": ["gfx8"],
8576   "map": {"at": 222476, "to": "mm"},
8577   "name": "PA_SC_PERFCOUNTER2_SELECT",
8578   "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
8579  },
8580  {
8581   "chips": ["gfx8"],
8582   "map": {"at": 222480, "to": "mm"},
8583   "name": "PA_SC_PERFCOUNTER3_SELECT",
8584   "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
8585  },
8586  {
8587   "chips": ["gfx8"],
8588   "map": {"at": 222484, "to": "mm"},
8589   "name": "PA_SC_PERFCOUNTER4_SELECT",
8590   "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
8591  },
8592  {
8593   "chips": ["gfx8"],
8594   "map": {"at": 222488, "to": "mm"},
8595   "name": "PA_SC_PERFCOUNTER5_SELECT",
8596   "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
8597  },
8598  {
8599   "chips": ["gfx8"],
8600   "map": {"at": 222492, "to": "mm"},
8601   "name": "PA_SC_PERFCOUNTER6_SELECT",
8602   "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
8603  },
8604  {
8605   "chips": ["gfx8"],
8606   "map": {"at": 222496, "to": "mm"},
8607   "name": "PA_SC_PERFCOUNTER7_SELECT",
8608   "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
8609  },
8610  {
8611   "chips": ["gfx8"],
8612   "map": {"at": 222720, "to": "mm"},
8613   "name": "SPI_PERFCOUNTER0_SELECT",
8614   "type_ref": "PA_SU_PERFCOUNTER0_SELECT"
8615  },
8616  {
8617   "chips": ["gfx8"],
8618   "map": {"at": 222724, "to": "mm"},
8619   "name": "SPI_PERFCOUNTER1_SELECT",
8620   "type_ref": "PA_SU_PERFCOUNTER0_SELECT"
8621  },
8622  {
8623   "chips": ["gfx8"],
8624   "map": {"at": 222728, "to": "mm"},
8625   "name": "SPI_PERFCOUNTER2_SELECT",
8626   "type_ref": "PA_SU_PERFCOUNTER0_SELECT"
8627  },
8628  {
8629   "chips": ["gfx8"],
8630   "map": {"at": 222732, "to": "mm"},
8631   "name": "SPI_PERFCOUNTER3_SELECT",
8632   "type_ref": "PA_SU_PERFCOUNTER0_SELECT"
8633  },
8634  {
8635   "chips": ["gfx8"],
8636   "map": {"at": 222736, "to": "mm"},
8637   "name": "SPI_PERFCOUNTER0_SELECT1",
8638   "type_ref": "PA_SU_PERFCOUNTER0_SELECT1"
8639  },
8640  {
8641   "chips": ["gfx8"],
8642   "map": {"at": 222740, "to": "mm"},
8643   "name": "SPI_PERFCOUNTER1_SELECT1",
8644   "type_ref": "PA_SU_PERFCOUNTER0_SELECT1"
8645  },
8646  {
8647   "chips": ["gfx8"],
8648   "map": {"at": 222744, "to": "mm"},
8649   "name": "SPI_PERFCOUNTER2_SELECT1",
8650   "type_ref": "PA_SU_PERFCOUNTER0_SELECT1"
8651  },
8652  {
8653   "chips": ["gfx8"],
8654   "map": {"at": 222748, "to": "mm"},
8655   "name": "SPI_PERFCOUNTER3_SELECT1",
8656   "type_ref": "PA_SU_PERFCOUNTER0_SELECT1"
8657  },
8658  {
8659   "chips": ["gfx8"],
8660   "map": {"at": 222752, "to": "mm"},
8661   "name": "SPI_PERFCOUNTER4_SELECT",
8662   "type_ref": "SPI_PERFCOUNTER4_SELECT"
8663  },
8664  {
8665   "chips": ["gfx8"],
8666   "map": {"at": 222756, "to": "mm"},
8667   "name": "SPI_PERFCOUNTER5_SELECT",
8668   "type_ref": "SPI_PERFCOUNTER4_SELECT"
8669  },
8670  {
8671   "chips": ["gfx8"],
8672   "map": {"at": 222760, "to": "mm"},
8673   "name": "SPI_PERFCOUNTER_BINS",
8674   "type_ref": "SPI_PERFCOUNTER_BINS"
8675  },
8676  {
8677   "chips": ["gfx8"],
8678   "map": {"at": 222976, "to": "mm"},
8679   "name": "SQ_PERFCOUNTER0_SELECT",
8680   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8681  },
8682  {
8683   "chips": ["gfx8"],
8684   "map": {"at": 222980, "to": "mm"},
8685   "name": "SQ_PERFCOUNTER1_SELECT",
8686   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8687  },
8688  {
8689   "chips": ["gfx8"],
8690   "map": {"at": 222984, "to": "mm"},
8691   "name": "SQ_PERFCOUNTER2_SELECT",
8692   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8693  },
8694  {
8695   "chips": ["gfx8"],
8696   "map": {"at": 222988, "to": "mm"},
8697   "name": "SQ_PERFCOUNTER3_SELECT",
8698   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8699  },
8700  {
8701   "chips": ["gfx8"],
8702   "map": {"at": 222992, "to": "mm"},
8703   "name": "SQ_PERFCOUNTER4_SELECT",
8704   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8705  },
8706  {
8707   "chips": ["gfx8"],
8708   "map": {"at": 222996, "to": "mm"},
8709   "name": "SQ_PERFCOUNTER5_SELECT",
8710   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8711  },
8712  {
8713   "chips": ["gfx8"],
8714   "map": {"at": 223000, "to": "mm"},
8715   "name": "SQ_PERFCOUNTER6_SELECT",
8716   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8717  },
8718  {
8719   "chips": ["gfx8"],
8720   "map": {"at": 223004, "to": "mm"},
8721   "name": "SQ_PERFCOUNTER7_SELECT",
8722   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8723  },
8724  {
8725   "chips": ["gfx8"],
8726   "map": {"at": 223008, "to": "mm"},
8727   "name": "SQ_PERFCOUNTER8_SELECT",
8728   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8729  },
8730  {
8731   "chips": ["gfx8"],
8732   "map": {"at": 223012, "to": "mm"},
8733   "name": "SQ_PERFCOUNTER9_SELECT",
8734   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8735  },
8736  {
8737   "chips": ["gfx8"],
8738   "map": {"at": 223016, "to": "mm"},
8739   "name": "SQ_PERFCOUNTER10_SELECT",
8740   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8741  },
8742  {
8743   "chips": ["gfx8"],
8744   "map": {"at": 223020, "to": "mm"},
8745   "name": "SQ_PERFCOUNTER11_SELECT",
8746   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8747  },
8748  {
8749   "chips": ["gfx8"],
8750   "map": {"at": 223024, "to": "mm"},
8751   "name": "SQ_PERFCOUNTER12_SELECT",
8752   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8753  },
8754  {
8755   "chips": ["gfx8"],
8756   "map": {"at": 223028, "to": "mm"},
8757   "name": "SQ_PERFCOUNTER13_SELECT",
8758   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8759  },
8760  {
8761   "chips": ["gfx8"],
8762   "map": {"at": 223032, "to": "mm"},
8763   "name": "SQ_PERFCOUNTER14_SELECT",
8764   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8765  },
8766  {
8767   "chips": ["gfx8"],
8768   "map": {"at": 223036, "to": "mm"},
8769   "name": "SQ_PERFCOUNTER15_SELECT",
8770   "type_ref": "SQ_PERFCOUNTER0_SELECT"
8771  },
8772  {
8773   "chips": ["gfx8"],
8774   "map": {"at": 223104, "to": "mm"},
8775   "name": "SQ_PERFCOUNTER_CTRL",
8776   "type_ref": "SQ_PERFCOUNTER_CTRL"
8777  },
8778  {
8779   "chips": ["gfx8"],
8780   "map": {"at": 223108, "to": "mm"},
8781   "name": "SQ_PERFCOUNTER_MASK",
8782   "type_ref": "SQ_PERFCOUNTER_MASK"
8783  },
8784  {
8785   "chips": ["gfx8"],
8786   "map": {"at": 223112, "to": "mm"},
8787   "name": "SQ_PERFCOUNTER_CTRL2",
8788   "type_ref": "SQ_PERFCOUNTER_CTRL2"
8789  },
8790  {
8791   "chips": ["gfx8"],
8792   "map": {"at": 223488, "to": "mm"},
8793   "name": "SX_PERFCOUNTER0_SELECT",
8794   "type_ref": "SX_PERFCOUNTER0_SELECT"
8795  },
8796  {
8797   "chips": ["gfx8"],
8798   "map": {"at": 223492, "to": "mm"},
8799   "name": "SX_PERFCOUNTER1_SELECT",
8800   "type_ref": "SX_PERFCOUNTER0_SELECT"
8801  },
8802  {
8803   "chips": ["gfx8"],
8804   "map": {"at": 223496, "to": "mm"},
8805   "name": "SX_PERFCOUNTER2_SELECT",
8806   "type_ref": "SX_PERFCOUNTER0_SELECT"
8807  },
8808  {
8809   "chips": ["gfx8"],
8810   "map": {"at": 223500, "to": "mm"},
8811   "name": "SX_PERFCOUNTER3_SELECT",
8812   "type_ref": "SX_PERFCOUNTER0_SELECT"
8813  },
8814  {
8815   "chips": ["gfx8"],
8816   "map": {"at": 223504, "to": "mm"},
8817   "name": "SX_PERFCOUNTER0_SELECT1",
8818   "type_ref": "SX_PERFCOUNTER0_SELECT1"
8819  },
8820  {
8821   "chips": ["gfx8"],
8822   "map": {"at": 223508, "to": "mm"},
8823   "name": "SX_PERFCOUNTER1_SELECT1",
8824   "type_ref": "SX_PERFCOUNTER0_SELECT1"
8825  },
8826  {
8827   "chips": ["gfx8"],
8828   "map": {"at": 223744, "to": "mm"},
8829   "name": "GDS_PERFCOUNTER0_SELECT",
8830   "type_ref": "SX_PERFCOUNTER0_SELECT"
8831  },
8832  {
8833   "chips": ["gfx8"],
8834   "map": {"at": 223748, "to": "mm"},
8835   "name": "GDS_PERFCOUNTER1_SELECT",
8836   "type_ref": "SX_PERFCOUNTER0_SELECT"
8837  },
8838  {
8839   "chips": ["gfx8"],
8840   "map": {"at": 223752, "to": "mm"},
8841   "name": "GDS_PERFCOUNTER2_SELECT",
8842   "type_ref": "SX_PERFCOUNTER0_SELECT"
8843  },
8844  {
8845   "chips": ["gfx8"],
8846   "map": {"at": 223756, "to": "mm"},
8847   "name": "GDS_PERFCOUNTER3_SELECT",
8848   "type_ref": "SX_PERFCOUNTER0_SELECT"
8849  },
8850  {
8851   "chips": ["gfx8"],
8852   "map": {"at": 223760, "to": "mm"},
8853   "name": "GDS_PERFCOUNTER0_SELECT1",
8854   "type_ref": "SX_PERFCOUNTER0_SELECT1"
8855  },
8856  {
8857   "chips": ["gfx8"],
8858   "map": {"at": 224000, "to": "mm"},
8859   "name": "TA_PERFCOUNTER0_SELECT",
8860   "type_ref": "TD_PERFCOUNTER0_SELECT"
8861  },
8862  {
8863   "chips": ["gfx8"],
8864   "map": {"at": 224004, "to": "mm"},
8865   "name": "TA_PERFCOUNTER0_SELECT1",
8866   "type_ref": "TD_PERFCOUNTER0_SELECT1"
8867  },
8868  {
8869   "chips": ["gfx8"],
8870   "map": {"at": 224008, "to": "mm"},
8871   "name": "TA_PERFCOUNTER1_SELECT",
8872   "type_ref": "TD_PERFCOUNTER0_SELECT"
8873  },
8874  {
8875   "chips": ["gfx8"],
8876   "map": {"at": 224256, "to": "mm"},
8877   "name": "TD_PERFCOUNTER0_SELECT",
8878   "type_ref": "TD_PERFCOUNTER0_SELECT"
8879  },
8880  {
8881   "chips": ["gfx8"],
8882   "map": {"at": 224260, "to": "mm"},
8883   "name": "TD_PERFCOUNTER0_SELECT1",
8884   "type_ref": "TD_PERFCOUNTER0_SELECT1"
8885  },
8886  {
8887   "chips": ["gfx8"],
8888   "map": {"at": 224264, "to": "mm"},
8889   "name": "TD_PERFCOUNTER1_SELECT",
8890   "type_ref": "TD_PERFCOUNTER0_SELECT"
8891  },
8892  {
8893   "chips": ["gfx8"],
8894   "map": {"at": 224512, "to": "mm"},
8895   "name": "TCP_PERFCOUNTER0_SELECT",
8896   "type_ref": "DB_PERFCOUNTER0_SELECT"
8897  },
8898  {
8899   "chips": ["gfx8"],
8900   "map": {"at": 224516, "to": "mm"},
8901   "name": "TCP_PERFCOUNTER0_SELECT1",
8902   "type_ref": "DB_PERFCOUNTER0_SELECT1"
8903  },
8904  {
8905   "chips": ["gfx8"],
8906   "map": {"at": 224520, "to": "mm"},
8907   "name": "TCP_PERFCOUNTER1_SELECT",
8908   "type_ref": "DB_PERFCOUNTER0_SELECT"
8909  },
8910  {
8911   "chips": ["gfx8"],
8912   "map": {"at": 224524, "to": "mm"},
8913   "name": "TCP_PERFCOUNTER1_SELECT1",
8914   "type_ref": "DB_PERFCOUNTER0_SELECT1"
8915  },
8916  {
8917   "chips": ["gfx8"],
8918   "map": {"at": 224528, "to": "mm"},
8919   "name": "TCP_PERFCOUNTER2_SELECT",
8920   "type_ref": "TCC_PERFCOUNTER2_SELECT"
8921  },
8922  {
8923   "chips": ["gfx8"],
8924   "map": {"at": 224532, "to": "mm"},
8925   "name": "TCP_PERFCOUNTER3_SELECT",
8926   "type_ref": "TCC_PERFCOUNTER2_SELECT"
8927  },
8928  {
8929   "chips": ["gfx8"],
8930   "map": {"at": 224768, "to": "mm"},
8931   "name": "TCC_PERFCOUNTER0_SELECT",
8932   "type_ref": "DB_PERFCOUNTER0_SELECT"
8933  },
8934  {
8935   "chips": ["gfx8"],
8936   "map": {"at": 224772, "to": "mm"},
8937   "name": "TCC_PERFCOUNTER0_SELECT1",
8938   "type_ref": "TCC_PERFCOUNTER0_SELECT1"
8939  },
8940  {
8941   "chips": ["gfx8"],
8942   "map": {"at": 224776, "to": "mm"},
8943   "name": "TCC_PERFCOUNTER1_SELECT",
8944   "type_ref": "DB_PERFCOUNTER0_SELECT"
8945  },
8946  {
8947   "chips": ["gfx8"],
8948   "map": {"at": 224780, "to": "mm"},
8949   "name": "TCC_PERFCOUNTER1_SELECT1",
8950   "type_ref": "TCC_PERFCOUNTER0_SELECT1"
8951  },
8952  {
8953   "chips": ["gfx8"],
8954   "map": {"at": 224784, "to": "mm"},
8955   "name": "TCC_PERFCOUNTER2_SELECT",
8956   "type_ref": "TCC_PERFCOUNTER2_SELECT"
8957  },
8958  {
8959   "chips": ["gfx8"],
8960   "map": {"at": 224788, "to": "mm"},
8961   "name": "TCC_PERFCOUNTER3_SELECT",
8962   "type_ref": "TCC_PERFCOUNTER2_SELECT"
8963  },
8964  {
8965   "chips": ["gfx8"],
8966   "map": {"at": 224832, "to": "mm"},
8967   "name": "TCA_PERFCOUNTER0_SELECT",
8968   "type_ref": "DB_PERFCOUNTER0_SELECT"
8969  },
8970  {
8971   "chips": ["gfx8"],
8972   "map": {"at": 224836, "to": "mm"},
8973   "name": "TCA_PERFCOUNTER0_SELECT1",
8974   "type_ref": "TCC_PERFCOUNTER0_SELECT1"
8975  },
8976  {
8977   "chips": ["gfx8"],
8978   "map": {"at": 224840, "to": "mm"},
8979   "name": "TCA_PERFCOUNTER1_SELECT",
8980   "type_ref": "DB_PERFCOUNTER0_SELECT"
8981  },
8982  {
8983   "chips": ["gfx8"],
8984   "map": {"at": 224844, "to": "mm"},
8985   "name": "TCA_PERFCOUNTER1_SELECT1",
8986   "type_ref": "TCC_PERFCOUNTER0_SELECT1"
8987  },
8988  {
8989   "chips": ["gfx8"],
8990   "map": {"at": 224848, "to": "mm"},
8991   "name": "TCA_PERFCOUNTER2_SELECT",
8992   "type_ref": "TCC_PERFCOUNTER2_SELECT"
8993  },
8994  {
8995   "chips": ["gfx8"],
8996   "map": {"at": 224852, "to": "mm"},
8997   "name": "TCA_PERFCOUNTER3_SELECT",
8998   "type_ref": "TCC_PERFCOUNTER2_SELECT"
8999  },
9000  {
9001   "chips": ["gfx8"],
9002   "map": {"at": 225280, "to": "mm"},
9003   "name": "CB_PERFCOUNTER_FILTER",
9004   "type_ref": "CB_PERFCOUNTER_FILTER"
9005  },
9006  {
9007   "chips": ["gfx8"],
9008   "map": {"at": 225284, "to": "mm"},
9009   "name": "CB_PERFCOUNTER0_SELECT",
9010   "type_ref": "CB_PERFCOUNTER0_SELECT"
9011  },
9012  {
9013   "chips": ["gfx8"],
9014   "map": {"at": 225288, "to": "mm"},
9015   "name": "CB_PERFCOUNTER0_SELECT1",
9016   "type_ref": "CB_PERFCOUNTER0_SELECT1"
9017  },
9018  {
9019   "chips": ["gfx8"],
9020   "map": {"at": 225292, "to": "mm"},
9021   "name": "CB_PERFCOUNTER1_SELECT",
9022   "type_ref": "CB_PERFCOUNTER1_SELECT"
9023  },
9024  {
9025   "chips": ["gfx8"],
9026   "map": {"at": 225296, "to": "mm"},
9027   "name": "CB_PERFCOUNTER2_SELECT",
9028   "type_ref": "CB_PERFCOUNTER1_SELECT"
9029  },
9030  {
9031   "chips": ["gfx8"],
9032   "map": {"at": 225300, "to": "mm"},
9033   "name": "CB_PERFCOUNTER3_SELECT",
9034   "type_ref": "CB_PERFCOUNTER1_SELECT"
9035  },
9036  {
9037   "chips": ["gfx8"],
9038   "map": {"at": 225536, "to": "mm"},
9039   "name": "DB_PERFCOUNTER0_SELECT",
9040   "type_ref": "DB_PERFCOUNTER0_SELECT"
9041  },
9042  {
9043   "chips": ["gfx8"],
9044   "map": {"at": 225540, "to": "mm"},
9045   "name": "DB_PERFCOUNTER0_SELECT1",
9046   "type_ref": "DB_PERFCOUNTER0_SELECT1"
9047  },
9048  {
9049   "chips": ["gfx8"],
9050   "map": {"at": 225544, "to": "mm"},
9051   "name": "DB_PERFCOUNTER1_SELECT",
9052   "type_ref": "DB_PERFCOUNTER0_SELECT"
9053  },
9054  {
9055   "chips": ["gfx8"],
9056   "map": {"at": 225548, "to": "mm"},
9057   "name": "DB_PERFCOUNTER1_SELECT1",
9058   "type_ref": "DB_PERFCOUNTER0_SELECT1"
9059  },
9060  {
9061   "chips": ["gfx8"],
9062   "map": {"at": 225552, "to": "mm"},
9063   "name": "DB_PERFCOUNTER2_SELECT",
9064   "type_ref": "DB_PERFCOUNTER0_SELECT"
9065  },
9066  {
9067   "chips": ["gfx8"],
9068   "map": {"at": 225560, "to": "mm"},
9069   "name": "DB_PERFCOUNTER3_SELECT",
9070   "type_ref": "DB_PERFCOUNTER0_SELECT"
9071  },
9072  {
9073   "chips": ["gfx8"],
9074   "map": {"at": 225792, "to": "mm"},
9075   "name": "RLC_SPM_PERFMON_CNTL",
9076   "type_ref": "RLC_SPM_PERFMON_CNTL"
9077  },
9078  {
9079   "chips": ["gfx8"],
9080   "map": {"at": 225796, "to": "mm"},
9081   "name": "RLC_SPM_PERFMON_RING_BASE_LO"
9082  },
9083  {
9084   "chips": ["gfx8"],
9085   "map": {"at": 225800, "to": "mm"},
9086   "name": "RLC_SPM_PERFMON_RING_BASE_HI",
9087   "type_ref": "RLC_SPM_PERFMON_RING_BASE_HI"
9088  },
9089  {
9090   "chips": ["gfx8"],
9091   "map": {"at": 225804, "to": "mm"},
9092   "name": "RLC_SPM_PERFMON_RING_SIZE"
9093  },
9094  {
9095   "chips": ["gfx8"],
9096   "map": {"at": 225808, "to": "mm"},
9097   "name": "RLC_SPM_PERFMON_SEGMENT_SIZE",
9098   "type_ref": "RLC_SPM_PERFMON_SEGMENT_SIZE"
9099  },
9100  {
9101   "chips": ["gfx8"],
9102   "map": {"at": 225812, "to": "mm"},
9103   "name": "RLC_SPM_SE_MUXSEL_ADDR"
9104  },
9105  {
9106   "chips": ["gfx8"],
9107   "map": {"at": 225816, "to": "mm"},
9108   "name": "RLC_SPM_SE_MUXSEL_DATA"
9109  },
9110  {
9111   "chips": ["gfx8"],
9112   "map": {"at": 225820, "to": "mm"},
9113   "name": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY",
9114   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9115  },
9116  {
9117   "chips": ["gfx8"],
9118   "map": {"at": 225824, "to": "mm"},
9119   "name": "RLC_SPM_CPC_PERFMON_SAMPLE_DELAY",
9120   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9121  },
9122  {
9123   "chips": ["gfx8"],
9124   "map": {"at": 225828, "to": "mm"},
9125   "name": "RLC_SPM_CPF_PERFMON_SAMPLE_DELAY",
9126   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9127  },
9128  {
9129   "chips": ["gfx8"],
9130   "map": {"at": 225832, "to": "mm"},
9131   "name": "RLC_SPM_CB_PERFMON_SAMPLE_DELAY",
9132   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9133  },
9134  {
9135   "chips": ["gfx8"],
9136   "map": {"at": 225836, "to": "mm"},
9137   "name": "RLC_SPM_DB_PERFMON_SAMPLE_DELAY",
9138   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9139  },
9140  {
9141   "chips": ["gfx8"],
9142   "map": {"at": 225840, "to": "mm"},
9143   "name": "RLC_SPM_PA_PERFMON_SAMPLE_DELAY",
9144   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9145  },
9146  {
9147   "chips": ["gfx8"],
9148   "map": {"at": 225844, "to": "mm"},
9149   "name": "RLC_SPM_GDS_PERFMON_SAMPLE_DELAY",
9150   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9151  },
9152  {
9153   "chips": ["gfx8"],
9154   "map": {"at": 225848, "to": "mm"},
9155   "name": "RLC_SPM_IA_PERFMON_SAMPLE_DELAY",
9156   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9157  },
9158  {
9159   "chips": ["gfx8"],
9160   "map": {"at": 225856, "to": "mm"},
9161   "name": "RLC_SPM_SC_PERFMON_SAMPLE_DELAY",
9162   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9163  },
9164  {
9165   "chips": ["gfx8"],
9166   "map": {"at": 225860, "to": "mm"},
9167   "name": "RLC_SPM_TCC_PERFMON_SAMPLE_DELAY",
9168   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9169  },
9170  {
9171   "chips": ["gfx8"],
9172   "map": {"at": 225864, "to": "mm"},
9173   "name": "RLC_SPM_TCA_PERFMON_SAMPLE_DELAY",
9174   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9175  },
9176  {
9177   "chips": ["gfx8"],
9178   "map": {"at": 225868, "to": "mm"},
9179   "name": "RLC_SPM_TCP_PERFMON_SAMPLE_DELAY",
9180   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9181  },
9182  {
9183   "chips": ["gfx8"],
9184   "map": {"at": 225872, "to": "mm"},
9185   "name": "RLC_SPM_TA_PERFMON_SAMPLE_DELAY",
9186   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9187  },
9188  {
9189   "chips": ["gfx8"],
9190   "map": {"at": 225876, "to": "mm"},
9191   "name": "RLC_SPM_TD_PERFMON_SAMPLE_DELAY",
9192   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9193  },
9194  {
9195   "chips": ["gfx8"],
9196   "map": {"at": 225880, "to": "mm"},
9197   "name": "RLC_SPM_VGT_PERFMON_SAMPLE_DELAY",
9198   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9199  },
9200  {
9201   "chips": ["gfx8"],
9202   "map": {"at": 225884, "to": "mm"},
9203   "name": "RLC_SPM_SPI_PERFMON_SAMPLE_DELAY",
9204   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9205  },
9206  {
9207   "chips": ["gfx8"],
9208   "map": {"at": 225888, "to": "mm"},
9209   "name": "RLC_SPM_SQG_PERFMON_SAMPLE_DELAY",
9210   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9211  },
9212  {
9213   "chips": ["gfx8"],
9214   "map": {"at": 225896, "to": "mm"},
9215   "name": "RLC_SPM_SX_PERFMON_SAMPLE_DELAY",
9216   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9217  },
9218  {
9219   "chips": ["gfx8"],
9220   "map": {"at": 225900, "to": "mm"},
9221   "name": "RLC_SPM_GLOBAL_MUXSEL_ADDR"
9222  },
9223  {
9224   "chips": ["gfx8"],
9225   "map": {"at": 225904, "to": "mm"},
9226   "name": "RLC_SPM_GLOBAL_MUXSEL_DATA"
9227  },
9228  {
9229   "chips": ["gfx8"],
9230   "map": {"at": 225908, "to": "mm"},
9231   "name": "RLC_SPM_RING_RDPTR"
9232  },
9233  {
9234   "chips": ["gfx8"],
9235   "map": {"at": 225912, "to": "mm"},
9236   "name": "RLC_SPM_SEGMENT_THRESHOLD"
9237  },
9238  {
9239   "chips": ["gfx8"],
9240   "map": {"at": 225916, "to": "mm"},
9241   "name": "RLC_SPM_DBR0_PERFMON_SAMPLE_DELAY",
9242   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9243  },
9244  {
9245   "chips": ["gfx8"],
9246   "map": {"at": 225920, "to": "mm"},
9247   "name": "RLC_SPM_DBR1_PERFMON_SAMPLE_DELAY",
9248   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9249  },
9250  {
9251   "chips": ["gfx8"],
9252   "map": {"at": 225924, "to": "mm"},
9253   "name": "RLC_SPM_CBR0_PERFMON_SAMPLE_DELAY",
9254   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9255  },
9256  {
9257   "chips": ["gfx8"],
9258   "map": {"at": 225928, "to": "mm"},
9259   "name": "RLC_SPM_CBR1_PERFMON_SAMPLE_DELAY",
9260   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9261  },
9262  {
9263   "chips": ["gfx8"],
9264   "map": {"at": 226044, "to": "mm"},
9265   "name": "RLC_PERFMON_CLK_CNTL",
9266   "type_ref": "RLC_PERFMON_CLK_CNTL"
9267  },
9268  {
9269   "chips": ["gfx8"],
9270   "map": {"at": 226048, "to": "mm"},
9271   "name": "RLC_PERFMON_CNTL",
9272   "type_ref": "RLC_PERFMON_CNTL"
9273  },
9274  {
9275   "chips": ["gfx8"],
9276   "map": {"at": 226052, "to": "mm"},
9277   "name": "RLC_PERFCOUNTER0_SELECT",
9278   "type_ref": "RLC_PERFCOUNTER0_SELECT"
9279  },
9280  {
9281   "chips": ["gfx8"],
9282   "map": {"at": 226056, "to": "mm"},
9283   "name": "RLC_PERFCOUNTER1_SELECT",
9284   "type_ref": "RLC_PERFCOUNTER0_SELECT"
9285  }
9286 ],
9287 "register_types": {
9288  "CB_BLEND0_CONTROL": {
9289   "fields": [
9290    {"bits": [0, 4], "enum_ref": "BlendOp", "name": "COLOR_SRCBLEND"},
9291    {"bits": [5, 7], "enum_ref": "CombFunc", "name": "COLOR_COMB_FCN"},
9292    {"bits": [8, 12], "enum_ref": "BlendOp", "name": "COLOR_DESTBLEND"},
9293    {"bits": [16, 20], "enum_ref": "BlendOp", "name": "ALPHA_SRCBLEND"},
9294    {"bits": [21, 23], "enum_ref": "CombFunc", "name": "ALPHA_COMB_FCN"},
9295    {"bits": [24, 28], "enum_ref": "BlendOp", "name": "ALPHA_DESTBLEND"},
9296    {"bits": [29, 29], "name": "SEPARATE_ALPHA_BLEND"},
9297    {"bits": [30, 30], "name": "ENABLE"},
9298    {"bits": [31, 31], "name": "DISABLE_ROP3"}
9299   ]
9300  },
9301  "CB_COLOR0_ATTRIB": {
9302   "fields": [
9303    {"bits": [0, 4], "name": "TILE_MODE_INDEX"},
9304    {"bits": [5, 9], "name": "FMASK_TILE_MODE_INDEX"},
9305    {"bits": [10, 11], "name": "FMASK_BANK_HEIGHT"},
9306    {"bits": [12, 14], "name": "NUM_SAMPLES"},
9307    {"bits": [15, 16], "name": "NUM_FRAGMENTS"},
9308    {"bits": [17, 17], "name": "FORCE_DST_ALPHA_1"}
9309   ]
9310  },
9311  "CB_COLOR0_CMASK_SLICE": {
9312   "fields": [
9313    {"bits": [0, 13], "name": "TILE_MAX"}
9314   ]
9315  },
9316  "CB_COLOR0_DCC_CONTROL": {
9317   "fields": [
9318    {"bits": [0, 0], "name": "OVERWRITE_COMBINER_DISABLE"},
9319    {"bits": [1, 1], "name": "KEY_CLEAR_ENABLE"},
9320    {"bits": [2, 3], "enum_ref": "CB_COLOR_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE", "name": "MAX_UNCOMPRESSED_BLOCK_SIZE"},
9321    {"bits": [4, 4], "enum_ref": "CB_COLOR_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE", "name": "MIN_COMPRESSED_BLOCK_SIZE"},
9322    {"bits": [5, 6], "name": "MAX_COMPRESSED_BLOCK_SIZE"},
9323    {"bits": [7, 8], "name": "COLOR_TRANSFORM"},
9324    {"bits": [9, 9], "name": "INDEPENDENT_64B_BLOCKS"},
9325    {"bits": [10, 13], "name": "LOSSY_RGB_PRECISION"},
9326    {"bits": [14, 17], "name": "LOSSY_ALPHA_PRECISION"}
9327   ]
9328  },
9329  "CB_COLOR0_INFO": {
9330   "fields": [
9331    {"bits": [0, 1], "enum_ref": "SurfaceEndian", "name": "ENDIAN"},
9332    {"bits": [2, 6], "enum_ref": "ColorFormat", "name": "FORMAT"},
9333    {"bits": [7, 7], "name": "LINEAR_GENERAL"},
9334    {"bits": [8, 10], "enum_ref": "SurfaceNumber", "name": "NUMBER_TYPE"},
9335    {"bits": [11, 12], "enum_ref": "SurfaceSwap", "name": "COMP_SWAP"},
9336    {"bits": [13, 13], "name": "FAST_CLEAR"},
9337    {"bits": [14, 14], "name": "COMPRESSION"},
9338    {"bits": [15, 15], "name": "BLEND_CLAMP"},
9339    {"bits": [16, 16], "name": "BLEND_BYPASS"},
9340    {"bits": [17, 17], "name": "SIMPLE_FLOAT"},
9341    {"bits": [18, 18], "name": "ROUND_MODE"},
9342    {"bits": [19, 19], "name": "CMASK_IS_LINEAR"},
9343    {"bits": [20, 22], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DONT_RD_DST"},
9344    {"bits": [23, 25], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DISCARD_PIXEL"},
9345    {"bits": [26, 26], "name": "FMASK_COMPRESSION_DISABLE"},
9346    {"bits": [27, 27], "name": "FMASK_COMPRESS_1FRAG_ONLY"},
9347    {"bits": [28, 28], "name": "DCC_ENABLE"},
9348    {"bits": [29, 30], "enum_ref": "CmaskAddr", "name": "CMASK_ADDR_TYPE"}
9349   ]
9350  },
9351  "CB_COLOR0_PITCH": {
9352   "fields": [
9353    {"bits": [0, 10], "name": "TILE_MAX"},
9354    {"bits": [20, 30], "name": "FMASK_TILE_MAX"}
9355   ]
9356  },
9357  "CB_COLOR0_SLICE": {
9358   "fields": [
9359    {"bits": [0, 21], "name": "TILE_MAX"}
9360   ]
9361  },
9362  "CB_COLOR0_VIEW": {
9363   "fields": [
9364    {"bits": [0, 10], "name": "SLICE_START"},
9365    {"bits": [13, 23], "name": "SLICE_MAX"}
9366   ]
9367  },
9368  "CB_COLOR_CONTROL": {
9369   "fields": [
9370    {"bits": [3, 3], "name": "DEGAMMA_ENABLE"},
9371    {"bits": [4, 6], "enum_ref": "CBMode", "name": "MODE"},
9372    {"bits": [16, 23], "enum_ref": "ROP3", "name": "ROP3"}
9373   ]
9374  },
9375  "CB_DCC_CONTROL": {
9376   "fields": [
9377    {"bits": [0, 0], "name": "OVERWRITE_COMBINER_DISABLE"},
9378    {"bits": [1, 1], "name": "OVERWRITE_COMBINER_MRT_SHARING_DISABLE"},
9379    {"bits": [2, 6], "name": "OVERWRITE_COMBINER_WATERMARK"}
9380   ]
9381  },
9382  "CB_PERFCOUNTER0_SELECT": {
9383   "fields": [
9384    {"bits": [0, 8], "name": "PERF_SEL"},
9385    {"bits": [10, 18], "name": "PERF_SEL1"},
9386    {"bits": [20, 23], "name": "CNTR_MODE"},
9387    {"bits": [24, 27], "name": "PERF_MODE1"},
9388    {"bits": [28, 31], "name": "PERF_MODE"}
9389   ]
9390  },
9391  "CB_PERFCOUNTER0_SELECT1": {
9392   "fields": [
9393    {"bits": [0, 8], "name": "PERF_SEL2"},
9394    {"bits": [10, 18], "name": "PERF_SEL3"},
9395    {"bits": [24, 27], "name": "PERF_MODE3"},
9396    {"bits": [28, 31], "name": "PERF_MODE2"}
9397   ]
9398  },
9399  "CB_PERFCOUNTER1_SELECT": {
9400   "fields": [
9401    {"bits": [0, 8], "name": "PERF_SEL"},
9402    {"bits": [28, 31], "name": "PERF_MODE"}
9403   ]
9404  },
9405  "CB_PERFCOUNTER_FILTER": {
9406   "fields": [
9407    {"bits": [0, 0], "name": "OP_FILTER_ENABLE"},
9408    {"bits": [1, 3], "enum_ref": "CBPerfOpFilterSel", "name": "OP_FILTER_SEL"},
9409    {"bits": [4, 4], "name": "FORMAT_FILTER_ENABLE"},
9410    {"bits": [5, 9], "name": "FORMAT_FILTER_SEL"},
9411    {"bits": [10, 10], "name": "CLEAR_FILTER_ENABLE"},
9412    {"bits": [11, 11], "enum_ref": "CBPerfClearFilterSel", "name": "CLEAR_FILTER_SEL"},
9413    {"bits": [12, 12], "name": "MRT_FILTER_ENABLE"},
9414    {"bits": [13, 15], "name": "MRT_FILTER_SEL"},
9415    {"bits": [17, 17], "name": "NUM_SAMPLES_FILTER_ENABLE"},
9416    {"bits": [18, 20], "name": "NUM_SAMPLES_FILTER_SEL"},
9417    {"bits": [21, 21], "name": "NUM_FRAGMENTS_FILTER_ENABLE"},
9418    {"bits": [22, 23], "name": "NUM_FRAGMENTS_FILTER_SEL"}
9419   ]
9420  },
9421  "CB_SHADER_MASK": {
9422   "fields": [
9423    {"bits": [0, 3], "name": "OUTPUT0_ENABLE"},
9424    {"bits": [4, 7], "name": "OUTPUT1_ENABLE"},
9425    {"bits": [8, 11], "name": "OUTPUT2_ENABLE"},
9426    {"bits": [12, 15], "name": "OUTPUT3_ENABLE"},
9427    {"bits": [16, 19], "name": "OUTPUT4_ENABLE"},
9428    {"bits": [20, 23], "name": "OUTPUT5_ENABLE"},
9429    {"bits": [24, 27], "name": "OUTPUT6_ENABLE"},
9430    {"bits": [28, 31], "name": "OUTPUT7_ENABLE"}
9431   ]
9432  },
9433  "CB_TARGET_MASK": {
9434   "fields": [
9435    {"bits": [0, 3], "name": "TARGET0_ENABLE"},
9436    {"bits": [4, 7], "name": "TARGET1_ENABLE"},
9437    {"bits": [8, 11], "name": "TARGET2_ENABLE"},
9438    {"bits": [12, 15], "name": "TARGET3_ENABLE"},
9439    {"bits": [16, 19], "name": "TARGET4_ENABLE"},
9440    {"bits": [20, 23], "name": "TARGET5_ENABLE"},
9441    {"bits": [24, 27], "name": "TARGET6_ENABLE"},
9442    {"bits": [28, 31], "name": "TARGET7_ENABLE"}
9443   ]
9444  },
9445  "COMPUTE_DISPATCH_INITIATOR": {
9446   "fields": [
9447    {"bits": [0, 0], "name": "COMPUTE_SHADER_EN"},
9448    {"bits": [1, 1], "name": "PARTIAL_TG_EN"},
9449    {"bits": [2, 2], "name": "FORCE_START_AT_000"},
9450    {"bits": [3, 3], "name": "ORDERED_APPEND_ENBL"},
9451    {"bits": [4, 4], "name": "ORDERED_APPEND_MODE"},
9452    {"bits": [5, 5], "name": "USE_THREAD_DIMENSIONS"},
9453    {"bits": [6, 6], "name": "ORDER_MODE"},
9454    {"bits": [7, 9], "name": "DISPATCH_CACHE_CNTL"},
9455    {"bits": [10, 10], "name": "SCALAR_L1_INV_VOL"},
9456    {"bits": [11, 11], "name": "VECTOR_L1_INV_VOL"},
9457    {"bits": [12, 12], "name": "DATA_ATC"},
9458    {"bits": [14, 14], "name": "RESTORE"}
9459   ]
9460  },
9461  "COMPUTE_MISC_RESERVED": {
9462   "fields": [
9463    {"bits": [0, 1], "name": "SEND_SEID"},
9464    {"bits": [2, 2], "name": "RESERVED2"},
9465    {"bits": [3, 3], "name": "RESERVED3"},
9466    {"bits": [4, 4], "name": "RESERVED4"},
9467    {"bits": [5, 16], "name": "WAVE_ID_BASE"}
9468   ]
9469  },
9470  "COMPUTE_NUM_THREAD_X": {
9471   "fields": [
9472    {"bits": [0, 15], "name": "NUM_THREAD_FULL"},
9473    {"bits": [16, 31], "name": "NUM_THREAD_PARTIAL"}
9474   ]
9475  },
9476  "COMPUTE_PERFCOUNT_ENABLE": {
9477   "fields": [
9478    {"bits": [0, 0], "name": "PERFCOUNT_ENABLE"}
9479   ]
9480  },
9481  "COMPUTE_PGM_HI": {
9482   "fields": [
9483    {"bits": [0, 7], "name": "DATA"},
9484    {"bits": [8, 8], "name": "INST_ATC"}
9485   ]
9486  },
9487  "COMPUTE_PGM_RSRC1": {
9488   "fields": [
9489    {"bits": [0, 5], "name": "VGPRS"},
9490    {"bits": [6, 9], "name": "SGPRS"},
9491    {"bits": [10, 11], "name": "PRIORITY"},
9492    {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
9493    {"bits": [20, 20], "name": "PRIV"},
9494    {"bits": [21, 21], "name": "DX10_CLAMP"},
9495    {"bits": [22, 22], "name": "DEBUG_MODE"},
9496    {"bits": [23, 23], "name": "IEEE_MODE"},
9497    {"bits": [24, 24], "name": "BULKY"},
9498    {"bits": [25, 25], "name": "CDBG_USER"}
9499   ]
9500  },
9501  "COMPUTE_PGM_RSRC2": {
9502   "fields": [
9503    {"bits": [0, 0], "name": "SCRATCH_EN"},
9504    {"bits": [1, 5], "name": "USER_SGPR"},
9505    {"bits": [6, 6], "name": "TRAP_PRESENT"},
9506    {"bits": [7, 7], "name": "TGID_X_EN"},
9507    {"bits": [8, 8], "name": "TGID_Y_EN"},
9508    {"bits": [9, 9], "name": "TGID_Z_EN"},
9509    {"bits": [10, 10], "name": "TG_SIZE_EN"},
9510    {"bits": [11, 12], "name": "TIDIG_COMP_CNT"},
9511    {"bits": [13, 14], "name": "EXCP_EN_MSB"},
9512    {"bits": [15, 23], "name": "LDS_SIZE"},
9513    {"bits": [24, 30], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
9514   ]
9515  },
9516  "COMPUTE_PIPELINESTAT_ENABLE": {
9517   "fields": [
9518    {"bits": [0, 0], "name": "PIPELINESTAT_ENABLE"}
9519   ]
9520  },
9521  "COMPUTE_RELAUNCH": {
9522   "fields": [
9523    {"bits": [0, 29], "name": "PAYLOAD"},
9524    {"bits": [30, 30], "name": "IS_EVENT"},
9525    {"bits": [31, 31], "name": "IS_STATE"}
9526   ]
9527  },
9528  "COMPUTE_RESOURCE_LIMITS": {
9529   "fields": [
9530    {"bits": [0, 9], "name": "WAVES_PER_SH"},
9531    {"bits": [12, 15], "name": "TG_PER_CU"},
9532    {"bits": [16, 21], "name": "LOCK_THRESHOLD"},
9533    {"bits": [22, 22], "name": "SIMD_DEST_CNTL"},
9534    {"bits": [23, 23], "name": "FORCE_SIMD_DIST"},
9535    {"bits": [24, 26], "name": "CU_GROUP_COUNT"}
9536   ]
9537  },
9538  "COMPUTE_STATIC_THREAD_MGMT_SE0": {
9539   "fields": [
9540    {"bits": [0, 15], "name": "SH0_CU_EN"},
9541    {"bits": [16, 31], "name": "SH1_CU_EN"}
9542   ]
9543  },
9544  "COMPUTE_TBA_HI": {
9545   "fields": [
9546    {"bits": [0, 7], "name": "DATA"}
9547   ]
9548  },
9549  "COMPUTE_THREAD_TRACE_ENABLE": {
9550   "fields": [
9551    {"bits": [0, 0], "name": "THREAD_TRACE_ENABLE"}
9552   ]
9553  },
9554  "COMPUTE_TMPRING_SIZE": {
9555   "fields": [
9556    {"bits": [0, 11], "name": "WAVES"},
9557    {"bits": [12, 24], "name": "WAVESIZE"}
9558   ]
9559  },
9560  "COMPUTE_VMID": {
9561   "fields": [
9562    {"bits": [0, 3], "name": "DATA"}
9563   ]
9564  },
9565  "COMPUTE_WAVE_RESTORE_ADDR_HI": {
9566   "fields": [
9567    {"bits": [0, 15], "name": "ADDR"}
9568   ]
9569  },
9570  "COMPUTE_WAVE_RESTORE_CONTROL": {
9571   "fields": [
9572    {"bits": [0, 0], "name": "ATC"},
9573    {"bits": [1, 2], "name": "MTYPE"}
9574   ]
9575  },
9576  "CPG_PERFCOUNTER0_SELECT": {
9577   "fields": [
9578    {"bits": [0, 5], "name": "PERF_SEL"},
9579    {"bits": [10, 15], "name": "PERF_SEL1"},
9580    {"bits": [20, 23], "name": "CNTR_MODE"}
9581   ]
9582  },
9583  "CPG_PERFCOUNTER0_SELECT1": {
9584   "fields": [
9585    {"bits": [0, 5], "name": "PERF_SEL2"},
9586    {"bits": [10, 15], "name": "PERF_SEL3"}
9587   ]
9588  },
9589  "CPG_PERFCOUNTER1_SELECT": {
9590   "fields": [
9591    {"bits": [0, 5], "name": "PERF_SEL"}
9592   ]
9593  },
9594  "CP_APPEND_ADDR_HI": {
9595   "fields": [
9596    {"bits": [0, 15], "name": "MEM_ADDR_HI"},
9597    {"bits": [16, 16], "name": "CS_PS_SEL"},
9598    {"bits": [25, 25], "name": "CACHE_POLICY"},
9599    {"bits": [27, 28], "name": "MTYPE"},
9600    {"bits": [29, 31], "name": "COMMAND"}
9601   ]
9602  },
9603  "CP_APPEND_ADDR_LO": {
9604   "fields": [
9605    {"bits": [2, 31], "name": "MEM_ADDR_LO"}
9606   ]
9607  },
9608  "CP_CE_IB1_BASE_HI": {
9609   "fields": [
9610    {"bits": [0, 15], "name": "IB1_BASE_HI"}
9611   ]
9612  },
9613  "CP_CE_IB1_BASE_LO": {
9614   "fields": [
9615    {"bits": [2, 31], "name": "IB1_BASE_LO"}
9616   ]
9617  },
9618  "CP_CE_IB1_BUFSZ": {
9619   "fields": [
9620    {"bits": [0, 19], "name": "IB1_BUFSZ"}
9621   ]
9622  },
9623  "CP_CE_IB2_BASE_HI": {
9624   "fields": [
9625    {"bits": [0, 15], "name": "IB2_BASE_HI"}
9626   ]
9627  },
9628  "CP_CE_IB2_BASE_LO": {
9629   "fields": [
9630    {"bits": [2, 31], "name": "IB2_BASE_LO"}
9631   ]
9632  },
9633  "CP_CE_IB2_BUFSZ": {
9634   "fields": [
9635    {"bits": [0, 19], "name": "IB2_BUFSZ"}
9636   ]
9637  },
9638  "CP_CE_INIT_BASE_HI": {
9639   "fields": [
9640    {"bits": [0, 15], "name": "INIT_BASE_HI"}
9641   ]
9642  },
9643  "CP_CE_INIT_BASE_LO": {
9644   "fields": [
9645    {"bits": [5, 31], "name": "INIT_BASE_LO"}
9646   ]
9647  },
9648  "CP_CE_INIT_BUFSZ": {
9649   "fields": [
9650    {"bits": [0, 11], "name": "INIT_BUFSZ"}
9651   ]
9652  },
9653  "CP_COHER_BASE_HI": {
9654   "fields": [
9655    {"bits": [0, 7], "name": "COHER_BASE_HI_256B"}
9656   ]
9657  },
9658  "CP_COHER_CNTL": {
9659   "fields": [
9660    {"bits": [0, 0], "name": "DEST_BASE_0_ENA"},
9661    {"bits": [1, 1], "name": "DEST_BASE_1_ENA"},
9662    {"bits": [2, 2], "name": "TC_SD_ACTION_ENA"},
9663    {"bits": [3, 3], "name": "TC_NC_ACTION_ENA"},
9664    {"bits": [6, 6], "name": "CB0_DEST_BASE_ENA"},
9665    {"bits": [7, 7], "name": "CB1_DEST_BASE_ENA"},
9666    {"bits": [8, 8], "name": "CB2_DEST_BASE_ENA"},
9667    {"bits": [9, 9], "name": "CB3_DEST_BASE_ENA"},
9668    {"bits": [10, 10], "name": "CB4_DEST_BASE_ENA"},
9669    {"bits": [11, 11], "name": "CB5_DEST_BASE_ENA"},
9670    {"bits": [12, 12], "name": "CB6_DEST_BASE_ENA"},
9671    {"bits": [13, 13], "name": "CB7_DEST_BASE_ENA"},
9672    {"bits": [14, 14], "name": "DB_DEST_BASE_ENA"},
9673    {"bits": [15, 15], "name": "TCL1_VOL_ACTION_ENA"},
9674    {"bits": [18, 18], "name": "TC_WB_ACTION_ENA"},
9675    {"bits": [19, 19], "name": "DEST_BASE_2_ENA"},
9676    {"bits": [21, 21], "name": "DEST_BASE_3_ENA"},
9677    {"bits": [22, 22], "name": "TCL1_ACTION_ENA"},
9678    {"bits": [23, 23], "name": "TC_ACTION_ENA"},
9679    {"bits": [25, 25], "name": "CB_ACTION_ENA"},
9680    {"bits": [26, 26], "name": "DB_ACTION_ENA"},
9681    {"bits": [27, 27], "name": "SH_KCACHE_ACTION_ENA"},
9682    {"bits": [28, 28], "name": "SH_KCACHE_VOL_ACTION_ENA"},
9683    {"bits": [29, 29], "name": "SH_ICACHE_ACTION_ENA"},
9684    {"bits": [30, 30], "name": "SH_KCACHE_WB_ACTION_ENA"},
9685    {"bits": [31, 31], "name": "SH_SD_ACTION_ENA"}
9686   ]
9687  },
9688  "CP_COHER_SIZE_HI": {
9689   "fields": [
9690    {"bits": [0, 7], "name": "COHER_SIZE_HI_256B"}
9691   ]
9692  },
9693  "CP_COHER_START_DELAY": {
9694   "fields": [
9695    {"bits": [0, 5], "name": "START_DELAY_COUNT"}
9696   ]
9697  },
9698  "CP_COHER_STATUS": {
9699   "fields": [
9700    {"bits": [0, 7], "name": "MATCHING_GFX_CNTX"},
9701    {"bits": [24, 25], "name": "MEID"},
9702    {"bits": [30, 30], "name": "PHASE1_STATUS"},
9703    {"bits": [31, 31], "name": "STATUS"}
9704   ]
9705  },
9706  "CP_CPC_BUSY_STAT": {
9707   "fields": [
9708    {"bits": [0, 0], "name": "MEC1_LOAD_BUSY"},
9709    {"bits": [1, 1], "name": "MEC1_SEMAPOHRE_BUSY"},
9710    {"bits": [2, 2], "name": "MEC1_MUTEX_BUSY"},
9711    {"bits": [3, 3], "name": "MEC1_MESSAGE_BUSY"},
9712    {"bits": [4, 4], "name": "MEC1_EOP_QUEUE_BUSY"},
9713    {"bits": [5, 5], "name": "MEC1_IQ_QUEUE_BUSY"},
9714    {"bits": [6, 6], "name": "MEC1_IB_QUEUE_BUSY"},
9715    {"bits": [7, 7], "name": "MEC1_TC_BUSY"},
9716    {"bits": [8, 8], "name": "MEC1_DMA_BUSY"},
9717    {"bits": [9, 9], "name": "MEC1_PARTIAL_FLUSH_BUSY"},
9718    {"bits": [10, 10], "name": "MEC1_PIPE0_BUSY"},
9719    {"bits": [11, 11], "name": "MEC1_PIPE1_BUSY"},
9720    {"bits": [12, 12], "name": "MEC1_PIPE2_BUSY"},
9721    {"bits": [13, 13], "name": "MEC1_PIPE3_BUSY"},
9722    {"bits": [16, 16], "name": "MEC2_LOAD_BUSY"},
9723    {"bits": [17, 17], "name": "MEC2_SEMAPOHRE_BUSY"},
9724    {"bits": [18, 18], "name": "MEC2_MUTEX_BUSY"},
9725    {"bits": [19, 19], "name": "MEC2_MESSAGE_BUSY"},
9726    {"bits": [20, 20], "name": "MEC2_EOP_QUEUE_BUSY"},
9727    {"bits": [21, 21], "name": "MEC2_IQ_QUEUE_BUSY"},
9728    {"bits": [22, 22], "name": "MEC2_IB_QUEUE_BUSY"},
9729    {"bits": [23, 23], "name": "MEC2_TC_BUSY"},
9730    {"bits": [24, 24], "name": "MEC2_DMA_BUSY"},
9731    {"bits": [25, 25], "name": "MEC2_PARTIAL_FLUSH_BUSY"},
9732    {"bits": [26, 26], "name": "MEC2_PIPE0_BUSY"},
9733    {"bits": [27, 27], "name": "MEC2_PIPE1_BUSY"},
9734    {"bits": [28, 28], "name": "MEC2_PIPE2_BUSY"},
9735    {"bits": [29, 29], "name": "MEC2_PIPE3_BUSY"}
9736   ]
9737  },
9738  "CP_CPC_GRBM_FREE_COUNT": {
9739   "fields": [
9740    {"bits": [0, 5], "name": "FREE_COUNT"}
9741   ]
9742  },
9743  "CP_CPC_HALT_HYST_COUNT": {
9744   "fields": [
9745    {"bits": [0, 3], "name": "COUNT"}
9746   ]
9747  },
9748  "CP_CPC_SCRATCH_INDEX": {
9749   "fields": [
9750    {"bits": [0, 8], "name": "SCRATCH_INDEX"}
9751   ]
9752  },
9753  "CP_CPC_STALLED_STAT1": {
9754   "fields": [
9755    {"bits": [3, 3], "name": "RCIU_TX_FREE_STALL"},
9756    {"bits": [4, 4], "name": "RCIU_PRIV_VIOLATION"},
9757    {"bits": [6, 6], "name": "TCIU_TX_FREE_STALL"},
9758    {"bits": [8, 8], "name": "MEC1_DECODING_PACKET"},
9759    {"bits": [9, 9], "name": "MEC1_WAIT_ON_RCIU"},
9760    {"bits": [10, 10], "name": "MEC1_WAIT_ON_RCIU_READ"},
9761    {"bits": [13, 13], "name": "MEC1_WAIT_ON_ROQ_DATA"},
9762    {"bits": [16, 16], "name": "MEC2_DECODING_PACKET"},
9763    {"bits": [17, 17], "name": "MEC2_WAIT_ON_RCIU"},
9764    {"bits": [18, 18], "name": "MEC2_WAIT_ON_RCIU_READ"},
9765    {"bits": [21, 21], "name": "MEC2_WAIT_ON_ROQ_DATA"},
9766    {"bits": [22, 22], "name": "ATCL2IU_WAITING_ON_FREE"},
9767    {"bits": [23, 23], "name": "ATCL2IU_WAITING_ON_TAGS"},
9768    {"bits": [24, 24], "name": "ATCL1_WAITING_ON_TRANS"}
9769   ]
9770  },
9771  "CP_CPC_STATUS": {
9772   "fields": [
9773    {"bits": [0, 0], "name": "MEC1_BUSY"},
9774    {"bits": [1, 1], "name": "MEC2_BUSY"},
9775    {"bits": [2, 2], "name": "DC0_BUSY"},
9776    {"bits": [3, 3], "name": "DC1_BUSY"},
9777    {"bits": [4, 4], "name": "RCIU1_BUSY"},
9778    {"bits": [5, 5], "name": "RCIU2_BUSY"},
9779    {"bits": [6, 6], "name": "ROQ1_BUSY"},
9780    {"bits": [7, 7], "name": "ROQ2_BUSY"},
9781    {"bits": [10, 10], "name": "TCIU_BUSY"},
9782    {"bits": [11, 11], "name": "SCRATCH_RAM_BUSY"},
9783    {"bits": [12, 12], "name": "QU_BUSY"},
9784    {"bits": [13, 13], "name": "ATCL2IU_BUSY"},
9785    {"bits": [29, 29], "name": "CPG_CPC_BUSY"},
9786    {"bits": [30, 30], "name": "CPF_CPC_BUSY"},
9787    {"bits": [31, 31], "name": "CPC_BUSY"}
9788   ]
9789  },
9790  "CP_CPF_BUSY_STAT": {
9791   "fields": [
9792    {"bits": [0, 0], "name": "REG_BUS_FIFO_BUSY"},
9793    {"bits": [1, 1], "name": "CSF_RING_BUSY"},
9794    {"bits": [2, 2], "name": "CSF_INDIRECT1_BUSY"},
9795    {"bits": [3, 3], "name": "CSF_INDIRECT2_BUSY"},
9796    {"bits": [4, 4], "name": "CSF_STATE_BUSY"},
9797    {"bits": [5, 5], "name": "CSF_CE_INDR1_BUSY"},
9798    {"bits": [6, 6], "name": "CSF_CE_INDR2_BUSY"},
9799    {"bits": [7, 7], "name": "CSF_ARBITER_BUSY"},
9800    {"bits": [8, 8], "name": "CSF_INPUT_BUSY"},
9801    {"bits": [9, 9], "name": "OUTSTANDING_READ_TAGS"},
9802    {"bits": [11, 11], "name": "HPD_PROCESSING_EOP_BUSY"},
9803    {"bits": [12, 12], "name": "HQD_DISPATCH_BUSY"},
9804    {"bits": [13, 13], "name": "HQD_IQ_TIMER_BUSY"},
9805    {"bits": [14, 14], "name": "HQD_DMA_OFFLOAD_BUSY"},
9806    {"bits": [15, 15], "name": "HQD_WAIT_SEMAPHORE_BUSY"},
9807    {"bits": [16, 16], "name": "HQD_SIGNAL_SEMAPHORE_BUSY"},
9808    {"bits": [17, 17], "name": "HQD_MESSAGE_BUSY"},
9809    {"bits": [18, 18], "name": "HQD_PQ_FETCHER_BUSY"},
9810    {"bits": [19, 19], "name": "HQD_IB_FETCHER_BUSY"},
9811    {"bits": [20, 20], "name": "HQD_IQ_FETCHER_BUSY"},
9812    {"bits": [21, 21], "name": "HQD_EOP_FETCHER_BUSY"},
9813    {"bits": [22, 22], "name": "HQD_CONSUMED_RPTR_BUSY"},
9814    {"bits": [23, 23], "name": "HQD_FETCHER_ARB_BUSY"},
9815    {"bits": [24, 24], "name": "HQD_ROQ_ALIGN_BUSY"},
9816    {"bits": [25, 25], "name": "HQD_ROQ_EOP_BUSY"},
9817    {"bits": [26, 26], "name": "HQD_ROQ_IQ_BUSY"},
9818    {"bits": [27, 27], "name": "HQD_ROQ_PQ_BUSY"},
9819    {"bits": [28, 28], "name": "HQD_ROQ_IB_BUSY"},
9820    {"bits": [29, 29], "name": "HQD_WPTR_POLL_BUSY"},
9821    {"bits": [30, 30], "name": "HQD_PQ_BUSY"},
9822    {"bits": [31, 31], "name": "HQD_IB_BUSY"}
9823   ]
9824  },
9825  "CP_CPF_STALLED_STAT1": {
9826   "fields": [
9827    {"bits": [0, 0], "name": "RING_FETCHING_DATA"},
9828    {"bits": [1, 1], "name": "INDR1_FETCHING_DATA"},
9829    {"bits": [2, 2], "name": "INDR2_FETCHING_DATA"},
9830    {"bits": [3, 3], "name": "STATE_FETCHING_DATA"},
9831    {"bits": [5, 5], "name": "TCIU_WAITING_ON_FREE"},
9832    {"bits": [6, 6], "name": "TCIU_WAITING_ON_TAGS"},
9833    {"bits": [7, 7], "name": "ATCL2IU_WAITING_ON_FREE"},
9834    {"bits": [8, 8], "name": "ATCL2IU_WAITING_ON_TAGS"},
9835    {"bits": [9, 9], "name": "ATCL1_WAITING_ON_TRANS"}
9836   ]
9837  },
9838  "CP_CPF_STATUS": {
9839   "fields": [
9840    {"bits": [0, 0], "name": "POST_WPTR_GFX_BUSY"},
9841    {"bits": [1, 1], "name": "CSF_BUSY"},
9842    {"bits": [4, 4], "name": "ROQ_ALIGN_BUSY"},
9843    {"bits": [5, 5], "name": "ROQ_RING_BUSY"},
9844    {"bits": [6, 6], "name": "ROQ_INDIRECT1_BUSY"},
9845    {"bits": [7, 7], "name": "ROQ_INDIRECT2_BUSY"},
9846    {"bits": [8, 8], "name": "ROQ_STATE_BUSY"},
9847    {"bits": [9, 9], "name": "ROQ_CE_RING_BUSY"},
9848    {"bits": [10, 10], "name": "ROQ_CE_INDIRECT1_BUSY"},
9849    {"bits": [11, 11], "name": "ROQ_CE_INDIRECT2_BUSY"},
9850    {"bits": [12, 12], "name": "SEMAPHORE_BUSY"},
9851    {"bits": [13, 13], "name": "INTERRUPT_BUSY"},
9852    {"bits": [14, 14], "name": "TCIU_BUSY"},
9853    {"bits": [15, 15], "name": "HQD_BUSY"},
9854    {"bits": [16, 16], "name": "PRT_BUSY"},
9855    {"bits": [17, 17], "name": "ATCL2IU_BUSY"},
9856    {"bits": [26, 26], "name": "CPF_GFX_BUSY"},
9857    {"bits": [27, 27], "name": "CPF_CMP_BUSY"},
9858    {"bits": [28, 29], "name": "GRBM_CPF_STAT_BUSY"},
9859    {"bits": [30, 30], "name": "CPC_CPF_BUSY"},
9860    {"bits": [31, 31], "name": "CPF_BUSY"}
9861   ]
9862  },
9863  "CP_DMA_CNTL": {
9864   "fields": [
9865    {"bits": [4, 5], "name": "MIN_AVAILSZ"},
9866    {"bits": [16, 19], "name": "BUFFER_DEPTH"},
9867    {"bits": [28, 28], "name": "PIO_FIFO_EMPTY"},
9868    {"bits": [29, 29], "name": "PIO_FIFO_FULL"},
9869    {"bits": [30, 31], "name": "PIO_COUNT"}
9870   ]
9871  },
9872  "CP_DMA_ME_COMMAND": {
9873   "fields": [
9874    {"bits": [0, 20], "name": "BYTE_COUNT"},
9875    {"bits": [21, 21], "name": "DIS_WC"},
9876    {"bits": [22, 23], "name": "SRC_SWAP"},
9877    {"bits": [24, 25], "name": "DST_SWAP"},
9878    {"bits": [26, 26], "name": "SAS"},
9879    {"bits": [27, 27], "name": "DAS"},
9880    {"bits": [28, 28], "name": "SAIC"},
9881    {"bits": [29, 29], "name": "DAIC"},
9882    {"bits": [30, 30], "name": "RAW_WAIT"}
9883   ]
9884  },
9885  "CP_DMA_ME_CONTROL": {
9886   "fields": [
9887    {"bits": [10, 11], "name": "SRC_MTYPE"},
9888    {"bits": [12, 12], "name": "SRC_ATC"},
9889    {"bits": [13, 13], "name": "SRC_CACHE_POLICY"},
9890    {"bits": [20, 21], "name": "DST_SELECT"},
9891    {"bits": [22, 23], "name": "DST_MTYPE"},
9892    {"bits": [24, 24], "name": "DST_ATC"},
9893    {"bits": [25, 25], "name": "DST_CACHE_POLICY"},
9894    {"bits": [29, 30], "name": "SRC_SELECT"}
9895   ]
9896  },
9897  "CP_DMA_ME_DST_ADDR_HI": {
9898   "fields": [
9899    {"bits": [0, 15], "name": "DST_ADDR_HI"}
9900   ]
9901  },
9902  "CP_DMA_ME_SRC_ADDR_HI": {
9903   "fields": [
9904    {"bits": [0, 15], "name": "SRC_ADDR_HI"}
9905   ]
9906  },
9907  "CP_DMA_READ_TAGS": {
9908   "fields": [
9909    {"bits": [0, 25], "name": "DMA_READ_TAG"},
9910    {"bits": [28, 28], "name": "DMA_READ_TAG_VALID"}
9911   ]
9912  },
9913  "CP_DRAW_OBJECT_COUNTER": {
9914   "fields": [
9915    {"bits": [0, 15], "name": "COUNT"}
9916   ]
9917  },
9918  "CP_DRAW_WINDOW_CNTL": {
9919   "fields": [
9920    {"bits": [0, 0], "name": "DISABLE_DRAW_WINDOW_LO_MAX"},
9921    {"bits": [1, 1], "name": "DISABLE_DRAW_WINDOW_LO_MIN"},
9922    {"bits": [2, 2], "name": "DISABLE_DRAW_WINDOW_HI"},
9923    {"bits": [8, 8], "name": "MODE"}
9924   ]
9925  },
9926  "CP_DRAW_WINDOW_LO": {
9927   "fields": [
9928    {"bits": [0, 15], "name": "MIN"},
9929    {"bits": [16, 31], "name": "MAX"}
9930   ]
9931  },
9932  "CP_EOP_DONE_ADDR_HI": {
9933   "fields": [
9934    {"bits": [0, 15], "name": "ADDR_HI"}
9935   ]
9936  },
9937  "CP_EOP_DONE_ADDR_LO": {
9938   "fields": [
9939    {"bits": [2, 31], "name": "ADDR_LO"}
9940   ]
9941  },
9942  "CP_EOP_DONE_CNTX_ID": {
9943   "fields": [
9944    {"bits": [0, 27], "name": "CNTX_ID"}
9945   ]
9946  },
9947  "CP_EOP_DONE_DATA_CNTL": {
9948   "fields": [
9949    {"bits": [0, 15], "name": "CNTX_ID"},
9950    {"bits": [16, 17], "name": "DST_SEL"},
9951    {"bits": [24, 26], "name": "INT_SEL"},
9952    {"bits": [29, 31], "name": "DATA_SEL"}
9953   ]
9954  },
9955  "CP_EOP_DONE_EVENT_CNTL": {
9956   "fields": [
9957    {"bits": [0, 6], "name": "WBINV_TC_OP"},
9958    {"bits": [12, 17], "name": "WBINV_ACTION_ENA"},
9959    {"bits": [25, 25], "name": "CACHE_CONTROL"},
9960    {"bits": [27, 28], "name": "MTYPE"}
9961   ]
9962  },
9963  "CP_IB1_OFFSET": {
9964   "fields": [
9965    {"bits": [0, 19], "name": "IB1_OFFSET"}
9966   ]
9967  },
9968  "CP_IB1_PREAMBLE_BEGIN": {
9969   "fields": [
9970    {"bits": [0, 19], "name": "IB1_PREAMBLE_BEGIN"}
9971   ]
9972  },
9973  "CP_IB1_PREAMBLE_END": {
9974   "fields": [
9975    {"bits": [0, 19], "name": "IB1_PREAMBLE_END"}
9976   ]
9977  },
9978  "CP_IB2_OFFSET": {
9979   "fields": [
9980    {"bits": [0, 19], "name": "IB2_OFFSET"}
9981   ]
9982  },
9983  "CP_IB2_PREAMBLE_BEGIN": {
9984   "fields": [
9985    {"bits": [0, 19], "name": "IB2_PREAMBLE_BEGIN"}
9986   ]
9987  },
9988  "CP_IB2_PREAMBLE_END": {
9989   "fields": [
9990    {"bits": [0, 19], "name": "IB2_PREAMBLE_END"}
9991   ]
9992  },
9993  "CP_INDEX_TYPE": {
9994   "fields": [
9995    {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"}
9996   ]
9997  },
9998  "CP_ME_MC_RADDR_HI": {
9999   "fields": [
10000    {"bits": [0, 15], "name": "ME_MC_RADDR_HI"},
10001    {"bits": [20, 21], "name": "MTYPE"},
10002    {"bits": [22, 22], "name": "CACHE_POLICY"}
10003   ]
10004  },
10005  "CP_ME_MC_RADDR_LO": {
10006   "fields": [
10007    {"bits": [0, 1], "name": "ME_MC_RADDR_SWAP"},
10008    {"bits": [2, 31], "name": "ME_MC_RADDR_LO"}
10009   ]
10010  },
10011  "CP_ME_MC_WADDR_HI": {
10012   "fields": [
10013    {"bits": [0, 15], "name": "ME_MC_WADDR_HI"},
10014    {"bits": [20, 21], "name": "MTYPE"},
10015    {"bits": [22, 22], "name": "CACHE_POLICY"}
10016   ]
10017  },
10018  "CP_ME_MC_WADDR_LO": {
10019   "fields": [
10020    {"bits": [0, 1], "name": "ME_MC_WADDR_SWAP"},
10021    {"bits": [2, 31], "name": "ME_MC_WADDR_LO"}
10022   ]
10023  },
10024  "CP_PERFMON_CNTL": {
10025   "fields": [
10026    {"bits": [0, 3], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"},
10027    {"bits": [4, 7], "enum_ref": "SPM_PERFMON_STATE", "name": "SPM_PERFMON_STATE"},
10028    {"bits": [8, 9], "enum_ref": "CP_PERFMON_ENABLE_MODE", "name": "PERFMON_ENABLE_MODE"},
10029    {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"}
10030   ]
10031  },
10032  "CP_PERFMON_CNTX_CNTL": {
10033   "fields": [
10034    {"bits": [31, 31], "name": "PERFMON_ENABLE"}
10035   ]
10036  },
10037  "CP_PFP_COMPLETION_STATUS": {
10038   "fields": [
10039    {"bits": [0, 1], "name": "STATUS"}
10040   ]
10041  },
10042  "CP_PFP_IB_CONTROL": {
10043   "fields": [
10044    {"bits": [0, 7], "name": "IB_EN"}
10045   ]
10046  },
10047  "CP_PFP_LOAD_CONTROL": {
10048   "fields": [
10049    {"bits": [0, 0], "name": "CONFIG_REG_EN"},
10050    {"bits": [1, 1], "name": "CNTX_REG_EN"},
10051    {"bits": [16, 16], "name": "SH_GFX_REG_EN"},
10052    {"bits": [24, 24], "name": "SH_CS_REG_EN"}
10053   ]
10054  },
10055  "CP_PIPE_STATS_ADDR_HI": {
10056   "fields": [
10057    {"bits": [0, 15], "name": "PIPE_STATS_ADDR_HI"}
10058   ]
10059  },
10060  "CP_PIPE_STATS_ADDR_LO": {
10061   "fields": [
10062    {"bits": [2, 31], "name": "PIPE_STATS_ADDR_LO"}
10063   ]
10064  },
10065  "CP_PIPE_STATS_CONTROL": {
10066   "fields": [
10067    {"bits": [25, 25], "name": "CACHE_CONTROL"},
10068    {"bits": [27, 28], "name": "MTYPE"}
10069   ]
10070  },
10071  "CP_PRED_NOT_VISIBLE": {
10072   "fields": [
10073    {"bits": [0, 0], "name": "NOT_VISIBLE"}
10074   ]
10075  },
10076  "CP_RB_OFFSET": {
10077   "fields": [
10078    {"bits": [0, 19], "name": "RB_OFFSET"}
10079   ]
10080  },
10081  "CP_RINGID": {
10082   "fields": [
10083    {"bits": [0, 1], "name": "RINGID"}
10084   ]
10085  },
10086  "CP_SAMPLE_STATUS": {
10087   "fields": [
10088    {"bits": [0, 0], "name": "Z_PASS_ACITVE"},
10089    {"bits": [1, 1], "name": "STREAMOUT_ACTIVE"},
10090    {"bits": [2, 2], "name": "PIPELINE_ACTIVE"},
10091    {"bits": [3, 3], "name": "STIPPLE_ACTIVE"},
10092    {"bits": [4, 4], "name": "VGT_BUFFERS_ACTIVE"},
10093    {"bits": [5, 5], "name": "SCREEN_EXT_ACTIVE"},
10094    {"bits": [6, 6], "name": "DRAW_INDIRECT_ACTIVE"},
10095    {"bits": [7, 7], "name": "DISP_INDIRECT_ACTIVE"}
10096   ]
10097  },
10098  "CP_SCRATCH_INDEX": {
10099   "fields": [
10100    {"bits": [0, 7], "name": "SCRATCH_INDEX"}
10101   ]
10102  },
10103  "CP_SIG_SEM_ADDR_HI": {
10104   "fields": [
10105    {"bits": [0, 15], "name": "SEM_ADDR_HI"},
10106    {"bits": [16, 16], "name": "SEM_USE_MAILBOX"},
10107    {"bits": [20, 20], "name": "SEM_SIGNAL_TYPE"},
10108    {"bits": [24, 25], "name": "SEM_CLIENT_CODE"},
10109    {"bits": [29, 31], "name": "SEM_SELECT"}
10110   ]
10111  },
10112  "CP_SIG_SEM_ADDR_LO": {
10113   "fields": [
10114    {"bits": [0, 1], "name": "SEM_ADDR_SWAP"},
10115    {"bits": [3, 31], "name": "SEM_ADDR_LO"}
10116   ]
10117  },
10118  "CP_STREAM_OUT_ADDR_HI": {
10119   "fields": [
10120    {"bits": [0, 15], "name": "STREAM_OUT_ADDR_HI"}
10121   ]
10122  },
10123  "CP_STREAM_OUT_ADDR_LO": {
10124   "fields": [
10125    {"bits": [2, 31], "name": "STREAM_OUT_ADDR_LO"}
10126   ]
10127  },
10128  "CP_STRMOUT_CNTL": {
10129   "fields": [
10130    {"bits": [0, 0], "name": "OFFSET_UPDATE_DONE"}
10131   ]
10132  },
10133  "CP_ST_BASE_HI": {
10134   "fields": [
10135    {"bits": [0, 15], "name": "ST_BASE_HI"}
10136   ]
10137  },
10138  "CP_ST_BASE_LO": {
10139   "fields": [
10140    {"bits": [2, 31], "name": "ST_BASE_LO"}
10141   ]
10142  },
10143  "CP_ST_BUFSZ": {
10144   "fields": [
10145    {"bits": [0, 19], "name": "ST_BUFSZ"}
10146   ]
10147  },
10148  "CP_VMID": {
10149   "fields": [
10150    {"bits": [0, 3], "name": "VMID"}
10151   ]
10152  },
10153  "CS_COPY_STATE": {
10154   "fields": [
10155    {"bits": [0, 2], "name": "SRC_STATE_ID"}
10156   ]
10157  },
10158  "DB_ALPHA_TO_MASK": {
10159   "fields": [
10160    {"bits": [0, 0], "name": "ALPHA_TO_MASK_ENABLE"},
10161    {"bits": [8, 9], "name": "ALPHA_TO_MASK_OFFSET0"},
10162    {"bits": [10, 11], "name": "ALPHA_TO_MASK_OFFSET1"},
10163    {"bits": [12, 13], "name": "ALPHA_TO_MASK_OFFSET2"},
10164    {"bits": [14, 15], "name": "ALPHA_TO_MASK_OFFSET3"},
10165    {"bits": [16, 16], "name": "OFFSET_ROUND"}
10166   ]
10167  },
10168  "DB_COUNT_CONTROL": {
10169   "fields": [
10170    {"bits": [0, 0], "name": "ZPASS_INCREMENT_DISABLE"},
10171    {"bits": [1, 1], "name": "PERFECT_ZPASS_COUNTS"},
10172    {"bits": [4, 6], "name": "SAMPLE_RATE"},
10173    {"bits": [8, 11], "name": "ZPASS_ENABLE"},
10174    {"bits": [12, 15], "name": "ZFAIL_ENABLE"},
10175    {"bits": [16, 19], "name": "SFAIL_ENABLE"},
10176    {"bits": [20, 23], "name": "DBFAIL_ENABLE"},
10177    {"bits": [24, 27], "name": "SLICE_EVEN_ENABLE"},
10178    {"bits": [28, 31], "name": "SLICE_ODD_ENABLE"}
10179   ]
10180  },
10181  "DB_DEPTH_CONTROL": {
10182   "fields": [
10183    {"bits": [0, 0], "name": "STENCIL_ENABLE"},
10184    {"bits": [1, 1], "name": "Z_ENABLE"},
10185    {"bits": [2, 2], "name": "Z_WRITE_ENABLE"},
10186    {"bits": [3, 3], "name": "DEPTH_BOUNDS_ENABLE"},
10187    {"bits": [4, 6], "enum_ref": "CompareFrag", "name": "ZFUNC"},
10188    {"bits": [7, 7], "name": "BACKFACE_ENABLE"},
10189    {"bits": [8, 10], "enum_ref": "CompareFrag", "name": "STENCILFUNC"},
10190    {"bits": [20, 22], "enum_ref": "CompareFrag", "name": "STENCILFUNC_BF"},
10191    {"bits": [30, 30], "name": "ENABLE_COLOR_WRITES_ON_DEPTH_FAIL"},
10192    {"bits": [31, 31], "name": "DISABLE_COLOR_WRITES_ON_DEPTH_PASS"}
10193   ]
10194  },
10195  "DB_DEPTH_INFO": {
10196   "fields": [
10197    {"bits": [0, 3], "name": "ADDR5_SWIZZLE_MASK"},
10198    {"bits": [4, 7], "enum_ref": "ArrayMode", "name": "ARRAY_MODE"},
10199    {"bits": [8, 12], "enum_ref": "PipeConfig", "name": "PIPE_CONFIG"},
10200    {"bits": [13, 14], "enum_ref": "BankWidth", "name": "BANK_WIDTH"},
10201    {"bits": [15, 16], "enum_ref": "BankHeight", "name": "BANK_HEIGHT"},
10202    {"bits": [17, 18], "enum_ref": "MacroTileAspect", "name": "MACRO_TILE_ASPECT"},
10203    {"bits": [19, 20], "enum_ref": "NumBanks", "name": "NUM_BANKS"}
10204   ]
10205  },
10206  "DB_DEPTH_SIZE": {
10207   "fields": [
10208    {"bits": [0, 10], "name": "PITCH_TILE_MAX"},
10209    {"bits": [11, 21], "name": "HEIGHT_TILE_MAX"}
10210   ]
10211  },
10212  "DB_DEPTH_SLICE": {
10213   "fields": [
10214    {"bits": [0, 21], "name": "SLICE_TILE_MAX"}
10215   ]
10216  },
10217  "DB_DEPTH_VIEW": {
10218   "fields": [
10219    {"bits": [0, 10], "name": "SLICE_START"},
10220    {"bits": [13, 23], "name": "SLICE_MAX"},
10221    {"bits": [24, 24], "name": "Z_READ_ONLY"},
10222    {"bits": [25, 25], "name": "STENCIL_READ_ONLY"}
10223   ]
10224  },
10225  "DB_EQAA": {
10226   "fields": [
10227    {"bits": [0, 2], "name": "MAX_ANCHOR_SAMPLES"},
10228    {"bits": [4, 6], "name": "PS_ITER_SAMPLES"},
10229    {"bits": [8, 10], "name": "MASK_EXPORT_NUM_SAMPLES"},
10230    {"bits": [12, 14], "name": "ALPHA_TO_MASK_NUM_SAMPLES"},
10231    {"bits": [16, 16], "name": "HIGH_QUALITY_INTERSECTIONS"},
10232    {"bits": [17, 17], "name": "INCOHERENT_EQAA_READS"},
10233    {"bits": [18, 18], "name": "INTERPOLATE_COMP_Z"},
10234    {"bits": [19, 19], "name": "INTERPOLATE_SRC_Z"},
10235    {"bits": [20, 20], "name": "STATIC_ANCHOR_ASSOCIATIONS"},
10236    {"bits": [21, 21], "name": "ALPHA_TO_MASK_EQAA_DISABLE"},
10237    {"bits": [24, 26], "name": "OVERRASTERIZATION_AMOUNT"},
10238    {"bits": [27, 27], "name": "ENABLE_POSTZ_OVERRASTERIZATION"}
10239   ]
10240  },
10241  "DB_HTILE_SURFACE": {
10242   "fields": [
10243    {"bits": [0, 0], "name": "LINEAR"},
10244    {"bits": [1, 1], "name": "FULL_CACHE"},
10245    {"bits": [2, 2], "name": "HTILE_USES_PRELOAD_WIN"},
10246    {"bits": [3, 3], "name": "PRELOAD"},
10247    {"bits": [4, 9], "name": "PREFETCH_WIDTH"},
10248    {"bits": [10, 15], "name": "PREFETCH_HEIGHT"},
10249    {"bits": [16, 16], "name": "DST_OUTSIDE_ZERO_TO_ONE"},
10250    {"bits": [17, 17], "name": "TC_COMPATIBLE"}
10251   ]
10252  },
10253  "DB_PERFCOUNTER0_SELECT": {
10254   "fields": [
10255    {"bits": [0, 9], "name": "PERF_SEL"},
10256    {"bits": [10, 19], "name": "PERF_SEL1"},
10257    {"bits": [20, 23], "name": "CNTR_MODE"},
10258    {"bits": [24, 27], "name": "PERF_MODE1"},
10259    {"bits": [28, 31], "name": "PERF_MODE"}
10260   ]
10261  },
10262  "DB_PERFCOUNTER0_SELECT1": {
10263   "fields": [
10264    {"bits": [0, 9], "name": "PERF_SEL2"},
10265    {"bits": [10, 19], "name": "PERF_SEL3"},
10266    {"bits": [24, 27], "name": "PERF_MODE3"},
10267    {"bits": [28, 31], "name": "PERF_MODE2"}
10268   ]
10269  },
10270  "DB_PRELOAD_CONTROL": {
10271   "fields": [
10272    {"bits": [0, 7], "name": "START_X"},
10273    {"bits": [8, 15], "name": "START_Y"},
10274    {"bits": [16, 23], "name": "MAX_X"},
10275    {"bits": [24, 31], "name": "MAX_Y"}
10276   ]
10277  },
10278  "DB_RENDER_CONTROL": {
10279   "fields": [
10280    {"bits": [0, 0], "name": "DEPTH_CLEAR_ENABLE"},
10281    {"bits": [1, 1], "name": "STENCIL_CLEAR_ENABLE"},
10282    {"bits": [2, 2], "name": "DEPTH_COPY"},
10283    {"bits": [3, 3], "name": "STENCIL_COPY"},
10284    {"bits": [4, 4], "name": "RESUMMARIZE_ENABLE"},
10285    {"bits": [5, 5], "name": "STENCIL_COMPRESS_DISABLE"},
10286    {"bits": [6, 6], "name": "DEPTH_COMPRESS_DISABLE"},
10287    {"bits": [7, 7], "name": "COPY_CENTROID"},
10288    {"bits": [8, 11], "name": "COPY_SAMPLE"},
10289    {"bits": [12, 12], "name": "DECOMPRESS_ENABLE"}
10290   ]
10291  },
10292  "DB_RENDER_OVERRIDE": {
10293   "fields": [
10294    {"bits": [0, 1], "enum_ref": "ForceControl", "name": "FORCE_HIZ_ENABLE"},
10295    {"bits": [2, 3], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE0"},
10296    {"bits": [4, 5], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE1"},
10297    {"bits": [6, 6], "name": "FORCE_SHADER_Z_ORDER"},
10298    {"bits": [7, 7], "name": "FAST_Z_DISABLE"},
10299    {"bits": [8, 8], "name": "FAST_STENCIL_DISABLE"},
10300    {"bits": [9, 9], "name": "NOOP_CULL_DISABLE"},
10301    {"bits": [10, 10], "name": "FORCE_COLOR_KILL"},
10302    {"bits": [11, 11], "name": "FORCE_Z_READ"},
10303    {"bits": [12, 12], "name": "FORCE_STENCIL_READ"},
10304    {"bits": [13, 14], "enum_ref": "ForceControl", "name": "FORCE_FULL_Z_RANGE"},
10305    {"bits": [15, 15], "name": "FORCE_QC_SMASK_CONFLICT"},
10306    {"bits": [16, 16], "name": "DISABLE_VIEWPORT_CLAMP"},
10307    {"bits": [17, 17], "name": "IGNORE_SC_ZRANGE"},
10308    {"bits": [18, 18], "name": "DISABLE_FULLY_COVERED"},
10309    {"bits": [19, 20], "enum_ref": "ZLimitSumm", "name": "FORCE_Z_LIMIT_SUMM"},
10310    {"bits": [21, 25], "name": "MAX_TILES_IN_DTT"},
10311    {"bits": [26, 26], "name": "DISABLE_TILE_RATE_TILES"},
10312    {"bits": [27, 27], "name": "FORCE_Z_DIRTY"},
10313    {"bits": [28, 28], "name": "FORCE_STENCIL_DIRTY"},
10314    {"bits": [29, 29], "name": "FORCE_Z_VALID"},
10315    {"bits": [30, 30], "name": "FORCE_STENCIL_VALID"},
10316    {"bits": [31, 31], "name": "PRESERVE_COMPRESSION"}
10317   ]
10318  },
10319  "DB_RENDER_OVERRIDE2": {
10320   "fields": [
10321    {"bits": [0, 1], "enum_ref": "DbPSLControl", "name": "PARTIAL_SQUAD_LAUNCH_CONTROL"},
10322    {"bits": [2, 4], "name": "PARTIAL_SQUAD_LAUNCH_COUNTDOWN"},
10323    {"bits": [5, 5], "name": "DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION"},
10324    {"bits": [6, 6], "name": "DISABLE_SMEM_EXPCLEAR_OPTIMIZATION"},
10325    {"bits": [7, 7], "name": "DISABLE_COLOR_ON_VALIDATION"},
10326    {"bits": [8, 8], "name": "DECOMPRESS_Z_ON_FLUSH"},
10327    {"bits": [9, 9], "name": "DISABLE_REG_SNOOP"},
10328    {"bits": [10, 10], "name": "DEPTH_BOUNDS_HIER_DEPTH_DISABLE"},
10329    {"bits": [11, 11], "name": "SEPARATE_HIZS_FUNC_ENABLE"},
10330    {"bits": [12, 14], "enum_ref": "CompareFrag", "name": "HIZ_ZFUNC"},
10331    {"bits": [15, 17], "name": "HIS_SFUNC_FF"},
10332    {"bits": [18, 20], "name": "HIS_SFUNC_BF"},
10333    {"bits": [21, 21], "name": "PRESERVE_ZRANGE"},
10334    {"bits": [22, 22], "name": "PRESERVE_SRESULTS"},
10335    {"bits": [23, 23], "name": "DISABLE_FAST_PASS"}
10336   ]
10337  },
10338  "DB_SHADER_CONTROL": {
10339   "fields": [
10340    {"bits": [0, 0], "name": "Z_EXPORT_ENABLE"},
10341    {"bits": [1, 1], "name": "STENCIL_TEST_VAL_EXPORT_ENABLE"},
10342    {"bits": [2, 2], "name": "STENCIL_OP_VAL_EXPORT_ENABLE"},
10343    {"bits": [4, 5], "enum_ref": "ZOrder", "name": "Z_ORDER"},
10344    {"bits": [6, 6], "name": "KILL_ENABLE"},
10345    {"bits": [7, 7], "name": "COVERAGE_TO_MASK_ENABLE"},
10346    {"bits": [8, 8], "name": "MASK_EXPORT_ENABLE"},
10347    {"bits": [9, 9], "name": "EXEC_ON_HIER_FAIL"},
10348    {"bits": [10, 10], "name": "EXEC_ON_NOOP"},
10349    {"bits": [11, 11], "name": "ALPHA_TO_MASK_DISABLE"},
10350    {"bits": [12, 12], "name": "DEPTH_BEFORE_SHADER"},
10351    {"bits": [13, 14], "enum_ref": "ConservativeZExport", "name": "CONSERVATIVE_Z_EXPORT"}
10352   ]
10353  },
10354  "DB_SRESULTS_COMPARE_STATE0": {
10355   "fields": [
10356    {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC0"},
10357    {"bits": [4, 11], "name": "COMPAREVALUE0"},
10358    {"bits": [12, 19], "name": "COMPAREMASK0"},
10359    {"bits": [24, 24], "name": "ENABLE0"}
10360   ]
10361  },
10362  "DB_SRESULTS_COMPARE_STATE1": {
10363   "fields": [
10364    {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC1"},
10365    {"bits": [4, 11], "name": "COMPAREVALUE1"},
10366    {"bits": [12, 19], "name": "COMPAREMASK1"},
10367    {"bits": [24, 24], "name": "ENABLE1"}
10368   ]
10369  },
10370  "DB_STENCILREFMASK": {
10371   "fields": [
10372    {"bits": [0, 7], "name": "STENCILTESTVAL"},
10373    {"bits": [8, 15], "name": "STENCILMASK"},
10374    {"bits": [16, 23], "name": "STENCILWRITEMASK"},
10375    {"bits": [24, 31], "name": "STENCILOPVAL"}
10376   ]
10377  },
10378  "DB_STENCILREFMASK_BF": {
10379   "fields": [
10380    {"bits": [0, 7], "name": "STENCILTESTVAL_BF"},
10381    {"bits": [8, 15], "name": "STENCILMASK_BF"},
10382    {"bits": [16, 23], "name": "STENCILWRITEMASK_BF"},
10383    {"bits": [24, 31], "name": "STENCILOPVAL_BF"}
10384   ]
10385  },
10386  "DB_STENCIL_CLEAR": {
10387   "fields": [
10388    {"bits": [0, 7], "name": "CLEAR"}
10389   ]
10390  },
10391  "DB_STENCIL_CONTROL": {
10392   "fields": [
10393    {"bits": [0, 3], "enum_ref": "StencilOp", "name": "STENCILFAIL"},
10394    {"bits": [4, 7], "enum_ref": "StencilOp", "name": "STENCILZPASS"},
10395    {"bits": [8, 11], "enum_ref": "StencilOp", "name": "STENCILZFAIL"},
10396    {"bits": [12, 15], "enum_ref": "StencilOp", "name": "STENCILFAIL_BF"},
10397    {"bits": [16, 19], "enum_ref": "StencilOp", "name": "STENCILZPASS_BF"},
10398    {"bits": [20, 23], "enum_ref": "StencilOp", "name": "STENCILZFAIL_BF"}
10399   ]
10400  },
10401  "DB_STENCIL_INFO": {
10402   "fields": [
10403    {"bits": [0, 0], "enum_ref": "StencilFormat", "name": "FORMAT"},
10404    {"bits": [13, 15], "enum_ref": "TileSplit", "name": "TILE_SPLIT"},
10405    {"bits": [20, 22], "name": "TILE_MODE_INDEX"},
10406    {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"},
10407    {"bits": [29, 29], "name": "TILE_STENCIL_DISABLE"},
10408    {"bits": [30, 30], "name": "CLEAR_DISALLOWED"}
10409   ]
10410  },
10411  "DB_ZPASS_COUNT_HI": {
10412   "fields": [
10413    {"bits": [0, 30], "name": "COUNT_HI"}
10414   ]
10415  },
10416  "DB_Z_INFO": {
10417   "fields": [
10418    {"bits": [0, 1], "enum_ref": "ZFormat", "name": "FORMAT"},
10419    {"bits": [2, 3], "name": "NUM_SAMPLES"},
10420    {"bits": [13, 15], "enum_ref": "TileSplit", "name": "TILE_SPLIT"},
10421    {"bits": [20, 22], "name": "TILE_MODE_INDEX"},
10422    {"bits": [23, 26], "name": "DECOMPRESS_ON_N_ZPLANES"},
10423    {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"},
10424    {"bits": [28, 28], "name": "READ_SIZE"},
10425    {"bits": [29, 29], "name": "TILE_SURFACE_ENABLE"},
10426    {"bits": [30, 30], "name": "CLEAR_DISALLOWED"},
10427    {"bits": [31, 31], "name": "ZRANGE_PRECISION"}
10428   ]
10429  },
10430  "GB_ADDR_CONFIG": {
10431   "fields": [
10432    {"bits": [0, 2], "name": "NUM_PIPES"},
10433    {"bits": [4, 6], "name": "PIPE_INTERLEAVE_SIZE"},
10434    {"bits": [8, 10], "name": "BANK_INTERLEAVE_SIZE"},
10435    {"bits": [12, 13], "name": "NUM_SHADER_ENGINES"},
10436    {"bits": [16, 18], "name": "SHADER_ENGINE_TILE_SIZE"},
10437    {"bits": [20, 22], "name": "NUM_GPUS"},
10438    {"bits": [24, 25], "name": "MULTI_GPU_TILE_SIZE"},
10439    {"bits": [28, 29], "name": "ROW_SIZE"},
10440    {"bits": [30, 30], "name": "NUM_LOWER_PIPES"}
10441   ]
10442  },
10443  "GB_MACROTILE_MODE0": {
10444   "fields": [
10445    {"bits": [0, 1], "enum_ref": "BankWidth", "name": "BANK_WIDTH"},
10446    {"bits": [2, 3], "enum_ref": "BankHeight", "name": "BANK_HEIGHT"},
10447    {"bits": [4, 5], "enum_ref": "MacroTileAspect", "name": "MACRO_TILE_ASPECT"},
10448    {"bits": [6, 7], "enum_ref": "NumBanks", "name": "NUM_BANKS"}
10449   ]
10450  },
10451  "GB_TILE_MODE0": {
10452   "fields": [
10453    {"bits": [2, 5], "enum_ref": "ArrayMode", "name": "ARRAY_MODE"},
10454    {"bits": [6, 10], "enum_ref": "PipeConfig", "name": "PIPE_CONFIG"},
10455    {"bits": [11, 13], "enum_ref": "TileSplit", "name": "TILE_SPLIT"},
10456    {"bits": [22, 24], "enum_ref": "MicroTileMode", "name": "MICRO_TILE_MODE_NEW"},
10457    {"bits": [25, 26], "name": "SAMPLE_SPLIT"}
10458   ]
10459  },
10460  "GDS_ATOM_BASE": {
10461   "fields": [
10462    {"bits": [0, 15], "name": "BASE"},
10463    {"bits": [16, 31], "name": "UNUSED"}
10464   ]
10465  },
10466  "GDS_ATOM_CNTL": {
10467   "fields": [
10468    {"bits": [0, 5], "name": "AINC"},
10469    {"bits": [6, 7], "name": "UNUSED1"},
10470    {"bits": [8, 9], "name": "DMODE"},
10471    {"bits": [10, 31], "name": "UNUSED2"}
10472   ]
10473  },
10474  "GDS_ATOM_COMPLETE": {
10475   "fields": [
10476    {"bits": [0, 0], "name": "COMPLETE"},
10477    {"bits": [1, 31], "name": "UNUSED"}
10478   ]
10479  },
10480  "GDS_ATOM_OFFSET0": {
10481   "fields": [
10482    {"bits": [0, 7], "name": "OFFSET0"},
10483    {"bits": [8, 31], "name": "UNUSED"}
10484   ]
10485  },
10486  "GDS_ATOM_OFFSET1": {
10487   "fields": [
10488    {"bits": [0, 7], "name": "OFFSET1"},
10489    {"bits": [8, 31], "name": "UNUSED"}
10490   ]
10491  },
10492  "GDS_ATOM_OP": {
10493   "fields": [
10494    {"bits": [0, 7], "name": "OP"},
10495    {"bits": [8, 31], "name": "UNUSED"}
10496   ]
10497  },
10498  "GDS_ATOM_SIZE": {
10499   "fields": [
10500    {"bits": [0, 15], "name": "SIZE"},
10501    {"bits": [16, 31], "name": "UNUSED"}
10502   ]
10503  },
10504  "GDS_GWS_RESOURCE": {
10505   "fields": [
10506    {"bits": [0, 0], "name": "FLAG"},
10507    {"bits": [1, 12], "name": "COUNTER"},
10508    {"bits": [13, 13], "name": "TYPE"},
10509    {"bits": [14, 14], "name": "DED"},
10510    {"bits": [15, 15], "name": "RELEASE_ALL"},
10511    {"bits": [16, 26], "name": "HEAD_QUEUE"},
10512    {"bits": [27, 27], "name": "HEAD_VALID"},
10513    {"bits": [28, 28], "name": "HEAD_FLAG"},
10514    {"bits": [29, 31], "name": "UNUSED1"}
10515   ]
10516  },
10517  "GDS_GWS_RESOURCE_CNT": {
10518   "fields": [
10519    {"bits": [0, 15], "name": "RESOURCE_CNT"},
10520    {"bits": [16, 31], "name": "UNUSED"}
10521   ]
10522  },
10523  "GDS_GWS_RESOURCE_CNTL": {
10524   "fields": [
10525    {"bits": [0, 5], "name": "INDEX"},
10526    {"bits": [6, 31], "name": "UNUSED"}
10527   ]
10528  },
10529  "GDS_OA_ADDRESS": {
10530   "fields": [
10531    {"bits": [0, 15], "name": "DS_ADDRESS"},
10532    {"bits": [16, 19], "name": "CRAWLER"},
10533    {"bits": [20, 21], "name": "CRAWLER_TYPE"},
10534    {"bits": [22, 29], "name": "UNUSED"},
10535    {"bits": [30, 30], "name": "NO_ALLOC"},
10536    {"bits": [31, 31], "name": "ENABLE"}
10537   ]
10538  },
10539  "GDS_OA_CNTL": {
10540   "fields": [
10541    {"bits": [0, 3], "name": "INDEX"},
10542    {"bits": [4, 31], "name": "UNUSED"}
10543   ]
10544  },
10545  "GDS_OA_INCDEC": {
10546   "fields": [
10547    {"bits": [0, 30], "name": "VALUE"},
10548    {"bits": [31, 31], "name": "INCDEC"}
10549   ]
10550  },
10551  "GRBM_GFX_INDEX": {
10552   "fields": [
10553    {"bits": [0, 7], "name": "INSTANCE_INDEX"},
10554    {"bits": [8, 15], "name": "SH_INDEX"},
10555    {"bits": [16, 23], "name": "SE_INDEX"},
10556    {"bits": [29, 29], "name": "SH_BROADCAST_WRITES"},
10557    {"bits": [30, 30], "name": "INSTANCE_BROADCAST_WRITES"},
10558    {"bits": [31, 31], "name": "SE_BROADCAST_WRITES"}
10559   ]
10560  },
10561  "GRBM_PERFCOUNTER0_SELECT": {
10562   "fields": [
10563    {"bits": [0, 5], "name": "PERF_SEL"},
10564    {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"},
10565    {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"},
10566    {"bits": [12, 12], "name": "VGT_BUSY_USER_DEFINED_MASK"},
10567    {"bits": [13, 13], "name": "TA_BUSY_USER_DEFINED_MASK"},
10568    {"bits": [14, 14], "name": "SX_BUSY_USER_DEFINED_MASK"},
10569    {"bits": [16, 16], "name": "SPI_BUSY_USER_DEFINED_MASK"},
10570    {"bits": [17, 17], "name": "SC_BUSY_USER_DEFINED_MASK"},
10571    {"bits": [18, 18], "name": "PA_BUSY_USER_DEFINED_MASK"},
10572    {"bits": [19, 19], "name": "GRBM_BUSY_USER_DEFINED_MASK"},
10573    {"bits": [20, 20], "name": "DB_BUSY_USER_DEFINED_MASK"},
10574    {"bits": [21, 21], "name": "CB_BUSY_USER_DEFINED_MASK"},
10575    {"bits": [22, 22], "name": "CP_BUSY_USER_DEFINED_MASK"},
10576    {"bits": [23, 23], "name": "IA_BUSY_USER_DEFINED_MASK"},
10577    {"bits": [24, 24], "name": "GDS_BUSY_USER_DEFINED_MASK"},
10578    {"bits": [25, 25], "name": "BCI_BUSY_USER_DEFINED_MASK"},
10579    {"bits": [26, 26], "name": "RLC_BUSY_USER_DEFINED_MASK"},
10580    {"bits": [27, 27], "name": "TC_BUSY_USER_DEFINED_MASK"},
10581    {"bits": [28, 28], "name": "WD_BUSY_USER_DEFINED_MASK"}
10582   ]
10583  },
10584  "GRBM_SE0_PERFCOUNTER_SELECT": {
10585   "fields": [
10586    {"bits": [0, 5], "name": "PERF_SEL"},
10587    {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"},
10588    {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"},
10589    {"bits": [12, 12], "name": "TA_BUSY_USER_DEFINED_MASK"},
10590    {"bits": [13, 13], "name": "SX_BUSY_USER_DEFINED_MASK"},
10591    {"bits": [15, 15], "name": "SPI_BUSY_USER_DEFINED_MASK"},
10592    {"bits": [16, 16], "name": "SC_BUSY_USER_DEFINED_MASK"},
10593    {"bits": [17, 17], "name": "DB_BUSY_USER_DEFINED_MASK"},
10594    {"bits": [18, 18], "name": "CB_BUSY_USER_DEFINED_MASK"},
10595    {"bits": [19, 19], "name": "VGT_BUSY_USER_DEFINED_MASK"},
10596    {"bits": [20, 20], "name": "PA_BUSY_USER_DEFINED_MASK"},
10597    {"bits": [21, 21], "name": "BCI_BUSY_USER_DEFINED_MASK"}
10598   ]
10599  },
10600  "GRBM_STATUS": {
10601   "fields": [
10602    {"bits": [0, 3], "name": "ME0PIPE0_CMDFIFO_AVAIL"},
10603    {"bits": [5, 5], "name": "SRBM_RQ_PENDING"},
10604    {"bits": [7, 7], "name": "ME0PIPE0_CF_RQ_PENDING"},
10605    {"bits": [8, 8], "name": "ME0PIPE0_PF_RQ_PENDING"},
10606    {"bits": [9, 9], "name": "GDS_DMA_RQ_PENDING"},
10607    {"bits": [12, 12], "name": "DB_CLEAN"},
10608    {"bits": [13, 13], "name": "CB_CLEAN"},
10609    {"bits": [14, 14], "name": "TA_BUSY"},
10610    {"bits": [15, 15], "name": "GDS_BUSY"},
10611    {"bits": [16, 16], "name": "WD_BUSY_NO_DMA"},
10612    {"bits": [17, 17], "name": "VGT_BUSY"},
10613    {"bits": [18, 18], "name": "IA_BUSY_NO_DMA"},
10614    {"bits": [19, 19], "name": "IA_BUSY"},
10615    {"bits": [20, 20], "name": "SX_BUSY"},
10616    {"bits": [21, 21], "name": "WD_BUSY"},
10617    {"bits": [22, 22], "name": "SPI_BUSY"},
10618    {"bits": [23, 23], "name": "BCI_BUSY"},
10619    {"bits": [24, 24], "name": "SC_BUSY"},
10620    {"bits": [25, 25], "name": "PA_BUSY"},
10621    {"bits": [26, 26], "name": "DB_BUSY"},
10622    {"bits": [28, 28], "name": "CP_COHERENCY_BUSY"},
10623    {"bits": [29, 29], "name": "CP_BUSY"},
10624    {"bits": [30, 30], "name": "CB_BUSY"},
10625    {"bits": [31, 31], "name": "GUI_ACTIVE"}
10626   ]
10627  },
10628  "GRBM_STATUS2": {
10629   "fields": [
10630    {"bits": [0, 3], "name": "ME0PIPE1_CMDFIFO_AVAIL"},
10631    {"bits": [4, 4], "name": "ME0PIPE1_CF_RQ_PENDING"},
10632    {"bits": [5, 5], "name": "ME0PIPE1_PF_RQ_PENDING"},
10633    {"bits": [6, 6], "name": "ME1PIPE0_RQ_PENDING"},
10634    {"bits": [7, 7], "name": "ME1PIPE1_RQ_PENDING"},
10635    {"bits": [8, 8], "name": "ME1PIPE2_RQ_PENDING"},
10636    {"bits": [9, 9], "name": "ME1PIPE3_RQ_PENDING"},
10637    {"bits": [10, 10], "name": "ME2PIPE0_RQ_PENDING"},
10638    {"bits": [11, 11], "name": "ME2PIPE1_RQ_PENDING"},
10639    {"bits": [12, 12], "name": "ME2PIPE2_RQ_PENDING"},
10640    {"bits": [13, 13], "name": "ME2PIPE3_RQ_PENDING"},
10641    {"bits": [14, 14], "name": "RLC_RQ_PENDING"},
10642    {"bits": [24, 24], "name": "RLC_BUSY"},
10643    {"bits": [25, 25], "name": "TC_BUSY"},
10644    {"bits": [26, 26], "name": "TCC_CC_RESIDENT"},
10645    {"bits": [28, 28], "name": "CPF_BUSY"},
10646    {"bits": [29, 29], "name": "CPC_BUSY"},
10647    {"bits": [30, 30], "name": "CPG_BUSY"}
10648   ]
10649  },
10650  "GRBM_STATUS_SE0": {
10651   "fields": [
10652    {"bits": [1, 1], "name": "DB_CLEAN"},
10653    {"bits": [2, 2], "name": "CB_CLEAN"},
10654    {"bits": [22, 22], "name": "BCI_BUSY"},
10655    {"bits": [23, 23], "name": "VGT_BUSY"},
10656    {"bits": [24, 24], "name": "PA_BUSY"},
10657    {"bits": [25, 25], "name": "TA_BUSY"},
10658    {"bits": [26, 26], "name": "SX_BUSY"},
10659    {"bits": [27, 27], "name": "SPI_BUSY"},
10660    {"bits": [29, 29], "name": "SC_BUSY"},
10661    {"bits": [30, 30], "name": "DB_BUSY"},
10662    {"bits": [31, 31], "name": "CB_BUSY"}
10663   ]
10664  },
10665  "IA_MULTI_VGT_PARAM": {
10666   "fields": [
10667    {"bits": [0, 15], "name": "PRIMGROUP_SIZE"},
10668    {"bits": [16, 16], "name": "PARTIAL_VS_WAVE_ON"},
10669    {"bits": [17, 17], "name": "SWITCH_ON_EOP"},
10670    {"bits": [18, 18], "name": "PARTIAL_ES_WAVE_ON"},
10671    {"bits": [19, 19], "name": "SWITCH_ON_EOI"},
10672    {"bits": [20, 20], "name": "WD_SWITCH_ON_EOP"},
10673    {"bits": [28, 31], "name": "MAX_PRIMGRP_IN_WAVE"}
10674   ]
10675  },
10676  "PA_CL_CLIP_CNTL": {
10677   "fields": [
10678    {"bits": [0, 0], "name": "UCP_ENA_0"},
10679    {"bits": [1, 1], "name": "UCP_ENA_1"},
10680    {"bits": [2, 2], "name": "UCP_ENA_2"},
10681    {"bits": [3, 3], "name": "UCP_ENA_3"},
10682    {"bits": [4, 4], "name": "UCP_ENA_4"},
10683    {"bits": [5, 5], "name": "UCP_ENA_5"},
10684    {"bits": [13, 13], "name": "PS_UCP_Y_SCALE_NEG"},
10685    {"bits": [14, 15], "name": "PS_UCP_MODE"},
10686    {"bits": [16, 16], "name": "CLIP_DISABLE"},
10687    {"bits": [17, 17], "name": "UCP_CULL_ONLY_ENA"},
10688    {"bits": [18, 18], "name": "BOUNDARY_EDGE_FLAG_ENA"},
10689    {"bits": [19, 19], "name": "DX_CLIP_SPACE_DEF"},
10690    {"bits": [20, 20], "name": "DIS_CLIP_ERR_DETECT"},
10691    {"bits": [21, 21], "name": "VTX_KILL_OR"},
10692    {"bits": [22, 22], "name": "DX_RASTERIZATION_KILL"},
10693    {"bits": [24, 24], "name": "DX_LINEAR_ATTR_CLIP_ENA"},
10694    {"bits": [25, 25], "name": "VTE_VPORT_PROVOKE_DISABLE"},
10695    {"bits": [26, 26], "name": "ZCLIP_NEAR_DISABLE"},
10696    {"bits": [27, 27], "name": "ZCLIP_FAR_DISABLE"}
10697   ]
10698  },
10699  "PA_CL_NANINF_CNTL": {
10700   "fields": [
10701    {"bits": [0, 0], "name": "VTE_XY_INF_DISCARD"},
10702    {"bits": [1, 1], "name": "VTE_Z_INF_DISCARD"},
10703    {"bits": [2, 2], "name": "VTE_W_INF_DISCARD"},
10704    {"bits": [3, 3], "name": "VTE_0XNANINF_IS_0"},
10705    {"bits": [4, 4], "name": "VTE_XY_NAN_RETAIN"},
10706    {"bits": [5, 5], "name": "VTE_Z_NAN_RETAIN"},
10707    {"bits": [6, 6], "name": "VTE_W_NAN_RETAIN"},
10708    {"bits": [7, 7], "name": "VTE_W_RECIP_NAN_IS_0"},
10709    {"bits": [8, 8], "name": "VS_XY_NAN_TO_INF"},
10710    {"bits": [9, 9], "name": "VS_XY_INF_RETAIN"},
10711    {"bits": [10, 10], "name": "VS_Z_NAN_TO_INF"},
10712    {"bits": [11, 11], "name": "VS_Z_INF_RETAIN"},
10713    {"bits": [12, 12], "name": "VS_W_NAN_TO_INF"},
10714    {"bits": [13, 13], "name": "VS_W_INF_RETAIN"},
10715    {"bits": [14, 14], "name": "VS_CLIP_DIST_INF_DISCARD"},
10716    {"bits": [20, 20], "name": "VTE_NO_OUTPUT_NEG_0"}
10717   ]
10718  },
10719  "PA_CL_VS_OUT_CNTL": {
10720   "fields": [
10721    {"bits": [0, 0], "name": "CLIP_DIST_ENA_0"},
10722    {"bits": [1, 1], "name": "CLIP_DIST_ENA_1"},
10723    {"bits": [2, 2], "name": "CLIP_DIST_ENA_2"},
10724    {"bits": [3, 3], "name": "CLIP_DIST_ENA_3"},
10725    {"bits": [4, 4], "name": "CLIP_DIST_ENA_4"},
10726    {"bits": [5, 5], "name": "CLIP_DIST_ENA_5"},
10727    {"bits": [6, 6], "name": "CLIP_DIST_ENA_6"},
10728    {"bits": [7, 7], "name": "CLIP_DIST_ENA_7"},
10729    {"bits": [8, 8], "name": "CULL_DIST_ENA_0"},
10730    {"bits": [9, 9], "name": "CULL_DIST_ENA_1"},
10731    {"bits": [10, 10], "name": "CULL_DIST_ENA_2"},
10732    {"bits": [11, 11], "name": "CULL_DIST_ENA_3"},
10733    {"bits": [12, 12], "name": "CULL_DIST_ENA_4"},
10734    {"bits": [13, 13], "name": "CULL_DIST_ENA_5"},
10735    {"bits": [14, 14], "name": "CULL_DIST_ENA_6"},
10736    {"bits": [15, 15], "name": "CULL_DIST_ENA_7"},
10737    {"bits": [16, 16], "name": "USE_VTX_POINT_SIZE"},
10738    {"bits": [17, 17], "name": "USE_VTX_EDGE_FLAG"},
10739    {"bits": [18, 18], "name": "USE_VTX_RENDER_TARGET_INDX"},
10740    {"bits": [19, 19], "name": "USE_VTX_VIEWPORT_INDX"},
10741    {"bits": [20, 20], "name": "USE_VTX_KILL_FLAG"},
10742    {"bits": [21, 21], "name": "VS_OUT_MISC_VEC_ENA"},
10743    {"bits": [22, 22], "name": "VS_OUT_CCDIST0_VEC_ENA"},
10744    {"bits": [23, 23], "name": "VS_OUT_CCDIST1_VEC_ENA"},
10745    {"bits": [24, 24], "name": "VS_OUT_MISC_SIDE_BUS_ENA"},
10746    {"bits": [25, 25], "name": "USE_VTX_GS_CUT_FLAG"},
10747    {"bits": [26, 26], "name": "USE_VTX_LINE_WIDTH"}
10748   ]
10749  },
10750  "PA_CL_VTE_CNTL": {
10751   "fields": [
10752    {"bits": [0, 0], "name": "VPORT_X_SCALE_ENA"},
10753    {"bits": [1, 1], "name": "VPORT_X_OFFSET_ENA"},
10754    {"bits": [2, 2], "name": "VPORT_Y_SCALE_ENA"},
10755    {"bits": [3, 3], "name": "VPORT_Y_OFFSET_ENA"},
10756    {"bits": [4, 4], "name": "VPORT_Z_SCALE_ENA"},
10757    {"bits": [5, 5], "name": "VPORT_Z_OFFSET_ENA"},
10758    {"bits": [8, 8], "name": "VTX_XY_FMT"},
10759    {"bits": [9, 9], "name": "VTX_Z_FMT"},
10760    {"bits": [10, 10], "name": "VTX_W0_FMT"},
10761    {"bits": [11, 11], "name": "PERFCOUNTER_REF"}
10762   ]
10763  },
10764  "PA_SC_AA_CONFIG": {
10765   "fields": [
10766    {"bits": [0, 2], "name": "MSAA_NUM_SAMPLES"},
10767    {"bits": [4, 4], "name": "AA_MASK_CENTROID_DTMN"},
10768    {"bits": [13, 16], "name": "MAX_SAMPLE_DIST"},
10769    {"bits": [20, 22], "name": "MSAA_EXPOSED_SAMPLES"},
10770    {"bits": [24, 25], "name": "DETAIL_TO_EXPOSED_MODE"}
10771   ]
10772  },
10773  "PA_SC_AA_MASK_X0Y0_X1Y0": {
10774   "fields": [
10775    {"bits": [0, 15], "name": "AA_MASK_X0Y0"},
10776    {"bits": [16, 31], "name": "AA_MASK_X1Y0"}
10777   ]
10778  },
10779  "PA_SC_AA_MASK_X0Y1_X1Y1": {
10780   "fields": [
10781    {"bits": [0, 15], "name": "AA_MASK_X0Y1"},
10782    {"bits": [16, 31], "name": "AA_MASK_X1Y1"}
10783   ]
10784  },
10785  "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0": {
10786   "fields": [
10787    {"bits": [0, 3], "name": "S0_X"},
10788    {"bits": [4, 7], "name": "S0_Y"},
10789    {"bits": [8, 11], "name": "S1_X"},
10790    {"bits": [12, 15], "name": "S1_Y"},
10791    {"bits": [16, 19], "name": "S2_X"},
10792    {"bits": [20, 23], "name": "S2_Y"},
10793    {"bits": [24, 27], "name": "S3_X"},
10794    {"bits": [28, 31], "name": "S3_Y"}
10795   ]
10796  },
10797  "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1": {
10798   "fields": [
10799    {"bits": [0, 3], "name": "S4_X"},
10800    {"bits": [4, 7], "name": "S4_Y"},
10801    {"bits": [8, 11], "name": "S5_X"},
10802    {"bits": [12, 15], "name": "S5_Y"},
10803    {"bits": [16, 19], "name": "S6_X"},
10804    {"bits": [20, 23], "name": "S6_Y"},
10805    {"bits": [24, 27], "name": "S7_X"},
10806    {"bits": [28, 31], "name": "S7_Y"}
10807   ]
10808  },
10809  "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2": {
10810   "fields": [
10811    {"bits": [0, 3], "name": "S8_X"},
10812    {"bits": [4, 7], "name": "S8_Y"},
10813    {"bits": [8, 11], "name": "S9_X"},
10814    {"bits": [12, 15], "name": "S9_Y"},
10815    {"bits": [16, 19], "name": "S10_X"},
10816    {"bits": [20, 23], "name": "S10_Y"},
10817    {"bits": [24, 27], "name": "S11_X"},
10818    {"bits": [28, 31], "name": "S11_Y"}
10819   ]
10820  },
10821  "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3": {
10822   "fields": [
10823    {"bits": [0, 3], "name": "S12_X"},
10824    {"bits": [4, 7], "name": "S12_Y"},
10825    {"bits": [8, 11], "name": "S13_X"},
10826    {"bits": [12, 15], "name": "S13_Y"},
10827    {"bits": [16, 19], "name": "S14_X"},
10828    {"bits": [20, 23], "name": "S14_Y"},
10829    {"bits": [24, 27], "name": "S15_X"},
10830    {"bits": [28, 31], "name": "S15_Y"}
10831   ]
10832  },
10833  "PA_SC_CENTROID_PRIORITY_0": {
10834   "fields": [
10835    {"bits": [0, 3], "name": "DISTANCE_0"},
10836    {"bits": [4, 7], "name": "DISTANCE_1"},
10837    {"bits": [8, 11], "name": "DISTANCE_2"},
10838    {"bits": [12, 15], "name": "DISTANCE_3"},
10839    {"bits": [16, 19], "name": "DISTANCE_4"},
10840    {"bits": [20, 23], "name": "DISTANCE_5"},
10841    {"bits": [24, 27], "name": "DISTANCE_6"},
10842    {"bits": [28, 31], "name": "DISTANCE_7"}
10843   ]
10844  },
10845  "PA_SC_CENTROID_PRIORITY_1": {
10846   "fields": [
10847    {"bits": [0, 3], "name": "DISTANCE_8"},
10848    {"bits": [4, 7], "name": "DISTANCE_9"},
10849    {"bits": [8, 11], "name": "DISTANCE_10"},
10850    {"bits": [12, 15], "name": "DISTANCE_11"},
10851    {"bits": [16, 19], "name": "DISTANCE_12"},
10852    {"bits": [20, 23], "name": "DISTANCE_13"},
10853    {"bits": [24, 27], "name": "DISTANCE_14"},
10854    {"bits": [28, 31], "name": "DISTANCE_15"}
10855   ]
10856  },
10857  "PA_SC_CLIPRECT_0_BR": {
10858   "fields": [
10859    {"bits": [0, 14], "name": "BR_X"},
10860    {"bits": [16, 30], "name": "BR_Y"}
10861   ]
10862  },
10863  "PA_SC_CLIPRECT_0_TL": {
10864   "fields": [
10865    {"bits": [0, 14], "name": "TL_X"},
10866    {"bits": [16, 30], "name": "TL_Y"}
10867   ]
10868  },
10869  "PA_SC_CLIPRECT_RULE": {
10870   "fields": [
10871    {"bits": [0, 15], "enum_ref": "CLIP_RULE", "name": "CLIP_RULE"}
10872   ]
10873  },
10874  "PA_SC_EDGERULE": {
10875   "fields": [
10876    {"bits": [0, 3], "name": "ER_TRI"},
10877    {"bits": [4, 7], "name": "ER_POINT"},
10878    {"bits": [8, 11], "name": "ER_RECT"},
10879    {"bits": [12, 17], "name": "ER_LINE_LR"},
10880    {"bits": [18, 23], "name": "ER_LINE_RL"},
10881    {"bits": [24, 27], "name": "ER_LINE_TB"},
10882    {"bits": [28, 31], "name": "ER_LINE_BT"}
10883   ]
10884  },
10885  "PA_SC_GENERIC_SCISSOR_TL": {
10886   "fields": [
10887    {"bits": [0, 14], "name": "TL_X"},
10888    {"bits": [16, 30], "name": "TL_Y"},
10889    {"bits": [31, 31], "name": "WINDOW_OFFSET_DISABLE"}
10890   ]
10891  },
10892  "PA_SC_LINE_CNTL": {
10893   "fields": [
10894    {"bits": [9, 9], "name": "EXPAND_LINE_WIDTH"},
10895    {"bits": [10, 10], "name": "LAST_PIXEL"},
10896    {"bits": [11, 11], "name": "PERPENDICULAR_ENDCAP_ENA"},
10897    {"bits": [12, 12], "name": "DX10_DIAMOND_TEST_ENA"}
10898   ]
10899  },
10900  "PA_SC_LINE_STIPPLE": {
10901   "fields": [
10902    {"bits": [0, 15], "name": "LINE_PATTERN"},
10903    {"bits": [16, 23], "name": "REPEAT_COUNT"},
10904    {"bits": [28, 28], "name": "PATTERN_BIT_ORDER"},
10905    {"bits": [29, 30], "name": "AUTO_RESET_CNTL"}
10906   ]
10907  },
10908  "PA_SC_LINE_STIPPLE_STATE": {
10909   "fields": [
10910    {"bits": [0, 3], "name": "CURRENT_PTR"},
10911    {"bits": [8, 15], "name": "CURRENT_COUNT"}
10912   ]
10913  },
10914  "PA_SC_MODE_CNTL_0": {
10915   "fields": [
10916    {"bits": [0, 0], "name": "MSAA_ENABLE"},
10917    {"bits": [1, 1], "name": "VPORT_SCISSOR_ENABLE"},
10918    {"bits": [2, 2], "name": "LINE_STIPPLE_ENABLE"},
10919    {"bits": [3, 3], "name": "SEND_UNLIT_STILES_TO_PKR"}
10920   ]
10921  },
10922  "PA_SC_MODE_CNTL_1": {
10923   "fields": [
10924    {"bits": [0, 0], "name": "WALK_SIZE"},
10925    {"bits": [1, 1], "name": "WALK_ALIGNMENT"},
10926    {"bits": [2, 2], "name": "WALK_ALIGN8_PRIM_FITS_ST"},
10927    {"bits": [3, 3], "name": "WALK_FENCE_ENABLE"},
10928    {"bits": [4, 6], "name": "WALK_FENCE_SIZE"},
10929    {"bits": [7, 7], "name": "SUPERTILE_WALK_ORDER_ENABLE"},
10930    {"bits": [8, 8], "name": "TILE_WALK_ORDER_ENABLE"},
10931    {"bits": [9, 9], "name": "TILE_COVER_DISABLE"},
10932    {"bits": [10, 10], "name": "TILE_COVER_NO_SCISSOR"},
10933    {"bits": [11, 11], "name": "ZMM_LINE_EXTENT"},
10934    {"bits": [12, 12], "name": "ZMM_LINE_OFFSET"},
10935    {"bits": [13, 13], "name": "ZMM_RECT_EXTENT"},
10936    {"bits": [14, 14], "name": "KILL_PIX_POST_HI_Z"},
10937    {"bits": [15, 15], "name": "KILL_PIX_POST_DETAIL_MASK"},
10938    {"bits": [16, 16], "name": "PS_ITER_SAMPLE"},
10939    {"bits": [17, 17], "name": "MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE"},
10940    {"bits": [18, 18], "name": "MULTI_GPU_SUPERTILE_ENABLE"},
10941    {"bits": [19, 19], "name": "GPU_ID_OVERRIDE_ENABLE"},
10942    {"bits": [20, 23], "name": "GPU_ID_OVERRIDE"},
10943    {"bits": [24, 24], "name": "MULTI_GPU_PRIM_DISCARD_ENABLE"},
10944    {"bits": [25, 25], "name": "FORCE_EOV_CNTDWN_ENABLE"},
10945    {"bits": [26, 26], "name": "FORCE_EOV_REZ_ENABLE"},
10946    {"bits": [27, 27], "name": "OUT_OF_ORDER_PRIMITIVE_ENABLE"},
10947    {"bits": [28, 30], "name": "OUT_OF_ORDER_WATER_MARK"}
10948   ]
10949  },
10950  "PA_SC_P3D_TRAP_SCREEN_H": {
10951   "fields": [
10952    {"bits": [0, 13], "name": "X_COORD"}
10953   ]
10954  },
10955  "PA_SC_P3D_TRAP_SCREEN_HV_EN": {
10956   "fields": [
10957    {"bits": [0, 0], "name": "ENABLE_HV_PRE_SHADER"},
10958    {"bits": [1, 1], "name": "FORCE_PRE_SHADER_ALL_PIXELS"}
10959   ]
10960  },
10961  "PA_SC_P3D_TRAP_SCREEN_V": {
10962   "fields": [
10963    {"bits": [0, 13], "name": "Y_COORD"}
10964   ]
10965  },
10966  "PA_SC_PERFCOUNTER1_SELECT": {
10967   "fields": [
10968    {"bits": [0, 9], "name": "PERF_SEL"}
10969   ]
10970  },
10971  "PA_SC_RASTER_CONFIG": {
10972   "fields": [
10973    {"bits": [0, 1], "enum_ref": "RbMap", "name": "RB_MAP_PKR0"},
10974    {"bits": [2, 3], "enum_ref": "RbMap", "name": "RB_MAP_PKR1"},
10975    {"bits": [4, 5], "enum_ref": "RbXsel2", "name": "RB_XSEL2"},
10976    {"bits": [6, 6], "enum_ref": "RbXsel", "name": "RB_XSEL"},
10977    {"bits": [7, 7], "enum_ref": "RbYsel", "name": "RB_YSEL"},
10978    {"bits": [8, 9], "enum_ref": "PkrMap", "name": "PKR_MAP"},
10979    {"bits": [10, 11], "enum_ref": "PkrXsel", "name": "PKR_XSEL"},
10980    {"bits": [12, 13], "enum_ref": "PkrYsel", "name": "PKR_YSEL"},
10981    {"bits": [14, 15], "enum_ref": "PkrXsel2", "name": "PKR_XSEL2"},
10982    {"bits": [16, 17], "enum_ref": "ScMap", "name": "SC_MAP"},
10983    {"bits": [18, 19], "enum_ref": "ScXsel", "name": "SC_XSEL"},
10984    {"bits": [20, 21], "enum_ref": "ScYsel", "name": "SC_YSEL"},
10985    {"bits": [24, 25], "enum_ref": "SeMap", "name": "SE_MAP"},
10986    {"bits": [26, 27], "enum_ref": "SeXsel", "name": "SE_XSEL"},
10987    {"bits": [28, 29], "enum_ref": "SeYsel", "name": "SE_YSEL"}
10988   ]
10989  },
10990  "PA_SC_RASTER_CONFIG_1": {
10991   "fields": [
10992    {"bits": [0, 1], "enum_ref": "SePairMap", "name": "SE_PAIR_MAP"},
10993    {"bits": [2, 3], "enum_ref": "SePairXsel", "name": "SE_PAIR_XSEL"},
10994    {"bits": [4, 5], "enum_ref": "SePairYsel", "name": "SE_PAIR_YSEL"}
10995   ]
10996  },
10997  "PA_SC_SCREEN_EXTENT_CONTROL": {
10998   "fields": [
10999    {"bits": [0, 1], "name": "SLICE_EVEN_ENABLE"},
11000    {"bits": [2, 3], "name": "SLICE_ODD_ENABLE"}
11001   ]
11002  },
11003  "PA_SC_SCREEN_EXTENT_MIN_0": {
11004   "fields": [
11005    {"bits": [0, 15], "name": "X"},
11006    {"bits": [16, 31], "name": "Y"}
11007   ]
11008  },
11009  "PA_SC_SCREEN_SCISSOR_BR": {
11010   "fields": [
11011    {"bits": [0, 15], "name": "BR_X"},
11012    {"bits": [16, 31], "name": "BR_Y"}
11013   ]
11014  },
11015  "PA_SC_SCREEN_SCISSOR_TL": {
11016   "fields": [
11017    {"bits": [0, 15], "name": "TL_X"},
11018    {"bits": [16, 31], "name": "TL_Y"}
11019   ]
11020  },
11021  "PA_SC_WINDOW_OFFSET": {
11022   "fields": [
11023    {"bits": [0, 15], "name": "WINDOW_X_OFFSET"},
11024    {"bits": [16, 31], "name": "WINDOW_Y_OFFSET"}
11025   ]
11026  },
11027  "PA_SU_HARDWARE_SCREEN_OFFSET": {
11028   "fields": [
11029    {"bits": [0, 8], "name": "HW_SCREEN_OFFSET_X"},
11030    {"bits": [16, 24], "name": "HW_SCREEN_OFFSET_Y"}
11031   ]
11032  },
11033  "PA_SU_LINE_CNTL": {
11034   "fields": [
11035    {"bits": [0, 15], "name": "WIDTH"}
11036   ]
11037  },
11038  "PA_SU_LINE_STIPPLE_CNTL": {
11039   "fields": [
11040    {"bits": [0, 1], "name": "LINE_STIPPLE_RESET"},
11041    {"bits": [2, 2], "name": "EXPAND_FULL_LENGTH"},
11042    {"bits": [3, 3], "name": "FRACTIONAL_ACCUM"},
11043    {"bits": [4, 4], "name": "DIAMOND_ADJUST"}
11044   ]
11045  },
11046  "PA_SU_LINE_STIPPLE_VALUE": {
11047   "fields": [
11048    {"bits": [0, 23], "name": "LINE_STIPPLE_VALUE"}
11049   ]
11050  },
11051  "PA_SU_PERFCOUNTER0_HI": {
11052   "fields": [
11053    {"bits": [0, 15], "name": "PERFCOUNTER_HI"}
11054   ]
11055  },
11056  "PA_SU_PERFCOUNTER0_SELECT": {
11057   "fields": [
11058    {"bits": [0, 9], "name": "PERF_SEL"},
11059    {"bits": [10, 19], "name": "PERF_SEL1"},
11060    {"bits": [20, 23], "name": "CNTR_MODE"}
11061   ]
11062  },
11063  "PA_SU_PERFCOUNTER0_SELECT1": {
11064   "fields": [
11065    {"bits": [0, 9], "name": "PERF_SEL2"},
11066    {"bits": [10, 19], "name": "PERF_SEL3"}
11067   ]
11068  },
11069  "PA_SU_PERFCOUNTER2_SELECT": {
11070   "fields": [
11071    {"bits": [0, 9], "name": "PERF_SEL"},
11072    {"bits": [20, 23], "name": "CNTR_MODE"}
11073   ]
11074  },
11075  "PA_SU_POINT_MINMAX": {
11076   "fields": [
11077    {"bits": [0, 15], "name": "MIN_SIZE"},
11078    {"bits": [16, 31], "name": "MAX_SIZE"}
11079   ]
11080  },
11081  "PA_SU_POINT_SIZE": {
11082   "fields": [
11083    {"bits": [0, 15], "name": "HEIGHT"},
11084    {"bits": [16, 31], "name": "WIDTH"}
11085   ]
11086  },
11087  "PA_SU_POLY_OFFSET_DB_FMT_CNTL": {
11088   "fields": [
11089    {"bits": [0, 7], "name": "POLY_OFFSET_NEG_NUM_DB_BITS"},
11090    {"bits": [8, 8], "name": "POLY_OFFSET_DB_IS_FLOAT_FMT"}
11091   ]
11092  },
11093  "PA_SU_PRIM_FILTER_CNTL": {
11094   "fields": [
11095    {"bits": [0, 0], "name": "TRIANGLE_FILTER_DISABLE"},
11096    {"bits": [1, 1], "name": "LINE_FILTER_DISABLE"},
11097    {"bits": [2, 2], "name": "POINT_FILTER_DISABLE"},
11098    {"bits": [3, 3], "name": "RECTANGLE_FILTER_DISABLE"},
11099    {"bits": [4, 4], "name": "TRIANGLE_EXPAND_ENA"},
11100    {"bits": [5, 5], "name": "LINE_EXPAND_ENA"},
11101    {"bits": [6, 6], "name": "POINT_EXPAND_ENA"},
11102    {"bits": [7, 7], "name": "RECTANGLE_EXPAND_ENA"},
11103    {"bits": [8, 15], "name": "PRIM_EXPAND_CONSTANT"},
11104    {"bits": [30, 30], "name": "XMAX_RIGHT_EXCLUSION"},
11105    {"bits": [31, 31], "name": "YMAX_BOTTOM_EXCLUSION"}
11106   ]
11107  },
11108  "PA_SU_SC_MODE_CNTL": {
11109   "fields": [
11110    {"bits": [0, 0], "name": "CULL_FRONT"},
11111    {"bits": [1, 1], "name": "CULL_BACK"},
11112    {"bits": [2, 2], "name": "FACE"},
11113    {"bits": [3, 4], "enum_ref": "PA_SU_SC_MODE_CNTL__POLY_MODE", "name": "POLY_MODE"},
11114    {"bits": [5, 7], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_FRONT_PTYPE"},
11115    {"bits": [8, 10], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_BACK_PTYPE"},
11116    {"bits": [11, 11], "name": "POLY_OFFSET_FRONT_ENABLE"},
11117    {"bits": [12, 12], "name": "POLY_OFFSET_BACK_ENABLE"},
11118    {"bits": [13, 13], "name": "POLY_OFFSET_PARA_ENABLE"},
11119    {"bits": [16, 16], "name": "VTX_WINDOW_OFFSET_ENABLE"},
11120    {"bits": [19, 19], "name": "PROVOKING_VTX_LAST"},
11121    {"bits": [20, 20], "name": "PERSP_CORR_DIS"},
11122    {"bits": [21, 21], "name": "MULTI_PRIM_IB_ENA"}
11123   ]
11124  },
11125  "PA_SU_VTX_CNTL": {
11126   "fields": [
11127    {"bits": [0, 0], "name": "PIX_CENTER"},
11128    {"bits": [1, 2], "enum_ref": "PA_SU_VTX_CNTL__ROUND_MODE", "name": "ROUND_MODE"},
11129    {"bits": [3, 5], "enum_ref": "QUANT_MODE", "name": "QUANT_MODE"}
11130   ]
11131  },
11132  "RLC_PERFCOUNTER0_SELECT": {
11133   "fields": [
11134    {"bits": [0, 7], "name": "PERFCOUNTER_SELECT"}
11135   ]
11136  },
11137  "RLC_PERFMON_CLK_CNTL": {
11138   "fields": [
11139    {"bits": [0, 0], "name": "PERFMON_CLOCK_STATE"}
11140   ]
11141  },
11142  "RLC_PERFMON_CNTL": {
11143   "fields": [
11144    {"bits": [0, 2], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"},
11145    {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"}
11146   ]
11147  },
11148  "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY": {
11149   "fields": [
11150    {"bits": [0, 7], "name": "PERFMON_SAMPLE_DELAY"},
11151    {"bits": [8, 31], "name": "RESERVED"}
11152   ]
11153  },
11154  "RLC_SPM_PERFMON_CNTL": {
11155   "fields": [
11156    {"bits": [0, 11], "name": "RESERVED1"},
11157    {"bits": [12, 13], "name": "PERFMON_RING_MODE"},
11158    {"bits": [14, 15], "name": "RESERVED"},
11159    {"bits": [16, 31], "name": "PERFMON_SAMPLE_INTERVAL"}
11160   ]
11161  },
11162  "RLC_SPM_PERFMON_RING_BASE_HI": {
11163   "fields": [
11164    {"bits": [0, 15], "name": "RING_BASE_HI"},
11165    {"bits": [16, 31], "name": "RESERVED"}
11166   ]
11167  },
11168  "RLC_SPM_PERFMON_SEGMENT_SIZE": {
11169   "fields": [
11170    {"bits": [0, 7], "name": "PERFMON_SEGMENT_SIZE"},
11171    {"bits": [8, 10], "name": "RESERVED1"},
11172    {"bits": [11, 15], "name": "GLOBAL_NUM_LINE"},
11173    {"bits": [16, 20], "name": "SE0_NUM_LINE"},
11174    {"bits": [21, 25], "name": "SE1_NUM_LINE"},
11175    {"bits": [26, 30], "name": "SE2_NUM_LINE"},
11176    {"bits": [31, 31], "name": "RESERVED"}
11177   ]
11178  },
11179  "SCRATCH_UMSK": {
11180   "fields": [
11181    {"bits": [0, 7], "name": "OBSOLETE_UMSK"},
11182    {"bits": [16, 17], "name": "OBSOLETE_SWAP"}
11183   ]
11184  },
11185  "SPI_BARYC_CNTL": {
11186   "fields": [
11187    {"bits": [0, 0], "name": "PERSP_CENTER_CNTL"},
11188    {"bits": [4, 4], "name": "PERSP_CENTROID_CNTL"},
11189    {"bits": [8, 8], "name": "LINEAR_CENTER_CNTL"},
11190    {"bits": [12, 12], "name": "LINEAR_CENTROID_CNTL"},
11191    {"bits": [16, 17], "name": "POS_FLOAT_LOCATION"},
11192    {"bits": [20, 20], "name": "POS_FLOAT_ULC"},
11193    {"bits": [24, 24], "name": "FRONT_FACE_ALL_BITS"}
11194   ]
11195  },
11196  "SPI_CONFIG_CNTL": {
11197   "fields": [
11198    {"bits": [0, 20], "name": "GPR_WRITE_PRIORITY"},
11199    {"bits": [21, 23], "name": "EXP_PRIORITY_ORDER"},
11200    {"bits": [24, 24], "name": "ENABLE_SQG_TOP_EVENTS"},
11201    {"bits": [25, 25], "name": "ENABLE_SQG_BOP_EVENTS"},
11202    {"bits": [26, 26], "name": "RSRC_MGMT_RESET"},
11203    {"bits": [27, 27], "name": "TTRACE_STALL_ALL"}
11204   ]
11205  },
11206  "SPI_INTERP_CONTROL_0": {
11207   "fields": [
11208    {"bits": [0, 0], "name": "FLAT_SHADE_ENA"},
11209    {"bits": [1, 1], "name": "PNT_SPRITE_ENA"},
11210    {"bits": [2, 4], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_X"},
11211    {"bits": [5, 7], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Y"},
11212    {"bits": [8, 10], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Z"},
11213    {"bits": [11, 13], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_W"},
11214    {"bits": [14, 14], "name": "PNT_SPRITE_TOP_1"}
11215   ]
11216  },
11217  "SPI_PERFCOUNTER4_SELECT": {
11218   "fields": [
11219    {"bits": [0, 7], "name": "PERF_SEL"}
11220   ]
11221  },
11222  "SPI_PERFCOUNTER_BINS": {
11223   "fields": [
11224    {"bits": [0, 3], "name": "BIN0_MIN"},
11225    {"bits": [4, 7], "name": "BIN0_MAX"},
11226    {"bits": [8, 11], "name": "BIN1_MIN"},
11227    {"bits": [12, 15], "name": "BIN1_MAX"},
11228    {"bits": [16, 19], "name": "BIN2_MIN"},
11229    {"bits": [20, 23], "name": "BIN2_MAX"},
11230    {"bits": [24, 27], "name": "BIN3_MIN"},
11231    {"bits": [28, 31], "name": "BIN3_MAX"}
11232   ]
11233  },
11234  "SPI_PS_INPUT_CNTL_0": {
11235   "fields": [
11236    {"bits": [0, 5], "name": "OFFSET"},
11237    {"bits": [8, 9], "name": "DEFAULT_VAL"},
11238    {"bits": [10, 10], "name": "FLAT_SHADE"},
11239    {"bits": [13, 16], "name": "CYL_WRAP"},
11240    {"bits": [17, 17], "name": "PT_SPRITE_TEX"},
11241    {"bits": [18, 18], "name": "DUP"},
11242    {"bits": [19, 19], "name": "FP16_INTERP_MODE"},
11243    {"bits": [20, 20], "name": "USE_DEFAULT_ATTR1"},
11244    {"bits": [21, 22], "name": "DEFAULT_VAL_ATTR1"},
11245    {"bits": [23, 23], "name": "PT_SPRITE_TEX_ATTR1"},
11246    {"bits": [24, 24], "name": "ATTR0_VALID"},
11247    {"bits": [25, 25], "name": "ATTR1_VALID"}
11248   ]
11249  },
11250  "SPI_PS_INPUT_CNTL_20": {
11251   "fields": [
11252    {"bits": [0, 5], "name": "OFFSET"},
11253    {"bits": [8, 9], "name": "DEFAULT_VAL"},
11254    {"bits": [10, 10], "name": "FLAT_SHADE"},
11255    {"bits": [18, 18], "name": "DUP"},
11256    {"bits": [19, 19], "name": "FP16_INTERP_MODE"},
11257    {"bits": [20, 20], "name": "USE_DEFAULT_ATTR1"},
11258    {"bits": [21, 22], "name": "DEFAULT_VAL_ATTR1"},
11259    {"bits": [24, 24], "name": "ATTR0_VALID"},
11260    {"bits": [25, 25], "name": "ATTR1_VALID"}
11261   ]
11262  },
11263  "SPI_PS_INPUT_ENA": {
11264   "fields": [
11265    {"bits": [0, 0], "name": "PERSP_SAMPLE_ENA"},
11266    {"bits": [1, 1], "name": "PERSP_CENTER_ENA"},
11267    {"bits": [2, 2], "name": "PERSP_CENTROID_ENA"},
11268    {"bits": [3, 3], "name": "PERSP_PULL_MODEL_ENA"},
11269    {"bits": [4, 4], "name": "LINEAR_SAMPLE_ENA"},
11270    {"bits": [5, 5], "name": "LINEAR_CENTER_ENA"},
11271    {"bits": [6, 6], "name": "LINEAR_CENTROID_ENA"},
11272    {"bits": [7, 7], "name": "LINE_STIPPLE_TEX_ENA"},
11273    {"bits": [8, 8], "name": "POS_X_FLOAT_ENA"},
11274    {"bits": [9, 9], "name": "POS_Y_FLOAT_ENA"},
11275    {"bits": [10, 10], "name": "POS_Z_FLOAT_ENA"},
11276    {"bits": [11, 11], "name": "POS_W_FLOAT_ENA"},
11277    {"bits": [12, 12], "name": "FRONT_FACE_ENA"},
11278    {"bits": [13, 13], "name": "ANCILLARY_ENA"},
11279    {"bits": [14, 14], "name": "SAMPLE_COVERAGE_ENA"},
11280    {"bits": [15, 15], "name": "POS_FIXED_PT_ENA"}
11281   ]
11282  },
11283  "SPI_PS_IN_CONTROL": {
11284   "fields": [
11285    {"bits": [0, 5], "name": "NUM_INTERP"},
11286    {"bits": [6, 6], "name": "PARAM_GEN"},
11287    {"bits": [14, 14], "name": "BC_OPTIMIZE_DISABLE"}
11288   ]
11289  },
11290  "SPI_SHADER_COL_FORMAT": {
11291   "fields": [
11292    {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL0_EXPORT_FORMAT"},
11293    {"bits": [4, 7], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL1_EXPORT_FORMAT"},
11294    {"bits": [8, 11], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL2_EXPORT_FORMAT"},
11295    {"bits": [12, 15], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL3_EXPORT_FORMAT"},
11296    {"bits": [16, 19], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL4_EXPORT_FORMAT"},
11297    {"bits": [20, 23], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL5_EXPORT_FORMAT"},
11298    {"bits": [24, 27], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL6_EXPORT_FORMAT"},
11299    {"bits": [28, 31], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL7_EXPORT_FORMAT"}
11300   ]
11301  },
11302  "SPI_SHADER_LATE_ALLOC_VS": {
11303   "fields": [
11304    {"bits": [0, 5], "name": "LIMIT"}
11305   ]
11306  },
11307  "SPI_SHADER_PGM_RSRC1_GS": {
11308   "fields": [
11309    {"bits": [0, 5], "name": "VGPRS"},
11310    {"bits": [6, 9], "name": "SGPRS"},
11311    {"bits": [10, 11], "name": "PRIORITY"},
11312    {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
11313    {"bits": [20, 20], "name": "PRIV"},
11314    {"bits": [21, 21], "name": "DX10_CLAMP"},
11315    {"bits": [22, 22], "name": "DEBUG_MODE"},
11316    {"bits": [23, 23], "name": "IEEE_MODE"},
11317    {"bits": [24, 24], "name": "CU_GROUP_ENABLE"},
11318    {"bits": [25, 27], "name": "CACHE_CTL"},
11319    {"bits": [28, 28], "name": "CDBG_USER"}
11320   ]
11321  },
11322  "SPI_SHADER_PGM_RSRC1_HS": {
11323   "fields": [
11324    {"bits": [0, 5], "name": "VGPRS"},
11325    {"bits": [6, 9], "name": "SGPRS"},
11326    {"bits": [10, 11], "name": "PRIORITY"},
11327    {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
11328    {"bits": [20, 20], "name": "PRIV"},
11329    {"bits": [21, 21], "name": "DX10_CLAMP"},
11330    {"bits": [22, 22], "name": "DEBUG_MODE"},
11331    {"bits": [23, 23], "name": "IEEE_MODE"},
11332    {"bits": [24, 26], "name": "CACHE_CTL"},
11333    {"bits": [27, 27], "name": "CDBG_USER"}
11334   ]
11335  },
11336  "SPI_SHADER_PGM_RSRC1_LS": {
11337   "fields": [
11338    {"bits": [0, 5], "name": "VGPRS"},
11339    {"bits": [6, 9], "name": "SGPRS"},
11340    {"bits": [10, 11], "name": "PRIORITY"},
11341    {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
11342    {"bits": [20, 20], "name": "PRIV"},
11343    {"bits": [21, 21], "name": "DX10_CLAMP"},
11344    {"bits": [22, 22], "name": "DEBUG_MODE"},
11345    {"bits": [23, 23], "name": "IEEE_MODE"},
11346    {"bits": [24, 25], "name": "VGPR_COMP_CNT"},
11347    {"bits": [26, 28], "name": "CACHE_CTL"},
11348    {"bits": [29, 29], "name": "CDBG_USER"}
11349   ]
11350  },
11351  "SPI_SHADER_PGM_RSRC1_PS": {
11352   "fields": [
11353    {"bits": [0, 5], "name": "VGPRS"},
11354    {"bits": [6, 9], "name": "SGPRS"},
11355    {"bits": [10, 11], "name": "PRIORITY"},
11356    {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
11357    {"bits": [20, 20], "name": "PRIV"},
11358    {"bits": [21, 21], "name": "DX10_CLAMP"},
11359    {"bits": [22, 22], "name": "DEBUG_MODE"},
11360    {"bits": [23, 23], "name": "IEEE_MODE"},
11361    {"bits": [24, 24], "name": "CU_GROUP_DISABLE"},
11362    {"bits": [25, 27], "name": "CACHE_CTL"},
11363    {"bits": [28, 28], "name": "CDBG_USER"}
11364   ]
11365  },
11366  "SPI_SHADER_PGM_RSRC1_VS": {
11367   "fields": [
11368    {"bits": [0, 5], "name": "VGPRS"},
11369    {"bits": [6, 9], "name": "SGPRS"},
11370    {"bits": [10, 11], "name": "PRIORITY"},
11371    {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
11372    {"bits": [20, 20], "name": "PRIV"},
11373    {"bits": [21, 21], "name": "DX10_CLAMP"},
11374    {"bits": [22, 22], "name": "DEBUG_MODE"},
11375    {"bits": [23, 23], "name": "IEEE_MODE"},
11376    {"bits": [24, 25], "name": "VGPR_COMP_CNT"},
11377    {"bits": [26, 26], "name": "CU_GROUP_ENABLE"},
11378    {"bits": [27, 29], "name": "CACHE_CTL"},
11379    {"bits": [30, 30], "name": "CDBG_USER"}
11380   ]
11381  },
11382  "SPI_SHADER_PGM_RSRC2_ES_VS": {
11383   "fields": [
11384    {"bits": [0, 0], "name": "SCRATCH_EN"},
11385    {"bits": [1, 5], "name": "USER_SGPR"},
11386    {"bits": [6, 6], "name": "TRAP_PRESENT"},
11387    {"bits": [7, 7], "name": "OC_LDS_EN"},
11388    {"bits": [8, 16], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
11389    {"bits": [20, 28], "name": "LDS_SIZE"}
11390   ]
11391  },
11392  "SPI_SHADER_PGM_RSRC2_GS": {
11393   "fields": [
11394    {"bits": [0, 0], "name": "SCRATCH_EN"},
11395    {"bits": [1, 5], "name": "USER_SGPR"},
11396    {"bits": [6, 6], "name": "TRAP_PRESENT"},
11397    {"bits": [7, 15], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
11398   ]
11399  },
11400  "SPI_SHADER_PGM_RSRC2_HS": {
11401   "fields": [
11402    {"bits": [0, 0], "name": "SCRATCH_EN"},
11403    {"bits": [1, 5], "name": "USER_SGPR"},
11404    {"bits": [6, 6], "name": "TRAP_PRESENT"},
11405    {"bits": [7, 7], "name": "OC_LDS_EN"},
11406    {"bits": [8, 8], "name": "TG_SIZE_EN"},
11407    {"bits": [9, 17], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
11408   ]
11409  },
11410  "SPI_SHADER_PGM_RSRC2_LS_VS": {
11411   "fields": [
11412    {"bits": [0, 0], "name": "SCRATCH_EN"},
11413    {"bits": [1, 5], "name": "USER_SGPR"},
11414    {"bits": [6, 6], "name": "TRAP_PRESENT"},
11415    {"bits": [7, 15], "name": "LDS_SIZE"},
11416    {"bits": [16, 24], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
11417   ]
11418  },
11419  "SPI_SHADER_PGM_RSRC2_PS": {
11420   "fields": [
11421    {"bits": [0, 0], "name": "SCRATCH_EN"},
11422    {"bits": [1, 5], "name": "USER_SGPR"},
11423    {"bits": [6, 6], "name": "TRAP_PRESENT"},
11424    {"bits": [7, 7], "name": "WAVE_CNT_EN"},
11425    {"bits": [8, 15], "name": "EXTRA_LDS_SIZE"},
11426    {"bits": [16, 24], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
11427   ]
11428  },
11429  "SPI_SHADER_PGM_RSRC2_VS": {
11430   "fields": [
11431    {"bits": [0, 0], "name": "SCRATCH_EN"},
11432    {"bits": [1, 5], "name": "USER_SGPR"},
11433    {"bits": [6, 6], "name": "TRAP_PRESENT"},
11434    {"bits": [7, 7], "name": "OC_LDS_EN"},
11435    {"bits": [8, 8], "name": "SO_BASE0_EN"},
11436    {"bits": [9, 9], "name": "SO_BASE1_EN"},
11437    {"bits": [10, 10], "name": "SO_BASE2_EN"},
11438    {"bits": [11, 11], "name": "SO_BASE3_EN"},
11439    {"bits": [12, 12], "name": "SO_EN"},
11440    {"bits": [13, 21], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
11441    {"bits": [24, 24], "name": "DISPATCH_DRAW_EN"}
11442   ]
11443  },
11444  "SPI_SHADER_PGM_RSRC3_GS": {
11445   "fields": [
11446    {"bits": [0, 15], "name": "CU_EN"},
11447    {"bits": [16, 21], "name": "WAVE_LIMIT"},
11448    {"bits": [22, 25], "name": "LOCK_LOW_THRESHOLD"},
11449    {"bits": [26, 31], "name": "GROUP_FIFO_DEPTH"}
11450   ]
11451  },
11452  "SPI_SHADER_PGM_RSRC3_HS": {
11453   "fields": [
11454    {"bits": [0, 5], "name": "WAVE_LIMIT"},
11455    {"bits": [6, 9], "name": "LOCK_LOW_THRESHOLD"},
11456    {"bits": [10, 15], "name": "GROUP_FIFO_DEPTH"}
11457   ]
11458  },
11459  "SPI_SHADER_PGM_RSRC3_PS": {
11460   "fields": [
11461    {"bits": [0, 15], "name": "CU_EN"},
11462    {"bits": [16, 21], "name": "WAVE_LIMIT"},
11463    {"bits": [22, 25], "name": "LOCK_LOW_THRESHOLD"}
11464   ]
11465  },
11466  "SPI_SHADER_POS_FORMAT": {
11467   "fields": [
11468    {"bits": [0, 3], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS0_EXPORT_FORMAT"},
11469    {"bits": [4, 7], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS1_EXPORT_FORMAT"},
11470    {"bits": [8, 11], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS2_EXPORT_FORMAT"},
11471    {"bits": [12, 15], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS3_EXPORT_FORMAT"}
11472   ]
11473  },
11474  "SPI_SHADER_TBA_HI_PS": {
11475   "fields": [
11476    {"bits": [0, 7], "name": "MEM_BASE"}
11477   ]
11478  },
11479  "SPI_SHADER_Z_FORMAT": {
11480   "fields": [
11481    {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "Z_EXPORT_FORMAT"}
11482   ]
11483  },
11484  "SPI_VS_OUT_CONFIG": {
11485   "fields": [
11486    {"bits": [1, 5], "name": "VS_EXPORT_COUNT"},
11487    {"bits": [6, 6], "name": "VS_HALF_PACK"}
11488   ]
11489  },
11490  "SQC_CACHES": {
11491   "fields": [
11492    {"bits": [0, 0], "name": "TARGET_INST"},
11493    {"bits": [1, 1], "name": "TARGET_DATA"},
11494    {"bits": [2, 2], "name": "INVALIDATE"},
11495    {"bits": [3, 3], "name": "WRITEBACK"},
11496    {"bits": [4, 4], "name": "VOL"},
11497    {"bits": [16, 16], "name": "COMPLETE"}
11498   ]
11499  },
11500  "SQC_WRITEBACK": {
11501   "fields": [
11502    {"bits": [0, 0], "name": "DWB"},
11503    {"bits": [1, 1], "name": "DIRTY"}
11504   ]
11505  },
11506  "SQ_BUF_RSRC_WORD1": {
11507   "fields": [
11508    {"bits": [0, 15], "name": "BASE_ADDRESS_HI"},
11509    {"bits": [16, 29], "name": "STRIDE"},
11510    {"bits": [30, 30], "name": "CACHE_SWIZZLE"},
11511    {"bits": [31, 31], "name": "SWIZZLE_ENABLE"}
11512   ]
11513  },
11514  "SQ_BUF_RSRC_WORD3": {
11515   "fields": [
11516    {"bits": [0, 2], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_X"},
11517    {"bits": [3, 5], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Y"},
11518    {"bits": [6, 8], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Z"},
11519    {"bits": [9, 11], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_W"},
11520    {"bits": [12, 14], "enum_ref": "BUF_NUM_FORMAT", "name": "NUM_FORMAT"},
11521    {"bits": [15, 18], "enum_ref": "BUF_DATA_FORMAT", "name": "DATA_FORMAT"},
11522    {"bits": [19, 20], "name": "ELEMENT_SIZE"},
11523    {"bits": [21, 22], "name": "INDEX_STRIDE"},
11524    {"bits": [23, 23], "name": "ADD_TID_ENABLE"},
11525    {"bits": [24, 24], "name": "ATC"},
11526    {"bits": [25, 25], "name": "HASH_ENABLE"},
11527    {"bits": [26, 26], "name": "HEAP"},
11528    {"bits": [27, 29], "name": "MTYPE"},
11529    {"bits": [30, 31], "enum_ref": "SQ_RSRC_BUF_TYPE", "name": "TYPE"}
11530   ]
11531  },
11532  "SQ_IMG_RSRC_WORD1": {
11533   "fields": [
11534    {"bits": [0, 7], "name": "BASE_ADDRESS_HI"},
11535    {"bits": [8, 19], "name": "MIN_LOD"},
11536    {"bits": [20, 25], "enum_ref": "IMG_DATA_FORMAT", "name": "DATA_FORMAT"},
11537    {"bits": [26, 29], "enum_ref": "IMG_NUM_FORMAT", "name": "NUM_FORMAT"},
11538    {"bits": [30, 31], "name": "MTYPE"}
11539   ]
11540  },
11541  "SQ_IMG_RSRC_WORD2": {
11542   "fields": [
11543    {"bits": [0, 13], "name": "WIDTH"},
11544    {"bits": [14, 27], "name": "HEIGHT"},
11545    {"bits": [28, 30], "name": "PERF_MOD"},
11546    {"bits": [31, 31], "name": "INTERLACED"}
11547   ]
11548  },
11549  "SQ_IMG_RSRC_WORD3": {
11550   "fields": [
11551    {"bits": [0, 2], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_X"},
11552    {"bits": [3, 5], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Y"},
11553    {"bits": [6, 8], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Z"},
11554    {"bits": [9, 11], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_W"},
11555    {"bits": [12, 15], "name": "BASE_LEVEL"},
11556    {"bits": [16, 19], "name": "LAST_LEVEL"},
11557    {"bits": [20, 24], "name": "TILING_INDEX"},
11558    {"bits": [25, 25], "name": "POW2_PAD"},
11559    {"bits": [26, 26], "name": "MTYPE"},
11560    {"bits": [27, 27], "name": "ATC"},
11561    {"bits": [28, 31], "enum_ref": "SQ_RSRC_IMG_TYPE", "name": "TYPE"}
11562   ]
11563  },
11564  "SQ_IMG_RSRC_WORD4": {
11565   "fields": [
11566    {"bits": [0, 12], "name": "DEPTH"},
11567    {"bits": [13, 26], "name": "PITCH"}
11568   ]
11569  },
11570  "SQ_IMG_RSRC_WORD5": {
11571   "fields": [
11572    {"bits": [0, 12], "name": "BASE_ARRAY"},
11573    {"bits": [13, 25], "name": "LAST_ARRAY"}
11574   ]
11575  },
11576  "SQ_IMG_RSRC_WORD6": {
11577   "fields": [
11578    {"bits": [0, 11], "name": "MIN_LOD_WARN"},
11579    {"bits": [12, 19], "name": "COUNTER_BANK_ID"},
11580    {"bits": [20, 20], "name": "LOD_HDW_CNT_EN"},
11581    {"bits": [21, 21], "name": "COMPRESSION_EN"},
11582    {"bits": [22, 22], "name": "ALPHA_IS_ON_MSB"},
11583    {"bits": [23, 23], "name": "COLOR_TRANSFORM"},
11584    {"bits": [24, 27], "name": "LOST_ALPHA_BITS"},
11585    {"bits": [28, 31], "name": "LOST_COLOR_BITS"}
11586   ]
11587  },
11588  "SQ_IMG_SAMP_WORD0": {
11589   "fields": [
11590    {"bits": [0, 2], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_X"},
11591    {"bits": [3, 5], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_Y"},
11592    {"bits": [6, 8], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_Z"},
11593    {"bits": [9, 11], "name": "MAX_ANISO_RATIO"},
11594    {"bits": [12, 14], "enum_ref": "SQ_TEX_DEPTH_COMPARE", "name": "DEPTH_COMPARE_FUNC"},
11595    {"bits": [15, 15], "name": "FORCE_UNNORMALIZED"},
11596    {"bits": [16, 18], "name": "ANISO_THRESHOLD"},
11597    {"bits": [19, 19], "name": "MC_COORD_TRUNC"},
11598    {"bits": [20, 20], "name": "FORCE_DEGAMMA"},
11599    {"bits": [21, 26], "name": "ANISO_BIAS"},
11600    {"bits": [27, 27], "name": "TRUNC_COORD"},
11601    {"bits": [28, 28], "name": "DISABLE_CUBE_WRAP"},
11602    {"bits": [29, 30], "enum_ref": "SQ_IMG_FILTER_TYPE", "name": "FILTER_MODE"},
11603    {"bits": [31, 31], "name": "COMPAT_MODE"}
11604   ]
11605  },
11606  "SQ_IMG_SAMP_WORD1": {
11607   "fields": [
11608    {"bits": [0, 11], "name": "MIN_LOD"},
11609    {"bits": [12, 23], "name": "MAX_LOD"},
11610    {"bits": [24, 27], "name": "PERF_MIP"},
11611    {"bits": [28, 31], "name": "PERF_Z"}
11612   ]
11613  },
11614  "SQ_IMG_SAMP_WORD2": {
11615   "fields": [
11616    {"bits": [0, 13], "name": "LOD_BIAS"},
11617    {"bits": [14, 19], "name": "LOD_BIAS_SEC"},
11618    {"bits": [20, 21], "enum_ref": "SQ_TEX_XY_FILTER", "name": "XY_MAG_FILTER"},
11619    {"bits": [22, 23], "enum_ref": "SQ_TEX_XY_FILTER", "name": "XY_MIN_FILTER"},
11620    {"bits": [24, 25], "enum_ref": "SQ_TEX_Z_FILTER", "name": "Z_FILTER"},
11621    {"bits": [26, 27], "enum_ref": "SQ_TEX_MIP_FILTER", "name": "MIP_FILTER"},
11622    {"bits": [28, 28], "name": "MIP_POINT_PRECLAMP"},
11623    {"bits": [29, 29], "name": "DISABLE_LSB_CEIL"},
11624    {"bits": [30, 30], "name": "FILTER_PREC_FIX"},
11625    {"bits": [31, 31], "name": "ANISO_OVERRIDE"}
11626   ]
11627  },
11628  "SQ_IMG_SAMP_WORD3": {
11629   "fields": [
11630    {"bits": [0, 11], "name": "BORDER_COLOR_PTR"},
11631    {"bits": [29, 29], "name": "UPGRADED_DEPTH"},
11632    {"bits": [30, 31], "enum_ref": "SQ_TEX_BORDER_COLOR", "name": "BORDER_COLOR_TYPE"}
11633   ]
11634  },
11635  "SQ_PERFCOUNTER0_SELECT": {
11636   "fields": [
11637    {"bits": [0, 8], "name": "PERF_SEL"},
11638    {"bits": [12, 15], "name": "SQC_BANK_MASK"},
11639    {"bits": [16, 19], "name": "SQC_CLIENT_MASK"},
11640    {"bits": [20, 23], "name": "SPM_MODE"},
11641    {"bits": [24, 27], "name": "SIMD_MASK"},
11642    {"bits": [28, 31], "name": "PERF_MODE"}
11643   ]
11644  },
11645  "SQ_PERFCOUNTER_CTRL": {
11646   "fields": [
11647    {"bits": [0, 0], "name": "PS_EN"},
11648    {"bits": [1, 1], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"},
11649    {"bits": [2, 2], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"},
11650    {"bits": [3, 3], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"},
11651    {"bits": [4, 4], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"},
11652    {"bits": [5, 5], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"},
11653    {"bits": [6, 6], "name": "CS_EN"},
11654    {"bits": [8, 12], "name": "CNTR_RATE"},
11655    {"bits": [13, 13], "name": "DISABLE_FLUSH"}
11656   ]
11657  },
11658  "SQ_PERFCOUNTER_CTRL2": {
11659   "fields": [
11660    {"bits": [0, 0], "name": "FORCE_EN"}
11661   ]
11662  },
11663  "SQ_PERFCOUNTER_MASK": {
11664   "fields": [
11665    {"bits": [0, 15], "name": "SH0_MASK"},
11666    {"bits": [16, 31], "name": "SH1_MASK"}
11667   ]
11668  },
11669  "SQ_THREAD_TRACE_BASE2": {
11670   "fields": [
11671    {"bits": [0, 3], "name": "ADDR_HI"}
11672   ]
11673  },
11674  "SQ_THREAD_TRACE_CTRL": {
11675   "fields": [
11676    {"bits": [31, 31], "name": "RESET_BUFFER"}
11677   ]
11678  },
11679  "SQ_THREAD_TRACE_HIWATER": {
11680   "fields": [
11681    {"bits": [0, 2], "name": "HIWATER"}
11682   ]
11683  },
11684  "SQ_THREAD_TRACE_MASK": {
11685   "fields": [
11686    {"bits": [0, 4], "name": "CU_SEL"},
11687    {"bits": [5, 5], "name": "SH_SEL"},
11688    {"bits": [7, 7], "name": "REG_STALL_EN"},
11689    {"bits": [8, 11], "name": "SIMD_EN"},
11690    {"bits": [12, 13], "name": "VM_ID_MASK"},
11691    {"bits": [14, 14], "name": "SPI_STALL_EN"},
11692    {"bits": [15, 15], "name": "SQ_STALL_EN"},
11693    {"bits": [16, 31], "name": "RANDOM_SEED"}
11694   ]
11695  },
11696  "SQ_THREAD_TRACE_MODE": {
11697   "fields": [
11698    {"bits": [0, 2], "name": "MASK_PS"},
11699    {"bits": [3, 5], "name": "MASK_VS"},
11700    {"bits": [6, 8], "name": "MASK_GS"},
11701    {"bits": [9, 11], "name": "MASK_ES"},
11702    {"bits": [12, 14], "name": "MASK_HS"},
11703    {"bits": [15, 17], "name": "MASK_LS"},
11704    {"bits": [18, 20], "name": "MASK_CS"},
11705    {"bits": [21, 22], "name": "MODE"},
11706    {"bits": [23, 24], "name": "CAPTURE_MODE"},
11707    {"bits": [25, 25], "name": "AUTOFLUSH_EN"},
11708    {"bits": [26, 26], "name": "PRIV"},
11709    {"bits": [27, 28], "name": "ISSUE_MASK"},
11710    {"bits": [29, 29], "name": "TEST_MODE"},
11711    {"bits": [30, 30], "name": "INTERRUPT_EN"},
11712    {"bits": [31, 31], "name": "WRAP"}
11713   ]
11714  },
11715  "SQ_THREAD_TRACE_SIZE": {
11716   "fields": [
11717    {"bits": [0, 21], "name": "SIZE"}
11718   ]
11719  },
11720  "SQ_THREAD_TRACE_STATUS": {
11721   "fields": [
11722    {"bits": [0, 9], "name": "FINISH_PENDING"},
11723    {"bits": [16, 25], "name": "FINISH_DONE"},
11724    {"bits": [29, 29], "name": "NEW_BUF"},
11725    {"bits": [30, 30], "name": "BUSY"},
11726    {"bits": [31, 31], "name": "FULL"}
11727   ]
11728  },
11729  "SQ_THREAD_TRACE_TOKEN_MASK": {
11730   "fields": [
11731    {"bits": [0, 15], "name": "TOKEN_MASK"},
11732    {"bits": [16, 23], "name": "REG_MASK"},
11733    {"bits": [24, 24], "name": "REG_DROP_ON_STALL"}
11734   ]
11735  },
11736  "SQ_THREAD_TRACE_WPTR": {
11737   "fields": [
11738    {"bits": [0, 29], "name": "WPTR"},
11739    {"bits": [30, 31], "name": "READ_OFFSET"}
11740   ]
11741  },
11742  "SQ_WAVE_GPR_ALLOC": {
11743   "fields": [
11744    {"bits": [0, 5], "name": "VGPR_BASE"},
11745    {"bits": [8, 13], "name": "VGPR_SIZE"},
11746    {"bits": [16, 21], "name": "SGPR_BASE"},
11747    {"bits": [24, 27], "name": "SGPR_SIZE"}
11748   ]
11749  },
11750  "SQ_WAVE_HW_ID": {
11751   "fields": [
11752    {"bits": [0, 3], "name": "WAVE_ID"},
11753    {"bits": [4, 5], "name": "SIMD_ID"},
11754    {"bits": [6, 7], "name": "PIPE_ID"},
11755    {"bits": [8, 11], "name": "CU_ID"},
11756    {"bits": [12, 12], "name": "SH_ID"},
11757    {"bits": [13, 14], "name": "SE_ID"},
11758    {"bits": [16, 19], "name": "TG_ID"},
11759    {"bits": [20, 23], "name": "VM_ID"},
11760    {"bits": [24, 26], "name": "QUEUE_ID"},
11761    {"bits": [27, 29], "name": "STATE_ID"},
11762    {"bits": [30, 31], "name": "ME_ID"}
11763   ]
11764  },
11765  "SQ_WAVE_IB_DBG0": {
11766   "fields": [
11767    {"bits": [0, 2], "name": "IBUF_ST"},
11768    {"bits": [3, 3], "name": "PC_INVALID"},
11769    {"bits": [4, 4], "name": "NEED_NEXT_DW"},
11770    {"bits": [5, 7], "name": "NO_PREFETCH_CNT"},
11771    {"bits": [8, 9], "name": "IBUF_RPTR"},
11772    {"bits": [10, 11], "name": "IBUF_WPTR"},
11773    {"bits": [16, 19], "name": "INST_STR_ST"},
11774    {"bits": [20, 23], "name": "MISC_CNT"},
11775    {"bits": [24, 25], "name": "ECC_ST"},
11776    {"bits": [26, 26], "name": "IS_HYB"},
11777    {"bits": [27, 28], "name": "HYB_CNT"},
11778    {"bits": [29, 29], "name": "KILL"},
11779    {"bits": [30, 30], "name": "NEED_KILL_IFETCH"}
11780   ]
11781  },
11782  "SQ_WAVE_IB_DBG1": {
11783   "fields": [
11784    {"bits": [0, 0], "name": "IXNACK"},
11785    {"bits": [1, 1], "name": "XNACK"},
11786    {"bits": [2, 2], "name": "TA_NEED_RESET"},
11787    {"bits": [4, 7], "name": "XCNT"},
11788    {"bits": [8, 11], "name": "QCNT"}
11789   ]
11790  },
11791  "SQ_WAVE_IB_STS": {
11792   "fields": [
11793    {"bits": [0, 3], "name": "VM_CNT"},
11794    {"bits": [4, 6], "name": "EXP_CNT"},
11795    {"bits": [8, 11], "name": "LGKM_CNT"},
11796    {"bits": [12, 14], "name": "VALU_CNT"},
11797    {"bits": [15, 15], "name": "FIRST_REPLAY"},
11798    {"bits": [16, 19], "name": "RCNT"}
11799   ]
11800  },
11801  "SQ_WAVE_LDS_ALLOC": {
11802   "fields": [
11803    {"bits": [0, 7], "name": "LDS_BASE"},
11804    {"bits": [12, 20], "name": "LDS_SIZE"}
11805   ]
11806  },
11807  "SQ_WAVE_MODE": {
11808   "fields": [
11809    {"bits": [0, 3], "name": "FP_ROUND"},
11810    {"bits": [4, 7], "name": "FP_DENORM"},
11811    {"bits": [8, 8], "name": "DX10_CLAMP"},
11812    {"bits": [9, 9], "name": "IEEE"},
11813    {"bits": [10, 10], "name": "LOD_CLAMPED"},
11814    {"bits": [11, 11], "name": "DEBUG_EN"},
11815    {"bits": [12, 20], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
11816    {"bits": [27, 27], "name": "GPR_IDX_EN"},
11817    {"bits": [28, 28], "name": "VSKIP"},
11818    {"bits": [29, 31], "name": "CSP"}
11819   ]
11820  },
11821  "SQ_WAVE_PC_HI": {
11822   "fields": [
11823    {"bits": [0, 7], "name": "PC_HI"}
11824   ]
11825  },
11826  "SQ_WAVE_STATUS": {
11827   "fields": [
11828    {"bits": [0, 0], "name": "SCC"},
11829    {"bits": [1, 2], "name": "SPI_PRIO"},
11830    {"bits": [3, 4], "name": "USER_PRIO"},
11831    {"bits": [5, 5], "name": "PRIV"},
11832    {"bits": [6, 6], "name": "TRAP_EN"},
11833    {"bits": [7, 7], "name": "TTRACE_EN"},
11834    {"bits": [8, 8], "name": "EXPORT_RDY"},
11835    {"bits": [9, 9], "name": "EXECZ"},
11836    {"bits": [10, 10], "name": "VCCZ"},
11837    {"bits": [11, 11], "name": "IN_TG"},
11838    {"bits": [12, 12], "name": "IN_BARRIER"},
11839    {"bits": [13, 13], "name": "HALT"},
11840    {"bits": [14, 14], "name": "TRAP"},
11841    {"bits": [15, 15], "name": "TTRACE_CU_EN"},
11842    {"bits": [16, 16], "name": "VALID"},
11843    {"bits": [17, 17], "name": "ECC_ERR"},
11844    {"bits": [18, 18], "name": "SKIP_EXPORT"},
11845    {"bits": [19, 19], "name": "PERF_EN"},
11846    {"bits": [20, 20], "name": "COND_DBG_USER"},
11847    {"bits": [21, 21], "name": "COND_DBG_SYS"},
11848    {"bits": [22, 22], "name": "ALLOW_REPLAY"},
11849    {"bits": [23, 23], "name": "INST_ATC"},
11850    {"bits": [27, 27], "name": "MUST_EXPORT"}
11851   ]
11852  },
11853  "SQ_WAVE_TBA_HI": {
11854   "fields": [
11855    {"bits": [0, 7], "name": "ADDR_HI"}
11856   ]
11857  },
11858  "SQ_WAVE_TRAPSTS": {
11859   "fields": [
11860    {"bits": [0, 8], "enum_ref": "EXCP_EN", "name": "EXCP"},
11861    {"bits": [10, 10], "name": "SAVECTX"},
11862    {"bits": [16, 21], "name": "EXCP_CYCLE"},
11863    {"bits": [29, 31], "name": "DP_RATE"}
11864   ]
11865  },
11866  "SX_PERFCOUNTER0_SELECT": {
11867   "fields": [
11868    {"bits": [0, 9], "name": "PERFCOUNTER_SELECT"},
11869    {"bits": [10, 19], "name": "PERFCOUNTER_SELECT1"},
11870    {"bits": [20, 23], "name": "CNTR_MODE"}
11871   ]
11872  },
11873  "SX_PERFCOUNTER0_SELECT1": {
11874   "fields": [
11875    {"bits": [0, 9], "name": "PERFCOUNTER_SELECT2"},
11876    {"bits": [10, 19], "name": "PERFCOUNTER_SELECT3"}
11877   ]
11878  },
11879  "TA_BC_BASE_ADDR_HI": {
11880   "fields": [
11881    {"bits": [0, 7], "name": "ADDRESS"}
11882   ]
11883  },
11884  "TCC_PERFCOUNTER0_SELECT1": {
11885   "fields": [
11886    {"bits": [0, 9], "name": "PERF_SEL2"},
11887    {"bits": [10, 19], "name": "PERF_SEL3"},
11888    {"bits": [24, 27], "name": "PERF_MODE2"},
11889    {"bits": [28, 31], "name": "PERF_MODE3"}
11890   ]
11891  },
11892  "TCC_PERFCOUNTER2_SELECT": {
11893   "fields": [
11894    {"bits": [0, 9], "name": "PERF_SEL"},
11895    {"bits": [20, 23], "name": "CNTR_MODE"},
11896    {"bits": [28, 31], "name": "PERF_MODE"}
11897   ]
11898  },
11899  "TD_PERFCOUNTER0_SELECT": {
11900   "fields": [
11901    {"bits": [0, 7], "name": "PERF_SEL"},
11902    {"bits": [10, 17], "name": "PERF_SEL1"},
11903    {"bits": [20, 23], "name": "CNTR_MODE"},
11904    {"bits": [24, 27], "name": "PERF_MODE1"},
11905    {"bits": [28, 31], "name": "PERF_MODE"}
11906   ]
11907  },
11908  "TD_PERFCOUNTER0_SELECT1": {
11909   "fields": [
11910    {"bits": [0, 7], "name": "PERF_SEL2"},
11911    {"bits": [10, 17], "name": "PERF_SEL3"},
11912    {"bits": [24, 27], "name": "PERF_MODE3"},
11913    {"bits": [28, 31], "name": "PERF_MODE2"}
11914   ]
11915  },
11916  "VGT_DMA_BASE_HI": {
11917   "fields": [
11918    {"bits": [0, 7], "name": "BASE_ADDR"}
11919   ]
11920  },
11921  "VGT_DMA_INDEX_TYPE": {
11922   "fields": [
11923    {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"},
11924    {"bits": [2, 3], "enum_ref": "VGT_DMA_SWAP_MODE", "name": "SWAP_MODE"},
11925    {"bits": [4, 5], "enum_ref": "VGT_DMA_BUF_TYPE", "name": "BUF_TYPE"},
11926    {"bits": [6, 6], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"},
11927    {"bits": [9, 9], "name": "NOT_EOP"},
11928    {"bits": [10, 10], "name": "REQ_PATH"},
11929    {"bits": [11, 12], "name": "MTYPE"}
11930   ]
11931  },
11932  "VGT_DRAW_INITIATOR": {
11933   "fields": [
11934    {"bits": [0, 1], "enum_ref": "VGT_DI_SOURCE_SELECT", "name": "SOURCE_SELECT"},
11935    {"bits": [2, 3], "enum_ref": "VGT_DI_MAJOR_MODE_SELECT", "name": "MAJOR_MODE"},
11936    {"bits": [4, 4], "name": "SPRITE_EN_R6XX"},
11937    {"bits": [5, 5], "name": "NOT_EOP"},
11938    {"bits": [6, 6], "name": "USE_OPAQUE"}
11939   ]
11940  },
11941  "VGT_ESGS_RING_ITEMSIZE": {
11942   "fields": [
11943    {"bits": [0, 14], "name": "ITEMSIZE"}
11944   ]
11945  },
11946  "VGT_ES_PER_GS": {
11947   "fields": [
11948    {"bits": [0, 10], "name": "ES_PER_GS"}
11949   ]
11950  },
11951  "VGT_EVENT_ADDRESS_REG": {
11952   "fields": [
11953    {"bits": [0, 27], "name": "ADDRESS_LOW"}
11954   ]
11955  },
11956  "VGT_EVENT_INITIATOR": {
11957   "fields": [
11958    {"bits": [0, 5], "enum_ref": "VGT_EVENT_TYPE", "name": "EVENT_TYPE"},
11959    {"bits": [18, 26], "name": "ADDRESS_HI"},
11960    {"bits": [27, 27], "name": "EXTENDED_EVENT"}
11961   ]
11962  },
11963  "VGT_GROUP_DECR": {
11964   "fields": [
11965    {"bits": [0, 3], "name": "DECR"}
11966   ]
11967  },
11968  "VGT_GROUP_FIRST_DECR": {
11969   "fields": [
11970    {"bits": [0, 3], "name": "FIRST_DECR"}
11971   ]
11972  },
11973  "VGT_GROUP_PRIM_TYPE": {
11974   "fields": [
11975    {"bits": [0, 4], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"},
11976    {"bits": [14, 14], "name": "RETAIN_ORDER"},
11977    {"bits": [15, 15], "name": "RETAIN_QUADS"},
11978    {"bits": [16, 18], "name": "PRIM_ORDER"}
11979   ]
11980  },
11981  "VGT_GROUP_VECT_0_CNTL": {
11982   "fields": [
11983    {"bits": [0, 0], "name": "COMP_X_EN"},
11984    {"bits": [1, 1], "name": "COMP_Y_EN"},
11985    {"bits": [2, 2], "name": "COMP_Z_EN"},
11986    {"bits": [3, 3], "name": "COMP_W_EN"},
11987    {"bits": [8, 15], "name": "STRIDE"},
11988    {"bits": [16, 23], "name": "SHIFT"}
11989   ]
11990  },
11991  "VGT_GROUP_VECT_0_FMT_CNTL": {
11992   "fields": [
11993    {"bits": [0, 3], "name": "X_CONV"},
11994    {"bits": [4, 7], "name": "X_OFFSET"},
11995    {"bits": [8, 11], "name": "Y_CONV"},
11996    {"bits": [12, 15], "name": "Y_OFFSET"},
11997    {"bits": [16, 19], "name": "Z_CONV"},
11998    {"bits": [20, 23], "name": "Z_OFFSET"},
11999    {"bits": [24, 27], "name": "W_CONV"},
12000    {"bits": [28, 31], "name": "W_OFFSET"}
12001   ]
12002  },
12003  "VGT_GSVS_RING_OFFSET_1": {
12004   "fields": [
12005    {"bits": [0, 14], "name": "OFFSET"}
12006   ]
12007  },
12008  "VGT_GS_INSTANCE_CNT": {
12009   "fields": [
12010    {"bits": [0, 0], "name": "ENABLE"},
12011    {"bits": [2, 8], "name": "CNT"}
12012   ]
12013  },
12014  "VGT_GS_MAX_VERT_OUT": {
12015   "fields": [
12016    {"bits": [0, 10], "name": "MAX_VERT_OUT"}
12017   ]
12018  },
12019  "VGT_GS_MODE": {
12020   "fields": [
12021    {"bits": [0, 2], "enum_ref": "VGT_GS_MODE_TYPE", "name": "MODE"},
12022    {"bits": [3, 3], "name": "RESERVED_0"},
12023    {"bits": [4, 5], "enum_ref": "VGT_GS_CUT_MODE", "name": "CUT_MODE"},
12024    {"bits": [6, 10], "name": "RESERVED_1"},
12025    {"bits": [11, 11], "name": "GS_C_PACK_EN"},
12026    {"bits": [12, 12], "name": "RESERVED_2"},
12027    {"bits": [13, 13], "name": "ES_PASSTHRU"},
12028    {"bits": [14, 14], "name": "RESERVED_3"},
12029    {"bits": [15, 15], "name": "RESERVED_4"},
12030    {"bits": [16, 16], "name": "RESERVED_5"},
12031    {"bits": [17, 17], "name": "PARTIAL_THD_AT_EOI"},
12032    {"bits": [18, 18], "name": "SUPPRESS_CUTS"},
12033    {"bits": [19, 19], "name": "ES_WRITE_OPTIMIZE"},
12034    {"bits": [20, 20], "name": "GS_WRITE_OPTIMIZE"},
12035    {"bits": [21, 22], "name": "ONCHIP"}
12036   ]
12037  },
12038  "VGT_GS_ONCHIP_CNTL": {
12039   "fields": [
12040    {"bits": [0, 10], "name": "ES_VERTS_PER_SUBGRP"},
12041    {"bits": [11, 21], "name": "GS_PRIMS_PER_SUBGRP"}
12042   ]
12043  },
12044  "VGT_GS_OUT_PRIM_TYPE": {
12045   "fields": [
12046    {"bits": [0, 5], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE"},
12047    {"bits": [8, 13], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_1"},
12048    {"bits": [16, 21], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_2"},
12049    {"bits": [22, 27], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_3"},
12050    {"bits": [31, 31], "name": "UNIQUE_TYPE_PER_STREAM"}
12051   ]
12052  },
12053  "VGT_GS_PER_ES": {
12054   "fields": [
12055    {"bits": [0, 10], "name": "GS_PER_ES"}
12056   ]
12057  },
12058  "VGT_GS_PER_VS": {
12059   "fields": [
12060    {"bits": [0, 3], "name": "GS_PER_VS"}
12061   ]
12062  },
12063  "VGT_HOS_CNTL": {
12064   "fields": [
12065    {"bits": [0, 1], "name": "TESS_MODE"}
12066   ]
12067  },
12068  "VGT_HOS_REUSE_DEPTH": {
12069   "fields": [
12070    {"bits": [0, 7], "name": "REUSE_DEPTH"}
12071   ]
12072  },
12073  "VGT_HS_OFFCHIP_PARAM": {
12074   "fields": [
12075    {"bits": [0, 8], "name": "OFFCHIP_BUFFERING"},
12076    {"bits": [9, 10], "enum_ref": "VGT_HS_OFFCHIP_PARAM__OFFCHIP_GRANULARITY", "name": "OFFCHIP_GRANULARITY"}
12077   ]
12078  },
12079  "VGT_LS_HS_CONFIG": {
12080   "fields": [
12081    {"bits": [0, 7], "name": "NUM_PATCHES"},
12082    {"bits": [8, 13], "name": "HS_NUM_INPUT_CP"},
12083    {"bits": [14, 19], "name": "HS_NUM_OUTPUT_CP"}
12084   ]
12085  },
12086  "VGT_MULTI_PRIM_IB_RESET_EN": {
12087   "fields": [
12088    {"bits": [0, 0], "name": "RESET_EN"}
12089   ]
12090  },
12091  "VGT_OUTPUT_PATH_CNTL": {
12092   "fields": [
12093    {"bits": [0, 2], "name": "PATH_SELECT"}
12094   ]
12095  },
12096  "VGT_OUT_DEALLOC_CNTL": {
12097   "fields": [
12098    {"bits": [0, 6], "name": "DEALLOC_DIST"}
12099   ]
12100  },
12101  "VGT_PERFCOUNTER2_SELECT": {
12102   "fields": [
12103    {"bits": [0, 7], "name": "PERF_SEL"},
12104    {"bits": [28, 31], "name": "PERF_MODE"}
12105   ]
12106  },
12107  "VGT_PERFCOUNTER_SEID_MASK": {
12108   "fields": [
12109    {"bits": [0, 7], "name": "PERF_SEID_IGNORE_MASK"}
12110   ]
12111  },
12112  "VGT_PRIMITIVEID_EN": {
12113   "fields": [
12114    {"bits": [0, 0], "name": "PRIMITIVEID_EN"},
12115    {"bits": [1, 1], "name": "DISABLE_RESET_ON_EOI"}
12116   ]
12117  },
12118  "VGT_PRIMITIVE_TYPE": {
12119   "fields": [
12120    {"bits": [0, 5], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"}
12121   ]
12122  },
12123  "VGT_REUSE_OFF": {
12124   "fields": [
12125    {"bits": [0, 0], "name": "REUSE_OFF"}
12126   ]
12127  },
12128  "VGT_SHADER_STAGES_EN": {
12129   "fields": [
12130    {"bits": [0, 1], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"},
12131    {"bits": [2, 2], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"},
12132    {"bits": [3, 4], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"},
12133    {"bits": [5, 5], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"},
12134    {"bits": [6, 7], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"},
12135    {"bits": [8, 8], "name": "DYNAMIC_HS"},
12136    {"bits": [9, 9], "name": "DISPATCH_DRAW_EN"},
12137    {"bits": [10, 10], "name": "DIS_DEALLOC_ACCUM_0"},
12138    {"bits": [11, 11], "name": "DIS_DEALLOC_ACCUM_1"},
12139    {"bits": [12, 12], "name": "VS_WAVE_ID_EN"}
12140   ]
12141  },
12142  "VGT_STRMOUT_BUFFER_CONFIG": {
12143   "fields": [
12144    {"bits": [0, 3], "name": "STREAM_0_BUFFER_EN"},
12145    {"bits": [4, 7], "name": "STREAM_1_BUFFER_EN"},
12146    {"bits": [8, 11], "name": "STREAM_2_BUFFER_EN"},
12147    {"bits": [12, 15], "name": "STREAM_3_BUFFER_EN"}
12148   ]
12149  },
12150  "VGT_STRMOUT_CONFIG": {
12151   "fields": [
12152    {"bits": [0, 0], "name": "STREAMOUT_0_EN"},
12153    {"bits": [1, 1], "name": "STREAMOUT_1_EN"},
12154    {"bits": [2, 2], "name": "STREAMOUT_2_EN"},
12155    {"bits": [3, 3], "name": "STREAMOUT_3_EN"},
12156    {"bits": [4, 6], "name": "RAST_STREAM"},
12157    {"bits": [8, 11], "name": "RAST_STREAM_MASK"},
12158    {"bits": [31, 31], "name": "USE_RAST_STREAM_MASK"}
12159   ]
12160  },
12161  "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE": {
12162   "fields": [
12163    {"bits": [0, 8], "name": "VERTEX_STRIDE"}
12164   ]
12165  },
12166  "VGT_STRMOUT_VTX_STRIDE_0": {
12167   "fields": [
12168    {"bits": [0, 9], "name": "STRIDE"}
12169   ]
12170  },
12171  "VGT_TESS_DISTRIBUTION": {
12172   "fields": [
12173    {"bits": [0, 7], "name": "ACCUM_ISOLINE"},
12174    {"bits": [8, 15], "name": "ACCUM_TRI"},
12175    {"bits": [16, 23], "name": "ACCUM_QUAD"}
12176   ]
12177  },
12178  "VGT_TF_PARAM": {
12179   "fields": [
12180    {"bits": [0, 1], "enum_ref": "VGT_TESS_TYPE", "name": "TYPE"},
12181    {"bits": [2, 4], "enum_ref": "VGT_TESS_PARTITION", "name": "PARTITIONING"},
12182    {"bits": [5, 7], "enum_ref": "VGT_TESS_TOPOLOGY", "name": "TOPOLOGY"},
12183    {"bits": [8, 8], "name": "RESERVED_REDUC_AXIS"},
12184    {"bits": [9, 9], "name": "DEPRECATED"},
12185    {"bits": [10, 13], "name": "NUM_DS_WAVES_PER_SIMD"},
12186    {"bits": [14, 14], "name": "DISABLE_DONUTS"},
12187    {"bits": [15, 15], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"},
12188    {"bits": [17, 18], "enum_ref": "VGT_DIST_MODE", "name": "DISTRIBUTION_MODE"},
12189    {"bits": [19, 20], "name": "MTYPE"}
12190   ]
12191  },
12192  "VGT_TF_RING_SIZE": {
12193   "fields": [
12194    {"bits": [0, 15], "name": "SIZE"}
12195   ]
12196  },
12197  "VGT_VERTEX_REUSE_BLOCK_CNTL": {
12198   "fields": [
12199    {"bits": [0, 7], "name": "VTX_REUSE_DEPTH"}
12200   ]
12201  },
12202  "VGT_VTX_CNT_EN": {
12203   "fields": [
12204    {"bits": [0, 0], "name": "VTX_CNT_EN"}
12205   ]
12206  }
12207 }
12208}
12209