1 /*
2 * Copyright (c) 2012
3 * MIPS Technologies, Inc., California.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. Neither the name of the MIPS Technologies, Inc., nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE MIPS TECHNOLOGIES, INC. ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE MIPS TECHNOLOGIES, INC. BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 * Author: Bojan Zivkovic (bojan@mips.com)
30 *
31 * MPEG Audio decoder optimized for MIPS fixed-point architecture
32 *
33 * This file is part of FFmpeg.
34 *
35 * FFmpeg is free software; you can redistribute it and/or
36 * modify it under the terms of the GNU Lesser General Public
37 * License as published by the Free Software Foundation; either
38 * version 2.1 of the License, or (at your option) any later version.
39 *
40 * FFmpeg is distributed in the hope that it will be useful,
41 * but WITHOUT ANY WARRANTY; without even the implied warranty of
42 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
43 * Lesser General Public License for more details.
44 *
45 * You should have received a copy of the GNU Lesser General Public
46 * License along with FFmpeg; if not, write to the Free Software
47 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
48 */
49
50 /**
51 * @file
52 * Reference: libavcodec/mpegaudiodsp_template.c
53 */
54
55 #include <string.h>
56
57 #include "config.h"
58 #include "libavutil/mips/asmdefs.h"
59 #include "libavcodec/mpegaudiodsp.h"
60
61 #if HAVE_INLINE_ASM
62 #if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
63
ff_mpadsp_apply_window_mips_fixed(int32_t *synth_buf, int32_t *window, int *dither_state, int16_t *samples, ptrdiff_t incr)64 static void ff_mpadsp_apply_window_mips_fixed(int32_t *synth_buf, int32_t *window,
65 int *dither_state, int16_t *samples, ptrdiff_t incr)
66 {
67 register const int32_t *w, *w2, *p;
68 int j;
69 int16_t *samples2;
70 int w_asm, p_asm, w_asm1, p_asm1, w_asm2, p_asm2;
71 int w2_asm, w2_asm1, *p_temp1, *p_temp2;
72 int sum1 = 0;
73 int const min_asm = -32768, max_asm = 32767;
74 int temp1, temp2 = 0, temp3 = 0;
75 int64_t sum;
76
77 /* copy to avoid wrap */
78 memcpy(synth_buf + 512, synth_buf, 32 * sizeof(*synth_buf));
79 samples2 = samples + 31 * incr;
80 w = window;
81 w2 = window + 31;
82 sum = *dither_state;
83 p = synth_buf + 16;
84 p_temp1 = synth_buf + 16;
85 p_temp2 = synth_buf + 48;
86 temp1 = sum;
87
88 /**
89 * use of round_sample function from the original code is eliminated,
90 * changed with appropriate assembly instructions.
91 */
92 __asm__ volatile (
93 "mthi $zero \n\t"
94 "mtlo %[temp1] \n\t"
95 "lw %[w_asm], 0(%[w]) \n\t"
96 "lw %[p_asm], 0(%[p]) \n\t"
97 "lw %[w_asm1], 64*4(%[w]) \n\t"
98 "lw %[p_asm1], 64*4(%[p]) \n\t"
99 "lw %[w_asm2], 128*4(%[w]) \n\t"
100 "lw %[p_asm2], 128*4(%[p]) \n\t"
101 "madd %[w_asm], %[p_asm] \n\t"
102 "madd %[w_asm1], %[p_asm1] \n\t"
103 "madd %[w_asm2], %[p_asm2] \n\t"
104 "lw %[w_asm], 192*4(%[w]) \n\t"
105 "lw %[p_asm], 192*4(%[p]) \n\t"
106 "lw %[w_asm1], 256*4(%[w]) \n\t"
107 "lw %[p_asm1], 256*4(%[p]) \n\t"
108 "lw %[w_asm2], 320*4(%[w]) \n\t"
109 "lw %[p_asm2], 320*4(%[p]) \n\t"
110 "madd %[w_asm], %[p_asm] \n\t"
111 "madd %[w_asm1], %[p_asm1] \n\t"
112 "madd %[w_asm2], %[p_asm2] \n\t"
113 "lw %[w_asm], 384*4(%[w]) \n\t"
114 "lw %[p_asm], 384*4(%[p]) \n\t"
115 "lw %[w_asm1], 448*4(%[w]) \n\t"
116 "lw %[p_asm1], 448*4(%[p]) \n\t"
117 "lw %[w_asm2], 32*4(%[w]) \n\t"
118 "lw %[p_asm2], 32*4(%[p]) \n\t"
119 "madd %[w_asm], %[p_asm] \n\t"
120 "madd %[w_asm1], %[p_asm1] \n\t"
121 "msub %[w_asm2], %[p_asm2] \n\t"
122 "lw %[w_asm], 96*4(%[w]) \n\t"
123 "lw %[p_asm], 96*4(%[p]) \n\t"
124 "lw %[w_asm1], 160*4(%[w]) \n\t"
125 "lw %[p_asm1], 160*4(%[p]) \n\t"
126 "lw %[w_asm2], 224*4(%[w]) \n\t"
127 "lw %[p_asm2], 224*4(%[p]) \n\t"
128 "msub %[w_asm], %[p_asm] \n\t"
129 "msub %[w_asm1], %[p_asm1] \n\t"
130 "msub %[w_asm2], %[p_asm2] \n\t"
131 "lw %[w_asm], 288*4(%[w]) \n\t"
132 "lw %[p_asm], 288*4(%[p]) \n\t"
133 "lw %[w_asm1], 352*4(%[w]) \n\t"
134 "lw %[p_asm1], 352*4(%[p]) \n\t"
135 "msub %[w_asm], %[p_asm] \n\t"
136 "lw %[w_asm], 480*4(%[w]) \n\t"
137 "lw %[p_asm], 480*4(%[p]) \n\t"
138 "lw %[w_asm2], 416*4(%[w]) \n\t"
139 "lw %[p_asm2], 416*4(%[p]) \n\t"
140 "msub %[w_asm], %[p_asm] \n\t"
141 "msub %[w_asm1], %[p_asm1] \n\t"
142 "msub %[w_asm2], %[p_asm2] \n\t"
143
144 /*round_sample function from the original code is eliminated,
145 * changed with appropriate assembly instructions
146 * code example:
147
148 "extr.w %[sum1],$ac0,24 \n\t"
149 "mflo %[temp3], $ac0 \n\t"
150 "and %[temp1], %[temp3], 0x00ffffff \n\t"
151 "slt %[temp2], %[sum1], %[min_asm] \n\t"
152 "movn %[sum1], %[min_asm],%[temp2] \n\t"
153 "slt %[temp2], %[max_asm],%[sum1] \n\t"
154 "movn %[sum1], %[max_asm],%[temp2] \n\t"
155 "sh %[sum1], 0(%[samples]) \n\t"
156 */
157
158 "extr.w %[sum1], $ac0, 24 \n\t"
159 "mflo %[temp3] \n\t"
160 PTR_ADDIU "%[w], %[w], 4 \n\t"
161 "and %[temp1], %[temp3], 0x00ffffff \n\t"
162 "slt %[temp2], %[sum1], %[min_asm] \n\t"
163 "movn %[sum1], %[min_asm], %[temp2] \n\t"
164 "slt %[temp2], %[max_asm], %[sum1] \n\t"
165 "movn %[sum1], %[max_asm], %[temp2] \n\t"
166 "sh %[sum1], 0(%[samples]) \n\t"
167
168 : [w_asm] "=&r" (w_asm), [p_asm] "=&r" (p_asm), [w_asm1] "=&r" (w_asm1),
169 [p_asm1] "=&r" (p_asm1), [temp1] "+r" (temp1), [temp2] "+r" (temp2),
170 [w_asm2] "=&r" (w_asm2), [p_asm2] "=&r" (p_asm2),
171 [sum1] "+r" (sum1), [w] "+r" (w), [temp3] "+r" (temp3)
172 : [p] "r" (p), [samples] "r" (samples), [min_asm] "r" (min_asm),
173 [max_asm] "r" (max_asm)
174 : "memory", "hi","lo"
175 );
176
177 samples += incr;
178
179 /* we calculate two samples at the same time to avoid one memory
180 access per two sample */
181
182 for(j = 1; j < 16; j++) {
183 __asm__ volatile (
184 "mthi $0, $ac1 \n\t"
185 "mtlo $0, $ac1 \n\t"
186 "mthi $0 \n\t"
187 "mtlo %[temp1] \n\t"
188 PTR_ADDIU "%[p_temp1], %[p_temp1], 4 \n\t"
189 "lw %[w_asm], 0(%[w]) \n\t"
190 "lw %[p_asm], 0(%[p_temp1]) \n\t"
191 "lw %[w2_asm], 0(%[w2]) \n\t"
192 "lw %[w_asm1], 64*4(%[w]) \n\t"
193 "lw %[p_asm1], 64*4(%[p_temp1]) \n\t"
194 "lw %[w2_asm1], 64*4(%[w2]) \n\t"
195 "madd %[w_asm], %[p_asm] \n\t"
196 "msub $ac1, %[w2_asm], %[p_asm] \n\t"
197 "madd %[w_asm1], %[p_asm1] \n\t"
198 "msub $ac1, %[w2_asm1], %[p_asm1] \n\t"
199 "lw %[w_asm], 128*4(%[w]) \n\t"
200 "lw %[p_asm], 128*4(%[p_temp1]) \n\t"
201 "lw %[w2_asm], 128*4(%[w2]) \n\t"
202 "lw %[w_asm1], 192*4(%[w]) \n\t"
203 "lw %[p_asm1], 192*4(%[p_temp1]) \n\t"
204 "lw %[w2_asm1], 192*4(%[w2]) \n\t"
205 "madd %[w_asm], %[p_asm] \n\t"
206 "msub $ac1, %[w2_asm], %[p_asm] \n\t"
207 "madd %[w_asm1], %[p_asm1] \n\t"
208 "msub $ac1, %[w2_asm1], %[p_asm1] \n\t"
209 "lw %[w_asm], 256*4(%[w]) \n\t"
210 "lw %[p_asm], 256*4(%[p_temp1]) \n\t"
211 "lw %[w2_asm], 256*4(%[w2]) \n\t"
212 "lw %[w_asm1], 320*4(%[w]) \n\t"
213 "lw %[p_asm1], 320*4(%[p_temp1]) \n\t"
214 "lw %[w2_asm1], 320*4(%[w2]) \n\t"
215 "madd %[w_asm], %[p_asm] \n\t"
216 "msub $ac1, %[w2_asm], %[p_asm] \n\t"
217 "madd %[w_asm1], %[p_asm1] \n\t"
218 "msub $ac1, %[w2_asm1], %[p_asm1] \n\t"
219 "lw %[w_asm], 384*4(%[w]) \n\t"
220 "lw %[p_asm], 384*4(%[p_temp1]) \n\t"
221 "lw %[w2_asm], 384*4(%[w2]) \n\t"
222 "lw %[w_asm1], 448*4(%[w]) \n\t"
223 "lw %[p_asm1], 448*4(%[p_temp1]) \n\t"
224 "lw %[w2_asm1], 448*4(%[w2]) \n\t"
225 "madd %[w_asm], %[p_asm] \n\t"
226 "msub $ac1, %[w2_asm], %[p_asm] \n\t"
227 "madd %[w_asm1], %[p_asm1] \n\t"
228 "msub $ac1, %[w2_asm1], %[p_asm1] \n\t"
229 PTR_ADDIU "%[p_temp2], %[p_temp2], -4 \n\t"
230 "lw %[w_asm], 32*4(%[w]) \n\t"
231 "lw %[p_asm], 0(%[p_temp2]) \n\t"
232 "lw %[w2_asm], 32*4(%[w2]) \n\t"
233 "lw %[w_asm1], 96*4(%[w]) \n\t"
234 "lw %[p_asm1], 64*4(%[p_temp2]) \n\t"
235 "lw %[w2_asm1], 96*4(%[w2]) \n\t"
236 "msub %[w_asm], %[p_asm] \n\t"
237 "msub $ac1, %[w2_asm], %[p_asm] \n\t"
238 "msub %[w_asm1], %[p_asm1] \n\t"
239 "msub $ac1, %[w2_asm1], %[p_asm1] \n\t"
240 "lw %[w_asm], 160*4(%[w]) \n\t"
241 "lw %[p_asm], 128*4(%[p_temp2]) \n\t"
242 "lw %[w2_asm], 160*4(%[w2]) \n\t"
243 "lw %[w_asm1], 224*4(%[w]) \n\t"
244 "lw %[p_asm1], 192*4(%[p_temp2]) \n\t"
245 "lw %[w2_asm1], 224*4(%[w2]) \n\t"
246 "msub %[w_asm], %[p_asm] \n\t"
247 "msub $ac1, %[w2_asm], %[p_asm] \n\t"
248 "msub %[w_asm1], %[p_asm1] \n\t"
249 "msub $ac1, %[w2_asm1], %[p_asm1] \n\t"
250 "lw %[w_asm], 288*4(%[w]) \n\t"
251 "lw %[p_asm], 256*4(%[p_temp2]) \n\t"
252 "lw %[w2_asm], 288*4(%[w2]) \n\t"
253 "lw %[w_asm1], 352*4(%[w]) \n\t"
254 "lw %[p_asm1], 320*4(%[p_temp2]) \n\t"
255 "lw %[w2_asm1], 352*4(%[w2]) \n\t"
256 "msub %[w_asm], %[p_asm] \n\t"
257 "msub $ac1, %[w2_asm], %[p_asm] \n\t"
258 "msub %[w_asm1], %[p_asm1] \n\t"
259 "msub $ac1, %[w2_asm1], %[p_asm1] \n\t"
260 "lw %[w_asm], 416*4(%[w]) \n\t"
261 "lw %[p_asm], 384*4(%[p_temp2]) \n\t"
262 "lw %[w2_asm], 416*4(%[w2]) \n\t"
263 "lw %[w_asm1], 480*4(%[w]) \n\t"
264 "lw %[p_asm1], 448*4(%[p_temp2]) \n\t"
265 "lw %[w2_asm1], 480*4(%[w2]) \n\t"
266 "msub %[w_asm], %[p_asm] \n\t"
267 "msub %[w_asm1], %[p_asm1] \n\t"
268 "msub $ac1, %[w2_asm], %[p_asm] \n\t"
269 "msub $ac1, %[w2_asm1], %[p_asm1] \n\t"
270 PTR_ADDIU "%[w], %[w], 4 \n\t"
271 PTR_ADDIU "%[w2], %[w2], -4 \n\t"
272 "mflo %[temp2] \n\t"
273 "extr.w %[sum1], $ac0, 24 \n\t"
274 "li %[temp3], 1 \n\t"
275 "and %[temp1], %[temp2], 0x00ffffff \n\t"
276 "madd $ac1, %[temp1], %[temp3] \n\t"
277 "slt %[temp2], %[sum1], %[min_asm] \n\t"
278 "movn %[sum1], %[min_asm], %[temp2] \n\t"
279 "slt %[temp2], %[max_asm], %[sum1] \n\t"
280 "movn %[sum1], %[max_asm], %[temp2] \n\t"
281 "sh %[sum1], 0(%[samples]) \n\t"
282 "mflo %[temp3], $ac1 \n\t"
283 "extr.w %[sum1], $ac1, 24 \n\t"
284 "and %[temp1], %[temp3], 0x00ffffff \n\t"
285 "slt %[temp2], %[sum1], %[min_asm] \n\t"
286 "movn %[sum1], %[min_asm], %[temp2] \n\t"
287 "slt %[temp2], %[max_asm], %[sum1] \n\t"
288 "movn %[sum1], %[max_asm], %[temp2] \n\t"
289 "sh %[sum1], 0(%[samples2]) \n\t"
290
291 : [w_asm] "=&r" (w_asm), [p_asm] "=&r" (p_asm), [w_asm1] "=&r" (w_asm1),
292 [p_asm1] "=&r" (p_asm1), [w2_asm1] "=&r" (w2_asm1),
293 [w2_asm] "=&r" (w2_asm), [temp1] "+r" (temp1), [temp2] "+r" (temp2),
294 [p_temp1] "+r" (p_temp1), [p_temp2] "+r" (p_temp2), [sum1] "+r" (sum1),
295 [w] "+r" (w), [w2] "+r" (w2), [samples] "+r" (samples),
296 [samples2] "+r" (samples2), [temp3] "+r" (temp3)
297 : [min_asm] "r" (min_asm), [max_asm] "r" (max_asm)
298 : "memory", "hi", "lo", "$ac1hi", "$ac1lo"
299 );
300
301 samples += incr;
302 samples2 -= incr;
303 }
304
305 p = synth_buf + 32;
306
307 __asm__ volatile (
308 "mthi $0 \n\t"
309 "mtlo %[temp1] \n\t"
310 "lw %[w_asm], 32*4(%[w]) \n\t"
311 "lw %[p_asm], 0(%[p]) \n\t"
312 "lw %[w_asm1], 96*4(%[w]) \n\t"
313 "lw %[p_asm1], 64*4(%[p]) \n\t"
314 "lw %[w_asm2], 160*4(%[w]) \n\t"
315 "lw %[p_asm2], 128*4(%[p]) \n\t"
316 "msub %[w_asm], %[p_asm] \n\t"
317 "msub %[w_asm1], %[p_asm1] \n\t"
318 "msub %[w_asm2], %[p_asm2] \n\t"
319 "lw %[w_asm], 224*4(%[w]) \n\t"
320 "lw %[p_asm], 192*4(%[p]) \n\t"
321 "lw %[w_asm1], 288*4(%[w]) \n\t"
322 "lw %[p_asm1], 256*4(%[p]) \n\t"
323 "lw %[w_asm2], 352*4(%[w]) \n\t"
324 "lw %[p_asm2], 320*4(%[p]) \n\t"
325 "msub %[w_asm], %[p_asm] \n\t"
326 "msub %[w_asm1], %[p_asm1] \n\t"
327 "msub %[w_asm2], %[p_asm2] \n\t"
328 "lw %[w_asm], 416*4(%[w]) \n\t"
329 "lw %[p_asm], 384*4(%[p]) \n\t"
330 "lw %[w_asm1], 480*4(%[w]) \n\t"
331 "lw %[p_asm1], 448*4(%[p]) \n\t"
332 "msub %[w_asm], %[p_asm] \n\t"
333 "msub %[w_asm1], %[p_asm1] \n\t"
334 "extr.w %[sum1], $ac0, 24 \n\t"
335 "mflo %[temp2] \n\t"
336 "and %[temp1], %[temp2], 0x00ffffff \n\t"
337 "slt %[temp2], %[sum1], %[min_asm] \n\t"
338 "movn %[sum1], %[min_asm], %[temp2] \n\t"
339 "slt %[temp2], %[max_asm], %[sum1] \n\t"
340 "movn %[sum1], %[max_asm], %[temp2] \n\t"
341 "sh %[sum1], 0(%[samples]) \n\t"
342
343 : [w_asm] "=&r" (w_asm), [p_asm] "=&r" (p_asm), [w_asm1] "=&r" (w_asm1),
344 [p_asm1] "=&r" (p_asm1), [temp1] "+r" (temp1), [temp2] "+r" (temp2),
345 [w_asm2] "=&r" (w_asm2), [p_asm2] "=&r" (p_asm2), [sum1] "+r" (sum1)
346 : [w] "r" (w), [p] "r" (p), [samples] "r" (samples), [min_asm] "r" (min_asm),
347 [max_asm] "r" (max_asm)
348 : "memory", "hi", "lo", "$ac1hi", "$ac1lo"
349 );
350
351 *dither_state= temp1;
352 }
353
imdct36_mips_fixed(int *out, int *buf, int *in, int *win)354 static void imdct36_mips_fixed(int *out, int *buf, int *in, int *win)
355 {
356 int j;
357 int t0, t1, t2, t3, s0, s1, s2, s3;
358 int tmp[18], *tmp1, *in1;
359 /* temporary variables */
360 int temp_reg1, temp_reg2, temp_reg3, temp_reg4, temp_reg5, temp_reg6;
361 int t4, t5, t6, t8, t7;
362
363 /* values defined in macros and tables are
364 * eliminated - they are directly loaded in appropriate variables
365 */
366 int const C_1 = 4229717092; /* cos(pi*1/18)*2 */
367 int const C_2 = 4035949074; /* cos(pi*2/18)*2 */
368 int const C_3 = 575416510; /* -cos(pi*3/18)*2 */
369 int const C_3A = 3719550786; /* cos(pi*3/18)*2 */
370 int const C_4 = 1004831466; /* -cos(pi*4/18)*2 */
371 int const C_5 = 1534215534; /* -cos(pi*5/18)*2 */
372 int const C_7 = -1468965330; /* -cos(pi*7/18)*2 */
373 int const C_8 = -745813244; /* -cos(pi*8/18)*2 */
374
375 /*
376 * instructions of the first two loops are reorganized and loops are unrolled,
377 * in order to eliminate unnecessary readings and writings in array
378 */
379
380 __asm__ volatile (
381 "lw %[t1], 17*4(%[in]) \n\t"
382 "lw %[t2], 16*4(%[in]) \n\t"
383 "lw %[t3], 15*4(%[in]) \n\t"
384 "lw %[t4], 14*4(%[in]) \n\t"
385 "addu %[t1], %[t1], %[t2] \n\t"
386 "addu %[t2], %[t2], %[t3] \n\t"
387 "addu %[t3], %[t3], %[t4] \n\t"
388 "lw %[t5], 13*4(%[in]) \n\t"
389 "addu %[t1], %[t1], %[t3] \n\t"
390 "sw %[t2], 16*4(%[in]) \n\t"
391 "lw %[t6], 12*4(%[in]) \n\t"
392 "sw %[t1], 17*4(%[in]) \n\t"
393 "addu %[t4], %[t4], %[t5] \n\t"
394 "addu %[t5], %[t5], %[t6] \n\t"
395 "lw %[t7], 11*4(%[in]) \n\t"
396 "addu %[t3], %[t3], %[t5] \n\t"
397 "sw %[t4], 14*4(%[in]) \n\t"
398 "lw %[t8], 10*4(%[in]) \n\t"
399 "sw %[t3], 15*4(%[in]) \n\t"
400 "addu %[t6], %[t6], %[t7] \n\t"
401 "addu %[t7], %[t7], %[t8] \n\t"
402 "sw %[t6], 12*4(%[in]) \n\t"
403 "addu %[t5], %[t5], %[t7] \n\t"
404 "lw %[t1], 9*4(%[in]) \n\t"
405 "lw %[t2], 8*4(%[in]) \n\t"
406 "sw %[t5], 13*4(%[in]) \n\t"
407 "addu %[t8], %[t8], %[t1] \n\t"
408 "addu %[t1], %[t1], %[t2] \n\t"
409 "sw %[t8], 10*4(%[in]) \n\t"
410 "addu %[t7], %[t7], %[t1] \n\t"
411 "lw %[t3], 7*4(%[in]) \n\t"
412 "lw %[t4], 6*4(%[in]) \n\t"
413 "sw %[t7], 11*4(%[in]) \n\t"
414 "addu %[t2], %[t2], %[t3] \n\t"
415 "addu %[t3], %[t3], %[t4] \n\t"
416 "sw %[t2], 8*4(%[in]) \n\t"
417 "addu %[t1], %[t1], %[t3] \n\t"
418 "lw %[t5], 5*4(%[in]) \n\t"
419 "lw %[t6], 4*4(%[in]) \n\t"
420 "sw %[t1], 9*4(%[in]) \n\t"
421 "addu %[t4], %[t4], %[t5] \n\t"
422 "addu %[t5], %[t5], %[t6] \n\t"
423 "sw %[t4], 6*4(%[in]) \n\t"
424 "addu %[t3], %[t3], %[t5] \n\t"
425 "lw %[t7], 3*4(%[in]) \n\t"
426 "lw %[t8], 2*4(%[in]) \n\t"
427 "sw %[t3], 7*4(%[in]) \n\t"
428 "addu %[t6], %[t6], %[t7] \n\t"
429 "addu %[t7], %[t7], %[t8] \n\t"
430 "sw %[t6], 4*4(%[in]) \n\t"
431 "addu %[t5], %[t5], %[t7] \n\t"
432 "lw %[t1], 1*4(%[in]) \n\t"
433 "lw %[t2], 0*4(%[in]) \n\t"
434 "sw %[t5], 5*4(%[in]) \n\t"
435 "addu %[t8], %[t8], %[t1] \n\t"
436 "addu %[t1], %[t1], %[t2] \n\t"
437 "sw %[t8], 2*4(%[in]) \n\t"
438 "addu %[t7], %[t7], %[t1] \n\t"
439 "sw %[t7], 3*4(%[in]) \n\t"
440 "sw %[t1], 1*4(%[in]) \n\t"
441
442 : [in] "+r" (in), [t1] "=&r" (t1), [t2] "=&r" (t2), [t3] "=&r" (t3),
443 [t4] "=&r" (t4), [t5] "=&r" (t5), [t6] "=&r" (t6),
444 [t7] "=&r" (t7), [t8] "=&r" (t8)
445 :
446 : "memory"
447 );
448
449 for(j = 0; j < 2; j++) {
450
451 tmp1 = tmp + j;
452 in1 = in + j;
453
454 /**
455 * Original constants are multiplied by two in advanced
456 * for assembly optimization (e.g. C_2 = 2 * C2).
457 * That can lead to overflow in operations where they are used.
458 *
459 * Example of the solution:
460 *
461 * in original code:
462 * t0 = ((int64_t)(in1[2*2] + in1[2*4]) * (int64_t)(2*C2))>>32
463 *
464 * in assembly:
465 * C_2 = 2 * C2;
466 * .
467 * .
468 * "lw %[t7], 4*4(%[in1]) \n\t"
469 * "lw %[t8], 8*4(%[in1]) \n\t"
470 * "addu %[temp_reg2],%[t7], %[t8] \n\t"
471 * "multu %[C_2], %[temp_reg2] \n\t"
472 * "mfhi %[temp_reg1] \n\t"
473 * "sra %[temp_reg2],%[temp_reg2],31 \n\t"
474 * "move %[t0], $0 \n\t"
475 * "movn %[t0], %[C_2], %[temp_reg2] \n\t"
476 * "sub %[t0], %[temp_reg1],%[t0] \n\t"
477 */
478
479 __asm__ volatile (
480 "lw %[t7], 4*4(%[in1]) \n\t"
481 "lw %[t8], 8*4(%[in1]) \n\t"
482 "lw %[t6], 16*4(%[in1]) \n\t"
483 "lw %[t4], 0*4(%[in1]) \n\t"
484 "addu %[temp_reg2], %[t7], %[t8] \n\t"
485 "addu %[t2], %[t6], %[t8] \n\t"
486 "multu %[C_2], %[temp_reg2] \n\t"
487 "lw %[t5], 12*4(%[in1]) \n\t"
488 "sub %[t2], %[t2], %[t7] \n\t"
489 "sub %[t1], %[t4], %[t5] \n\t"
490 "sra %[t3], %[t5], 1 \n\t"
491 "sra %[temp_reg1], %[t2], 1 \n\t"
492 "addu %[t3], %[t3], %[t4] \n\t"
493 "sub %[temp_reg1], %[t1], %[temp_reg1] \n\t"
494 "sra %[temp_reg2], %[temp_reg2], 31 \n\t"
495 "sw %[temp_reg1], 6*4(%[tmp1]) \n\t"
496 "move %[t0], $0 \n\t"
497 "movn %[t0], %[C_2], %[temp_reg2] \n\t"
498 "mfhi %[temp_reg1] \n\t"
499 "addu %[t1], %[t1], %[t2] \n\t"
500 "sw %[t1], 16*4(%[tmp1]) \n\t"
501 "sub %[temp_reg4], %[t8], %[t6] \n\t"
502 "add %[temp_reg2], %[t7], %[t6] \n\t"
503 "mult $ac1, %[C_8], %[temp_reg4] \n\t"
504 "multu $ac2, %[C_4], %[temp_reg2] \n\t"
505 "sub %[t0], %[temp_reg1], %[t0] \n\t"
506 "sra %[temp_reg1], %[temp_reg2], 31 \n\t"
507 "move %[t2], $0 \n\t"
508 "movn %[t2], %[C_4], %[temp_reg1] \n\t"
509 "mfhi %[t1], $ac1 \n\t"
510 "mfhi %[temp_reg1], $ac2 \n\t"
511 "lw %[t6], 10*4(%[in1]) \n\t"
512 "lw %[t8], 14*4(%[in1]) \n\t"
513 "lw %[t7], 2*4(%[in1]) \n\t"
514 "lw %[t4], 6*4(%[in1]) \n\t"
515 "sub %[temp_reg3], %[t3], %[t0] \n\t"
516 "add %[temp_reg4], %[t3], %[t0] \n\t"
517 "sub %[temp_reg1], %[temp_reg1], %[temp_reg2] \n\t"
518 "add %[temp_reg4], %[temp_reg4], %[t1] \n\t"
519 "sub %[t2], %[temp_reg1], %[t2] \n\t"
520 "sw %[temp_reg4], 2*4(%[tmp1]) \n\t"
521 "sub %[temp_reg3], %[temp_reg3], %[t2] \n\t"
522 "add %[temp_reg1], %[t3], %[t2] \n\t"
523 "sw %[temp_reg3], 10*4(%[tmp1]) \n\t"
524 "sub %[temp_reg1], %[temp_reg1], %[t1] \n\t"
525 "addu %[temp_reg2], %[t6], %[t8] \n\t"
526 "sw %[temp_reg1], 14*4(%[tmp1]) \n\t"
527 "sub %[temp_reg2], %[temp_reg2], %[t7] \n\t"
528 "addu %[temp_reg3], %[t7], %[t6] \n\t"
529 "multu $ac3, %[C_3], %[temp_reg2] \n\t"
530 "multu %[C_1], %[temp_reg3] \n\t"
531 "sra %[temp_reg1], %[temp_reg2], 31 \n\t"
532 "move %[t1], $0 \n\t"
533 "sra %[temp_reg3], %[temp_reg3], 31 \n\t"
534 "movn %[t1], %[C_3], %[temp_reg1] \n\t"
535 "mfhi %[temp_reg1], $ac3 \n\t"
536 "mfhi %[temp_reg4] \n\t"
537 "move %[t2], $0 \n\t"
538 "movn %[t2], %[C_1], %[temp_reg3] \n\t"
539 "sub %[temp_reg3], %[t6], %[t8] \n\t"
540 "sub %[t2], %[temp_reg4], %[t2] \n\t"
541 "multu $ac1, %[C_7], %[temp_reg3] \n\t"
542 "sub %[temp_reg1], %[temp_reg1], %[temp_reg2] \n\t"
543 "sra %[temp_reg4], %[temp_reg3], 31 \n\t"
544 "sub %[t1], %[temp_reg1], %[t1] \n\t"
545 "move %[t3], $0 \n\t"
546 "sw %[t1], 4*4(%[tmp1]) \n\t"
547 "movn %[t3], %[C_7], %[temp_reg4] \n\t"
548 "multu $ac2, %[C_3A], %[t4] \n\t"
549 "add %[temp_reg2], %[t7], %[t8] \n\t"
550 "move %[t1], $0 \n\t"
551 "mfhi %[temp_reg4], $ac1 \n\t"
552 "multu $ac3,%[C_5], %[temp_reg2] \n\t"
553 "move %[t0], $0 \n\t"
554 "sra %[temp_reg1], %[temp_reg2], 31 \n\t"
555 "movn %[t1],%[C_5], %[temp_reg1] \n\t"
556 "sub %[temp_reg4], %[temp_reg4], %[temp_reg3] \n\t"
557 "mfhi %[temp_reg1], $ac3 \n\t"
558 "sra %[temp_reg3], %[t4], 31 \n\t"
559 "movn %[t0], %[C_3A], %[temp_reg3] \n\t"
560 "mfhi %[temp_reg3], $ac2 \n\t"
561 "sub %[t3], %[temp_reg4], %[t3] \n\t"
562 "add %[temp_reg4], %[t3], %[t2] \n\t"
563 "sub %[temp_reg1], %[temp_reg1], %[temp_reg2] \n\t"
564 "sub %[t1], %[temp_reg1], %[t1] \n\t"
565 "sub %[t0], %[temp_reg3], %[t0] \n\t"
566 "add %[temp_reg1], %[t2], %[t1] \n\t"
567 "add %[temp_reg4], %[temp_reg4], %[t0] \n\t"
568 "sub %[temp_reg2], %[t3], %[t1] \n\t"
569 "sw %[temp_reg4], 0*4(%[tmp1]) \n\t"
570 "sub %[temp_reg1], %[temp_reg1], %[t0] \n\t"
571 "sub %[temp_reg2], %[temp_reg2], %[t0] \n\t"
572 "sw %[temp_reg1], 12*4(%[tmp1]) \n\t"
573 "sw %[temp_reg2], 8*4(%[tmp1]) \n\t"
574
575 : [t7] "=&r" (t7), [temp_reg1] "=&r" (temp_reg1),
576 [temp_reg2] "=&r" (temp_reg2), [temp_reg4] "=&r" (temp_reg4),
577 [temp_reg3] "=&r" (temp_reg3), [t8] "=&r" (t8), [t0] "=&r" (t0),
578 [t4] "=&r" (t4), [t5] "=&r" (t5), [t6] "=&r"(t6), [t2] "=&r" (t2),
579 [t3] "=&r" (t3), [t1] "=&r" (t1)
580 : [C_2] "r" (C_2), [in1] "r" (in1), [tmp1] "r" (tmp1), [C_8] "r" (C_8),
581 [C_4] "r" (C_4), [C_3] "r" (C_3), [C_1] "r" (C_1), [C_7] "r" (C_7),
582 [C_3A] "r" (C_3A), [C_5] "r" (C_5)
583 : "memory", "hi", "lo", "$ac1hi", "$ac1lo", "$ac2hi", "$ac2lo",
584 "$ac3hi", "$ac3lo"
585 );
586 }
587
588 /**
589 * loop is unrolled four times
590 *
591 * values defined in tables(icos36[] and icos36h[]) are not loaded from
592 * these tables - they are directly loaded in appropriate registers
593 *
594 */
595
596 __asm__ volatile (
597 "lw %[t2], 1*4(%[tmp]) \n\t"
598 "lw %[t3], 3*4(%[tmp]) \n\t"
599 "lw %[t0], 0*4(%[tmp]) \n\t"
600 "lw %[t1], 2*4(%[tmp]) \n\t"
601 "addu %[temp_reg1], %[t3], %[t2] \n\t"
602 "li %[temp_reg2], 0x807D2B1E \n\t"
603 "move %[s1], $0 \n\t"
604 "multu %[temp_reg2], %[temp_reg1] \n\t"
605 "sra %[temp_reg1], %[temp_reg1], 31 \n\t"
606 "movn %[s1], %[temp_reg2], %[temp_reg1] \n\t"
607 "sub %[temp_reg3], %[t3], %[t2] \n\t"
608 "li %[temp_reg4], 0x2de5151 \n\t"
609 "mfhi %[temp_reg2] \n\t"
610 "addu %[s0], %[t1], %[t0] \n\t"
611 "lw %[temp_reg5], 9*4(%[win]) \n\t"
612 "mult $ac1, %[temp_reg4], %[temp_reg3] \n\t"
613 "lw %[temp_reg6], 4*9*4(%[buf]) \n\t"
614 "sub %[s2], %[t1], %[t0] \n\t"
615 "lw %[temp_reg3], 29*4(%[win]) \n\t"
616 "subu %[s1], %[temp_reg2], %[s1] \n\t"
617 "lw %[temp_reg4], 28*4(%[win]) \n\t"
618 "add %[t0], %[s0], %[s1] \n\t"
619 "extr.w %[s3], $ac1,23 \n\t"
620 "mult $ac2, %[t0], %[temp_reg3] \n\t"
621 "sub %[t1], %[s0], %[s1] \n\t"
622 "lw %[temp_reg1], 4*8*4(%[buf]) \n\t"
623 "mult %[t1], %[temp_reg5] \n\t"
624 "lw %[temp_reg2], 8*4(%[win]) \n\t"
625 "mfhi %[temp_reg3], $ac2 \n\t"
626 "mult $ac3, %[t0], %[temp_reg4] \n\t"
627 "add %[t0], %[s2], %[s3] \n\t"
628 "mfhi %[temp_reg5] \n\t"
629 "mult $ac1, %[t1], %[temp_reg2] \n\t"
630 "sub %[t1], %[s2], %[s3] \n\t"
631 "sw %[temp_reg3], 4*9*4(%[buf]) \n\t"
632 "mfhi %[temp_reg4], $ac3 \n\t"
633 "lw %[temp_reg3], 37*4(%[win]) \n\t"
634 "mfhi %[temp_reg2], $ac1 \n\t"
635 "add %[temp_reg5], %[temp_reg5], %[temp_reg6] \n\t"
636 "lw %[temp_reg6], 17*4(%[win]) \n\t"
637 "sw %[temp_reg5], 32*9*4(%[out]) \n\t"
638 "sw %[temp_reg4], 4*8*4(%[buf]) \n\t"
639 "mult %[t1], %[temp_reg6] \n\t"
640 "add %[temp_reg1], %[temp_reg1], %[temp_reg2] \n\t"
641 "lw %[temp_reg2], 0*4(%[win]) \n\t"
642 "lw %[temp_reg5], 4*17*4(%[buf]) \n\t"
643 "sw %[temp_reg1], 8*32*4(%[out]) \n\t"
644 "mfhi %[temp_reg6] \n\t"
645 "mult $ac1, %[t1], %[temp_reg2] \n\t"
646 "lw %[temp_reg4], 20*4(%[win]) \n\t"
647 "lw %[temp_reg1], 0(%[buf]) \n\t"
648 "mult $ac2, %[t0], %[temp_reg3] \n\t"
649 "mult %[t0], %[temp_reg4] \n\t"
650 "mfhi %[temp_reg2], $ac1 \n\t"
651 "lw %[t0], 4*4(%[tmp]) \n\t"
652 "add %[temp_reg5], %[temp_reg5], %[temp_reg6] \n\t"
653 "mfhi %[temp_reg3], $ac2 \n\t"
654 "mfhi %[temp_reg4] \n\t"
655 "sw %[temp_reg5], 17*32*4(%[out]) \n\t"
656 "lw %[t1], 6*4(%[tmp]) \n\t"
657 "add %[temp_reg1], %[temp_reg1], %[temp_reg2] \n\t"
658 "lw %[t2], 5*4(%[tmp]) \n\t"
659 "sw %[temp_reg1], 0*32*4(%[out]) \n\t"
660 "addu %[s0], %[t1], %[t0] \n\t"
661 "sw %[temp_reg3], 4*17*4(%[buf]) \n\t"
662 "lw %[t3], 7*4(%[tmp]) \n\t"
663 "sub %[s2], %[t1], %[t0] \n\t"
664 "sw %[temp_reg4], 0(%[buf]) \n\t"
665 "addu %[temp_reg5], %[t3], %[t2] \n\t"
666 "li %[temp_reg6], 0x8483EE0C \n\t"
667 "move %[s1], $0 \n\t"
668 "multu %[temp_reg6], %[temp_reg5] \n\t"
669 "sub %[temp_reg1], %[t3], %[t2] \n\t"
670 "li %[temp_reg2], 0xf746ea \n\t"
671 "sra %[temp_reg5], %[temp_reg5], 31 \n\t"
672 "mult $ac1, %[temp_reg2], %[temp_reg1] \n\t"
673 "movn %[s1], %[temp_reg6], %[temp_reg5] \n\t"
674 "mfhi %[temp_reg5] \n\t"
675 "lw %[temp_reg3], 10*4(%[win]) \n\t"
676 "lw %[temp_reg4], 4*10*4(%[buf]) \n\t"
677 "extr.w %[s3], $ac1, 23 \n\t"
678 "lw %[temp_reg1], 4*7*4(%[buf]) \n\t"
679 "lw %[temp_reg2], 7*4(%[win]) \n\t"
680 "lw %[temp_reg6], 30*4(%[win]) \n\t"
681 "subu %[s1], %[temp_reg5], %[s1] \n\t"
682 "sub %[t1], %[s0], %[s1] \n\t"
683 "add %[t0], %[s0], %[s1] \n\t"
684 "mult $ac2, %[t1], %[temp_reg3] \n\t"
685 "mult $ac3, %[t1], %[temp_reg2] \n\t"
686 "mult %[t0], %[temp_reg6] \n\t"
687 "lw %[temp_reg5], 27*4(%[win]) \n\t"
688 "mult $ac1, %[t0], %[temp_reg5] \n\t"
689 "mfhi %[temp_reg3], $ac2 \n\t"
690 "mfhi %[temp_reg2], $ac3 \n\t"
691 "mfhi %[temp_reg6] \n\t"
692 "add %[t0], %[s2], %[s3] \n\t"
693 "sub %[t1], %[s2], %[s3] \n\t"
694 "add %[temp_reg3], %[temp_reg3], %[temp_reg4] \n\t"
695 "lw %[temp_reg4], 16*4(%[win]) \n\t"
696 "mfhi %[temp_reg5], $ac1 \n\t"
697 "sw %[temp_reg3], 32*10*4(%[out]) \n\t"
698 "add %[temp_reg1], %[temp_reg1], %[temp_reg2] \n\t"
699 "lw %[temp_reg3], 4*16*4(%[buf]) \n\t"
700 "sw %[temp_reg6], 4*10*4(%[buf]) \n\t"
701 "sw %[temp_reg1], 7*32*4(%[out]) \n\t"
702 "mult $ac2, %[t1], %[temp_reg4] \n\t"
703 "sw %[temp_reg5], 4*7*4(%[buf]) \n\t"
704 "lw %[temp_reg6], 1*4(%[win]) \n\t"
705 "lw %[temp_reg5], 4*1*4(%[buf]) \n\t"
706 "lw %[temp_reg1], 36*4(%[win]) \n\t"
707 "mult $ac3, %[t1], %[temp_reg6] \n\t"
708 "lw %[temp_reg2], 21*4(%[win]) \n\t"
709 "mfhi %[temp_reg4], $ac2 \n\t"
710 "mult %[t0], %[temp_reg1] \n\t"
711 "mult $ac1, %[t0],%[temp_reg2] \n\t"
712 "lw %[t0], 8*4(%[tmp]) \n\t"
713 "mfhi %[temp_reg6], $ac3 \n\t"
714 "lw %[t1], 10*4(%[tmp]) \n\t"
715 "lw %[t3], 11*4(%[tmp]) \n\t"
716 "mfhi %[temp_reg1] \n\t"
717 "add %[temp_reg3], %[temp_reg3], %[temp_reg4] \n\t"
718 "lw %[t2], 9*4(%[tmp]) \n\t"
719 "mfhi %[temp_reg2], $ac1 \n\t"
720 "add %[temp_reg5], %[temp_reg5], %[temp_reg6] \n\t"
721 "sw %[temp_reg3], 16*32*4(%[out]) \n\t"
722 "sw %[temp_reg5], 1*32*4(%[out]) \n\t"
723 "sw %[temp_reg1], 4*16*4(%[buf]) \n\t"
724 "addu %[temp_reg3], %[t3], %[t2] \n\t"
725 "li %[temp_reg4], 0x8D3B7CD6 \n\t"
726 "sw %[temp_reg2], 4*1*4(%[buf]) \n\t"
727 "multu %[temp_reg4],%[temp_reg3] \n\t"
728 "sra %[temp_reg3], %[temp_reg3], 31 \n\t"
729 "move %[s1], $0 \n\t"
730 "movn %[s1], %[temp_reg4], %[temp_reg3] \n\t"
731 "addu %[s0], %[t1], %[t0] \n\t"
732 "mfhi %[temp_reg3] \n\t"
733 "sub %[s2], %[t1], %[t0] \n\t"
734 "sub %[temp_reg5], %[t3], %[t2] \n\t"
735 "li %[temp_reg6], 0x976fd9 \n\t"
736 "lw %[temp_reg2], 11*4(%[win]) \n\t"
737 "lw %[temp_reg1], 4*11*4(%[buf]) \n\t"
738 "mult $ac1, %[temp_reg6], %[temp_reg5] \n\t"
739 "subu %[s1], %[temp_reg3], %[s1] \n\t"
740 "lw %[temp_reg5], 31*4(%[win]) \n\t"
741 "sub %[t1], %[s0], %[s1] \n\t"
742 "add %[t0], %[s0], %[s1] \n\t"
743 "mult $ac2, %[t1], %[temp_reg2] \n\t"
744 "mult %[t0], %[temp_reg5] \n\t"
745 "lw %[temp_reg4], 6*4(%[win]) \n\t"
746 "extr.w %[s3], $ac1, 23 \n\t"
747 "lw %[temp_reg3], 4*6*4(%[buf]) \n\t"
748 "mfhi %[temp_reg2], $ac2 \n\t"
749 "lw %[temp_reg6], 26*4(%[win]) \n\t"
750 "mfhi %[temp_reg5] \n\t"
751 "mult $ac3, %[t1], %[temp_reg4] \n\t"
752 "mult $ac1, %[t0], %[temp_reg6] \n\t"
753 "add %[t0], %[s2], %[s3] \n\t"
754 "sub %[t1], %[s2], %[s3] \n\t"
755 "add %[temp_reg2], %[temp_reg2], %[temp_reg1] \n\t"
756 "mfhi %[temp_reg4], $ac3 \n\t"
757 "mfhi %[temp_reg6], $ac1 \n\t"
758 "sw %[temp_reg5], 4*11*4(%[buf]) \n\t"
759 "sw %[temp_reg2], 32*11*4(%[out]) \n\t"
760 "lw %[temp_reg1], 4*15*4(%[buf]) \n\t"
761 "add %[temp_reg3], %[temp_reg3], %[temp_reg4] \n\t"
762 "lw %[temp_reg2], 15*4(%[win]) \n\t"
763 "sw %[temp_reg3], 6*32*4(%[out]) \n\t"
764 "sw %[temp_reg6], 4*6*4(%[buf]) \n\t"
765 "mult %[t1], %[temp_reg2] \n\t"
766 "lw %[temp_reg3], 2*4(%[win]) \n\t"
767 "lw %[temp_reg4], 4*2*4(%[buf]) \n\t"
768 "lw %[temp_reg5], 35*4(%[win]) \n\t"
769 "mult $ac1, %[t1], %[temp_reg3] \n\t"
770 "mfhi %[temp_reg2] \n\t"
771 "lw %[temp_reg6], 22*4(%[win]) \n\t"
772 "mult $ac2, %[t0], %[temp_reg5] \n\t"
773 "lw %[t1], 14*4(%[tmp]) \n\t"
774 "mult $ac3, %[t0], %[temp_reg6] \n\t"
775 "lw %[t0], 12*4(%[tmp]) \n\t"
776 "mfhi %[temp_reg3], $ac1 \n\t"
777 "add %[temp_reg1], %[temp_reg1], %[temp_reg2] \n\t"
778 "mfhi %[temp_reg5], $ac2 \n\t"
779 "sw %[temp_reg1], 15*32*4(%[out]) \n\t"
780 "mfhi %[temp_reg6], $ac3 \n\t"
781 "lw %[t2], 13*4(%[tmp]) \n\t"
782 "lw %[t3], 15*4(%[tmp]) \n\t"
783 "add %[temp_reg4], %[temp_reg4], %[temp_reg3] \n\t"
784 "sw %[temp_reg5], 4*15*4(%[buf]) \n\t"
785 "addu %[temp_reg1], %[t3], %[t2] \n\t"
786 "li %[temp_reg2], 0x9C42577C \n\t"
787 "move %[s1], $0 \n\t"
788 "multu %[temp_reg2], %[temp_reg1] \n\t"
789 "sw %[temp_reg4], 2*32*4(%[out]) \n\t"
790 "sra %[temp_reg1], %[temp_reg1], 31 \n\t"
791 "movn %[s1], %[temp_reg2], %[temp_reg1] \n\t"
792 "sub %[temp_reg3], %[t3], %[t2] \n\t"
793 "li %[temp_reg4], 0x6f94a2 \n\t"
794 "mfhi %[temp_reg1] \n\t"
795 "addu %[s0], %[t1], %[t0] \n\t"
796 "sw %[temp_reg6], 4*2*4(%[buf]) \n\t"
797 "mult $ac1, %[temp_reg4], %[temp_reg3] \n\t"
798 "sub %[s2], %[t1], %[t0] \n\t"
799 "lw %[temp_reg5], 12*4(%[win]) \n\t"
800 "lw %[temp_reg6], 4*12*4(%[buf]) \n\t"
801 "subu %[s1], %[temp_reg1], %[s1] \n\t"
802 "sub %[t1], %[s0], %[s1] \n\t"
803 "lw %[temp_reg3], 32*4(%[win]) \n\t"
804 "mult $ac2, %[t1], %[temp_reg5] \n\t"
805 "add %[t0], %[s0], %[s1] \n\t"
806 "extr.w %[s3], $ac1, 23 \n\t"
807 "lw %[temp_reg2], 5*4(%[win]) \n\t"
808 "mult %[t0], %[temp_reg3] \n\t"
809 "mfhi %[temp_reg5], $ac2 \n\t"
810 "lw %[temp_reg4], 25*4(%[win]) \n\t"
811 "lw %[temp_reg1], 4*5*4(%[buf]) \n\t"
812 "mult $ac3, %[t1], %[temp_reg2] \n\t"
813 "mult $ac1, %[t0], %[temp_reg4] \n\t"
814 "mfhi %[temp_reg3] \n\t"
815 "add %[t0], %[s2], %[s3] \n\t"
816 "add %[temp_reg5], %[temp_reg5], %[temp_reg6] \n\t"
817 "mfhi %[temp_reg2], $ac3 \n\t"
818 "mfhi %[temp_reg4], $ac1 \n\t"
819 "sub %[t1], %[s2], %[s3] \n\t"
820 "sw %[temp_reg5], 32*12*4(%[out]) \n\t"
821 "sw %[temp_reg3], 4*12*4(%[buf]) \n\t"
822 "lw %[temp_reg6], 14*4(%[win]) \n\t"
823 "lw %[temp_reg5], 4*14*4(%[buf]) \n\t"
824 "add %[temp_reg1], %[temp_reg1], %[temp_reg2] \n\t"
825 "sw %[temp_reg4], 4*5*4(%[buf]) \n\t"
826 "sw %[temp_reg1], 5*32*4(%[out]) \n\t"
827 "mult %[t1], %[temp_reg6] \n\t"
828 "lw %[temp_reg4], 34*4(%[win]) \n\t"
829 "lw %[temp_reg2], 3*4(%[win]) \n\t"
830 "lw %[temp_reg1], 4*3*4(%[buf]) \n\t"
831 "mult $ac2, %[t0], %[temp_reg4] \n\t"
832 "mfhi %[temp_reg6] \n\t"
833 "mult $ac1, %[t1], %[temp_reg2] \n\t"
834 "lw %[temp_reg3], 23*4(%[win]) \n\t"
835 "lw %[s0], 16*4(%[tmp]) \n\t"
836 "mfhi %[temp_reg4], $ac2 \n\t"
837 "lw %[t1], 17*4(%[tmp]) \n\t"
838 "mult $ac3, %[t0], %[temp_reg3] \n\t"
839 "move %[s1], $0 \n\t"
840 "add %[temp_reg5], %[temp_reg5], %[temp_reg6] \n\t"
841 "mfhi %[temp_reg2], $ac1 \n\t"
842 "sw %[temp_reg5], 14*32*4(%[out]) \n\t"
843 "sw %[temp_reg4], 4*14*4(%[buf]) \n\t"
844 "mfhi %[temp_reg3], $ac3 \n\t"
845 "li %[temp_reg5], 0xB504F334 \n\t"
846 "add %[temp_reg1], %[temp_reg1], %[temp_reg2] \n\t"
847 "multu %[temp_reg5], %[t1] \n\t"
848 "lw %[temp_reg2], 4*13*4(%[buf]) \n\t"
849 "sw %[temp_reg1], 3*32*4(%[out]) \n\t"
850 "sra %[t1], %[t1], 31 \n\t"
851 "mfhi %[temp_reg6] \n\t"
852 "movn %[s1], %[temp_reg5], %[t1] \n\t"
853 "sw %[temp_reg3], 4*3*4(%[buf]) \n\t"
854 "lw %[temp_reg1], 13*4(%[win]) \n\t"
855 "lw %[temp_reg4], 4*4*4(%[buf]) \n\t"
856 "lw %[temp_reg3], 4*4(%[win]) \n\t"
857 "lw %[temp_reg5], 33*4(%[win]) \n\t"
858 "subu %[s1], %[temp_reg6], %[s1] \n\t"
859 "lw %[temp_reg6], 24*4(%[win]) \n\t"
860 "sub %[t1], %[s0], %[s1] \n\t"
861 "add %[t0], %[s0], %[s1] \n\t"
862 "mult $ac1, %[t1], %[temp_reg1] \n\t"
863 "mult $ac2, %[t1], %[temp_reg3] \n\t"
864 "mult $ac3, %[t0], %[temp_reg5] \n\t"
865 "mult %[t0], %[temp_reg6] \n\t"
866 "mfhi %[temp_reg1], $ac1 \n\t"
867 "mfhi %[temp_reg3], $ac2 \n\t"
868 "mfhi %[temp_reg5], $ac3 \n\t"
869 "mfhi %[temp_reg6] \n\t"
870 "add %[temp_reg2], %[temp_reg2], %[temp_reg1] \n\t"
871 "add %[temp_reg4], %[temp_reg4], %[temp_reg3] \n\t"
872 "sw %[temp_reg2], 13*32*4(%[out]) \n\t"
873 "sw %[temp_reg4], 4*32*4(%[out]) \n\t"
874 "sw %[temp_reg5], 4*13*4(%[buf]) \n\t"
875 "sw %[temp_reg6], 4*4*4(%[buf]) \n\t"
876
877 : [t0] "=&r" (t0), [t1] "=&r" (t1), [t2] "=&r" (t2), [t3] "=&r" (t3),
878 [s0] "=&r" (s0), [s2] "=&r" (s2), [temp_reg1] "=&r" (temp_reg1),
879 [temp_reg2] "=&r" (temp_reg2), [s1] "=&r" (s1), [s3] "=&r" (s3),
880 [temp_reg3] "=&r" (temp_reg3), [temp_reg4] "=&r" (temp_reg4),
881 [temp_reg5] "=&r" (temp_reg5), [temp_reg6] "=&r" (temp_reg6),
882 [out] "+r" (out)
883 : [tmp] "r" (tmp), [win] "r" (win), [buf] "r" (buf)
884 : "memory", "hi", "lo", "$ac1hi", "$ac1lo", "$ac2hi", "$ac2lo",
885 "$ac3hi", "$ac3lo"
886 );
887 }
888
ff_imdct36_blocks_mips_fixed(int *out, int *buf, int *in, int count, int switch_point, int block_type)889 static void ff_imdct36_blocks_mips_fixed(int *out, int *buf, int *in,
890 int count, int switch_point, int block_type)
891 {
892 int j;
893 for (j=0 ; j < count; j++) {
894 /* apply window & overlap with previous buffer */
895
896 /* select window */
897 int win_idx = (switch_point && j < 2) ? 0 : block_type;
898 int *win = ff_mdct_win_fixed[win_idx + (4 & -(j & 1))];
899
900 imdct36_mips_fixed(out, buf, in, win);
901
902 in += 18;
903 buf += ((j&3) != 3 ? 1 : (72-3));
904 out++;
905 }
906 }
907
908 #endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
909 #endif /* HAVE_INLINE_ASM */
910
ff_mpadsp_init_mipsdsp(MPADSPContext *s)911 void ff_mpadsp_init_mipsdsp(MPADSPContext *s)
912 {
913 #if HAVE_INLINE_ASM
914 #if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
915 s->apply_window_fixed = ff_mpadsp_apply_window_mips_fixed;
916 s->imdct36_blocks_fixed = ff_imdct36_blocks_mips_fixed;
917 #endif
918 #endif
919 }
920