1 /* @file plustek-pp_hwdefs.h
2  * @brief different definitions for describing the scanner hardware
3  *
4  * based on sources acquired from Plustek Inc.
5  * Copyright (C) 1998 Plustek Inc.
6  * Copyright (C) 2000-2004 Gerhard Jaeger <gerhard@gjaeger.de>
7  * also based on the work done by Rick Bronson <rick@efn.org>
8  *
9  * History:
10  * 0.30 - initial version
11  * 0.31 - corrected the values of _GAIN_P98_HIGH, _GAIN_P96_HIGH and _GAIN_LOW
12  * 0.32 - removed _LampDelay defines
13  *		  removed _MODE_xxx defines
14  * 0.33 - cosmetic changes
15  *		  removed _PORT_BPP from modelist
16  * 0.34 - no changes
17  * 0.35 - no changes
18  * 0.36 - moved struct ScanState to this header
19  *		  moved some definitions from scandata.h to this file
20  * 0.37 - some cleanup work
21  *        added model override defines here
22  *        added _A3
23  *        changed some _ defines to _ defines
24  * 0.38 - added ASIC98003 stuff
25  *        removed the _ASIC_xxxxx definitions
26  * 0.39 - major changes: moved a lot of stuff to this file
27  * 0.40 - no changes
28  * 0.41 - added _OVR_PLUSTEK_4800P definition
29  * 0.42 - added _OVR_PRIMAX_4800D30 definition
30  * 0.43 - no changes
31  * .
32  * <hr>
33  * This file is part of the SANE package.
34  *
35  * This program is free software; you can redistribute it and/or
36  * modify it under the terms of the GNU General Public License as
37  * published by the Free Software Foundation; either version 2 of the
38  * License, or (at your option) any later version.
39  *
40  * This program is distributed in the hope that it will be useful, but
41  * WITHOUT ANY WARRANTY; without even the implied warranty of
42  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
43  * General Public License for more details.
44  *
45  * You should have received a copy of the GNU General Public License
46  * along with this program.  If not, see <https://www.gnu.org/licenses/>.
47  *
48  * As a special exception, the authors of SANE give permission for
49  * additional uses of the libraries contained in this release of SANE.
50  *
51  * The exception is that, if you link a SANE library with other files
52  * to produce an executable, this does not by itself cause the
53  * resulting executable to be covered by the GNU General Public
54  * License.  Your use of that executable is in no way restricted on
55  * account of linking the SANE library code into it.
56  *
57  * This exception does not, however, invalidate any other reasons why
58  * the executable file might be covered by the GNU General Public
59  * License.
60  *
61  * If you submit changes to SANE to the maintainers to be included in
62  * a subsequent release, you agree by submitting the changes that
63  * those changes may be distributed with this exception intact.
64  *
65  * If you write modifications of your own for SANE, it is your choice
66  * whether to permit this exception to apply to your modifications.
67  * If you do not wish that, delete this exception notice.
68  * <hr>
69  */
70 #ifndef __HWDEFS_H__
71 #define __HWDEFS_H__
72 
73 /*
74  * port modes
75  * (WARNING: never change these defines, as they are used as entries
76  *           to jump tables !!!)
77  */
78 #define _PORT_EPP       0
79 #define _PORT_SPP       1
80 #define _PORT_BIDI      2
81 #define _PORT_ECP       3
82 #define _PORT_ESP       4
83 #define _PORT_NONE      5
84 
85 /*
86  * ScannerSize
87  */
88 #define _SCANSIZE_A4        0
89 #define _SCANSIZE_LETTER    1
90 #define _SCANSIZE_LEGAL     2
91 #define _SCANSIZE_A3        3
92 
93 /*
94  * Magic IDs switch printer port to scanner mode
95  */
96 #define _ID1ST          0x69
97 #define _ID2ND          0x96
98 #define _ID3RD          0xa5
99 #define _ID4TH          0x5a
100 
101 /*
102  * Special IDs used to reset scanner (ASIC98003)
103  */
104 #define _RESET1ST       0x69
105 #define _RESET2ND       0x96
106 #define _RESET3RD       0xaa
107 #define _RESET4TH       0x55
108 
109 /*
110  * ID switch to printer mode
111  */
112 #define _ID_TO_PRINTER	0
113 
114 /*
115  * Flags for internal use
116  */
117 #define _VF_BUILDMAP		    0x0000001
118 #define _VF_DATATOUSERBUFFER    0x0000002
119 #define _VF_ENVIRONMENT_READY   0x0000004
120 #define _VF_FIRSTSCANLINE	    0x0000008
121 #define _VF_PREVIEW     		0x0000020
122 
123 /*
124  * Printer Control Port: Definitions
125  */
126 #define _CTRL_STROBE		0x01
127 #define _CTRL_AUTOLF		0x02
128 #define _CTRL_NOT_INIT		0x04
129 #define _CTRL_SELECT_IN		0x08
130 #define _CTRL_ENABLE_IRQ	0x10
131 #define _CTRL_DIRECTION		0x20
132 #define _CTRL_RESERVED  	0xc0
133 
134 /*
135  * here are the definitions for the different registers
136  * first the ASIC 96001/3 section
137  */
138 
139 /* Status Register 0x10 */
140 #define _FLAG_P96_PAPER		 0x01
141 #define _FLAG_P96_ADF		 0x02
142 #define _FLAG_P96_KEY		 0x04
143 #define _FLAG_P96_EPP		 0x08
144 #define _FLAG_P96_FIFOFULL	 0x10
145 #define _FLAG_P96_FIFOEMPTY	 0x20
146 #define _FLAG_P96_CCDTYPE	 0x40
147 #define _FLAG_P96_MOTORTYPE  0x80
148 
149 /*
150  * the 98001 section
151  */
152 #define _DEFAULT_LINESCANTIME   96
153 
154 /* Status Register (Addr: 0x30) */
155 #define	_FLAG_P98_PAPER      0x01
156 #define _FLAG_P98_KEY		 0x80
157 
158 /*
159  * some buffer sizes (for ASIC 98001 based devices)
160  */
161 #define _LINE_BUFSIZE		(5500 * 6)
162 #define _LINE_BUFSIZE1		(5500 * 8)
163 #define _PROCESS_BUFSIZE 	(5120 * 3)
164 
165 /*
166  * generic equates
167  */
168 #define _DEF_BW_THRESHOLD	  111		/* default B/W mode threshold value	*/
169 #define _NUMBER_OF_SCANSTEPS   64		/* Asic spec.: up to 64 scan steps 	*/
170 #define _SCANSTATE_BYTES      (_NUMBER_OF_SCANSTEPS/2)
171 
172 /* CHECK: Play around with the P98003/1
173  * gain values - maybe we get a brighter picture...
174  */
175 #define _GAIN_P98_HIGH		  225		/* Volt. max. value, Asic 98001		*/
176 #define _GAIN_P98003_HIGH	  240		/* Volt. max. value, Asic 98003		*/
177 #define _GAIN_P96_HIGH		  240		/* Volt. max. value, Asic 96001/3	*/
178 #define _GAIN_LOW			  210		/* Volt. min. value					*/
179 #define _GAIN_P98003_LOW	  220		/* Volt. min. value, Asic 98003 	*/
180 #define _MOTOR_ONE_LINE_TIME    4
181 
182 /* for ASIC 98001/3 shading */
183 #define _DEF_BRIGHTEST_SKIP     3
184 #define _DEF_DARKEST_SKIP		5
185 
186 #define _BUF_SIZE_BASE_CONST 	1280
187 #define _SCANSTATE_TABLE_SIZE	250		/* was 200 for 4830 */
188 #define _P98_OFFSET70			60
189 
190 /* for Data channel (BYTE) */
191 #define _RED_DATA_READY		0x01
192 #define _GREEN_DATA_READY 	0x02
193 #define _BLUE_DATA_READY	0x04
194 
195 #define _ASIC_REDCOLOR		0x01
196 #define _ASIC_GREENCOLOR    0x03
197 #define _ASIC_BLUECOLOR		0x02
198 
199 /*
200  * for Asic I/O signal control
201  */
202 #define _CTRL_GENSIGNAL         (_CTRL_RESERVED + _CTRL_NOT_INIT)   /* 0xc4 */
203 
204 #define _CTRL_START_REGWRITE    (_CTRL_GENSIGNAL + _CTRL_SELECT_IN) /* 0xcc */
205 #define _CTRL_END_REGWRITE      (_CTRL_GENSIGNAL)                   /* 0xc4 */
206 
207 #define _CTRL_START_DATAWRITE   (_CTRL_GENSIGNAL + _CTRL_AUTOLF)    /* 0xc6 */
208 #define _CTRL_END_DATAWRITE     (_CTRL_GENSIGNAL)                   /* 0xc4 */
209 
210 #define _CTRL_EPPSIGNAL_WRITE   (_CTRL_GENSIGNAL + _CTRL_STROBE)    /* 0xc5 */
211 #define _CTRL_EPPTRIG_REGWRITE  (_CTRL_GENSIGNAL + _CTRL_SELECT_IN + _CTRL_STROBE)
212 
213 #define _CTRL_START_BIDIREAD    (_CTRL_GENSIGNAL + _CTRL_DIRECTION + _CTRL_AUTOLF)
214 #define _CTRL_END_BIDIREAD      (_CTRL_GENSIGNAL + _CTRL_DIRECTION) /* 0xe4 */
215 
216 
217 typedef struct
218 {
219     ULong	dwFullSpeed;
220     Byte	bCurrentSpeed;
221     Byte	bStepSpeed;
222 } DiffModeVar, *pDiffModeVar;
223 
224 typedef struct
225 {
226     UShort wHomePos;		/* scanner's scanning home position	*/
227     UShort wMaxSteps;		/* maximum steps for this scan		*/
228     Byte   bExposureTime;	/* exposure time for one line		*/
229     Byte   bMotorStep;
230     Byte   bFlagScanMode;	/* see below	*/
231     Byte   bTimesShading;	/* see below	*/
232 } ModeTypeVar, *pModeTypeVar;
233 
234 typedef struct {
235 	Byte	bStep;
236 	Byte	bStatus;
237 } ScanState, *pScanState;
238 
239 typedef struct {
240     Byte    bReg;
241     Byte    bParam;
242 } RegDef, *pRegDef;
243 
244 typedef union {
245    	RGBByteDef	Colors;
246     UChar		bColors[3];
247 } ColorByte, *pColorByte;
248 
249 typedef union {
250     RGBUShortDef Colors;
251     UShort		 wColors[3];
252 } ColorWord, *pColorWord;
253 
254 typedef struct {
255     UShort exposureTime;
256     UShort xStepTime;
257 } ExpXStepDef, *pExtXStepDef;
258 
259 typedef struct {
260     UShort  thresholdBW;
261     UShort  thresholdGray;
262     UShort  thresholdColor;
263 } ThreshDef, *pThreshDef;
264 
265 /* for description of the DAC specific stuff*/
266 typedef struct {
267     ColorWord	GainResize;
268     ColorWord   DarkCmpHi;
269     ColorWord   DarkCmpLo;
270     ColorWord   DarkOffSub;
271     ColorByte   DarkDAC;
272     UChar		Reserved;
273 } DACTblDef, *pDACTblDef;
274 
275 /*
276  * some function types
277  */
278 typedef struct scandata *pScanData;
279 typedef void (*pFnDataProcess)(pScanData, pVoid, pVoid, ULong);
280 typedef Bool (*pFnReadData)(pScanData, pUChar, ULong);
281 typedef void (*pFnVoid)(pScanData);
282 typedef Bool (*pFnBool)(pScanData);
283 typedef void (*pFnDACOffs)(pScanData, pDACTblDef, ULong);
284 typedef void (*pFnDACDark)(pScanData, pDACTblDef, ULong, UShort);
285 typedef void (*pFnOut)(Byte,UShort);
286 typedef Byte (*pFnIn)(UShort);
287 
288 /*
289  * For Motor step control
290  */
291 #define _FullStepStrong 	0x10
292 #define _HalfStep			0x04
293 #define _QuarterStep		0x08
294 #define _EightStep			0x0c
295 
296 /* bTimesShading */
297 #define _Shading_32Times	0
298 #define _Shading_4Times 	1
299 #define _Shading_16Times	2
300 
301 /* Scan.bModuleState */
302 #define _MotorInNormalState	0
303 #define _MotorGoBackward	1
304 #define _MotorInStopState	2
305 #define _MotorAdvancing	    3
306 #define _MotorAdvanced	    4
307 
308 /* bMoveDataOutFlag */
309 #define _DataInNormalState		0
310 #define _DataAfterRefreshState	1
311 #define _DataFromStopState		2
312 
313 /* bFastMoveFlag */
314 #define _FastMove_Fast_C50_G100 	0
315 #define _FastMove_Middle_C75_G150	1
316 #define _FastMove_Low_C75_G150		2
317 #define _FastMove_Low_C75_G150_Back	4
318 #define _FastMove_Pos_300			5
319 #define _FastMove_Film_150			6
320 
321 /*
322  * ASIC 98003 base models...
323  */
324 #define _TPA_P98003_SHADINGORG	2172U
325 #define _RFT_SCANNING_ORG	    380U
326 
327 #define _POS_SCANNING_ORG	    2840U
328 #define _POS_PAGEWIDTH  		450U
329 #define _POS_ORG_OFFSETX    	0x41C
330 
331 #define _NEG_SCANNING_ORG	    3000U
332 #define _NEG_PAGEWIDTH		    464U
333 #define _NEG_PAGEWIDTH600       992U
334 #define _NEG_ORG_OFFSETX    	0x430
335 #define _NEG_SHADING_OFFS       1500U
336 
337 #define _NEG_EDGE_VALUE 		0x800
338 
339 #define _SHADING_BEGINX 		4U
340 
341 
342 /* home positions */
343 #define _Home_CE50		0x1f	/* 0x1d     1b	*/
344 #define _Home_CE100		0x27	/* 0x34     23	*/
345 #define _Home_CE150		0x29	/* 0x23     25	*/
346 #define _Home_CE300		0x34	/* 0x2e     30	*/
347 #define _Home_CE600		0x3a	/* 0x35     36	*/
348 #define _Home_CB50		0x20	/* 0x22     1c	*/
349 #define _Home_CB100		0x41	/* 0x42     3d	*/
350 #define _Home_CB150		0x41	/* 0x3f     3d	*/
351 #define _Home_CB300		0x4c	/* 0x4a     48	*/
352 #define _Home_CB600		0x53	/* 0x54     4f	*/
353 #define _Home_CS50		0x20	/* 0x1b     1c	*/
354 #define _Home_CS100		0x41	/* 0x40     3d	*/
355 #define _Home_CS150		0x41	/* 0x3e     3d	*/
356 #define _Home_CS300		0x4c	/* 0x4b     48	*/
357 #define _Home_CS600		0x53	/* 0x4f     4f	*/
358 #define _Home_GE75		0x08	/* 7-14-98  00	*/
359 #define _Home_GE150		0x04	/* 0x22     00	*/
360 #define _Home_GE300		0x12	/* 0x2d     0e	*/
361 #define _Home_GE600		0x19	/* 0x33     15	*/
362 #define _Home_GB75		0x40	/* 7-14-98  3e	*/
363 #define _Home_GB150		0x40	/* 0x3f     3e	*/
364 #define _Home_GB300		0x4e	/* 0x4c     4a	*/
365 #define _Home_GB600		0x53	/* 0x51     4f	*/
366 #define _Home_GS75		0x40	/* 7-14-98  3c	*/
367 #define _Home_GS150		0x40	/* 0x3f     3c	*/
368 #define _Home_GS300		0x4e	/* 0x4d     4a	*/
369 #define _Home_GS600		0x53	/* 0x51     4f	*/
370 #define _Home_BE75		0x30	/* 7-14-98  20	*/
371 #define _Home_BE150		0x30	/* 0x3c     20	*/
372 #define _Home_BE300		0x32	/* 0x48     2e	*/
373 #define _Home_BE600		0x37	/* 0x35     33	*/
374 #define _Home_BB75		0x42	/* 7-14-98  3e	*/
375 #define _Home_BB150		0x42	/* 0x47     3e 	*/
376 #define _Home_BB300		0x50	/* 0x51     4c	*/
377 #define _Home_BB600		0x53	/* 0x51     4f	*/
378 #define _Home_BS75		0x42	/* 7-14-98  3e	*/
379 #define _Home_BS150		0x42	/* 0x46     3e	*/
380 #define _Home_BS300		0x50	/* 0x4f     4c	*/
381 #define _Home_BS600		0x53	/* 0x55     4f	*/
382 
383 /*
384  * for ModeTypeVar indexes
385  */
386 #define _FixParamEppBw		    0
387 #define _FixParamBppBw		    _FixParamEppBw + 4
388 #define _FixParamSppBw		    _FixParamBppBw + 4
389 #define _FixParamEppGray	    0
390 #define _FixParamBppGray	    _FixParamEppGray + 4
391 #define _FixParamSppGray	    _FixParamBppGray + 4
392 #define _FixParamEppColor	    0
393 #define _FixParamBppColor	    _FixParamEppColor + 5
394 #define _FixParamSppColor	    _FixParamBppColor + 5
395 #define _FixParamSppNegative    0
396 #define _FixParamBppNegative    _FixParamSppNegative + 3
397 #define _FixParamEppNegative    _FixParamBppNegative + 3
398 #define _FixParamSppPositive    _FixParamEppNegative + 3
399 #define _FixParamBppPositive    _FixParamSppPositive + 3
400 #define _FixParamEppPositive    _FixParamBppPositive + 3
401 
402 /*
403  * for DiffModeVar indexes
404  */
405 #define _BwEpp150		    0
406 #define _BwEpp300		    1
407 #define _BwEpp600		    2
408 #define _BwBpp150		    _BwEpp150
409 #define _BwBpp300		    _BwEpp300
410 #define _BwBpp600		    _BwEpp600
411 #define _BwSpp150		    3
412 #define _BwSpp300		    4
413 #define _BwSpp600		    5
414 #define _GrayEpp150		    6
415 #define _GrayEpp300		    7
416 #define _GrayEpp600		    8
417 #define _GrayEpp600_3000	9	    /* > 3000 pixels per channel */
418 #define _GrayBpp150		    10
419 #define _GrayBpp300		    11
420 #define _GrayBpp300_1600	12
421 #define _GrayBpp600		    13
422 #define _GrayBpp600_1600	14
423 #define _GrayBpp600_3200	15
424 #define _GraySpp150		    16
425 #define _GraySpp150_800 	17
426 #define _GraySpp300		    18
427 #define _GraySpp300_800 	19
428 #define _GraySpp300_1600	20
429 #define _GraySpp600		    21
430 #define _GraySpp600_800 	22
431 #define _GraySpp600_1600	23
432 #define _GraySpp600_3200	24
433 #define _ColorEpp60		    25
434 #define _ColorEpp100		_ColorEpp60
435 #define _ColorEpp150		26
436 #define _ColorEpp300		27
437 #define _ColorEpp300_1200	28
438 #define _ColorEpp600		29
439 #define _ColorEpp600_1400	30
440 #define _ColorEpp600_2800	31
441 #define _ColorEpp600_4000	32
442 #define _ColorBpp60		    33
443 #define _ColorBpp100		34
444 #define _ColorBpp150		35
445 #define _ColorBpp150_800	36
446 #define _ColorBpp300		37
447 #define _ColorBpp300_800	38
448 #define _ColorBpp300_1600	39
449 #define _ColorBpp600		40
450 #define _ColorBpp600_800	41
451 #define _ColorBpp600_1600	42
452 #define _ColorBpp600_3200	43
453 #define _ColorSpp60		    _ColorBpp60
454 #define _ColorSpp100		_ColorBpp100
455 #define _ColorSpp150		_ColorBpp150
456 #define _ColorSpp150_800	_ColorBpp150_800
457 #define _ColorSpp300		44
458 #define _ColorSpp300_500	45
459 #define _ColorSpp300_1000	46
460 #define _ColorSpp300_2000	47
461 #define _ColorSpp600		48
462 #define _ColorSpp600_500	49
463 #define _ColorSpp600_1000	50
464 #define _ColorSpp600_2000	51
465 #define _ColorSpp600_4000	52
466 
467 #define _NegativeSpp150 	53
468 #define _NegativeSpp300 	54
469 #define _NegativeSpp600 	55
470 #define _NegativeBpp150 	_NegativeSpp150
471 #define _NegativeBpp300 	_NegativeSpp300
472 #define _NegativeBpp600 	_NegativeSpp600
473 #define _NegativeEpp150 	_NegativeSpp150
474 #define _NegativeEpp300 	_NegativeSpp300
475 #define _NegativeEpp600 	_NegativeSpp600
476 
477 #define _BwEpp75		    56
478 #define _BwBpp75		    56
479 #define _BwSpp75		    56
480 #define _GrayEpp75		    56
481 #define _GrayBpp75		    56
482 #define _GraySpp75		    56
483 
484 #define _TransparencySpp150	_NegativeSpp150
485 #define _TransparencySpp300	_NegativeSpp300
486 #define _TransparencySpp600	_NegativeSpp600
487 #define _TransparencyBpp150	_NegativeSpp150
488 #define _TransparencyBpp300	_NegativeSpp300
489 #define _TransparencyBpp600	_NegativeSpp600
490 #define _TransparencyEpp150	_NegativeSpp150
491 #define _TransparencyEpp300	_NegativeSpp300
492 #define _TransparencyEpp600	_NegativeSpp600
493 
494 /* for 48 bits color */
495 #define _ColorEpp100_1400	63
496 #define _ColorEpp150_1900	64
497 #define _ColorEpp300_4000	65
498 #define _ColorEpp600_9600	66
499 #define _ColorSpp300_3000	67
500 
501 /*
502  * for mirroring parts of the 98001/3 asic register set
503  */
504 typedef struct {
505     Byte	RD_Motor1Control;		/* 0x0b             	*/
506     Byte	RD_StepControl; 		/* 0x14					*/
507     Byte	RD_Motor0Control;		/* 0x15					*/
508     Byte	RD_XStepTime;			/* 0x16					*/
509     Byte	RD_ModeControl; 		/* 0x1b					*/
510     Byte	RD_LineControl; 		/* 0x1c					*/
511     Byte	RD_ScanControl; 		/* 0x1d, init = 5		*/
512     Byte	RD_ModelControl;		/* 0x1f					*/
513     Byte	RD_Model1Control;		/* 0x20					*/
514     UShort	RD_Dpi; 			    /* 0x21					*/
515     UShort	RD_Origin;			    /* 0x23					*/
516     UShort	RD_Pixels;			    /* 0x25					*/
517     UShort	RD_ThresholdControl;	/* 0x27					*/
518     Byte	RD_ThresholdGapCtrl;	/* 0x29					*/
519     UShort	RD_RedDarkOff;			/* 0x33					*/
520     UShort	RD_GreenDarkOff;		/* 0x35					*/
521     UShort	RD_BlueDarkOff; 		/* 0x37					*/
522 
523     ULong   RD_BufFullSize;         /* 0x54, ASIC 98003     */
524     UShort  RD_MotorTotalSteps;     /* 0x57, ASIC 98003     */
525 
526     Byte    RD_ScanControl1;        /* 0x5b, ASIC 98003     */
527     Byte    RD_MotorDriverType;     /* 0x64, ASIC 98003     */
528     Byte    RD_ExtLineControl;      /* 0x6d, ASIC 98003     */
529     Byte    RD_ExtXStepTime;        /* 0x6e, ASIC 98003     */
530 
531 } RegData, *pRegData;
532 
533 /*
534  * for registers, that only exist on the 96001/3
535  */
536 typedef struct
537 {
538     Byte	RD_MotorControl;			/* 0x1b, init = 3		*/
539     Byte	RD_MemAccessControl;		/* 0x1d					*/
540     Byte	RD_WatchDogControl;			/* 0x25, init = 0x8f	*/
541 
542     union {
543 		Byte	RD_ModelControl2;		/* 0x26, P96003 		*/
544     } u26;
545 
546 	union {
547 		Byte	RD_RedChShadingOff;		/* 0x28, P96003			*/
548     } u28;
549     union {
550 		Byte	RD_GreenChShadingOff;	/* 0x29, P96003			*/
551     } u29;
552 	Byte	RD_BlueChShadingOff;		/* 0x2a, P96003			*/
553     Byte	RD_RedChDarkOff;			/* 0x2b, P96003			*/
554     Byte	RD_GreenChDarkOff;			/* 0x2c, P96003			*/
555     Byte	RD_BlueChDarkOff;			/* 0x2d, P96003			*/
556 
557     Byte	RD_RedChEvenOff;			/* 0x31, P96003			*/
558     Byte	RD_GreenChEvenOff;			/* 0x32, P96003			*/
559     Byte	RD_BlueChEvenOff;			/* 0x33, P96003			*/
560     Byte	RD_RedChOddOff; 			/* 0x34, P96003			*/
561     Byte	RD_GreenChOddOff;			/* 0x35, P96003			*/
562     Byte	RD_BlueChOddOff;			/* 0x36, P96003			*/
563     Byte	RD_RedGainOut;				/* 0x37, P96003			*/
564     Byte	RD_GreenGainOut;			/* 0x38, P96003			*/
565     Byte	RD_BlueGainOut; 			/* 0x39, P96003			*/
566     Byte	RD_LedControl;				/* 0x3a, P96003			*/
567     Byte	RD_ShadingCorrectCtrl;		/* 0x3b, P96003			*/
568 
569 } Reg96, *pReg96;
570 
571 /*
572  * model override defines
573  */
574 #define _OVR_NONE				0
575 #define _OVR_PLUSTEK_9630PL		1	/* for legal version of the OP9630	*/
576 #define _OVR_PRIMAX_4800D		2	/* for the Primax 4800 Direct		*/
577 #define _OVR_PLUSTEK_9636		3	/* for 9636T/P+/Turbo				*/
578 #define _OVR_PLUSTEK_9636P		4	/* for 9636P						*/
579 #define _OVR_PLUSTEK_A3I		5	/* for A3I  						*/
580 #define _OVR_PLUSTEK_4800P		6	/* for OpticPro4800					*/
581 #define _OVR_PRIMAX_4800D30		7	/* for the Primax 4800 Direct 30bit	*/
582 
583 /* CHECK: THIS has to be changed and merged with the old code */
584 
585 /*
586  * structure to hold IO port specific stuff
587  */
588 typedef struct {
589 	UShort portBase;
590 	UShort portMode;
591 	UShort lastPortMode;
592 
593 	Byte   bOldControlValue;
594 	Byte   bOldDataValue;
595 	Byte   bOpenCount;
596 	Byte   delay;           /* to allow various delay on port operations    */
597 
598 	Bool   slowIO;
599 	UShort forceMode;
600 	Bool   useEPPCmdMode;
601 
602 } IODef, *pIODef;
603 
604 
605 /*
606  * structure to hold device specific stuff
607  */
608 typedef struct
609 {
610 #if 0
611     PFNVOID			pfnIOWrite;
612     PFNVOID			pfnCCDInit;
613     DWORD			dwLampOnTicks;
614     DWORD			dwLampOnBegin;
615     LONG			lLeftPositive;
616     LONG			lLeftNegative;
617     UCHAR			bLampOnMinutes;
618     DRVBOOL			fButton;
619     DRVBOOL			fSoftReset;
620     UCHAR			bStatusLamp;
621 #endif
622 
623 	pFnReadData     ReadData;       /* read function, portmode specific */
624 
625     ULong   		dwModelOriginY;
626     Bool			f0_8_16;
627     Bool            fTpa;           /* transparency adapter ?           */
628     Bool			f2003;          /* has 2003 motor driver ?          */
629 
630     UChar			bMotorID;       /* the type of the motor drivers    */
631     UChar			bPCBID;         /* which version of the PCB         */
632 
633     UChar			bCCDID;         /* what CCD do we have              */
634     pRegDef         pCCDRegisters;  /* pointer to the register descr    */
635     UShort			wNumCCDRegs;    /* number of values to write        */
636     UShort   		DataOriginX;
637 
638     UChar   		bDACType;       /* what DAC do we have              */
639     pRegDef			pDACRegisters;  /* pointer to DAC reg descr.        */
640     UShort			wNumDACRegs;    /* number of values to write        */
641     pFnDACOffs		fnDarkOffset;   /* func-ptr to func for DAC         */
642     pFnDACDark		fnDACDark;      /* adjustments                      */
643 
644     RGBByteDef		RegDACOffset;
645     RGBByteDef		RegDACGain;
646 
647     UChar			buttons;        /* Number of buttons                */
648 
649     UChar			ModelCtrl;      /* contents of the model control reg*/
650     UChar			Model1Mono;     /* for model control 1 in mono mode */
651     UChar			Model1Color;    /* for model control 1 in color mode*/
652 
653     UChar			XStepMono;
654     UChar			XStepColor;
655     UChar			XStepBack;
656 
657     long			lUpNormal;      /* device specific offsets */
658     long			lUpPositive;
659     long			lUpNegative;
660     long			lLeftNormal;
661 
662 } DeviceDef, *pDeviceDef;
663 
664 /*
665  * to hold all the shading stuff for calibrating a scanner
666  */
667 typedef struct
668 {
669     pRGBUShortDef	pHilight;
670     ColorByte		Hilight;
671     ULong   		dwDiv;
672     UShort			wExposure;
673     UShort  		wXStep;
674 
675     UChar			skipHilight;
676     UChar			skipShadow;
677     ULong			shadingBytes;
678 
679     pDACTblDef		pCcdDac;
680     ColorByte		DarkDAC;
681     ColorWord		DarkOffset;
682     UShort			wDarkLevels;
683     UChar			bIntermediate;
684 
685     ColorByte		Gain;
686     UChar			bGainDouble;
687     UChar			bUniGain;
688     Byte			bMinGain;
689     Byte			bMaxGain;
690     Byte			bGainHigh;
691     Byte			bGainLow;
692 
693     Bool			fStop;
694 
695 } ShadingDef, *pShadingDef;
696 
697 
698 /*
699  * structure to hold scan-specific data
700  */
701 typedef struct _SCANDEF
702 {
703 #if 0
704     DWORD			dwLinesRead;
705     LONG			lBufAdjust;
706     DRVBOOL			fBackmove;
707     DRVBOOL			fEsc;
708     UCHAR			Reserved;
709 #endif
710 
711     pFnBool			DoSample;
712     pFnDataProcess	DataProcess;    /* to convert RGB buffers to RGB pixels */
713     pFnBool			DataRead;       /* function to get data from scanner    */
714 
715     ULong			dwLinesToRead;  /* number of images lines to read       */
716     Long	    	lBufferAdjust;
717 
718     ULong			dwScanOrigin;   /* where to start the scan              */
719     Bool			fRefreshState;  /* refresh ?                            */
720     Bool			fMotorBackward;
721     UChar			motorPower;     /* how to drive the motor               */
722 
723     ULong			dwMinReadFifo;
724     ULong			dwMaxReadFifo;
725     Byte            bFifoSelect;    /* defines which FIFO to use            */
726 
727     UChar			bDiscardAll;
728     ULong			dwInterval;
729     ULong			dwInterlace;    /* CHECK: here always 0 - remove ?     */
730 
731     union {
732         UShort		wGreenDiscard;
733         UShort  	wGreenKeep;
734     } gd_gk;
735     union {
736         UShort		wBlueDiscard;
737         UShort  	wRedKeep;
738     } bd_rk;
739 
740     UChar			bRefresh;       /* for controlling the movement         */
741     UChar			bOldScanState;
742     UChar   		bNowScanState;
743     UChar			bModuleState;
744 
745     DataPointer 	p48BitBuf;      /* for handling 48-bit data             */
746     union {
747         pUChar  	pMonoBuf;
748         DataPointer ColorBuf;
749     } bp;
750 
751     RBGPtrDef       BufBegin;       /* for reading/writing the scan-data    */
752     RBGPtrDef       BufEnd;
753     RBGPtrDef       BufGet;
754     RBGPtrDef       BufData;
755     RBGPtrDef       BufPut;
756 
757     ULong           negBegin;       /* used while scanning in TPA modes     */
758     ULong           posBegin;
759 
760     ULong           dpiIdx;         /* index to get/set values in the table */
761     pExtXStepDef    negScan;        /* reference to exposure/xtep table     */
762 
763 } ScanDef, *pScanDef;
764 
765 /*
766  * structure to hold buffer pointers
767  */
768 typedef struct {
769 
770     union {
771     	pUChar		pReadBuf;
772     	pUChar		pShadingMap;
773     	pUChar		pRWTestBuffer;
774     	pUShort		pShadingRam;
775     	DataPointer	Buf;
776     } b1;
777 
778     union {
779         pUChar        pSumBuf;
780 	    pRGBUShortDef pSumRGB;
781 	    pUChar		  pRWTestBuffer1;
782     } b2;
783     DataPointer TpaBuf;
784 
785 } BufferDef, *pBufferDef;
786 
787 
788 /* Register RegBitDepth (Addr: 0x13) - ASIC 9800x */
789 #define _BIT0_7		            0x00
790 #define _BIT8_15		        0x01
791 #define _BIT16_20	    	    0x02
792 
793 /* Register RegStepControl (Addr: 0x14) - ASIC 9800x */
794 #define _MOTOR0_ONESTEP	        0x01
795 #define _MOTOR0_SCANSTATE	    0x02
796 #define _MOTOR_FREERUN          0x40
797 #define _MOTOR_NOFREERUN        0x00
798 
799 /* Register RegGetScanState (Addr: 0x17, 0x12 on 9600x) - ASIC 9800x */
800 #define _SCANSTATE_MASK         0x3f	/* bit 0-5 */
801 #define _SCANSTATE_STOP	        0x80
802 
803 /* Register RegReadIOBufBus (Addr: 0x17) - ASIC 9600x only */
804 #define _IOBUF_BUSMASK	        0x0f	/* bit 0-3 */
805 
806 /* Register RegMemoryLow/High (Addr: 0x19/0x1a) - ASIC 9800x */
807 #define _MAP_ADDR_RED           0x00
808 #define _MAP_ADDR_GREEN	        0x40
809 #define _MAP_ADDR_BLUE	        0x80
810 #define _MAP_ADDR_SIZE	        0x40	/* 0x4000 */
811 
812 /* Register RegModeControl (Addr: 0x1b, 0x18 on 9600x) - all ASICs*/
813 #define _ModeScan		        0x00    /* all ASICs       */
814 #define _ModeProgram	        0x01    /* 9600x def       */
815 #define _ModeIdle		        0x01    /* 9800x defs      */
816 #define _ModeShadingMem	        0x02
817 #define _ModeMappingMem	        0x03
818 #define _ModeReadMappingMem     0x07
819 #define _ModeFifoRSel	        0x00
820 #define _ModeFifoGSel	        0x08
821 #define _ModeFifoBSel	        0x10
822 #define _ModeFifoClose          0x18
823 
824 /* Register RegLineControl (Addr: 0x1c, 0x19 on 9600x) - all ASICs*/
825 #define _LINE_SCANTIME_MASK     0x3f	/* bit 0-6              */
826 #define _LINE_CDSINVERSE        0x80	/* Color Drive Signal   */
827 
828 /* Register RegScanControl (Addr: 0x1d) - all ASICs*/
829 #define _SCAN_BITMODE	        0x00
830 #define _SCAN_BYTEMODE	        0x01	/* Gray/Color mode                  */
831 #define _SCAN_1ST_AVERAGE	    0x04	/* first pixel is averaged pixel    */
832 #define _SCAN_BITDIRR2L         0x08	/* bit shift from right to left     */
833 
834 /* ASIC 9600x section */
835 #define _P96_SCANDATA_INVERT    0x02
836 #define _SCAN_LAMP_ON 	        0x10
837 
838 /* ASIC 9800x section */
839 #define _SCAN_12BITMODE         0x02
840 #define _SCAN_NORMALLAMP_ON     0x10    /* normal Lamp  */
841 #define _SCAN_TPALAMP_ON        0x20
842 #define _P98_SCANDATA_INVERT    0x40
843 #define _BITALIGN_LEFT	        0x80
844 
845 #define _SCAN_LAMPS_ON          (_SCAN_NORMALLAMP_ON | _SCAN_TPALAMP_ON)
846 
847 /* Register RegMotor0Control (Addr: 0x15) */
848 #define _MotorDirForward	    0x01
849 #define _MotorDirBackward	    0x00
850 #define _MotorOn		        0x02
851 #define _MotorHFullStepH	    0x00
852 #define _MotorHHalfStep	        0x04
853 #define _MotorHQuarterStep	    0x08
854 #define _MotorHEightStep	    0x08	/* for 2916 driver      */
855 #define _MotorPowerEnable	    0x40    /* ASIC 98003 specific  */
856 #define _MotorHHomeStop	        0x80
857 
858 #define _FORWARD_MOTOR			(_MotorDirForward + _MotorOn + \
859                					 _MotorHQuarterStep + _MotorPowerEnable)
860 
861 /* Register RegConfiguration (Addr: 0x1e), ASIC 9800x */
862 #define	_P98_CCD_TYPE_ID	    0x07
863 #define	_P98_NEC_MACHINE        0x08
864 #define _P98_PCBID		        0xF0
865 
866 #define _CCD_3797		        0
867 #define _CCD_3717		        1
868 #define _CCD_3799	            1   /* new for 98003     */
869 #define _CCD_535		        2
870 #define _CCD_2556		        3
871 #define _CCD_518		        4
872 #define _CCD_539		        5	/* default for 98001 */
873 #define _CCD_3777	            6   /* new for 98003     */
874 #define _CCD_548 	            7   /* new for 98003     */
875 
876 /* ASIC 98003 section */
877 #define _OPTICWORKS2000         0x00
878 #define _PLUSTEK_SCANNER        0x10
879 #define _SCANNER_WITH_TPA       0x20
880 #define _SCANNER4Button         0x30
881 #define _SCANNER4ButtonTPA      0x40
882 #define _SCANNER5Button         0x50
883 #define _SCANNER5ButtonTPA      0x60
884 #define _SCANNER1Button         0x70
885 #define _SCANNER1ButtonTPA      0x80
886 #define _SCANNER2Button         0x90
887 #define _AGFA_SCANNER	        0xf0
888 #define _AGFA_PCB   	        0x1f
889 
890 /* Register RegModelControl (Addr: 0x1f), all ASICs */
891 #define _ModelSampleAndHold     0x01	/* sample and hold              */
892 #define _ModelWhiteIs0	        0x02	/* white is 0                   */
893 #define _ModelInvertPF	        0x04	/* invert paper flag            */
894 #define _ModelDpi200	           0	/* (400 / 2)                    */
895 #define _ModelDpi300	        0x08	/* (600 / 2)                    */
896 #define _ModelDpi400	        0x10	/* (800 / 2)                    */
897 #define _ModelDpi600	        0x18	/* (1200 / 2)                   */
898 #define _ModelMemSize32k3	       0	/* 32k for 300 dpi color        */
899 #define _ModelMemSize64k3	    0x20	/* 64k for 300 dpi color        */
900 #define _ModelMemSize128k3	    0x40	/* 128k for 300 dpi color       */
901 #define _ModelMemSize64k4	    0x60	/* 64k for 400/600 dpi color    */
902 #define _ModelMemSize128k4	    0x80	/* 128k for 400/600 dpi color   */
903 
904 #define _ModelMemSize8k	           0    /* for 96001 */
905 #define _ModelMemSize8k3	    0x20
906 #define _ModelMemSize32k96001   0x40
907 #define _ModelMemSize128k396001 0x60
908 #define _ModelMemSize128k696001 0x80
909 
910 #define _HOME_SENSOR_POLARITY   0x01    /* 9800x */
911 #define _LED_CONTROL 	        0x02
912 #define _LED_ACTIVITY	        0x04
913 #define _MODEL_DPI800	        0x20
914 #define _MODEL_DPI1200	        0x28
915 #define _DUMMY_12BIT 	        0x40
916 
917 /* Register RegModel1Control (Addr: 0x20), 9800x */
918 #define _SCAN_GRAYTYPE	        0x01
919 #define _CCD_SHIFT_GATE 	    0x02
920 #define _CCD_SHIFT_PULSE	    0x04
921 #define _BUTTON_MODE     	    0x08
922 #define _MOTOR_2003		        0x00
923 #define _MOTOR_2916		        0x10
924 #define _MOTOR_7042		        0x20
925 
926 /* Register RegThresholdGapControl (Addr: 0x29, 0x27 on 9600x ) - all ASICs */
927 #define _THRESHOLDGAP_MASK      0x0f
928 
929 /* Register RegResetConfig (Addr: 0x2e) */
930 #define _ADC_MASK		        0x07
931 #define _DA_WOLFSON8143	        0x00
932 #define _DA_ESIC 	            0x04
933 #define _DA_SAMSUNG8531	        0x05
934 #define _DA_WOLFSON8141	        0x06
935 #define _DA_SAMSUNG1224	        0x07
936 #define _MOTOR0_MASK 	        0x18
937 #define _MOTOR0_2003	        0x00
938 #define _MOTOR0_2916	        0x08
939 #define _MOTOR0_7042	        0x10
940 #define _MOTOR1_MASK 	        0x60
941 #define _MOTOR1_2003	        0x00
942 #define _MOTOR1_2916	        0x20
943 #define _MOTOR1_7042	        0x40
944 
945 /* Register RegFifoFullLength (Addr: 0x54) */
946 #define _RED_FULLSIZE	        0x00
947 #define _GREEN_FULLSIZE         0x08
948 #define _BLUE_FULLSIZE	        0x10
949 
950 /* Register RegScanControl1	(Addr: 0x5b) */
951 #define _MTSC_ENABLE 	        0x01
952 #define _SCANSTOPONBUFFULL      0x02
953 #define _MFRC_RUNSCANSTATE      0x04
954 #define _MFRC_BY_XSTEP	        0x08
955 
956 /* Register RegMotorDriverType (Addr: 0x64) */
957 #define _MOTORS_MASK 	        0x33
958 #define _MOTORR_MASK	        0xf3
959 #define _MOTORR_WEAK	        0x04
960 #define _MOTORR_MEDIUM	        0x08
961 #define _MOTORR_STRONG	        0x0c
962 #define _MOTORT_WEAK	        0x40
963 #define _MOTORT_MEDIUM	        0x80
964 #define _MOTORT_STRONG	        0xc0
965 #define _BUTTON_SELECT1	        0x40
966 #define _BUTTON_SELECT2	        0x80
967 #define _BUTTON_DISABLE	        0xc0
968 
969 /* Register RegStatus2	(Addr: 0x66) */
970 #define _REFLECTIONLAMP_ON      0x01
971 #define _TPALAMP_ON 	        0x02
972 #define _STILL_FREE_RUNNING     0x04
973 #define _BUFFER_IS_FULL	        0x08
974 
975 /* Register RegTestMode	(Addr: 0xf0) */
976 #define _SW_TESTMODE	        0x20
977 
978 /* other stuff... */
979 
980 /* CHECK: changes this stuff... */
981 #define _BytesPerChannel	    5500UL
982 #define _SizeDataBuf		(ULong)(_BytesPerChannel * 3 * 2)
983 #define _SizeTpaDataBuf 	(ULong)(_BytesPerChannel * 3 * 2)
984 #define _SizeShadingSumBuf	(ULong)(_BytesPerChannel * 3 * 4)
985 #define _SizeTotalBuf		(ULong)(_SizeDataBuf + _SizeShadingSumBuf)
986 #define _SizeTotalBufTpa	(ULong)(_SizeTotalBuf + _SizeTpaDataBuf)
987 
988 /* for DAC programming (ASIC 98003)*/
989 #define _VALUE_CONFIG		    0x51
990 #define _DAC_RED 	    	    (Byte)(_VALUE_CONFIG | 0x00)
991 #define _DAC_GREENCOLOR		    (Byte)(_VALUE_CONFIG | 0x04)
992 #define _DAC_GREENMONO		    (Byte)(_VALUE_CONFIG | 0x06)
993 #define _DAC_BLUE   		    (Byte)(_VALUE_CONFIG | 0x08)
994 
995 /* internal FIFO buffers (ASIC 9800x) */
996 #define _SIZE_REDFIFO		    196608UL	/* 192k */
997 #define _SIZE_GREENFIFO		    147456UL	/* 144k */
998 #define _SIZE_BLUEFIFO		    114688UL	/* 112k */
999 
1000 #define _SIZE_COLORFIFO	        _SIZE_BLUEFIFO
1001 #define _SIZE_GRAYFIFO	    (_SIZE_REDFIFO + _SIZE_GREENFIFO + _SIZE_BLUEFIFO)
1002 
1003 /* Scan State Definitions */
1004 #define _SS_STEP		        0x08
1005 #define _SS_RED 		        0x04
1006 #define _SS_GREEN		        0x02
1007 #define _SS_BLUE		        0x01
1008 
1009 #define _SS_MONO		        _SS_GREEN
1010 #define _SS_COLOR		        (_SS_RED | _SS_GREEN | _SS_BLUE)
1011 
1012 /* for shading */
1013 #define _CHANNEL_RED	        0
1014 #define _CHANNEL_GREEN	        1
1015 #define _CHANNEL_BLUE	        2
1016 
1017 #endif	/* guard __HWDEFS_H__ */
1018 
1019 /* END PLUSTEK-PP_HWDEFS.H ..................................................*/
1020