1 /****************************************************************************
2  ****************************************************************************
3  ***
4  ***   This header was automatically generated from a Linux kernel header
5  ***   of the same name, to make information necessary for userspace to
6  ***   call into the kernel available to libc.  It contains only constants,
7  ***   structures, and macros generated from the original header, and thus,
8  ***   contains no copyrightable information.
9  ***
10  ***   To edit the content of this header, modify the corresponding
11  ***   source file (e.g. under external/kernel-headers/original/) then
12  ***   run bionic/libc/kernel/tools/update_all.py
13  ***
14  ***   Any manual change here will be lost the next time this script will
15  ***   be run. You've been warned!
16  ***
17  ****************************************************************************
18  ****************************************************************************/
19 #ifndef _ASM_PTRACE_H
20 #define _ASM_PTRACE_H
21 
22 #include <linux/types.h>
23 
24 #include <stdint.h>
25 
26 /*
27  * For PTRACE_{POKE,PEEK}USR. 0 - 31 are GPRs,
28  * 32 is syscall's original ARG0, 33 is PC, 34 is BADVADDR.
29  */
30 #define GPR_BASE	0
31 #define GPR_NUM		32
32 #define GPR_END		(GPR_BASE + GPR_NUM - 1)
33 #define ARG0		(GPR_END + 1)
34 #define PC		(GPR_END + 2)
35 #define BADVADDR	(GPR_END + 3)
36 
37 #define NUM_FPU_REGS	32
38 
39 struct user_pt_regs {
40 	/* Main processor registers. */
41 	unsigned long regs[32];
42 
43 	/* Original syscall arg0. */
44 	unsigned long orig_a0;
45 
46 	/* Special CSR registers. */
47 	unsigned long csr_era;
48 	unsigned long csr_badv;
49 	unsigned long reserved[10];
50 } __attribute__((aligned(8)));
51 
52 struct user_fp_state {
53 	uint64_t fpr[32];
54 	uint64_t fcc;
55 	uint32_t fcsr;
56 };
57 
58 struct user_lsx_state {
59 	/* 32 registers, 128 bits width per register. */
60 	uint64_t vregs[32*2];
61 };
62 
63 struct user_lasx_state {
64 	/* 32 registers, 256 bits width per register. */
65 	uint64_t vregs[32*4];
66 };
67 
68 /*
69  * This structure definition saves the LBT data structure,
70  * the data comes from the task_struct structure, format is as follows:
71  * regs[0]: thread.lbt.scr0
72  * regs[1]: thread.lbt.scr1
73  * regs[2]: thread.lbt.scr2
74  * regs[3]: thread.lbt.scr3
75  * regs[4]: thread.lbt.eflags
76  * regs[5]: thread.fpu.ftop
77  */
78 struct user_lbt_state {
79 	uint64_t regs[6];
80 };
81 
82 /* Read and write watchpoint registers.	 */
83 #define NUM_WATCH_REGS 16
84 
85 enum pt_watch_style {
86 	pt_watch_style_la32,
87 	pt_watch_style_la64
88 };
89 
90 struct la32_watch_regs {
91 	uint32_t addr;
92 	uint32_t mask;
93 	/* irw/irwsta/irwmask I R W bits.
94 	 * bit 0 -- 1 if W bit is usable.
95 	 * bit 1 -- 1 if R bit is usable.
96 	 * bit 2 -- 1 if I bit is usable.
97 	 */
98 	uint8_t irw;
99 	uint8_t irwstat;
100 	uint8_t irwmask;
101 } __attribute__((aligned(8)));
102 
103 struct la64_watch_regs {
104 	uint64_t addr;
105 	uint64_t mask;
106 	/* irw/irwsta/irwmask I R W bits.
107 	 * bit 0 -- 1 if W bit is usable.
108 	 * bit 1 -- 1 if R bit is usable.
109 	 * bit 2 -- 1 if I bit is usable.
110 	 */
111 	uint8_t irw;
112 	uint8_t irwstat;
113 	uint8_t irwmask;
114 } __attribute__((aligned(8)));
115 
116 struct pt_watch_regs {
117 	int16_t max_valid;
118 	int16_t num_valid;
119 	enum pt_watch_style style;
120 	union {
121 		struct la32_watch_regs la32[NUM_WATCH_REGS];
122 		struct la64_watch_regs la64[NUM_WATCH_REGS];
123 	};
124 };
125 
126 #define PTRACE_SYSEMU			0x1f
127 #define PTRACE_SYSEMU_SINGLESTEP	0x20
128 #define PTRACE_GET_WATCH_REGS		0xd0
129 #define PTRACE_SET_WATCH_REGS		0xd1
130 
131 /* Watch irw/irwmask/irwstat bit definitions */
132 #define LA_WATCH_W		(1 << 0)
133 #define LA_WATCH_R		(1 << 1)
134 #define LA_WATCH_I		(1 << 2)
135 #define LA_WATCH_IRW	(LA_WATCH_W | LA_WATCH_R | LA_WATCH_I)
136 
137 #endif /* _ASM_PTRACE_H */
138