1/* 2 * This header was generated from the Linux kernel headers by update_headers.py, 3 * to provide necessary information from kernel to userspace, such as constants, 4 * structures, and macros, and thus, contains no copyrightable information. 5 */ 6#ifndef __R128_DRM_H__ 7#define __R128_DRM_H__ 8#include "drm.h" 9#if defined(__cplusplus) 10extern "C" { 11#endif 12#ifndef __R128_SAREA_DEFINES__ 13#define __R128_SAREA_DEFINES__ 14#define R128_UPLOAD_CONTEXT 0x001 15#define R128_UPLOAD_SETUP 0x002 16#define R128_UPLOAD_TEX0 0x004 17#define R128_UPLOAD_TEX1 0x008 18#define R128_UPLOAD_TEX0IMAGES 0x010 19#define R128_UPLOAD_TEX1IMAGES 0x020 20#define R128_UPLOAD_CORE 0x040 21#define R128_UPLOAD_MASKS 0x080 22#define R128_UPLOAD_WINDOW 0x100 23#define R128_UPLOAD_CLIPRECTS 0x200 24#define R128_REQUIRE_QUIESCENCE 0x400 25#define R128_UPLOAD_ALL 0x7ff 26#define R128_FRONT 0x1 27#define R128_BACK 0x2 28#define R128_DEPTH 0x4 29#define R128_POINTS 0x1 30#define R128_LINES 0x2 31#define R128_LINE_STRIP 0x3 32#define R128_TRIANGLES 0x4 33#define R128_TRIANGLE_FAN 0x5 34#define R128_TRIANGLE_STRIP 0x6 35#define R128_BUFFER_SIZE 16384 36#define R128_INDEX_PRIM_OFFSET 20 37#define R128_HOSTDATA_BLIT_OFFSET 32 38#define R128_NR_SAREA_CLIPRECTS 12 39#define R128_LOCAL_TEX_HEAP 0 40#define R128_AGP_TEX_HEAP 1 41#define R128_NR_TEX_HEAPS 2 42#define R128_NR_TEX_REGIONS 64 43#define R128_LOG_TEX_GRANULARITY 16 44#define R128_NR_CONTEXT_REGS 12 45#define R128_MAX_TEXTURE_LEVELS 11 46#define R128_MAX_TEXTURE_UNITS 2 47#endif 48typedef struct { 49 50 unsigned int dst_pitch_offset_c; 51 unsigned int dp_gui_master_cntl_c; 52 unsigned int sc_top_left_c; 53 unsigned int sc_bottom_right_c; 54 unsigned int z_offset_c; 55 unsigned int z_pitch_c; 56 unsigned int z_sten_cntl_c; 57 unsigned int tex_cntl_c; 58 unsigned int misc_3d_state_cntl_reg; 59 unsigned int texture_clr_cmp_clr_c; 60 unsigned int texture_clr_cmp_msk_c; 61 unsigned int fog_color_c; 62 63 unsigned int tex_size_pitch_c; 64 unsigned int constant_color_c; 65 66 unsigned int pm4_vc_fpu_setup; 67 unsigned int setup_cntl; 68 69 unsigned int dp_write_mask; 70 unsigned int sten_ref_mask_c; 71 unsigned int plane_3d_mask_c; 72 73 unsigned int window_xy_offset; 74 75 unsigned int scale_3d_cntl; 76} drm_r128_context_regs_t; 77typedef struct { 78 unsigned int tex_cntl; 79 unsigned int tex_combine_cntl; 80 unsigned int tex_size_pitch; 81 unsigned int tex_offset[R128_MAX_TEXTURE_LEVELS]; 82 unsigned int tex_border_color; 83} drm_r128_texture_regs_t; 84typedef struct drm_r128_sarea { 85 86 drm_r128_context_regs_t context_state; 87 drm_r128_texture_regs_t tex_state[R128_MAX_TEXTURE_UNITS]; 88 unsigned int dirty; 89 unsigned int vertsize; 90 unsigned int vc_format; 91 92 struct drm_clip_rect boxes[R128_NR_SAREA_CLIPRECTS]; 93 unsigned int nbox; 94 95 unsigned int last_frame; 96 unsigned int last_dispatch; 97 struct drm_tex_region tex_list[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS + 1]; 98 unsigned int tex_age[R128_NR_TEX_HEAPS]; 99 int ctx_owner; 100 int pfAllowPageFlip; 101 int pfCurrentPage; 102} drm_r128_sarea_t; 103#define DRM_R128_INIT 0x00 104#define DRM_R128_CCE_START 0x01 105#define DRM_R128_CCE_STOP 0x02 106#define DRM_R128_CCE_RESET 0x03 107#define DRM_R128_CCE_IDLE 0x04 108#define DRM_R128_RESET 0x06 109#define DRM_R128_SWAP 0x07 110#define DRM_R128_CLEAR 0x08 111#define DRM_R128_VERTEX 0x09 112#define DRM_R128_INDICES 0x0a 113#define DRM_R128_BLIT 0x0b 114#define DRM_R128_DEPTH 0x0c 115#define DRM_R128_STIPPLE 0x0d 116#define DRM_R128_INDIRECT 0x0f 117#define DRM_R128_FULLSCREEN 0x10 118#define DRM_R128_CLEAR2 0x11 119#define DRM_R128_GETPARAM 0x12 120#define DRM_R128_FLIP 0x13 121#define DRM_IOCTL_R128_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INIT, drm_r128_init_t) 122#define DRM_IOCTL_R128_CCE_START DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_START) 123#define DRM_IOCTL_R128_CCE_STOP DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CCE_STOP, drm_r128_cce_stop_t) 124#define DRM_IOCTL_R128_CCE_RESET DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_RESET) 125#define DRM_IOCTL_R128_CCE_IDLE DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_IDLE) 126#define DRM_IOCTL_R128_RESET DRM_IO( DRM_COMMAND_BASE + DRM_R128_RESET) 127#define DRM_IOCTL_R128_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_R128_SWAP) 128#define DRM_IOCTL_R128_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR, drm_r128_clear_t) 129#define DRM_IOCTL_R128_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_R128_VERTEX, drm_r128_vertex_t) 130#define DRM_IOCTL_R128_INDICES DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INDICES, drm_r128_indices_t) 131#define DRM_IOCTL_R128_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_R128_BLIT, drm_r128_blit_t) 132#define DRM_IOCTL_R128_DEPTH DRM_IOW( DRM_COMMAND_BASE + DRM_R128_DEPTH, drm_r128_depth_t) 133#define DRM_IOCTL_R128_STIPPLE DRM_IOW( DRM_COMMAND_BASE + DRM_R128_STIPPLE, drm_r128_stipple_t) 134#define DRM_IOCTL_R128_INDIRECT DRM_IOWR(DRM_COMMAND_BASE + DRM_R128_INDIRECT, drm_r128_indirect_t) 135#define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( DRM_COMMAND_BASE + DRM_R128_FULLSCREEN, drm_r128_fullscreen_t) 136#define DRM_IOCTL_R128_CLEAR2 DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR2, drm_r128_clear2_t) 137#define DRM_IOCTL_R128_GETPARAM DRM_IOWR( DRM_COMMAND_BASE + DRM_R128_GETPARAM, drm_r128_getparam_t) 138#define DRM_IOCTL_R128_FLIP DRM_IO( DRM_COMMAND_BASE + DRM_R128_FLIP) 139typedef struct drm_r128_init { 140 enum { 141 R128_INIT_CCE = 0x01, 142 R128_CLEANUP_CCE = 0x02 143 } func; 144 unsigned long sarea_priv_offset; 145 int is_pci; 146 int cce_mode; 147 int cce_secure; 148 int ring_size; 149 int usec_timeout; 150 unsigned int fb_bpp; 151 unsigned int front_offset, front_pitch; 152 unsigned int back_offset, back_pitch; 153 unsigned int depth_bpp; 154 unsigned int depth_offset, depth_pitch; 155 unsigned int span_offset; 156 unsigned long fb_offset; 157 unsigned long mmio_offset; 158 unsigned long ring_offset; 159 unsigned long ring_rptr_offset; 160 unsigned long buffers_offset; 161 unsigned long agp_textures_offset; 162} drm_r128_init_t; 163typedef struct drm_r128_cce_stop { 164 int flush; 165 int idle; 166} drm_r128_cce_stop_t; 167typedef struct drm_r128_clear { 168 unsigned int flags; 169 unsigned int clear_color; 170 unsigned int clear_depth; 171 unsigned int color_mask; 172 unsigned int depth_mask; 173} drm_r128_clear_t; 174typedef struct drm_r128_vertex { 175 int prim; 176 int idx; 177 int count; 178 int discard; 179} drm_r128_vertex_t; 180typedef struct drm_r128_indices { 181 int prim; 182 int idx; 183 int start; 184 int end; 185 int discard; 186} drm_r128_indices_t; 187typedef struct drm_r128_blit { 188 int idx; 189 int pitch; 190 int offset; 191 int format; 192 unsigned short x, y; 193 unsigned short width, height; 194} drm_r128_blit_t; 195typedef struct drm_r128_depth { 196 enum { 197 R128_WRITE_SPAN = 0x01, 198 R128_WRITE_PIXELS = 0x02, 199 R128_READ_SPAN = 0x03, 200 R128_READ_PIXELS = 0x04 201 } func; 202 int n; 203 int __user *x; 204 int __user *y; 205 unsigned int __user *buffer; 206 unsigned char __user *mask; 207} drm_r128_depth_t; 208typedef struct drm_r128_stipple { 209 unsigned int __user *mask; 210} drm_r128_stipple_t; 211typedef struct drm_r128_indirect { 212 int idx; 213 int start; 214 int end; 215 int discard; 216} drm_r128_indirect_t; 217typedef struct drm_r128_fullscreen { 218 enum { 219 R128_INIT_FULLSCREEN = 0x01, 220 R128_CLEANUP_FULLSCREEN = 0x02 221 } func; 222} drm_r128_fullscreen_t; 223#define R128_PARAM_IRQ_NR 1 224typedef struct drm_r128_getparam { 225 int param; 226 void __user *value; 227} drm_r128_getparam_t; 228#if defined(__cplusplus) 229} 230#endif 231#endif 232