1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // Driver for Cirrus Logic CS35L56 smart amp
4 //
5 // Copyright (C) 2023 Cirrus Logic, Inc. and
6 // Cirrus Logic International Semiconductor Ltd.
7
8 #include <linux/completion.h>
9 #include <linux/debugfs.h>
10 #include <linux/delay.h>
11 #include <linux/err.h>
12 #include <linux/gpio/consumer.h>
13 #include <linux/interrupt.h>
14 #include <linux/math.h>
15 #include <linux/module.h>
16 #include <linux/pm.h>
17 #include <linux/pm_runtime.h>
18 #include <linux/regmap.h>
19 #include <linux/regulator/consumer.h>
20 #include <linux/slab.h>
21 #include <linux/soundwire/sdw.h>
22 #include <linux/types.h>
23 #include <linux/workqueue.h>
24 #include <sound/pcm.h>
25 #include <sound/pcm_params.h>
26 #include <sound/soc.h>
27 #include <sound/soc-dapm.h>
28 #include <sound/tlv.h>
29
30 #include "wm_adsp.h"
31 #include "cs35l56.h"
32
33 static int cs35l56_dsp_event(struct snd_soc_dapm_widget *w,
34 struct snd_kcontrol *kcontrol, int event);
35
cs35l56_wait_dsp_ready(struct cs35l56_private *cs35l56)36 static void cs35l56_wait_dsp_ready(struct cs35l56_private *cs35l56)
37 {
38 /* Wait for patching to complete */
39 flush_work(&cs35l56->dsp_work);
40 }
41
cs35l56_dspwait_get_volsw(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)42 static int cs35l56_dspwait_get_volsw(struct snd_kcontrol *kcontrol,
43 struct snd_ctl_elem_value *ucontrol)
44 {
45 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
46 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
47
48 cs35l56_wait_dsp_ready(cs35l56);
49 return snd_soc_get_volsw(kcontrol, ucontrol);
50 }
51
cs35l56_dspwait_put_volsw(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)52 static int cs35l56_dspwait_put_volsw(struct snd_kcontrol *kcontrol,
53 struct snd_ctl_elem_value *ucontrol)
54 {
55 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
56 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
57
58 cs35l56_wait_dsp_ready(cs35l56);
59 return snd_soc_put_volsw(kcontrol, ucontrol);
60 }
61
62 static const unsigned short cs35l56_asp1_mixer_regs[] = {
63 CS35L56_ASP1TX1_INPUT, CS35L56_ASP1TX2_INPUT,
64 CS35L56_ASP1TX3_INPUT, CS35L56_ASP1TX4_INPUT,
65 };
66
67 static const char * const cs35l56_asp1_mux_control_names[] = {
68 "ASP1 TX1 Source", "ASP1 TX2 Source", "ASP1 TX3 Source", "ASP1 TX4 Source"
69 };
70
cs35l56_sync_asp1_mixer_widgets_with_firmware(struct cs35l56_private *cs35l56)71 static int cs35l56_sync_asp1_mixer_widgets_with_firmware(struct cs35l56_private *cs35l56)
72 {
73 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(cs35l56->component);
74 const char *prefix = cs35l56->component->name_prefix;
75 char full_name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
76 const char *name;
77 struct snd_kcontrol *kcontrol;
78 struct soc_enum *e;
79 unsigned int val[4];
80 int i, item, ret;
81
82 if (cs35l56->asp1_mixer_widgets_initialized)
83 return 0;
84
85 /*
86 * Resume so we can read the registers from silicon if the regmap
87 * cache has not yet been populated.
88 */
89 ret = pm_runtime_resume_and_get(cs35l56->base.dev);
90 if (ret < 0)
91 return ret;
92
93 /* Wait for firmware download and reboot */
94 cs35l56_wait_dsp_ready(cs35l56);
95
96 ret = regmap_bulk_read(cs35l56->base.regmap, CS35L56_ASP1TX1_INPUT,
97 val, ARRAY_SIZE(val));
98
99 pm_runtime_mark_last_busy(cs35l56->base.dev);
100 pm_runtime_put_autosuspend(cs35l56->base.dev);
101
102 if (ret) {
103 dev_err(cs35l56->base.dev, "Failed to read ASP1 mixer regs: %d\n", ret);
104 return ret;
105 }
106
107 for (i = 0; i < ARRAY_SIZE(cs35l56_asp1_mux_control_names); ++i) {
108 name = cs35l56_asp1_mux_control_names[i];
109
110 if (prefix) {
111 snprintf(full_name, sizeof(full_name), "%s %s", prefix, name);
112 name = full_name;
113 }
114
115 kcontrol = snd_soc_card_get_kcontrol_locked(dapm->card, name);
116 if (!kcontrol) {
117 dev_warn(cs35l56->base.dev, "Could not find control %s\n", name);
118 continue;
119 }
120
121 e = (struct soc_enum *)kcontrol->private_value;
122 item = snd_soc_enum_val_to_item(e, val[i] & CS35L56_ASP_TXn_SRC_MASK);
123 snd_soc_dapm_mux_update_power(dapm, kcontrol, item, e, NULL);
124 }
125
126 cs35l56->asp1_mixer_widgets_initialized = true;
127
128 return 0;
129 }
130
cs35l56_dspwait_asp1tx_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)131 static int cs35l56_dspwait_asp1tx_get(struct snd_kcontrol *kcontrol,
132 struct snd_ctl_elem_value *ucontrol)
133 {
134 struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol);
135 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
136 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
137 int index = e->shift_l;
138 unsigned int addr, val;
139 int ret;
140
141 ret = cs35l56_sync_asp1_mixer_widgets_with_firmware(cs35l56);
142 if (ret)
143 return ret;
144
145 addr = cs35l56_asp1_mixer_regs[index];
146 ret = regmap_read(cs35l56->base.regmap, addr, &val);
147 if (ret)
148 return ret;
149
150 val &= CS35L56_ASP_TXn_SRC_MASK;
151 ucontrol->value.enumerated.item[0] = snd_soc_enum_val_to_item(e, val);
152
153 return 0;
154 }
155
cs35l56_dspwait_asp1tx_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)156 static int cs35l56_dspwait_asp1tx_put(struct snd_kcontrol *kcontrol,
157 struct snd_ctl_elem_value *ucontrol)
158 {
159 struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol);
160 struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_dapm(kcontrol);
161 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
162 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
163 int item = ucontrol->value.enumerated.item[0];
164 int index = e->shift_l;
165 unsigned int addr, val;
166 bool changed;
167 int ret;
168
169 ret = cs35l56_sync_asp1_mixer_widgets_with_firmware(cs35l56);
170 if (ret)
171 return ret;
172
173 addr = cs35l56_asp1_mixer_regs[index];
174 val = snd_soc_enum_item_to_val(e, item);
175
176 ret = regmap_update_bits_check(cs35l56->base.regmap, addr,
177 CS35L56_ASP_TXn_SRC_MASK, val, &changed);
178 if (ret)
179 return ret;
180
181 if (changed)
182 snd_soc_dapm_mux_update_power(dapm, kcontrol, item, e, NULL);
183
184 return changed;
185 }
186
187 static DECLARE_TLV_DB_SCALE(vol_tlv, -10000, 25, 0);
188
189 static const struct snd_kcontrol_new cs35l56_controls[] = {
190 SOC_SINGLE_EXT("Speaker Switch",
191 CS35L56_MAIN_RENDER_USER_MUTE, 0, 1, 1,
192 cs35l56_dspwait_get_volsw, cs35l56_dspwait_put_volsw),
193 SOC_SINGLE_S_EXT_TLV("Speaker Volume",
194 CS35L56_MAIN_RENDER_USER_VOLUME,
195 6, -400, 400, 9, 0,
196 cs35l56_dspwait_get_volsw,
197 cs35l56_dspwait_put_volsw,
198 vol_tlv),
199 SOC_SINGLE_EXT("Posture Number", CS35L56_MAIN_POSTURE_NUMBER,
200 0, 255, 0,
201 cs35l56_dspwait_get_volsw, cs35l56_dspwait_put_volsw),
202 };
203
204 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx1_enum,
205 SND_SOC_NOPM,
206 0, 0,
207 cs35l56_tx_input_texts,
208 cs35l56_tx_input_values);
209
210 static const struct snd_kcontrol_new asp1_tx1_mux =
211 SOC_DAPM_ENUM_EXT("ASP1TX1 SRC", cs35l56_asp1tx1_enum,
212 cs35l56_dspwait_asp1tx_get, cs35l56_dspwait_asp1tx_put);
213
214 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx2_enum,
215 SND_SOC_NOPM,
216 1, 0,
217 cs35l56_tx_input_texts,
218 cs35l56_tx_input_values);
219
220 static const struct snd_kcontrol_new asp1_tx2_mux =
221 SOC_DAPM_ENUM_EXT("ASP1TX2 SRC", cs35l56_asp1tx2_enum,
222 cs35l56_dspwait_asp1tx_get, cs35l56_dspwait_asp1tx_put);
223
224 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx3_enum,
225 SND_SOC_NOPM,
226 2, 0,
227 cs35l56_tx_input_texts,
228 cs35l56_tx_input_values);
229
230 static const struct snd_kcontrol_new asp1_tx3_mux =
231 SOC_DAPM_ENUM_EXT("ASP1TX3 SRC", cs35l56_asp1tx3_enum,
232 cs35l56_dspwait_asp1tx_get, cs35l56_dspwait_asp1tx_put);
233
234 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx4_enum,
235 SND_SOC_NOPM,
236 3, 0,
237 cs35l56_tx_input_texts,
238 cs35l56_tx_input_values);
239
240 static const struct snd_kcontrol_new asp1_tx4_mux =
241 SOC_DAPM_ENUM_EXT("ASP1TX4 SRC", cs35l56_asp1tx4_enum,
242 cs35l56_dspwait_asp1tx_get, cs35l56_dspwait_asp1tx_put);
243
244 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx1_enum,
245 CS35L56_SWIRE_DP3_CH1_INPUT,
246 0, CS35L56_SWIRETXn_SRC_MASK,
247 cs35l56_tx_input_texts,
248 cs35l56_tx_input_values);
249
250 static const struct snd_kcontrol_new sdw1_tx1_mux =
251 SOC_DAPM_ENUM("SDW1TX1 SRC", cs35l56_sdw1tx1_enum);
252
253 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx2_enum,
254 CS35L56_SWIRE_DP3_CH2_INPUT,
255 0, CS35L56_SWIRETXn_SRC_MASK,
256 cs35l56_tx_input_texts,
257 cs35l56_tx_input_values);
258
259 static const struct snd_kcontrol_new sdw1_tx2_mux =
260 SOC_DAPM_ENUM("SDW1TX2 SRC", cs35l56_sdw1tx2_enum);
261
262 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx3_enum,
263 CS35L56_SWIRE_DP3_CH3_INPUT,
264 0, CS35L56_SWIRETXn_SRC_MASK,
265 cs35l56_tx_input_texts,
266 cs35l56_tx_input_values);
267
268 static const struct snd_kcontrol_new sdw1_tx3_mux =
269 SOC_DAPM_ENUM("SDW1TX3 SRC", cs35l56_sdw1tx3_enum);
270
271 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx4_enum,
272 CS35L56_SWIRE_DP3_CH4_INPUT,
273 0, CS35L56_SWIRETXn_SRC_MASK,
274 cs35l56_tx_input_texts,
275 cs35l56_tx_input_values);
276
277 static const struct snd_kcontrol_new sdw1_tx4_mux =
278 SOC_DAPM_ENUM("SDW1TX4 SRC", cs35l56_sdw1tx4_enum);
279
cs35l56_play_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event)280 static int cs35l56_play_event(struct snd_soc_dapm_widget *w,
281 struct snd_kcontrol *kcontrol, int event)
282 {
283 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
284 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
285 unsigned int val;
286 int ret;
287
288 dev_dbg(cs35l56->base.dev, "play: %d\n", event);
289
290 switch (event) {
291 case SND_SOC_DAPM_PRE_PMU:
292 /* Don't wait for ACK, we check in POST_PMU that it completed */
293 return regmap_write(cs35l56->base.regmap, CS35L56_DSP_VIRTUAL1_MBOX_1,
294 CS35L56_MBOX_CMD_AUDIO_PLAY);
295 case SND_SOC_DAPM_POST_PMU:
296 /* Wait for firmware to enter PS0 power state */
297 ret = regmap_read_poll_timeout(cs35l56->base.regmap,
298 CS35L56_TRANSDUCER_ACTUAL_PS,
299 val, (val == CS35L56_PS0),
300 CS35L56_PS0_POLL_US,
301 CS35L56_PS0_TIMEOUT_US);
302 if (ret)
303 dev_err(cs35l56->base.dev, "PS0 wait failed: %d\n", ret);
304 return ret;
305 case SND_SOC_DAPM_POST_PMD:
306 return cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_AUDIO_PAUSE);
307 default:
308 return 0;
309 }
310 }
311
312 static const struct snd_soc_dapm_widget cs35l56_dapm_widgets[] = {
313 SND_SOC_DAPM_REGULATOR_SUPPLY("VDD_B", 0, 0),
314 SND_SOC_DAPM_REGULATOR_SUPPLY("VDD_AMP", 0, 0),
315
316 SND_SOC_DAPM_SUPPLY("PLAY", SND_SOC_NOPM, 0, 0, cs35l56_play_event,
317 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
318
319 SND_SOC_DAPM_OUT_DRV("AMP", SND_SOC_NOPM, 0, 0, NULL, 0),
320 SND_SOC_DAPM_OUTPUT("SPK"),
321
322 SND_SOC_DAPM_PGA_E("DSP1", SND_SOC_NOPM, 0, 0, NULL, 0, cs35l56_dsp_event,
323 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
324
325 SND_SOC_DAPM_AIF_IN("ASP1RX1", NULL, 0, CS35L56_ASP1_ENABLES1,
326 CS35L56_ASP_RX1_EN_SHIFT, 0),
327 SND_SOC_DAPM_AIF_IN("ASP1RX2", NULL, 1, CS35L56_ASP1_ENABLES1,
328 CS35L56_ASP_RX2_EN_SHIFT, 0),
329 SND_SOC_DAPM_AIF_OUT("ASP1TX1", NULL, 0, CS35L56_ASP1_ENABLES1,
330 CS35L56_ASP_TX1_EN_SHIFT, 0),
331 SND_SOC_DAPM_AIF_OUT("ASP1TX2", NULL, 1, CS35L56_ASP1_ENABLES1,
332 CS35L56_ASP_TX2_EN_SHIFT, 0),
333 SND_SOC_DAPM_AIF_OUT("ASP1TX3", NULL, 2, CS35L56_ASP1_ENABLES1,
334 CS35L56_ASP_TX3_EN_SHIFT, 0),
335 SND_SOC_DAPM_AIF_OUT("ASP1TX4", NULL, 3, CS35L56_ASP1_ENABLES1,
336 CS35L56_ASP_TX4_EN_SHIFT, 0),
337
338 SND_SOC_DAPM_MUX("ASP1 TX1 Source", SND_SOC_NOPM, 0, 0, &asp1_tx1_mux),
339 SND_SOC_DAPM_MUX("ASP1 TX2 Source", SND_SOC_NOPM, 0, 0, &asp1_tx2_mux),
340 SND_SOC_DAPM_MUX("ASP1 TX3 Source", SND_SOC_NOPM, 0, 0, &asp1_tx3_mux),
341 SND_SOC_DAPM_MUX("ASP1 TX4 Source", SND_SOC_NOPM, 0, 0, &asp1_tx4_mux),
342
343 SND_SOC_DAPM_MUX("SDW1 TX1 Source", SND_SOC_NOPM, 0, 0, &sdw1_tx1_mux),
344 SND_SOC_DAPM_MUX("SDW1 TX2 Source", SND_SOC_NOPM, 0, 0, &sdw1_tx2_mux),
345 SND_SOC_DAPM_MUX("SDW1 TX3 Source", SND_SOC_NOPM, 0, 0, &sdw1_tx3_mux),
346 SND_SOC_DAPM_MUX("SDW1 TX4 Source", SND_SOC_NOPM, 0, 0, &sdw1_tx4_mux),
347
348 SND_SOC_DAPM_SIGGEN("VMON ADC"),
349 SND_SOC_DAPM_SIGGEN("IMON ADC"),
350 SND_SOC_DAPM_SIGGEN("ERRVOL ADC"),
351 SND_SOC_DAPM_SIGGEN("CLASSH ADC"),
352 SND_SOC_DAPM_SIGGEN("VDDBMON ADC"),
353 SND_SOC_DAPM_SIGGEN("VBSTMON ADC"),
354 SND_SOC_DAPM_SIGGEN("TEMPMON ADC"),
355 };
356
357 #define CS35L56_SRC_ROUTE(name) \
358 { name" Source", "ASP1RX1", "ASP1RX1" }, \
359 { name" Source", "ASP1RX2", "ASP1RX2" }, \
360 { name" Source", "VMON", "VMON ADC" }, \
361 { name" Source", "IMON", "IMON ADC" }, \
362 { name" Source", "ERRVOL", "ERRVOL ADC" }, \
363 { name" Source", "CLASSH", "CLASSH ADC" }, \
364 { name" Source", "VDDBMON", "VDDBMON ADC" }, \
365 { name" Source", "VBSTMON", "VBSTMON ADC" }, \
366 { name" Source", "DSP1TX1", "DSP1" }, \
367 { name" Source", "DSP1TX2", "DSP1" }, \
368 { name" Source", "DSP1TX3", "DSP1" }, \
369 { name" Source", "DSP1TX4", "DSP1" }, \
370 { name" Source", "DSP1TX5", "DSP1" }, \
371 { name" Source", "DSP1TX6", "DSP1" }, \
372 { name" Source", "DSP1TX7", "DSP1" }, \
373 { name" Source", "DSP1TX8", "DSP1" }, \
374 { name" Source", "TEMPMON", "TEMPMON ADC" }, \
375 { name" Source", "INTERPOLATOR", "AMP" }, \
376 { name" Source", "SDW1RX1", "SDW1 Playback" }, \
377 { name" Source", "SDW1RX2", "SDW1 Playback" },
378
379 static const struct snd_soc_dapm_route cs35l56_audio_map[] = {
380 { "AMP", NULL, "VDD_B" },
381 { "AMP", NULL, "VDD_AMP" },
382
383 { "ASP1 Playback", NULL, "PLAY" },
384 { "SDW1 Playback", NULL, "PLAY" },
385
386 { "ASP1RX1", NULL, "ASP1 Playback" },
387 { "ASP1RX2", NULL, "ASP1 Playback" },
388 { "DSP1", NULL, "ASP1RX1" },
389 { "DSP1", NULL, "ASP1RX2" },
390 { "DSP1", NULL, "SDW1 Playback" },
391 { "AMP", NULL, "DSP1" },
392 { "SPK", NULL, "AMP" },
393
394 CS35L56_SRC_ROUTE("ASP1 TX1")
395 CS35L56_SRC_ROUTE("ASP1 TX2")
396 CS35L56_SRC_ROUTE("ASP1 TX3")
397 CS35L56_SRC_ROUTE("ASP1 TX4")
398
399 { "ASP1TX1", NULL, "ASP1 TX1 Source" },
400 { "ASP1TX2", NULL, "ASP1 TX2 Source" },
401 { "ASP1TX3", NULL, "ASP1 TX3 Source" },
402 { "ASP1TX4", NULL, "ASP1 TX4 Source" },
403 { "ASP1 Capture", NULL, "ASP1TX1" },
404 { "ASP1 Capture", NULL, "ASP1TX2" },
405 { "ASP1 Capture", NULL, "ASP1TX3" },
406 { "ASP1 Capture", NULL, "ASP1TX4" },
407
408 CS35L56_SRC_ROUTE("SDW1 TX1")
409 CS35L56_SRC_ROUTE("SDW1 TX2")
410 CS35L56_SRC_ROUTE("SDW1 TX3")
411 CS35L56_SRC_ROUTE("SDW1 TX4")
412 { "SDW1 Capture", NULL, "SDW1 TX1 Source" },
413 { "SDW1 Capture", NULL, "SDW1 TX2 Source" },
414 { "SDW1 Capture", NULL, "SDW1 TX3 Source" },
415 { "SDW1 Capture", NULL, "SDW1 TX4 Source" },
416 };
417
cs35l56_dsp_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event)418 static int cs35l56_dsp_event(struct snd_soc_dapm_widget *w,
419 struct snd_kcontrol *kcontrol, int event)
420 {
421 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
422 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
423
424 dev_dbg(cs35l56->base.dev, "%s: %d\n", __func__, event);
425
426 return wm_adsp_event(w, kcontrol, event);
427 }
428
cs35l56_asp_dai_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)429 static int cs35l56_asp_dai_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
430 {
431 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(codec_dai->component);
432 unsigned int val;
433
434 dev_dbg(cs35l56->base.dev, "%s: %#x\n", __func__, fmt);
435
436 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
437 case SND_SOC_DAIFMT_CBC_CFC:
438 break;
439 default:
440 dev_err(cs35l56->base.dev, "Unsupported clock source mode\n");
441 return -EINVAL;
442 }
443
444 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
445 case SND_SOC_DAIFMT_DSP_A:
446 val = CS35L56_ASP_FMT_DSP_A << CS35L56_ASP_FMT_SHIFT;
447 cs35l56->tdm_mode = true;
448 break;
449 case SND_SOC_DAIFMT_I2S:
450 val = CS35L56_ASP_FMT_I2S << CS35L56_ASP_FMT_SHIFT;
451 cs35l56->tdm_mode = false;
452 break;
453 default:
454 dev_err(cs35l56->base.dev, "Unsupported DAI format\n");
455 return -EINVAL;
456 }
457
458 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
459 case SND_SOC_DAIFMT_NB_IF:
460 val |= CS35L56_ASP_FSYNC_INV_MASK;
461 break;
462 case SND_SOC_DAIFMT_IB_NF:
463 val |= CS35L56_ASP_BCLK_INV_MASK;
464 break;
465 case SND_SOC_DAIFMT_IB_IF:
466 val |= CS35L56_ASP_BCLK_INV_MASK | CS35L56_ASP_FSYNC_INV_MASK;
467 break;
468 case SND_SOC_DAIFMT_NB_NF:
469 break;
470 default:
471 dev_err(cs35l56->base.dev, "Invalid clock invert\n");
472 return -EINVAL;
473 }
474
475 regmap_update_bits(cs35l56->base.regmap,
476 CS35L56_ASP1_CONTROL2,
477 CS35L56_ASP_FMT_MASK |
478 CS35L56_ASP_BCLK_INV_MASK | CS35L56_ASP_FSYNC_INV_MASK,
479 val);
480
481 /* Hi-Z DOUT in unused slots and when all TX are disabled */
482 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL3,
483 CS35L56_ASP1_DOUT_HIZ_CTRL_MASK,
484 CS35L56_ASP_UNUSED_HIZ_OFF_HIZ);
485
486 return 0;
487 }
488
cs35l56_make_tdm_config_word(unsigned int reg_val, unsigned long mask)489 static unsigned int cs35l56_make_tdm_config_word(unsigned int reg_val, unsigned long mask)
490 {
491 unsigned int channel_shift;
492 int bit_num;
493
494 /* Enable consecutive TX1..TXn for each of the slots set in mask */
495 channel_shift = 0;
496 for_each_set_bit(bit_num, &mask, 32) {
497 reg_val &= ~(0x3f << channel_shift);
498 reg_val |= bit_num << channel_shift;
499 channel_shift += 8;
500 }
501
502 return reg_val;
503 }
504
cs35l56_asp_dai_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width)505 static int cs35l56_asp_dai_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
506 unsigned int rx_mask, int slots, int slot_width)
507 {
508 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);
509
510 if ((slots == 0) || (slot_width == 0)) {
511 dev_dbg(cs35l56->base.dev, "tdm config cleared\n");
512 cs35l56->asp_slot_width = 0;
513 cs35l56->asp_slot_count = 0;
514 return 0;
515 }
516
517 if (slot_width > (CS35L56_ASP_RX_WIDTH_MASK >> CS35L56_ASP_RX_WIDTH_SHIFT)) {
518 dev_err(cs35l56->base.dev, "tdm invalid slot width %d\n", slot_width);
519 return -EINVAL;
520 }
521
522 /* More than 32 slots would give an unsupportable BCLK frequency */
523 if (slots > 32) {
524 dev_err(cs35l56->base.dev, "tdm invalid slot count %d\n", slots);
525 return -EINVAL;
526 }
527
528 cs35l56->asp_slot_width = (u8)slot_width;
529 cs35l56->asp_slot_count = (u8)slots;
530
531 // Note: rx/tx is from point of view of the CPU end
532 if (tx_mask == 0)
533 tx_mask = 0x3; // ASPRX1/RX2 in slots 0 and 1
534
535 if (rx_mask == 0)
536 rx_mask = 0xf; // ASPTX1..TX4 in slots 0..3
537
538 /* Default unused slots to 63 */
539 regmap_write(cs35l56->base.regmap, CS35L56_ASP1_FRAME_CONTROL1,
540 cs35l56_make_tdm_config_word(0x3f3f3f3f, rx_mask));
541 regmap_write(cs35l56->base.regmap, CS35L56_ASP1_FRAME_CONTROL5,
542 cs35l56_make_tdm_config_word(0x3f3f3f, tx_mask));
543
544 dev_dbg(cs35l56->base.dev, "tdm slot width: %u count: %u tx_mask: %#x rx_mask: %#x\n",
545 cs35l56->asp_slot_width, cs35l56->asp_slot_count, tx_mask, rx_mask);
546
547 return 0;
548 }
549
cs35l56_asp_dai_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)550 static int cs35l56_asp_dai_hw_params(struct snd_pcm_substream *substream,
551 struct snd_pcm_hw_params *params,
552 struct snd_soc_dai *dai)
553 {
554 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);
555 unsigned int rate = params_rate(params);
556 u8 asp_width, asp_wl;
557
558 asp_wl = params_width(params);
559 if (cs35l56->asp_slot_width)
560 asp_width = cs35l56->asp_slot_width;
561 else
562 asp_width = asp_wl;
563
564 dev_dbg(cs35l56->base.dev, "%s: wl=%d, width=%d, rate=%d",
565 __func__, asp_wl, asp_width, rate);
566
567 if (!cs35l56->sysclk_set) {
568 unsigned int slots = cs35l56->asp_slot_count;
569 unsigned int bclk_freq;
570 int freq_id;
571
572 if (slots == 0) {
573 slots = params_channels(params);
574
575 /* I2S always has an even number of slots */
576 if (!cs35l56->tdm_mode)
577 slots = round_up(slots, 2);
578 }
579
580 bclk_freq = asp_width * slots * rate;
581 freq_id = cs35l56_get_bclk_freq_id(bclk_freq);
582 if (freq_id < 0) {
583 dev_err(cs35l56->base.dev, "%s: Invalid BCLK %u\n", __func__, bclk_freq);
584 return -EINVAL;
585 }
586
587 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL1,
588 CS35L56_ASP_BCLK_FREQ_MASK,
589 freq_id << CS35L56_ASP_BCLK_FREQ_SHIFT);
590 }
591
592 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
593 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL2,
594 CS35L56_ASP_RX_WIDTH_MASK, asp_width <<
595 CS35L56_ASP_RX_WIDTH_SHIFT);
596 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_DATA_CONTROL5,
597 CS35L56_ASP_RX_WL_MASK, asp_wl);
598 } else {
599 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL2,
600 CS35L56_ASP_TX_WIDTH_MASK, asp_width <<
601 CS35L56_ASP_TX_WIDTH_SHIFT);
602 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_DATA_CONTROL1,
603 CS35L56_ASP_TX_WL_MASK, asp_wl);
604 }
605
606 return 0;
607 }
608
cs35l56_asp_dai_set_sysclk(struct snd_soc_dai *dai, int clk_id, unsigned int freq, int dir)609 static int cs35l56_asp_dai_set_sysclk(struct snd_soc_dai *dai,
610 int clk_id, unsigned int freq, int dir)
611 {
612 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);
613 int freq_id;
614
615 if (freq == 0) {
616 cs35l56->sysclk_set = false;
617 return 0;
618 }
619
620 freq_id = cs35l56_get_bclk_freq_id(freq);
621 if (freq_id < 0)
622 return freq_id;
623
624 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL1,
625 CS35L56_ASP_BCLK_FREQ_MASK,
626 freq_id << CS35L56_ASP_BCLK_FREQ_SHIFT);
627 cs35l56->sysclk_set = true;
628
629 return 0;
630 }
631
632 static const struct snd_soc_dai_ops cs35l56_ops = {
633 .set_fmt = cs35l56_asp_dai_set_fmt,
634 .set_tdm_slot = cs35l56_asp_dai_set_tdm_slot,
635 .hw_params = cs35l56_asp_dai_hw_params,
636 .set_sysclk = cs35l56_asp_dai_set_sysclk,
637 };
638
cs35l56_sdw_dai_shutdown(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)639 static void cs35l56_sdw_dai_shutdown(struct snd_pcm_substream *substream,
640 struct snd_soc_dai *dai)
641 {
642 snd_soc_dai_set_dma_data(dai, substream, NULL);
643 }
644
cs35l56_sdw_dai_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width)645 static int cs35l56_sdw_dai_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
646 unsigned int rx_mask, int slots, int slot_width)
647 {
648 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);
649
650 /* rx/tx are from point of view of the CPU end so opposite to our rx/tx */
651 cs35l56->rx_mask = tx_mask;
652 cs35l56->tx_mask = rx_mask;
653
654 return 0;
655 }
656
cs35l56_sdw_dai_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)657 static int cs35l56_sdw_dai_hw_params(struct snd_pcm_substream *substream,
658 struct snd_pcm_hw_params *params,
659 struct snd_soc_dai *dai)
660 {
661 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);
662 struct sdw_stream_runtime *sdw_stream = snd_soc_dai_get_dma_data(dai, substream);
663 struct sdw_stream_config sconfig;
664 struct sdw_port_config pconfig;
665 int ret;
666
667 dev_dbg(cs35l56->base.dev, "%s: rate %d\n", __func__, params_rate(params));
668
669 if (!cs35l56->base.init_done)
670 return -ENODEV;
671
672 if (!sdw_stream)
673 return -EINVAL;
674
675 memset(&sconfig, 0, sizeof(sconfig));
676 memset(&pconfig, 0, sizeof(pconfig));
677
678 sconfig.frame_rate = params_rate(params);
679 sconfig.bps = snd_pcm_format_width(params_format(params));
680
681 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
682 sconfig.direction = SDW_DATA_DIR_RX;
683 pconfig.num = CS35L56_SDW1_PLAYBACK_PORT;
684 pconfig.ch_mask = cs35l56->rx_mask;
685 } else {
686 sconfig.direction = SDW_DATA_DIR_TX;
687 pconfig.num = CS35L56_SDW1_CAPTURE_PORT;
688 pconfig.ch_mask = cs35l56->tx_mask;
689 }
690
691 if (pconfig.ch_mask == 0) {
692 sconfig.ch_count = params_channels(params);
693 pconfig.ch_mask = GENMASK(sconfig.ch_count - 1, 0);
694 } else {
695 sconfig.ch_count = hweight32(pconfig.ch_mask);
696 }
697
698 ret = sdw_stream_add_slave(cs35l56->sdw_peripheral, &sconfig, &pconfig,
699 1, sdw_stream);
700 if (ret) {
701 dev_err(dai->dev, "Failed to add sdw stream: %d\n", ret);
702 return ret;
703 }
704
705 return 0;
706 }
707
cs35l56_sdw_dai_hw_free(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)708 static int cs35l56_sdw_dai_hw_free(struct snd_pcm_substream *substream,
709 struct snd_soc_dai *dai)
710 {
711 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);
712 struct sdw_stream_runtime *sdw_stream = snd_soc_dai_get_dma_data(dai, substream);
713
714 if (!cs35l56->sdw_peripheral)
715 return -EINVAL;
716
717 sdw_stream_remove_slave(cs35l56->sdw_peripheral, sdw_stream);
718
719 return 0;
720 }
721
cs35l56_sdw_dai_set_stream(struct snd_soc_dai *dai, void *sdw_stream, int direction)722 static int cs35l56_sdw_dai_set_stream(struct snd_soc_dai *dai,
723 void *sdw_stream, int direction)
724 {
725 snd_soc_dai_dma_data_set(dai, direction, sdw_stream);
726
727 return 0;
728 }
729
730 static const struct snd_soc_dai_ops cs35l56_sdw_dai_ops = {
731 .set_tdm_slot = cs35l56_sdw_dai_set_tdm_slot,
732 .shutdown = cs35l56_sdw_dai_shutdown,
733 .hw_params = cs35l56_sdw_dai_hw_params,
734 .hw_free = cs35l56_sdw_dai_hw_free,
735 .set_stream = cs35l56_sdw_dai_set_stream,
736 };
737
738 static struct snd_soc_dai_driver cs35l56_dai[] = {
739 {
740 .name = "cs35l56-asp1",
741 .id = 0,
742 .playback = {
743 .stream_name = "ASP1 Playback",
744 .channels_min = 1,
745 .channels_max = 2,
746 .rates = CS35L56_RATES,
747 .formats = CS35L56_RX_FORMATS,
748 },
749 .capture = {
750 .stream_name = "ASP1 Capture",
751 .channels_min = 1,
752 .channels_max = 4,
753 .rates = CS35L56_RATES,
754 .formats = CS35L56_TX_FORMATS,
755 },
756 .ops = &cs35l56_ops,
757 .symmetric_rate = 1,
758 .symmetric_sample_bits = 1,
759 },
760 {
761 .name = "cs35l56-sdw1",
762 .id = 1,
763 .playback = {
764 .stream_name = "SDW1 Playback",
765 .channels_min = 1,
766 .channels_max = 2,
767 .rates = CS35L56_RATES,
768 .formats = CS35L56_RX_FORMATS,
769 },
770 .capture = {
771 .stream_name = "SDW1 Capture",
772 .channels_min = 1,
773 .channels_max = 4,
774 .rates = CS35L56_RATES,
775 .formats = CS35L56_TX_FORMATS,
776 },
777 .symmetric_rate = 1,
778 .ops = &cs35l56_sdw_dai_ops,
779 }
780 };
781
cs35l56_secure_patch(struct cs35l56_private *cs35l56)782 static void cs35l56_secure_patch(struct cs35l56_private *cs35l56)
783 {
784 int ret;
785
786 /* Use wm_adsp to load and apply the firmware patch and coefficient files */
787 ret = wm_adsp_power_up(&cs35l56->dsp, true);
788 if (ret)
789 dev_dbg(cs35l56->base.dev, "%s: wm_adsp_power_up ret %d\n", __func__, ret);
790 else
791 cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_AUDIO_REINIT);
792 }
793
cs35l56_patch(struct cs35l56_private *cs35l56)794 static void cs35l56_patch(struct cs35l56_private *cs35l56)
795 {
796 unsigned int firmware_missing;
797 int ret;
798
799 ret = regmap_read(cs35l56->base.regmap, CS35L56_PROTECTION_STATUS, &firmware_missing);
800 if (ret) {
801 dev_err(cs35l56->base.dev, "Failed to read PROTECTION_STATUS: %d\n", ret);
802 return;
803 }
804
805 firmware_missing &= CS35L56_FIRMWARE_MISSING;
806
807 /*
808 * Disable SoundWire interrupts to prevent race with IRQ work.
809 * Setting sdw_irq_no_unmask prevents the handler re-enabling
810 * the SoundWire interrupt.
811 */
812 if (cs35l56->sdw_peripheral) {
813 cs35l56->sdw_irq_no_unmask = true;
814 flush_work(&cs35l56->sdw_irq_work);
815 sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_MASK_1, 0);
816 sdw_read_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_STAT_1);
817 sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_STAT_1, 0xFF);
818 flush_work(&cs35l56->sdw_irq_work);
819 }
820
821 ret = cs35l56_firmware_shutdown(&cs35l56->base);
822 if (ret)
823 goto err;
824
825 /*
826 * Use wm_adsp to load and apply the firmware patch and coefficient files,
827 * but only if firmware is missing. If firmware is already patched just
828 * power-up wm_adsp without downloading firmware.
829 */
830 ret = wm_adsp_power_up(&cs35l56->dsp, !!firmware_missing);
831 if (ret) {
832 dev_dbg(cs35l56->base.dev, "%s: wm_adsp_power_up ret %d\n", __func__, ret);
833 goto err;
834 }
835
836 mutex_lock(&cs35l56->base.irq_lock);
837
838 reinit_completion(&cs35l56->init_completion);
839
840 cs35l56->soft_resetting = true;
841 cs35l56_system_reset(&cs35l56->base, !!cs35l56->sdw_peripheral);
842
843 if (cs35l56->sdw_peripheral) {
844 /*
845 * The system-reset causes the CS35L56 to detach from the bus.
846 * Wait for the manager to re-enumerate the CS35L56 and
847 * cs35l56_init() to run again.
848 */
849 if (!wait_for_completion_timeout(&cs35l56->init_completion,
850 msecs_to_jiffies(5000))) {
851 dev_err(cs35l56->base.dev, "%s: init_completion timed out (SDW)\n",
852 __func__);
853 goto err_unlock;
854 }
855 } else if (cs35l56_init(cs35l56)) {
856 goto err_unlock;
857 }
858
859 regmap_clear_bits(cs35l56->base.regmap, CS35L56_PROTECTION_STATUS,
860 CS35L56_FIRMWARE_MISSING);
861 cs35l56->base.fw_patched = true;
862
863 err_unlock:
864 mutex_unlock(&cs35l56->base.irq_lock);
865 err:
866 /* Re-enable SoundWire interrupts */
867 if (cs35l56->sdw_peripheral) {
868 cs35l56->sdw_irq_no_unmask = false;
869 sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_MASK_1,
870 CS35L56_SDW_INT_MASK_CODEC_IRQ);
871 }
872 }
873
cs35l56_dsp_work(struct work_struct *work)874 static void cs35l56_dsp_work(struct work_struct *work)
875 {
876 struct cs35l56_private *cs35l56 = container_of(work,
877 struct cs35l56_private,
878 dsp_work);
879
880 if (!cs35l56->base.init_done)
881 return;
882
883 pm_runtime_get_sync(cs35l56->base.dev);
884
885 /* Populate fw file qualifier with the revision and security state */
886 if (!cs35l56->dsp.fwf_name) {
887 cs35l56->dsp.fwf_name = kasprintf(GFP_KERNEL, "%02x%s-dsp1",
888 cs35l56->base.rev,
889 cs35l56->base.secured ? "-s" : "");
890 if (!cs35l56->dsp.fwf_name)
891 goto err;
892 }
893
894 dev_dbg(cs35l56->base.dev, "DSP fwf name: '%s' system name: '%s'\n",
895 cs35l56->dsp.fwf_name, cs35l56->dsp.system_name);
896
897 /*
898 * When the device is running in secure mode the firmware files can
899 * only contain insecure tunings and therefore we do not need to
900 * shutdown the firmware to apply them and can use the lower cost
901 * reinit sequence instead.
902 */
903 if (cs35l56->base.secured)
904 cs35l56_secure_patch(cs35l56);
905 else
906 cs35l56_patch(cs35l56);
907
908 err:
909 pm_runtime_mark_last_busy(cs35l56->base.dev);
910 pm_runtime_put_autosuspend(cs35l56->base.dev);
911 }
912
cs35l56_component_probe(struct snd_soc_component *component)913 static int cs35l56_component_probe(struct snd_soc_component *component)
914 {
915 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
916 struct dentry *debugfs_root = component->debugfs_root;
917 unsigned short vendor, device;
918
919 BUILD_BUG_ON(ARRAY_SIZE(cs35l56_tx_input_texts) != ARRAY_SIZE(cs35l56_tx_input_values));
920
921 if (!cs35l56->dsp.system_name &&
922 (snd_soc_card_get_pci_ssid(component->card, &vendor, &device) == 0)) {
923 cs35l56->dsp.system_name = devm_kasprintf(cs35l56->base.dev,
924 GFP_KERNEL,
925 "%04x%04x",
926 vendor, device);
927 if (!cs35l56->dsp.system_name)
928 return -ENOMEM;
929 }
930
931 if (!wait_for_completion_timeout(&cs35l56->init_completion,
932 msecs_to_jiffies(5000))) {
933 dev_err(cs35l56->base.dev, "%s: init_completion timed out\n", __func__);
934 return -ENODEV;
935 }
936
937 cs35l56->component = component;
938 wm_adsp2_component_probe(&cs35l56->dsp, component);
939
940 debugfs_create_bool("init_done", 0444, debugfs_root, &cs35l56->base.init_done);
941 debugfs_create_bool("can_hibernate", 0444, debugfs_root, &cs35l56->base.can_hibernate);
942 debugfs_create_bool("fw_patched", 0444, debugfs_root, &cs35l56->base.fw_patched);
943
944 /*
945 * The widgets for the ASP1TX mixer can't be initialized
946 * until the firmware has been downloaded and rebooted.
947 */
948 regcache_drop_region(cs35l56->base.regmap, CS35L56_ASP1TX1_INPUT, CS35L56_ASP1TX4_INPUT);
949 cs35l56->asp1_mixer_widgets_initialized = false;
950
951 queue_work(cs35l56->dsp_wq, &cs35l56->dsp_work);
952
953 return 0;
954 }
955
cs35l56_component_remove(struct snd_soc_component *component)956 static void cs35l56_component_remove(struct snd_soc_component *component)
957 {
958 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
959
960 cancel_work_sync(&cs35l56->dsp_work);
961
962 if (cs35l56->dsp.cs_dsp.booted)
963 wm_adsp_power_down(&cs35l56->dsp);
964
965 wm_adsp2_component_remove(&cs35l56->dsp, component);
966
967 kfree(cs35l56->dsp.fwf_name);
968 cs35l56->dsp.fwf_name = NULL;
969
970 cs35l56->component = NULL;
971 }
972
cs35l56_set_bias_level(struct snd_soc_component *component, enum snd_soc_bias_level level)973 static int cs35l56_set_bias_level(struct snd_soc_component *component,
974 enum snd_soc_bias_level level)
975 {
976 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
977
978 switch (level) {
979 case SND_SOC_BIAS_STANDBY:
980 /*
981 * Wait for patching to complete when transitioning from
982 * BIAS_OFF to BIAS_STANDBY
983 */
984 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF)
985 cs35l56_wait_dsp_ready(cs35l56);
986
987 break;
988 default:
989 break;
990 }
991
992 return 0;
993 }
994
995 static const struct snd_soc_component_driver soc_component_dev_cs35l56 = {
996 .probe = cs35l56_component_probe,
997 .remove = cs35l56_component_remove,
998
999 .dapm_widgets = cs35l56_dapm_widgets,
1000 .num_dapm_widgets = ARRAY_SIZE(cs35l56_dapm_widgets),
1001 .dapm_routes = cs35l56_audio_map,
1002 .num_dapm_routes = ARRAY_SIZE(cs35l56_audio_map),
1003 .controls = cs35l56_controls,
1004 .num_controls = ARRAY_SIZE(cs35l56_controls),
1005
1006 .set_bias_level = cs35l56_set_bias_level,
1007
1008 .suspend_bias_off = 1, /* see cs35l56_system_resume() */
1009 };
1010
cs35l56_runtime_suspend_i2c_spi(struct device *dev)1011 static int __maybe_unused cs35l56_runtime_suspend_i2c_spi(struct device *dev)
1012 {
1013 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
1014
1015 return cs35l56_runtime_suspend_common(&cs35l56->base);
1016 }
1017
cs35l56_runtime_resume_i2c_spi(struct device *dev)1018 static int __maybe_unused cs35l56_runtime_resume_i2c_spi(struct device *dev)
1019 {
1020 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
1021
1022 return cs35l56_runtime_resume_common(&cs35l56->base, false);
1023 }
1024
cs35l56_system_suspend(struct device *dev)1025 int cs35l56_system_suspend(struct device *dev)
1026 {
1027 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
1028
1029 dev_dbg(dev, "system_suspend\n");
1030
1031 if (cs35l56->component)
1032 flush_work(&cs35l56->dsp_work);
1033
1034 /*
1035 * The interrupt line is normally shared, but after we start suspending
1036 * we can't check if our device is the source of an interrupt, and can't
1037 * clear it. Prevent this race by temporarily disabling the parent irq
1038 * until we reach _no_irq.
1039 */
1040 if (cs35l56->base.irq)
1041 disable_irq(cs35l56->base.irq);
1042
1043 return pm_runtime_force_suspend(dev);
1044 }
1045 EXPORT_SYMBOL_GPL(cs35l56_system_suspend);
1046
cs35l56_system_suspend_late(struct device *dev)1047 int cs35l56_system_suspend_late(struct device *dev)
1048 {
1049 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
1050
1051 dev_dbg(dev, "system_suspend_late\n");
1052
1053 /*
1054 * Assert RESET before removing supplies.
1055 * RESET is usually shared by all amps so it must not be asserted until
1056 * all driver instances have done their suspend() stage.
1057 */
1058 if (cs35l56->base.reset_gpio) {
1059 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);
1060 cs35l56_wait_min_reset_pulse();
1061 }
1062
1063 regulator_bulk_disable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies);
1064
1065 return 0;
1066 }
1067 EXPORT_SYMBOL_GPL(cs35l56_system_suspend_late);
1068
cs35l56_system_suspend_no_irq(struct device *dev)1069 int cs35l56_system_suspend_no_irq(struct device *dev)
1070 {
1071 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
1072
1073 dev_dbg(dev, "system_suspend_no_irq\n");
1074
1075 /* Handlers are now disabled so the parent IRQ can safely be re-enabled. */
1076 if (cs35l56->base.irq)
1077 enable_irq(cs35l56->base.irq);
1078
1079 return 0;
1080 }
1081 EXPORT_SYMBOL_GPL(cs35l56_system_suspend_no_irq);
1082
cs35l56_system_resume_no_irq(struct device *dev)1083 int cs35l56_system_resume_no_irq(struct device *dev)
1084 {
1085 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
1086
1087 dev_dbg(dev, "system_resume_no_irq\n");
1088
1089 /*
1090 * WAKE interrupts unmask if the CS35L56 hibernates, which can cause
1091 * spurious interrupts, and the interrupt line is normally shared.
1092 * We can't check if our device is the source of an interrupt, and can't
1093 * clear it, until it has fully resumed. Prevent this race by temporarily
1094 * disabling the parent irq until we complete resume().
1095 */
1096 if (cs35l56->base.irq)
1097 disable_irq(cs35l56->base.irq);
1098
1099 return 0;
1100 }
1101 EXPORT_SYMBOL_GPL(cs35l56_system_resume_no_irq);
1102
cs35l56_system_resume_early(struct device *dev)1103 int cs35l56_system_resume_early(struct device *dev)
1104 {
1105 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
1106 int ret;
1107
1108 dev_dbg(dev, "system_resume_early\n");
1109
1110 /* Ensure a spec-compliant RESET pulse. */
1111 if (cs35l56->base.reset_gpio) {
1112 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);
1113 cs35l56_wait_min_reset_pulse();
1114 }
1115
1116 /* Enable supplies before releasing RESET. */
1117 ret = regulator_bulk_enable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies);
1118 if (ret) {
1119 dev_err(dev, "system_resume_early failed to enable supplies: %d\n", ret);
1120 return ret;
1121 }
1122
1123 /* Release shared RESET before drivers start resume(). */
1124 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 1);
1125
1126 return 0;
1127 }
1128 EXPORT_SYMBOL_GPL(cs35l56_system_resume_early);
1129
cs35l56_system_resume(struct device *dev)1130 int cs35l56_system_resume(struct device *dev)
1131 {
1132 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
1133 int ret;
1134
1135 dev_dbg(dev, "system_resume\n");
1136
1137 /*
1138 * We might have done a hard reset or the CS35L56 was power-cycled
1139 * so wait for control port to be ready.
1140 */
1141 cs35l56_wait_control_port_ready();
1142
1143 /* Undo pm_runtime_force_suspend() before re-enabling the irq */
1144 ret = pm_runtime_force_resume(dev);
1145 if (cs35l56->base.irq)
1146 enable_irq(cs35l56->base.irq);
1147
1148 if (ret)
1149 return ret;
1150
1151 /* Firmware won't have been loaded if the component hasn't probed */
1152 if (!cs35l56->component)
1153 return 0;
1154
1155 ret = cs35l56_is_fw_reload_needed(&cs35l56->base);
1156 dev_dbg(cs35l56->base.dev, "fw_reload_needed: %d\n", ret);
1157 if (ret < 1)
1158 return ret;
1159
1160 cs35l56->base.fw_patched = false;
1161 wm_adsp_power_down(&cs35l56->dsp);
1162 queue_work(cs35l56->dsp_wq, &cs35l56->dsp_work);
1163
1164 /*
1165 * suspend_bias_off ensures we are now in BIAS_OFF so there will be
1166 * a BIAS_OFF->BIAS_STANDBY transition to complete dsp patching.
1167 */
1168
1169 return 0;
1170 }
1171 EXPORT_SYMBOL_GPL(cs35l56_system_resume);
1172
cs35l56_dsp_init(struct cs35l56_private *cs35l56)1173 static int cs35l56_dsp_init(struct cs35l56_private *cs35l56)
1174 {
1175 struct wm_adsp *dsp;
1176 int ret;
1177
1178 cs35l56->dsp_wq = create_singlethread_workqueue("cs35l56-dsp");
1179 if (!cs35l56->dsp_wq)
1180 return -ENOMEM;
1181
1182 INIT_WORK(&cs35l56->dsp_work, cs35l56_dsp_work);
1183
1184 dsp = &cs35l56->dsp;
1185 cs35l56_init_cs_dsp(&cs35l56->base, &dsp->cs_dsp);
1186 dsp->part = "cs35l56";
1187 dsp->fw = 12;
1188 dsp->wmfw_optional = true;
1189
1190 dev_dbg(cs35l56->base.dev, "DSP system name: '%s'\n", dsp->system_name);
1191
1192 ret = wm_halo_init(dsp);
1193 if (ret != 0) {
1194 dev_err(cs35l56->base.dev, "wm_halo_init failed\n");
1195 return ret;
1196 }
1197
1198 return 0;
1199 }
1200
cs35l56_get_firmware_uid(struct cs35l56_private *cs35l56)1201 static int cs35l56_get_firmware_uid(struct cs35l56_private *cs35l56)
1202 {
1203 struct device *dev = cs35l56->base.dev;
1204 const char *prop;
1205 int ret;
1206
1207 ret = device_property_read_string(dev, "cirrus,firmware-uid", &prop);
1208 /* If bad sw node property, return 0 and fallback to legacy firmware path */
1209 if (ret < 0)
1210 return 0;
1211
1212 cs35l56->dsp.system_name = devm_kstrdup(dev, prop, GFP_KERNEL);
1213 if (cs35l56->dsp.system_name == NULL)
1214 return -ENOMEM;
1215
1216 dev_dbg(dev, "Firmware UID: %s\n", cs35l56->dsp.system_name);
1217
1218 return 0;
1219 }
1220
cs35l56_common_probe(struct cs35l56_private *cs35l56)1221 int cs35l56_common_probe(struct cs35l56_private *cs35l56)
1222 {
1223 int ret;
1224
1225 init_completion(&cs35l56->init_completion);
1226 mutex_init(&cs35l56->base.irq_lock);
1227
1228 dev_set_drvdata(cs35l56->base.dev, cs35l56);
1229
1230 cs35l56_fill_supply_names(cs35l56->supplies);
1231 ret = devm_regulator_bulk_get(cs35l56->base.dev, ARRAY_SIZE(cs35l56->supplies),
1232 cs35l56->supplies);
1233 if (ret != 0)
1234 return dev_err_probe(cs35l56->base.dev, ret, "Failed to request supplies\n");
1235
1236 /* Reset could be controlled by the BIOS or shared by multiple amps */
1237 cs35l56->base.reset_gpio = devm_gpiod_get_optional(cs35l56->base.dev, "reset",
1238 GPIOD_OUT_LOW);
1239 if (IS_ERR(cs35l56->base.reset_gpio)) {
1240 ret = PTR_ERR(cs35l56->base.reset_gpio);
1241 /*
1242 * If RESET is shared the first amp to probe will grab the reset
1243 * line and reset all the amps
1244 */
1245 if (ret != -EBUSY)
1246 return dev_err_probe(cs35l56->base.dev, ret, "Failed to get reset GPIO\n");
1247
1248 dev_info(cs35l56->base.dev, "Reset GPIO busy, assume shared reset\n");
1249 cs35l56->base.reset_gpio = NULL;
1250 }
1251
1252 ret = regulator_bulk_enable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies);
1253 if (ret != 0)
1254 return dev_err_probe(cs35l56->base.dev, ret, "Failed to enable supplies\n");
1255
1256 if (cs35l56->base.reset_gpio) {
1257 /* ACPI can override GPIOD_OUT_LOW flag so force it to start low */
1258 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);
1259 cs35l56_wait_min_reset_pulse();
1260 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 1);
1261 }
1262
1263 ret = cs35l56_get_firmware_uid(cs35l56);
1264 if (ret != 0)
1265 goto err;
1266
1267 ret = cs35l56_dsp_init(cs35l56);
1268 if (ret < 0) {
1269 dev_err_probe(cs35l56->base.dev, ret, "DSP init failed\n");
1270 goto err;
1271 }
1272
1273 ret = devm_snd_soc_register_component(cs35l56->base.dev,
1274 &soc_component_dev_cs35l56,
1275 cs35l56_dai, ARRAY_SIZE(cs35l56_dai));
1276 if (ret < 0) {
1277 dev_err_probe(cs35l56->base.dev, ret, "Register codec failed\n");
1278 goto err;
1279 }
1280
1281 return 0;
1282
1283 err:
1284 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);
1285 regulator_bulk_disable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies);
1286
1287 return ret;
1288 }
1289 EXPORT_SYMBOL_NS_GPL(cs35l56_common_probe, SND_SOC_CS35L56_CORE);
1290
cs35l56_init(struct cs35l56_private *cs35l56)1291 int cs35l56_init(struct cs35l56_private *cs35l56)
1292 {
1293 int ret;
1294
1295 /*
1296 * Check whether the actions associated with soft reset or one time
1297 * init need to be performed.
1298 */
1299 if (cs35l56->soft_resetting)
1300 goto post_soft_reset;
1301
1302 if (cs35l56->base.init_done)
1303 return 0;
1304
1305 pm_runtime_set_autosuspend_delay(cs35l56->base.dev, 100);
1306 pm_runtime_use_autosuspend(cs35l56->base.dev);
1307 pm_runtime_set_active(cs35l56->base.dev);
1308 pm_runtime_enable(cs35l56->base.dev);
1309
1310 ret = cs35l56_hw_init(&cs35l56->base);
1311 if (ret < 0)
1312 return ret;
1313
1314 ret = cs35l56_set_patch(&cs35l56->base);
1315 if (ret)
1316 return ret;
1317
1318 if (!cs35l56->base.reset_gpio) {
1319 dev_dbg(cs35l56->base.dev, "No reset gpio: using soft reset\n");
1320 cs35l56->soft_resetting = true;
1321 cs35l56_system_reset(&cs35l56->base, !!cs35l56->sdw_peripheral);
1322 if (cs35l56->sdw_peripheral) {
1323 /* Keep alive while we wait for re-enumeration */
1324 pm_runtime_get_noresume(cs35l56->base.dev);
1325 return 0;
1326 }
1327 }
1328
1329 post_soft_reset:
1330 if (cs35l56->soft_resetting) {
1331 cs35l56->soft_resetting = false;
1332
1333 /* Done re-enumerating after one-time init so release the keep-alive */
1334 if (cs35l56->sdw_peripheral && !cs35l56->base.init_done)
1335 pm_runtime_put_noidle(cs35l56->base.dev);
1336
1337 regcache_mark_dirty(cs35l56->base.regmap);
1338 ret = cs35l56_wait_for_firmware_boot(&cs35l56->base);
1339 if (ret)
1340 return ret;
1341
1342 dev_dbg(cs35l56->base.dev, "Firmware rebooted after soft reset\n");
1343 }
1344
1345 /* Disable auto-hibernate so that runtime_pm has control */
1346 ret = cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_PREVENT_AUTO_HIBERNATE);
1347 if (ret)
1348 return ret;
1349
1350 /* Registers could be dirty after soft reset or SoundWire enumeration */
1351 regcache_sync(cs35l56->base.regmap);
1352
1353 /* Set ASP1 DOUT to high-impedance when it is not transmitting audio data. */
1354 ret = regmap_set_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL3,
1355 CS35L56_ASP1_DOUT_HIZ_CTRL_MASK);
1356 if (ret)
1357 return dev_err_probe(cs35l56->base.dev, ret, "Failed to write ASP1_CONTROL3\n");
1358
1359 cs35l56->base.init_done = true;
1360 complete(&cs35l56->init_completion);
1361
1362 return 0;
1363 }
1364 EXPORT_SYMBOL_NS_GPL(cs35l56_init, SND_SOC_CS35L56_CORE);
1365
cs35l56_remove(struct cs35l56_private *cs35l56)1366 void cs35l56_remove(struct cs35l56_private *cs35l56)
1367 {
1368 cs35l56->base.init_done = false;
1369
1370 /*
1371 * WAKE IRQs unmask if CS35L56 hibernates so free the handler to
1372 * prevent it racing with remove().
1373 */
1374 if (cs35l56->base.irq)
1375 devm_free_irq(cs35l56->base.dev, cs35l56->base.irq, &cs35l56->base);
1376
1377 flush_workqueue(cs35l56->dsp_wq);
1378 destroy_workqueue(cs35l56->dsp_wq);
1379
1380 pm_runtime_dont_use_autosuspend(cs35l56->base.dev);
1381 pm_runtime_suspend(cs35l56->base.dev);
1382 pm_runtime_disable(cs35l56->base.dev);
1383
1384 regcache_cache_only(cs35l56->base.regmap, true);
1385
1386 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);
1387 regulator_bulk_disable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies);
1388 }
1389 EXPORT_SYMBOL_NS_GPL(cs35l56_remove, SND_SOC_CS35L56_CORE);
1390
1391 const struct dev_pm_ops cs35l56_pm_ops_i2c_spi = {
1392 SET_RUNTIME_PM_OPS(cs35l56_runtime_suspend_i2c_spi, cs35l56_runtime_resume_i2c_spi, NULL)
1393 SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend, cs35l56_system_resume)
1394 LATE_SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend_late, cs35l56_system_resume_early)
1395 NOIRQ_SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend_no_irq, cs35l56_system_resume_no_irq)
1396 };
1397 EXPORT_SYMBOL_NS_GPL(cs35l56_pm_ops_i2c_spi, SND_SOC_CS35L56_CORE);
1398
1399 MODULE_DESCRIPTION("ASoC CS35L56 driver");
1400 MODULE_IMPORT_NS(SND_SOC_CS35L56_SHARED);
1401 MODULE_AUTHOR("Richard Fitzgerald <rf@opensource.cirrus.com>");
1402 MODULE_AUTHOR("Simon Trimmer <simont@opensource.cirrus.com>");
1403 MODULE_LICENSE("GPL");
1404