xref: /kernel/linux/linux-5.10/drivers/nvme/host/rdma.c (revision 8c2ecf20)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * NVMe over Fabrics RDMA host code.
4 * Copyright (c) 2015-2016 HGST, a Western Digital Company.
5 */
6#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
7#include <linux/module.h>
8#include <linux/init.h>
9#include <linux/slab.h>
10#include <rdma/mr_pool.h>
11#include <linux/err.h>
12#include <linux/string.h>
13#include <linux/atomic.h>
14#include <linux/blk-mq.h>
15#include <linux/blk-mq-rdma.h>
16#include <linux/types.h>
17#include <linux/list.h>
18#include <linux/mutex.h>
19#include <linux/scatterlist.h>
20#include <linux/nvme.h>
21#include <asm/unaligned.h>
22
23#include <rdma/ib_verbs.h>
24#include <rdma/rdma_cm.h>
25#include <linux/nvme-rdma.h>
26
27#include "nvme.h"
28#include "fabrics.h"
29
30
31#define NVME_RDMA_CONNECT_TIMEOUT_MS	3000		/* 3 second */
32
33#define NVME_RDMA_MAX_SEGMENTS		256
34
35#define NVME_RDMA_MAX_INLINE_SEGMENTS	4
36
37#define NVME_RDMA_DATA_SGL_SIZE \
38	(sizeof(struct scatterlist) * NVME_INLINE_SG_CNT)
39#define NVME_RDMA_METADATA_SGL_SIZE \
40	(sizeof(struct scatterlist) * NVME_INLINE_METADATA_SG_CNT)
41
42struct nvme_rdma_device {
43	struct ib_device	*dev;
44	struct ib_pd		*pd;
45	struct kref		ref;
46	struct list_head	entry;
47	unsigned int		num_inline_segments;
48};
49
50struct nvme_rdma_qe {
51	struct ib_cqe		cqe;
52	void			*data;
53	u64			dma;
54};
55
56struct nvme_rdma_sgl {
57	int			nents;
58	struct sg_table		sg_table;
59};
60
61struct nvme_rdma_queue;
62struct nvme_rdma_request {
63	struct nvme_request	req;
64	struct ib_mr		*mr;
65	struct nvme_rdma_qe	sqe;
66	union nvme_result	result;
67	__le16			status;
68	refcount_t		ref;
69	struct ib_sge		sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS];
70	u32			num_sge;
71	struct ib_reg_wr	reg_wr;
72	struct ib_cqe		reg_cqe;
73	struct nvme_rdma_queue  *queue;
74	struct nvme_rdma_sgl	data_sgl;
75	struct nvme_rdma_sgl	*metadata_sgl;
76	bool			use_sig_mr;
77};
78
79enum nvme_rdma_queue_flags {
80	NVME_RDMA_Q_ALLOCATED		= 0,
81	NVME_RDMA_Q_LIVE		= 1,
82	NVME_RDMA_Q_TR_READY		= 2,
83};
84
85struct nvme_rdma_queue {
86	struct nvme_rdma_qe	*rsp_ring;
87	int			queue_size;
88	size_t			cmnd_capsule_len;
89	struct nvme_rdma_ctrl	*ctrl;
90	struct nvme_rdma_device	*device;
91	struct ib_cq		*ib_cq;
92	struct ib_qp		*qp;
93
94	unsigned long		flags;
95	struct rdma_cm_id	*cm_id;
96	int			cm_error;
97	struct completion	cm_done;
98	bool			pi_support;
99	int			cq_size;
100	struct mutex		queue_lock;
101};
102
103struct nvme_rdma_ctrl {
104	/* read only in the hot path */
105	struct nvme_rdma_queue	*queues;
106
107	/* other member variables */
108	struct blk_mq_tag_set	tag_set;
109	struct work_struct	err_work;
110
111	struct nvme_rdma_qe	async_event_sqe;
112
113	struct delayed_work	reconnect_work;
114
115	struct list_head	list;
116
117	struct blk_mq_tag_set	admin_tag_set;
118	struct nvme_rdma_device	*device;
119
120	u32			max_fr_pages;
121
122	struct sockaddr_storage addr;
123	struct sockaddr_storage src_addr;
124
125	struct nvme_ctrl	ctrl;
126	bool			use_inline_data;
127	u32			io_queues[HCTX_MAX_TYPES];
128};
129
130static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl)
131{
132	return container_of(ctrl, struct nvme_rdma_ctrl, ctrl);
133}
134
135static LIST_HEAD(device_list);
136static DEFINE_MUTEX(device_list_mutex);
137
138static LIST_HEAD(nvme_rdma_ctrl_list);
139static DEFINE_MUTEX(nvme_rdma_ctrl_mutex);
140
141/*
142 * Disabling this option makes small I/O goes faster, but is fundamentally
143 * unsafe.  With it turned off we will have to register a global rkey that
144 * allows read and write access to all physical memory.
145 */
146static bool register_always = true;
147module_param(register_always, bool, 0444);
148MODULE_PARM_DESC(register_always,
149	 "Use memory registration even for contiguous memory regions");
150
151static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
152		struct rdma_cm_event *event);
153static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc);
154static void nvme_rdma_complete_rq(struct request *rq);
155
156static const struct blk_mq_ops nvme_rdma_mq_ops;
157static const struct blk_mq_ops nvme_rdma_admin_mq_ops;
158
159static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue)
160{
161	return queue - queue->ctrl->queues;
162}
163
164static bool nvme_rdma_poll_queue(struct nvme_rdma_queue *queue)
165{
166	return nvme_rdma_queue_idx(queue) >
167		queue->ctrl->io_queues[HCTX_TYPE_DEFAULT] +
168		queue->ctrl->io_queues[HCTX_TYPE_READ];
169}
170
171static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue)
172{
173	return queue->cmnd_capsule_len - sizeof(struct nvme_command);
174}
175
176static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
177		size_t capsule_size, enum dma_data_direction dir)
178{
179	ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir);
180	kfree(qe->data);
181}
182
183static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
184		size_t capsule_size, enum dma_data_direction dir)
185{
186	qe->data = kzalloc(capsule_size, GFP_KERNEL);
187	if (!qe->data)
188		return -ENOMEM;
189
190	qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir);
191	if (ib_dma_mapping_error(ibdev, qe->dma)) {
192		kfree(qe->data);
193		qe->data = NULL;
194		return -ENOMEM;
195	}
196
197	return 0;
198}
199
200static void nvme_rdma_free_ring(struct ib_device *ibdev,
201		struct nvme_rdma_qe *ring, size_t ib_queue_size,
202		size_t capsule_size, enum dma_data_direction dir)
203{
204	int i;
205
206	for (i = 0; i < ib_queue_size; i++)
207		nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir);
208	kfree(ring);
209}
210
211static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev,
212		size_t ib_queue_size, size_t capsule_size,
213		enum dma_data_direction dir)
214{
215	struct nvme_rdma_qe *ring;
216	int i;
217
218	ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL);
219	if (!ring)
220		return NULL;
221
222	/*
223	 * Bind the CQEs (post recv buffers) DMA mapping to the RDMA queue
224	 * lifetime. It's safe, since any chage in the underlying RDMA device
225	 * will issue error recovery and queue re-creation.
226	 */
227	for (i = 0; i < ib_queue_size; i++) {
228		if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir))
229			goto out_free_ring;
230	}
231
232	return ring;
233
234out_free_ring:
235	nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir);
236	return NULL;
237}
238
239static void nvme_rdma_qp_event(struct ib_event *event, void *context)
240{
241	pr_debug("QP event %s (%d)\n",
242		 ib_event_msg(event->event), event->event);
243
244}
245
246static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue)
247{
248	int ret;
249
250	ret = wait_for_completion_interruptible_timeout(&queue->cm_done,
251			msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1);
252	if (ret < 0)
253		return ret;
254	if (ret == 0)
255		return -ETIMEDOUT;
256	WARN_ON_ONCE(queue->cm_error > 0);
257	return queue->cm_error;
258}
259
260static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor)
261{
262	struct nvme_rdma_device *dev = queue->device;
263	struct ib_qp_init_attr init_attr;
264	int ret;
265
266	memset(&init_attr, 0, sizeof(init_attr));
267	init_attr.event_handler = nvme_rdma_qp_event;
268	/* +1 for drain */
269	init_attr.cap.max_send_wr = factor * queue->queue_size + 1;
270	/* +1 for drain */
271	init_attr.cap.max_recv_wr = queue->queue_size + 1;
272	init_attr.cap.max_recv_sge = 1;
273	init_attr.cap.max_send_sge = 1 + dev->num_inline_segments;
274	init_attr.sq_sig_type = IB_SIGNAL_REQ_WR;
275	init_attr.qp_type = IB_QPT_RC;
276	init_attr.send_cq = queue->ib_cq;
277	init_attr.recv_cq = queue->ib_cq;
278	if (queue->pi_support)
279		init_attr.create_flags |= IB_QP_CREATE_INTEGRITY_EN;
280	init_attr.qp_context = queue;
281
282	ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr);
283
284	queue->qp = queue->cm_id->qp;
285	return ret;
286}
287
288static void nvme_rdma_exit_request(struct blk_mq_tag_set *set,
289		struct request *rq, unsigned int hctx_idx)
290{
291	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
292
293	kfree(req->sqe.data);
294}
295
296static int nvme_rdma_init_request(struct blk_mq_tag_set *set,
297		struct request *rq, unsigned int hctx_idx,
298		unsigned int numa_node)
299{
300	struct nvme_rdma_ctrl *ctrl = set->driver_data;
301	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
302	int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0;
303	struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx];
304
305	nvme_req(rq)->ctrl = &ctrl->ctrl;
306	req->sqe.data = kzalloc(sizeof(struct nvme_command), GFP_KERNEL);
307	if (!req->sqe.data)
308		return -ENOMEM;
309
310	/* metadata nvme_rdma_sgl struct is located after command's data SGL */
311	if (queue->pi_support)
312		req->metadata_sgl = (void *)nvme_req(rq) +
313			sizeof(struct nvme_rdma_request) +
314			NVME_RDMA_DATA_SGL_SIZE;
315
316	req->queue = queue;
317
318	return 0;
319}
320
321static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
322		unsigned int hctx_idx)
323{
324	struct nvme_rdma_ctrl *ctrl = data;
325	struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1];
326
327	BUG_ON(hctx_idx >= ctrl->ctrl.queue_count);
328
329	hctx->driver_data = queue;
330	return 0;
331}
332
333static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data,
334		unsigned int hctx_idx)
335{
336	struct nvme_rdma_ctrl *ctrl = data;
337	struct nvme_rdma_queue *queue = &ctrl->queues[0];
338
339	BUG_ON(hctx_idx != 0);
340
341	hctx->driver_data = queue;
342	return 0;
343}
344
345static void nvme_rdma_free_dev(struct kref *ref)
346{
347	struct nvme_rdma_device *ndev =
348		container_of(ref, struct nvme_rdma_device, ref);
349
350	mutex_lock(&device_list_mutex);
351	list_del(&ndev->entry);
352	mutex_unlock(&device_list_mutex);
353
354	ib_dealloc_pd(ndev->pd);
355	kfree(ndev);
356}
357
358static void nvme_rdma_dev_put(struct nvme_rdma_device *dev)
359{
360	kref_put(&dev->ref, nvme_rdma_free_dev);
361}
362
363static int nvme_rdma_dev_get(struct nvme_rdma_device *dev)
364{
365	return kref_get_unless_zero(&dev->ref);
366}
367
368static struct nvme_rdma_device *
369nvme_rdma_find_get_device(struct rdma_cm_id *cm_id)
370{
371	struct nvme_rdma_device *ndev;
372
373	mutex_lock(&device_list_mutex);
374	list_for_each_entry(ndev, &device_list, entry) {
375		if (ndev->dev->node_guid == cm_id->device->node_guid &&
376		    nvme_rdma_dev_get(ndev))
377			goto out_unlock;
378	}
379
380	ndev = kzalloc(sizeof(*ndev), GFP_KERNEL);
381	if (!ndev)
382		goto out_err;
383
384	ndev->dev = cm_id->device;
385	kref_init(&ndev->ref);
386
387	ndev->pd = ib_alloc_pd(ndev->dev,
388		register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY);
389	if (IS_ERR(ndev->pd))
390		goto out_free_dev;
391
392	if (!(ndev->dev->attrs.device_cap_flags &
393	      IB_DEVICE_MEM_MGT_EXTENSIONS)) {
394		dev_err(&ndev->dev->dev,
395			"Memory registrations not supported.\n");
396		goto out_free_pd;
397	}
398
399	ndev->num_inline_segments = min(NVME_RDMA_MAX_INLINE_SEGMENTS,
400					ndev->dev->attrs.max_send_sge - 1);
401	list_add(&ndev->entry, &device_list);
402out_unlock:
403	mutex_unlock(&device_list_mutex);
404	return ndev;
405
406out_free_pd:
407	ib_dealloc_pd(ndev->pd);
408out_free_dev:
409	kfree(ndev);
410out_err:
411	mutex_unlock(&device_list_mutex);
412	return NULL;
413}
414
415static void nvme_rdma_free_cq(struct nvme_rdma_queue *queue)
416{
417	if (nvme_rdma_poll_queue(queue))
418		ib_free_cq(queue->ib_cq);
419	else
420		ib_cq_pool_put(queue->ib_cq, queue->cq_size);
421}
422
423static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue)
424{
425	struct nvme_rdma_device *dev;
426	struct ib_device *ibdev;
427
428	if (!test_and_clear_bit(NVME_RDMA_Q_TR_READY, &queue->flags))
429		return;
430
431	dev = queue->device;
432	ibdev = dev->dev;
433
434	if (queue->pi_support)
435		ib_mr_pool_destroy(queue->qp, &queue->qp->sig_mrs);
436	ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs);
437
438	/*
439	 * The cm_id object might have been destroyed during RDMA connection
440	 * establishment error flow to avoid getting other cma events, thus
441	 * the destruction of the QP shouldn't use rdma_cm API.
442	 */
443	ib_destroy_qp(queue->qp);
444	nvme_rdma_free_cq(queue);
445
446	nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
447			sizeof(struct nvme_completion), DMA_FROM_DEVICE);
448
449	nvme_rdma_dev_put(dev);
450}
451
452static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev, bool pi_support)
453{
454	u32 max_page_list_len;
455
456	if (pi_support)
457		max_page_list_len = ibdev->attrs.max_pi_fast_reg_page_list_len;
458	else
459		max_page_list_len = ibdev->attrs.max_fast_reg_page_list_len;
460
461	return min_t(u32, NVME_RDMA_MAX_SEGMENTS, max_page_list_len - 1);
462}
463
464static int nvme_rdma_create_cq(struct ib_device *ibdev,
465		struct nvme_rdma_queue *queue)
466{
467	int ret, comp_vector, idx = nvme_rdma_queue_idx(queue);
468	enum ib_poll_context poll_ctx;
469
470	/*
471	 * Spread I/O queues completion vectors according their queue index.
472	 * Admin queues can always go on completion vector 0.
473	 */
474	comp_vector = (idx == 0 ? idx : idx - 1) % ibdev->num_comp_vectors;
475
476	/* Polling queues need direct cq polling context */
477	if (nvme_rdma_poll_queue(queue)) {
478		poll_ctx = IB_POLL_DIRECT;
479		queue->ib_cq = ib_alloc_cq(ibdev, queue, queue->cq_size,
480					   comp_vector, poll_ctx);
481	} else {
482		poll_ctx = IB_POLL_SOFTIRQ;
483		queue->ib_cq = ib_cq_pool_get(ibdev, queue->cq_size,
484					      comp_vector, poll_ctx);
485	}
486
487	if (IS_ERR(queue->ib_cq)) {
488		ret = PTR_ERR(queue->ib_cq);
489		return ret;
490	}
491
492	return 0;
493}
494
495static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue)
496{
497	struct ib_device *ibdev;
498	const int send_wr_factor = 3;			/* MR, SEND, INV */
499	const int cq_factor = send_wr_factor + 1;	/* + RECV */
500	int ret, pages_per_mr;
501
502	queue->device = nvme_rdma_find_get_device(queue->cm_id);
503	if (!queue->device) {
504		dev_err(queue->cm_id->device->dev.parent,
505			"no client data found!\n");
506		return -ECONNREFUSED;
507	}
508	ibdev = queue->device->dev;
509
510	/* +1 for ib_stop_cq */
511	queue->cq_size = cq_factor * queue->queue_size + 1;
512
513	ret = nvme_rdma_create_cq(ibdev, queue);
514	if (ret)
515		goto out_put_dev;
516
517	ret = nvme_rdma_create_qp(queue, send_wr_factor);
518	if (ret)
519		goto out_destroy_ib_cq;
520
521	queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size,
522			sizeof(struct nvme_completion), DMA_FROM_DEVICE);
523	if (!queue->rsp_ring) {
524		ret = -ENOMEM;
525		goto out_destroy_qp;
526	}
527
528	/*
529	 * Currently we don't use SG_GAPS MR's so if the first entry is
530	 * misaligned we'll end up using two entries for a single data page,
531	 * so one additional entry is required.
532	 */
533	pages_per_mr = nvme_rdma_get_max_fr_pages(ibdev, queue->pi_support) + 1;
534	ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs,
535			      queue->queue_size,
536			      IB_MR_TYPE_MEM_REG,
537			      pages_per_mr, 0);
538	if (ret) {
539		dev_err(queue->ctrl->ctrl.device,
540			"failed to initialize MR pool sized %d for QID %d\n",
541			queue->queue_size, nvme_rdma_queue_idx(queue));
542		goto out_destroy_ring;
543	}
544
545	if (queue->pi_support) {
546		ret = ib_mr_pool_init(queue->qp, &queue->qp->sig_mrs,
547				      queue->queue_size, IB_MR_TYPE_INTEGRITY,
548				      pages_per_mr, pages_per_mr);
549		if (ret) {
550			dev_err(queue->ctrl->ctrl.device,
551				"failed to initialize PI MR pool sized %d for QID %d\n",
552				queue->queue_size, nvme_rdma_queue_idx(queue));
553			goto out_destroy_mr_pool;
554		}
555	}
556
557	set_bit(NVME_RDMA_Q_TR_READY, &queue->flags);
558
559	return 0;
560
561out_destroy_mr_pool:
562	ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs);
563out_destroy_ring:
564	nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
565			    sizeof(struct nvme_completion), DMA_FROM_DEVICE);
566out_destroy_qp:
567	rdma_destroy_qp(queue->cm_id);
568out_destroy_ib_cq:
569	nvme_rdma_free_cq(queue);
570out_put_dev:
571	nvme_rdma_dev_put(queue->device);
572	return ret;
573}
574
575static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl,
576		int idx, size_t queue_size)
577{
578	struct nvme_rdma_queue *queue;
579	struct sockaddr *src_addr = NULL;
580	int ret;
581
582	queue = &ctrl->queues[idx];
583	mutex_init(&queue->queue_lock);
584	queue->ctrl = ctrl;
585	if (idx && ctrl->ctrl.max_integrity_segments)
586		queue->pi_support = true;
587	else
588		queue->pi_support = false;
589	init_completion(&queue->cm_done);
590
591	if (idx > 0)
592		queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16;
593	else
594		queue->cmnd_capsule_len = sizeof(struct nvme_command);
595
596	queue->queue_size = queue_size;
597
598	queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue,
599			RDMA_PS_TCP, IB_QPT_RC);
600	if (IS_ERR(queue->cm_id)) {
601		dev_info(ctrl->ctrl.device,
602			"failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id));
603		ret = PTR_ERR(queue->cm_id);
604		goto out_destroy_mutex;
605	}
606
607	if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR)
608		src_addr = (struct sockaddr *)&ctrl->src_addr;
609
610	queue->cm_error = -ETIMEDOUT;
611	ret = rdma_resolve_addr(queue->cm_id, src_addr,
612			(struct sockaddr *)&ctrl->addr,
613			NVME_RDMA_CONNECT_TIMEOUT_MS);
614	if (ret) {
615		dev_info(ctrl->ctrl.device,
616			"rdma_resolve_addr failed (%d).\n", ret);
617		goto out_destroy_cm_id;
618	}
619
620	ret = nvme_rdma_wait_for_cm(queue);
621	if (ret) {
622		dev_info(ctrl->ctrl.device,
623			"rdma connection establishment failed (%d)\n", ret);
624		goto out_destroy_cm_id;
625	}
626
627	set_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags);
628
629	return 0;
630
631out_destroy_cm_id:
632	rdma_destroy_id(queue->cm_id);
633	nvme_rdma_destroy_queue_ib(queue);
634out_destroy_mutex:
635	mutex_destroy(&queue->queue_lock);
636	return ret;
637}
638
639static void __nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
640{
641	rdma_disconnect(queue->cm_id);
642	ib_drain_qp(queue->qp);
643}
644
645static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
646{
647	if (!test_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
648		return;
649
650	mutex_lock(&queue->queue_lock);
651	if (test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags))
652		__nvme_rdma_stop_queue(queue);
653	mutex_unlock(&queue->queue_lock);
654}
655
656static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue)
657{
658	if (!test_and_clear_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
659		return;
660
661	rdma_destroy_id(queue->cm_id);
662	nvme_rdma_destroy_queue_ib(queue);
663	mutex_destroy(&queue->queue_lock);
664}
665
666static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl)
667{
668	int i;
669
670	for (i = 1; i < ctrl->ctrl.queue_count; i++)
671		nvme_rdma_free_queue(&ctrl->queues[i]);
672}
673
674static void nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl *ctrl)
675{
676	int i;
677
678	for (i = 1; i < ctrl->ctrl.queue_count; i++)
679		nvme_rdma_stop_queue(&ctrl->queues[i]);
680}
681
682static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx)
683{
684	struct nvme_rdma_queue *queue = &ctrl->queues[idx];
685	bool poll = nvme_rdma_poll_queue(queue);
686	int ret;
687
688	if (idx)
689		ret = nvmf_connect_io_queue(&ctrl->ctrl, idx, poll);
690	else
691		ret = nvmf_connect_admin_queue(&ctrl->ctrl);
692
693	if (!ret) {
694		set_bit(NVME_RDMA_Q_LIVE, &queue->flags);
695	} else {
696		if (test_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
697			__nvme_rdma_stop_queue(queue);
698		dev_info(ctrl->ctrl.device,
699			"failed to connect queue: %d ret=%d\n", idx, ret);
700	}
701	return ret;
702}
703
704static int nvme_rdma_start_io_queues(struct nvme_rdma_ctrl *ctrl)
705{
706	int i, ret = 0;
707
708	for (i = 1; i < ctrl->ctrl.queue_count; i++) {
709		ret = nvme_rdma_start_queue(ctrl, i);
710		if (ret)
711			goto out_stop_queues;
712	}
713
714	return 0;
715
716out_stop_queues:
717	for (i--; i >= 1; i--)
718		nvme_rdma_stop_queue(&ctrl->queues[i]);
719	return ret;
720}
721
722static int nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl *ctrl)
723{
724	struct nvmf_ctrl_options *opts = ctrl->ctrl.opts;
725	struct ib_device *ibdev = ctrl->device->dev;
726	unsigned int nr_io_queues, nr_default_queues;
727	unsigned int nr_read_queues, nr_poll_queues;
728	int i, ret;
729
730	nr_read_queues = min_t(unsigned int, ibdev->num_comp_vectors,
731				min(opts->nr_io_queues, num_online_cpus()));
732	nr_default_queues =  min_t(unsigned int, ibdev->num_comp_vectors,
733				min(opts->nr_write_queues, num_online_cpus()));
734	nr_poll_queues = min(opts->nr_poll_queues, num_online_cpus());
735	nr_io_queues = nr_read_queues + nr_default_queues + nr_poll_queues;
736
737	ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues);
738	if (ret)
739		return ret;
740
741	if (nr_io_queues == 0) {
742		dev_err(ctrl->ctrl.device,
743			"unable to set any I/O queues\n");
744		return -ENOMEM;
745	}
746
747	ctrl->ctrl.queue_count = nr_io_queues + 1;
748	dev_info(ctrl->ctrl.device,
749		"creating %d I/O queues.\n", nr_io_queues);
750
751	if (opts->nr_write_queues && nr_read_queues < nr_io_queues) {
752		/*
753		 * separate read/write queues
754		 * hand out dedicated default queues only after we have
755		 * sufficient read queues.
756		 */
757		ctrl->io_queues[HCTX_TYPE_READ] = nr_read_queues;
758		nr_io_queues -= ctrl->io_queues[HCTX_TYPE_READ];
759		ctrl->io_queues[HCTX_TYPE_DEFAULT] =
760			min(nr_default_queues, nr_io_queues);
761		nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT];
762	} else {
763		/*
764		 * shared read/write queues
765		 * either no write queues were requested, or we don't have
766		 * sufficient queue count to have dedicated default queues.
767		 */
768		ctrl->io_queues[HCTX_TYPE_DEFAULT] =
769			min(nr_read_queues, nr_io_queues);
770		nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT];
771	}
772
773	if (opts->nr_poll_queues && nr_io_queues) {
774		/* map dedicated poll queues only if we have queues left */
775		ctrl->io_queues[HCTX_TYPE_POLL] =
776			min(nr_poll_queues, nr_io_queues);
777	}
778
779	for (i = 1; i < ctrl->ctrl.queue_count; i++) {
780		ret = nvme_rdma_alloc_queue(ctrl, i,
781				ctrl->ctrl.sqsize + 1);
782		if (ret)
783			goto out_free_queues;
784	}
785
786	return 0;
787
788out_free_queues:
789	for (i--; i >= 1; i--)
790		nvme_rdma_free_queue(&ctrl->queues[i]);
791
792	return ret;
793}
794
795static struct blk_mq_tag_set *nvme_rdma_alloc_tagset(struct nvme_ctrl *nctrl,
796		bool admin)
797{
798	struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
799	struct blk_mq_tag_set *set;
800	int ret;
801
802	if (admin) {
803		set = &ctrl->admin_tag_set;
804		memset(set, 0, sizeof(*set));
805		set->ops = &nvme_rdma_admin_mq_ops;
806		set->queue_depth = NVME_AQ_MQ_TAG_DEPTH;
807		set->reserved_tags = 2; /* connect + keep-alive */
808		set->numa_node = nctrl->numa_node;
809		set->cmd_size = sizeof(struct nvme_rdma_request) +
810				NVME_RDMA_DATA_SGL_SIZE;
811		set->driver_data = ctrl;
812		set->nr_hw_queues = 1;
813		set->timeout = ADMIN_TIMEOUT;
814		set->flags = BLK_MQ_F_NO_SCHED;
815	} else {
816		set = &ctrl->tag_set;
817		memset(set, 0, sizeof(*set));
818		set->ops = &nvme_rdma_mq_ops;
819		set->queue_depth = nctrl->sqsize + 1;
820		set->reserved_tags = 1; /* fabric connect */
821		set->numa_node = nctrl->numa_node;
822		set->flags = BLK_MQ_F_SHOULD_MERGE;
823		set->cmd_size = sizeof(struct nvme_rdma_request) +
824				NVME_RDMA_DATA_SGL_SIZE;
825		if (nctrl->max_integrity_segments)
826			set->cmd_size += sizeof(struct nvme_rdma_sgl) +
827					 NVME_RDMA_METADATA_SGL_SIZE;
828		set->driver_data = ctrl;
829		set->nr_hw_queues = nctrl->queue_count - 1;
830		set->timeout = NVME_IO_TIMEOUT;
831		set->nr_maps = nctrl->opts->nr_poll_queues ? HCTX_MAX_TYPES : 2;
832	}
833
834	ret = blk_mq_alloc_tag_set(set);
835	if (ret)
836		return ERR_PTR(ret);
837
838	return set;
839}
840
841static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl,
842		bool remove)
843{
844	if (remove) {
845		blk_cleanup_queue(ctrl->ctrl.admin_q);
846		blk_cleanup_queue(ctrl->ctrl.fabrics_q);
847		blk_mq_free_tag_set(ctrl->ctrl.admin_tagset);
848	}
849	if (ctrl->async_event_sqe.data) {
850		cancel_work_sync(&ctrl->ctrl.async_event_work);
851		nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
852				sizeof(struct nvme_command), DMA_TO_DEVICE);
853		ctrl->async_event_sqe.data = NULL;
854	}
855	nvme_rdma_free_queue(&ctrl->queues[0]);
856}
857
858static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl,
859		bool new)
860{
861	bool pi_capable = false;
862	int error;
863
864	error = nvme_rdma_alloc_queue(ctrl, 0, NVME_AQ_DEPTH);
865	if (error)
866		return error;
867
868	ctrl->device = ctrl->queues[0].device;
869	ctrl->ctrl.numa_node = ibdev_to_node(ctrl->device->dev);
870
871	/* T10-PI support */
872	if (ctrl->device->dev->attrs.device_cap_flags &
873	    IB_DEVICE_INTEGRITY_HANDOVER)
874		pi_capable = true;
875
876	ctrl->max_fr_pages = nvme_rdma_get_max_fr_pages(ctrl->device->dev,
877							pi_capable);
878
879	/*
880	 * Bind the async event SQE DMA mapping to the admin queue lifetime.
881	 * It's safe, since any chage in the underlying RDMA device will issue
882	 * error recovery and queue re-creation.
883	 */
884	error = nvme_rdma_alloc_qe(ctrl->device->dev, &ctrl->async_event_sqe,
885			sizeof(struct nvme_command), DMA_TO_DEVICE);
886	if (error)
887		goto out_free_queue;
888
889	if (new) {
890		ctrl->ctrl.admin_tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, true);
891		if (IS_ERR(ctrl->ctrl.admin_tagset)) {
892			error = PTR_ERR(ctrl->ctrl.admin_tagset);
893			goto out_free_async_qe;
894		}
895
896		ctrl->ctrl.fabrics_q = blk_mq_init_queue(&ctrl->admin_tag_set);
897		if (IS_ERR(ctrl->ctrl.fabrics_q)) {
898			error = PTR_ERR(ctrl->ctrl.fabrics_q);
899			goto out_free_tagset;
900		}
901
902		ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set);
903		if (IS_ERR(ctrl->ctrl.admin_q)) {
904			error = PTR_ERR(ctrl->ctrl.admin_q);
905			goto out_cleanup_fabrics_q;
906		}
907	}
908
909	error = nvme_rdma_start_queue(ctrl, 0);
910	if (error)
911		goto out_cleanup_queue;
912
913	error = nvme_enable_ctrl(&ctrl->ctrl);
914	if (error)
915		goto out_stop_queue;
916
917	ctrl->ctrl.max_segments = ctrl->max_fr_pages;
918	ctrl->ctrl.max_hw_sectors = ctrl->max_fr_pages << (ilog2(SZ_4K) - 9);
919	if (pi_capable)
920		ctrl->ctrl.max_integrity_segments = ctrl->max_fr_pages;
921	else
922		ctrl->ctrl.max_integrity_segments = 0;
923
924	nvme_start_admin_queue(&ctrl->ctrl);
925
926	error = nvme_init_identify(&ctrl->ctrl);
927	if (error)
928		goto out_quiesce_queue;
929
930	return 0;
931
932out_quiesce_queue:
933	nvme_stop_admin_queue(&ctrl->ctrl);
934	blk_sync_queue(ctrl->ctrl.admin_q);
935out_stop_queue:
936	nvme_rdma_stop_queue(&ctrl->queues[0]);
937	nvme_cancel_admin_tagset(&ctrl->ctrl);
938out_cleanup_queue:
939	if (new)
940		blk_cleanup_queue(ctrl->ctrl.admin_q);
941out_cleanup_fabrics_q:
942	if (new)
943		blk_cleanup_queue(ctrl->ctrl.fabrics_q);
944out_free_tagset:
945	if (new)
946		blk_mq_free_tag_set(ctrl->ctrl.admin_tagset);
947out_free_async_qe:
948	if (ctrl->async_event_sqe.data) {
949		nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
950			sizeof(struct nvme_command), DMA_TO_DEVICE);
951		ctrl->async_event_sqe.data = NULL;
952	}
953out_free_queue:
954	nvme_rdma_free_queue(&ctrl->queues[0]);
955	return error;
956}
957
958static void nvme_rdma_destroy_io_queues(struct nvme_rdma_ctrl *ctrl,
959		bool remove)
960{
961	if (remove) {
962		blk_cleanup_queue(ctrl->ctrl.connect_q);
963		blk_mq_free_tag_set(ctrl->ctrl.tagset);
964	}
965	nvme_rdma_free_io_queues(ctrl);
966}
967
968static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new)
969{
970	int ret;
971
972	ret = nvme_rdma_alloc_io_queues(ctrl);
973	if (ret)
974		return ret;
975
976	if (new) {
977		ctrl->ctrl.tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, false);
978		if (IS_ERR(ctrl->ctrl.tagset)) {
979			ret = PTR_ERR(ctrl->ctrl.tagset);
980			goto out_free_io_queues;
981		}
982
983		ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set);
984		if (IS_ERR(ctrl->ctrl.connect_q)) {
985			ret = PTR_ERR(ctrl->ctrl.connect_q);
986			goto out_free_tag_set;
987		}
988	}
989
990	ret = nvme_rdma_start_io_queues(ctrl);
991	if (ret)
992		goto out_cleanup_connect_q;
993
994	if (!new) {
995		nvme_start_freeze(&ctrl->ctrl);
996		nvme_start_queues(&ctrl->ctrl);
997		if (!nvme_wait_freeze_timeout(&ctrl->ctrl, NVME_IO_TIMEOUT)) {
998			/*
999			 * If we timed out waiting for freeze we are likely to
1000			 * be stuck.  Fail the controller initialization just
1001			 * to be safe.
1002			 */
1003			ret = -ENODEV;
1004			nvme_unfreeze(&ctrl->ctrl);
1005			goto out_wait_freeze_timed_out;
1006		}
1007		blk_mq_update_nr_hw_queues(ctrl->ctrl.tagset,
1008			ctrl->ctrl.queue_count - 1);
1009		nvme_unfreeze(&ctrl->ctrl);
1010	}
1011
1012	return 0;
1013
1014out_wait_freeze_timed_out:
1015	nvme_stop_queues(&ctrl->ctrl);
1016	nvme_sync_io_queues(&ctrl->ctrl);
1017	nvme_rdma_stop_io_queues(ctrl);
1018out_cleanup_connect_q:
1019	nvme_cancel_tagset(&ctrl->ctrl);
1020	if (new)
1021		blk_cleanup_queue(ctrl->ctrl.connect_q);
1022out_free_tag_set:
1023	if (new)
1024		blk_mq_free_tag_set(ctrl->ctrl.tagset);
1025out_free_io_queues:
1026	nvme_rdma_free_io_queues(ctrl);
1027	return ret;
1028}
1029
1030static void nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl *ctrl,
1031		bool remove)
1032{
1033	nvme_stop_admin_queue(&ctrl->ctrl);
1034	blk_sync_queue(ctrl->ctrl.admin_q);
1035	nvme_rdma_stop_queue(&ctrl->queues[0]);
1036	if (ctrl->ctrl.admin_tagset) {
1037		blk_mq_tagset_busy_iter(ctrl->ctrl.admin_tagset,
1038			nvme_cancel_request, &ctrl->ctrl);
1039		blk_mq_tagset_wait_completed_request(ctrl->ctrl.admin_tagset);
1040	}
1041	if (remove)
1042		nvme_start_admin_queue(&ctrl->ctrl);
1043	nvme_rdma_destroy_admin_queue(ctrl, remove);
1044}
1045
1046static void nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl *ctrl,
1047		bool remove)
1048{
1049	if (ctrl->ctrl.queue_count > 1) {
1050		nvme_stop_queues(&ctrl->ctrl);
1051		nvme_sync_io_queues(&ctrl->ctrl);
1052		nvme_rdma_stop_io_queues(ctrl);
1053		if (ctrl->ctrl.tagset) {
1054			blk_mq_tagset_busy_iter(ctrl->ctrl.tagset,
1055				nvme_cancel_request, &ctrl->ctrl);
1056			blk_mq_tagset_wait_completed_request(ctrl->ctrl.tagset);
1057		}
1058		if (remove)
1059			nvme_start_queues(&ctrl->ctrl);
1060		nvme_rdma_destroy_io_queues(ctrl, remove);
1061	}
1062}
1063
1064static void nvme_rdma_stop_ctrl(struct nvme_ctrl *nctrl)
1065{
1066	struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
1067
1068	cancel_work_sync(&ctrl->err_work);
1069	cancel_delayed_work_sync(&ctrl->reconnect_work);
1070}
1071
1072static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl)
1073{
1074	struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
1075
1076	if (list_empty(&ctrl->list))
1077		goto free_ctrl;
1078
1079	mutex_lock(&nvme_rdma_ctrl_mutex);
1080	list_del(&ctrl->list);
1081	mutex_unlock(&nvme_rdma_ctrl_mutex);
1082
1083	nvmf_free_options(nctrl->opts);
1084free_ctrl:
1085	kfree(ctrl->queues);
1086	kfree(ctrl);
1087}
1088
1089static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl)
1090{
1091	/* If we are resetting/deleting then do nothing */
1092	if (ctrl->ctrl.state != NVME_CTRL_CONNECTING) {
1093		WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW ||
1094			ctrl->ctrl.state == NVME_CTRL_LIVE);
1095		return;
1096	}
1097
1098	if (nvmf_should_reconnect(&ctrl->ctrl)) {
1099		dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n",
1100			ctrl->ctrl.opts->reconnect_delay);
1101		queue_delayed_work(nvme_wq, &ctrl->reconnect_work,
1102				ctrl->ctrl.opts->reconnect_delay * HZ);
1103	} else {
1104		nvme_delete_ctrl(&ctrl->ctrl);
1105	}
1106}
1107
1108static int nvme_rdma_setup_ctrl(struct nvme_rdma_ctrl *ctrl, bool new)
1109{
1110	int ret = -EINVAL;
1111	bool changed;
1112
1113	ret = nvme_rdma_configure_admin_queue(ctrl, new);
1114	if (ret)
1115		return ret;
1116
1117	if (ctrl->ctrl.icdoff) {
1118		ret = -EOPNOTSUPP;
1119		dev_err(ctrl->ctrl.device, "icdoff is not supported!\n");
1120		goto destroy_admin;
1121	}
1122
1123	if (!(ctrl->ctrl.sgls & (1 << 2))) {
1124		ret = -EOPNOTSUPP;
1125		dev_err(ctrl->ctrl.device,
1126			"Mandatory keyed sgls are not supported!\n");
1127		goto destroy_admin;
1128	}
1129
1130	if (ctrl->ctrl.opts->queue_size > ctrl->ctrl.sqsize + 1) {
1131		dev_warn(ctrl->ctrl.device,
1132			"queue_size %zu > ctrl sqsize %u, clamping down\n",
1133			ctrl->ctrl.opts->queue_size, ctrl->ctrl.sqsize + 1);
1134	}
1135
1136	if (ctrl->ctrl.sqsize + 1 > ctrl->ctrl.maxcmd) {
1137		dev_warn(ctrl->ctrl.device,
1138			"sqsize %u > ctrl maxcmd %u, clamping down\n",
1139			ctrl->ctrl.sqsize + 1, ctrl->ctrl.maxcmd);
1140		ctrl->ctrl.sqsize = ctrl->ctrl.maxcmd - 1;
1141	}
1142
1143	if (ctrl->ctrl.sgls & (1 << 20))
1144		ctrl->use_inline_data = true;
1145
1146	if (ctrl->ctrl.queue_count > 1) {
1147		ret = nvme_rdma_configure_io_queues(ctrl, new);
1148		if (ret)
1149			goto destroy_admin;
1150	}
1151
1152	changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE);
1153	if (!changed) {
1154		/*
1155		 * state change failure is ok if we started ctrl delete,
1156		 * unless we're during creation of a new controller to
1157		 * avoid races with teardown flow.
1158		 */
1159		WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING &&
1160			     ctrl->ctrl.state != NVME_CTRL_DELETING_NOIO);
1161		WARN_ON_ONCE(new);
1162		ret = -EINVAL;
1163		goto destroy_io;
1164	}
1165
1166	nvme_start_ctrl(&ctrl->ctrl);
1167	return 0;
1168
1169destroy_io:
1170	if (ctrl->ctrl.queue_count > 1) {
1171		nvme_stop_queues(&ctrl->ctrl);
1172		nvme_sync_io_queues(&ctrl->ctrl);
1173		nvme_rdma_stop_io_queues(ctrl);
1174		nvme_cancel_tagset(&ctrl->ctrl);
1175		nvme_rdma_destroy_io_queues(ctrl, new);
1176	}
1177destroy_admin:
1178	nvme_stop_admin_queue(&ctrl->ctrl);
1179	blk_sync_queue(ctrl->ctrl.admin_q);
1180	nvme_rdma_stop_queue(&ctrl->queues[0]);
1181	nvme_cancel_admin_tagset(&ctrl->ctrl);
1182	nvme_rdma_destroy_admin_queue(ctrl, new);
1183	return ret;
1184}
1185
1186static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work)
1187{
1188	struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work),
1189			struct nvme_rdma_ctrl, reconnect_work);
1190
1191	++ctrl->ctrl.nr_reconnects;
1192
1193	if (nvme_rdma_setup_ctrl(ctrl, false))
1194		goto requeue;
1195
1196	dev_info(ctrl->ctrl.device, "Successfully reconnected (%d attempts)\n",
1197			ctrl->ctrl.nr_reconnects);
1198
1199	ctrl->ctrl.nr_reconnects = 0;
1200
1201	return;
1202
1203requeue:
1204	dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n",
1205			ctrl->ctrl.nr_reconnects);
1206	nvme_rdma_reconnect_or_remove(ctrl);
1207}
1208
1209static void nvme_rdma_error_recovery_work(struct work_struct *work)
1210{
1211	struct nvme_rdma_ctrl *ctrl = container_of(work,
1212			struct nvme_rdma_ctrl, err_work);
1213
1214	nvme_stop_keep_alive(&ctrl->ctrl);
1215	flush_work(&ctrl->ctrl.async_event_work);
1216	nvme_rdma_teardown_io_queues(ctrl, false);
1217	nvme_start_queues(&ctrl->ctrl);
1218	nvme_rdma_teardown_admin_queue(ctrl, false);
1219	nvme_start_admin_queue(&ctrl->ctrl);
1220
1221	if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
1222		/* state change failure is ok if we started ctrl delete */
1223		WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING &&
1224			     ctrl->ctrl.state != NVME_CTRL_DELETING_NOIO);
1225		return;
1226	}
1227
1228	nvme_rdma_reconnect_or_remove(ctrl);
1229}
1230
1231static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl)
1232{
1233	if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING))
1234		return;
1235
1236	dev_warn(ctrl->ctrl.device, "starting error recovery\n");
1237	queue_work(nvme_reset_wq, &ctrl->err_work);
1238}
1239
1240static void nvme_rdma_end_request(struct nvme_rdma_request *req)
1241{
1242	struct request *rq = blk_mq_rq_from_pdu(req);
1243
1244	if (!refcount_dec_and_test(&req->ref))
1245		return;
1246	if (!nvme_try_complete_req(rq, req->status, req->result))
1247		nvme_rdma_complete_rq(rq);
1248}
1249
1250static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc,
1251		const char *op)
1252{
1253	struct nvme_rdma_queue *queue = wc->qp->qp_context;
1254	struct nvme_rdma_ctrl *ctrl = queue->ctrl;
1255
1256	if (ctrl->ctrl.state == NVME_CTRL_LIVE)
1257		dev_info(ctrl->ctrl.device,
1258			     "%s for CQE 0x%p failed with status %s (%d)\n",
1259			     op, wc->wr_cqe,
1260			     ib_wc_status_msg(wc->status), wc->status);
1261	nvme_rdma_error_recovery(ctrl);
1262}
1263
1264static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc)
1265{
1266	if (unlikely(wc->status != IB_WC_SUCCESS))
1267		nvme_rdma_wr_error(cq, wc, "MEMREG");
1268}
1269
1270static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc)
1271{
1272	struct nvme_rdma_request *req =
1273		container_of(wc->wr_cqe, struct nvme_rdma_request, reg_cqe);
1274
1275	if (unlikely(wc->status != IB_WC_SUCCESS))
1276		nvme_rdma_wr_error(cq, wc, "LOCAL_INV");
1277	else
1278		nvme_rdma_end_request(req);
1279}
1280
1281static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue,
1282		struct nvme_rdma_request *req)
1283{
1284	struct ib_send_wr wr = {
1285		.opcode		    = IB_WR_LOCAL_INV,
1286		.next		    = NULL,
1287		.num_sge	    = 0,
1288		.send_flags	    = IB_SEND_SIGNALED,
1289		.ex.invalidate_rkey = req->mr->rkey,
1290	};
1291
1292	req->reg_cqe.done = nvme_rdma_inv_rkey_done;
1293	wr.wr_cqe = &req->reg_cqe;
1294
1295	return ib_post_send(queue->qp, &wr, NULL);
1296}
1297
1298static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue,
1299		struct request *rq)
1300{
1301	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1302	struct nvme_rdma_device *dev = queue->device;
1303	struct ib_device *ibdev = dev->dev;
1304	struct list_head *pool = &queue->qp->rdma_mrs;
1305
1306	if (!blk_rq_nr_phys_segments(rq))
1307		return;
1308
1309	if (blk_integrity_rq(rq)) {
1310		ib_dma_unmap_sg(ibdev, req->metadata_sgl->sg_table.sgl,
1311				req->metadata_sgl->nents, rq_dma_dir(rq));
1312		sg_free_table_chained(&req->metadata_sgl->sg_table,
1313				      NVME_INLINE_METADATA_SG_CNT);
1314	}
1315
1316	if (req->use_sig_mr)
1317		pool = &queue->qp->sig_mrs;
1318
1319	if (req->mr) {
1320		ib_mr_pool_put(queue->qp, pool, req->mr);
1321		req->mr = NULL;
1322	}
1323
1324	ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents,
1325			rq_dma_dir(rq));
1326	sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT);
1327}
1328
1329static int nvme_rdma_set_sg_null(struct nvme_command *c)
1330{
1331	struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1332
1333	sg->addr = 0;
1334	put_unaligned_le24(0, sg->length);
1335	put_unaligned_le32(0, sg->key);
1336	sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1337	return 0;
1338}
1339
1340static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue,
1341		struct nvme_rdma_request *req, struct nvme_command *c,
1342		int count)
1343{
1344	struct nvme_sgl_desc *sg = &c->common.dptr.sgl;
1345	struct ib_sge *sge = &req->sge[1];
1346	struct scatterlist *sgl;
1347	u32 len = 0;
1348	int i;
1349
1350	for_each_sg(req->data_sgl.sg_table.sgl, sgl, count, i) {
1351		sge->addr = sg_dma_address(sgl);
1352		sge->length = sg_dma_len(sgl);
1353		sge->lkey = queue->device->pd->local_dma_lkey;
1354		len += sge->length;
1355		sge++;
1356	}
1357
1358	sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff);
1359	sg->length = cpu_to_le32(len);
1360	sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET;
1361
1362	req->num_sge += count;
1363	return 0;
1364}
1365
1366static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue,
1367		struct nvme_rdma_request *req, struct nvme_command *c)
1368{
1369	struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1370
1371	sg->addr = cpu_to_le64(sg_dma_address(req->data_sgl.sg_table.sgl));
1372	put_unaligned_le24(sg_dma_len(req->data_sgl.sg_table.sgl), sg->length);
1373	put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key);
1374	sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1375	return 0;
1376}
1377
1378static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue,
1379		struct nvme_rdma_request *req, struct nvme_command *c,
1380		int count)
1381{
1382	struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1383	int nr;
1384
1385	req->mr = ib_mr_pool_get(queue->qp, &queue->qp->rdma_mrs);
1386	if (WARN_ON_ONCE(!req->mr))
1387		return -EAGAIN;
1388
1389	/*
1390	 * Align the MR to a 4K page size to match the ctrl page size and
1391	 * the block virtual boundary.
1392	 */
1393	nr = ib_map_mr_sg(req->mr, req->data_sgl.sg_table.sgl, count, NULL,
1394			  SZ_4K);
1395	if (unlikely(nr < count)) {
1396		ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr);
1397		req->mr = NULL;
1398		if (nr < 0)
1399			return nr;
1400		return -EINVAL;
1401	}
1402
1403	ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
1404
1405	req->reg_cqe.done = nvme_rdma_memreg_done;
1406	memset(&req->reg_wr, 0, sizeof(req->reg_wr));
1407	req->reg_wr.wr.opcode = IB_WR_REG_MR;
1408	req->reg_wr.wr.wr_cqe = &req->reg_cqe;
1409	req->reg_wr.wr.num_sge = 0;
1410	req->reg_wr.mr = req->mr;
1411	req->reg_wr.key = req->mr->rkey;
1412	req->reg_wr.access = IB_ACCESS_LOCAL_WRITE |
1413			     IB_ACCESS_REMOTE_READ |
1414			     IB_ACCESS_REMOTE_WRITE;
1415
1416	sg->addr = cpu_to_le64(req->mr->iova);
1417	put_unaligned_le24(req->mr->length, sg->length);
1418	put_unaligned_le32(req->mr->rkey, sg->key);
1419	sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) |
1420			NVME_SGL_FMT_INVALIDATE;
1421
1422	return 0;
1423}
1424
1425static void nvme_rdma_set_sig_domain(struct blk_integrity *bi,
1426		struct nvme_command *cmd, struct ib_sig_domain *domain,
1427		u16 control, u8 pi_type)
1428{
1429	domain->sig_type = IB_SIG_TYPE_T10_DIF;
1430	domain->sig.dif.bg_type = IB_T10DIF_CRC;
1431	domain->sig.dif.pi_interval = 1 << bi->interval_exp;
1432	domain->sig.dif.ref_tag = le32_to_cpu(cmd->rw.reftag);
1433	if (control & NVME_RW_PRINFO_PRCHK_REF)
1434		domain->sig.dif.ref_remap = true;
1435
1436	domain->sig.dif.app_tag = le16_to_cpu(cmd->rw.apptag);
1437	domain->sig.dif.apptag_check_mask = le16_to_cpu(cmd->rw.appmask);
1438	domain->sig.dif.app_escape = true;
1439	if (pi_type == NVME_NS_DPS_PI_TYPE3)
1440		domain->sig.dif.ref_escape = true;
1441}
1442
1443static void nvme_rdma_set_sig_attrs(struct blk_integrity *bi,
1444		struct nvme_command *cmd, struct ib_sig_attrs *sig_attrs,
1445		u8 pi_type)
1446{
1447	u16 control = le16_to_cpu(cmd->rw.control);
1448
1449	memset(sig_attrs, 0, sizeof(*sig_attrs));
1450	if (control & NVME_RW_PRINFO_PRACT) {
1451		/* for WRITE_INSERT/READ_STRIP no memory domain */
1452		sig_attrs->mem.sig_type = IB_SIG_TYPE_NONE;
1453		nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control,
1454					 pi_type);
1455		/* Clear the PRACT bit since HCA will generate/verify the PI */
1456		control &= ~NVME_RW_PRINFO_PRACT;
1457		cmd->rw.control = cpu_to_le16(control);
1458	} else {
1459		/* for WRITE_PASS/READ_PASS both wire/memory domains exist */
1460		nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control,
1461					 pi_type);
1462		nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->mem, control,
1463					 pi_type);
1464	}
1465}
1466
1467static void nvme_rdma_set_prot_checks(struct nvme_command *cmd, u8 *mask)
1468{
1469	*mask = 0;
1470	if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_REF)
1471		*mask |= IB_SIG_CHECK_REFTAG;
1472	if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_GUARD)
1473		*mask |= IB_SIG_CHECK_GUARD;
1474}
1475
1476static void nvme_rdma_sig_done(struct ib_cq *cq, struct ib_wc *wc)
1477{
1478	if (unlikely(wc->status != IB_WC_SUCCESS))
1479		nvme_rdma_wr_error(cq, wc, "SIG");
1480}
1481
1482static int nvme_rdma_map_sg_pi(struct nvme_rdma_queue *queue,
1483		struct nvme_rdma_request *req, struct nvme_command *c,
1484		int count, int pi_count)
1485{
1486	struct nvme_rdma_sgl *sgl = &req->data_sgl;
1487	struct ib_reg_wr *wr = &req->reg_wr;
1488	struct request *rq = blk_mq_rq_from_pdu(req);
1489	struct nvme_ns *ns = rq->q->queuedata;
1490	struct bio *bio = rq->bio;
1491	struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1492	int nr;
1493
1494	req->mr = ib_mr_pool_get(queue->qp, &queue->qp->sig_mrs);
1495	if (WARN_ON_ONCE(!req->mr))
1496		return -EAGAIN;
1497
1498	nr = ib_map_mr_sg_pi(req->mr, sgl->sg_table.sgl, count, NULL,
1499			     req->metadata_sgl->sg_table.sgl, pi_count, NULL,
1500			     SZ_4K);
1501	if (unlikely(nr))
1502		goto mr_put;
1503
1504	nvme_rdma_set_sig_attrs(blk_get_integrity(bio->bi_disk), c,
1505				req->mr->sig_attrs, ns->pi_type);
1506	nvme_rdma_set_prot_checks(c, &req->mr->sig_attrs->check_mask);
1507
1508	ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
1509
1510	req->reg_cqe.done = nvme_rdma_sig_done;
1511	memset(wr, 0, sizeof(*wr));
1512	wr->wr.opcode = IB_WR_REG_MR_INTEGRITY;
1513	wr->wr.wr_cqe = &req->reg_cqe;
1514	wr->wr.num_sge = 0;
1515	wr->wr.send_flags = 0;
1516	wr->mr = req->mr;
1517	wr->key = req->mr->rkey;
1518	wr->access = IB_ACCESS_LOCAL_WRITE |
1519		     IB_ACCESS_REMOTE_READ |
1520		     IB_ACCESS_REMOTE_WRITE;
1521
1522	sg->addr = cpu_to_le64(req->mr->iova);
1523	put_unaligned_le24(req->mr->length, sg->length);
1524	put_unaligned_le32(req->mr->rkey, sg->key);
1525	sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1526
1527	return 0;
1528
1529mr_put:
1530	ib_mr_pool_put(queue->qp, &queue->qp->sig_mrs, req->mr);
1531	req->mr = NULL;
1532	if (nr < 0)
1533		return nr;
1534	return -EINVAL;
1535}
1536
1537static int nvme_rdma_map_data(struct nvme_rdma_queue *queue,
1538		struct request *rq, struct nvme_command *c)
1539{
1540	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1541	struct nvme_rdma_device *dev = queue->device;
1542	struct ib_device *ibdev = dev->dev;
1543	int pi_count = 0;
1544	int count, ret;
1545
1546	req->num_sge = 1;
1547	refcount_set(&req->ref, 2); /* send and recv completions */
1548
1549	c->common.flags |= NVME_CMD_SGL_METABUF;
1550
1551	if (!blk_rq_nr_phys_segments(rq))
1552		return nvme_rdma_set_sg_null(c);
1553
1554	req->data_sgl.sg_table.sgl = (struct scatterlist *)(req + 1);
1555	ret = sg_alloc_table_chained(&req->data_sgl.sg_table,
1556			blk_rq_nr_phys_segments(rq), req->data_sgl.sg_table.sgl,
1557			NVME_INLINE_SG_CNT);
1558	if (ret)
1559		return -ENOMEM;
1560
1561	req->data_sgl.nents = blk_rq_map_sg(rq->q, rq,
1562					    req->data_sgl.sg_table.sgl);
1563
1564	count = ib_dma_map_sg(ibdev, req->data_sgl.sg_table.sgl,
1565			      req->data_sgl.nents, rq_dma_dir(rq));
1566	if (unlikely(count <= 0)) {
1567		ret = -EIO;
1568		goto out_free_table;
1569	}
1570
1571	if (blk_integrity_rq(rq)) {
1572		req->metadata_sgl->sg_table.sgl =
1573			(struct scatterlist *)(req->metadata_sgl + 1);
1574		ret = sg_alloc_table_chained(&req->metadata_sgl->sg_table,
1575				blk_rq_count_integrity_sg(rq->q, rq->bio),
1576				req->metadata_sgl->sg_table.sgl,
1577				NVME_INLINE_METADATA_SG_CNT);
1578		if (unlikely(ret)) {
1579			ret = -ENOMEM;
1580			goto out_unmap_sg;
1581		}
1582
1583		req->metadata_sgl->nents = blk_rq_map_integrity_sg(rq->q,
1584				rq->bio, req->metadata_sgl->sg_table.sgl);
1585		pi_count = ib_dma_map_sg(ibdev,
1586					 req->metadata_sgl->sg_table.sgl,
1587					 req->metadata_sgl->nents,
1588					 rq_dma_dir(rq));
1589		if (unlikely(pi_count <= 0)) {
1590			ret = -EIO;
1591			goto out_free_pi_table;
1592		}
1593	}
1594
1595	if (req->use_sig_mr) {
1596		ret = nvme_rdma_map_sg_pi(queue, req, c, count, pi_count);
1597		goto out;
1598	}
1599
1600	if (count <= dev->num_inline_segments) {
1601		if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) &&
1602		    queue->ctrl->use_inline_data &&
1603		    blk_rq_payload_bytes(rq) <=
1604				nvme_rdma_inline_data_size(queue)) {
1605			ret = nvme_rdma_map_sg_inline(queue, req, c, count);
1606			goto out;
1607		}
1608
1609		if (count == 1 && dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) {
1610			ret = nvme_rdma_map_sg_single(queue, req, c);
1611			goto out;
1612		}
1613	}
1614
1615	ret = nvme_rdma_map_sg_fr(queue, req, c, count);
1616out:
1617	if (unlikely(ret))
1618		goto out_unmap_pi_sg;
1619
1620	return 0;
1621
1622out_unmap_pi_sg:
1623	if (blk_integrity_rq(rq))
1624		ib_dma_unmap_sg(ibdev, req->metadata_sgl->sg_table.sgl,
1625				req->metadata_sgl->nents, rq_dma_dir(rq));
1626out_free_pi_table:
1627	if (blk_integrity_rq(rq))
1628		sg_free_table_chained(&req->metadata_sgl->sg_table,
1629				      NVME_INLINE_METADATA_SG_CNT);
1630out_unmap_sg:
1631	ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents,
1632			rq_dma_dir(rq));
1633out_free_table:
1634	sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT);
1635	return ret;
1636}
1637
1638static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc)
1639{
1640	struct nvme_rdma_qe *qe =
1641		container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
1642	struct nvme_rdma_request *req =
1643		container_of(qe, struct nvme_rdma_request, sqe);
1644
1645	if (unlikely(wc->status != IB_WC_SUCCESS))
1646		nvme_rdma_wr_error(cq, wc, "SEND");
1647	else
1648		nvme_rdma_end_request(req);
1649}
1650
1651static int nvme_rdma_post_send(struct nvme_rdma_queue *queue,
1652		struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge,
1653		struct ib_send_wr *first)
1654{
1655	struct ib_send_wr wr;
1656	int ret;
1657
1658	sge->addr   = qe->dma;
1659	sge->length = sizeof(struct nvme_command);
1660	sge->lkey   = queue->device->pd->local_dma_lkey;
1661
1662	wr.next       = NULL;
1663	wr.wr_cqe     = &qe->cqe;
1664	wr.sg_list    = sge;
1665	wr.num_sge    = num_sge;
1666	wr.opcode     = IB_WR_SEND;
1667	wr.send_flags = IB_SEND_SIGNALED;
1668
1669	if (first)
1670		first->next = &wr;
1671	else
1672		first = &wr;
1673
1674	ret = ib_post_send(queue->qp, first, NULL);
1675	if (unlikely(ret)) {
1676		dev_err(queue->ctrl->ctrl.device,
1677			     "%s failed with error code %d\n", __func__, ret);
1678	}
1679	return ret;
1680}
1681
1682static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue,
1683		struct nvme_rdma_qe *qe)
1684{
1685	struct ib_recv_wr wr;
1686	struct ib_sge list;
1687	int ret;
1688
1689	list.addr   = qe->dma;
1690	list.length = sizeof(struct nvme_completion);
1691	list.lkey   = queue->device->pd->local_dma_lkey;
1692
1693	qe->cqe.done = nvme_rdma_recv_done;
1694
1695	wr.next     = NULL;
1696	wr.wr_cqe   = &qe->cqe;
1697	wr.sg_list  = &list;
1698	wr.num_sge  = 1;
1699
1700	ret = ib_post_recv(queue->qp, &wr, NULL);
1701	if (unlikely(ret)) {
1702		dev_err(queue->ctrl->ctrl.device,
1703			"%s failed with error code %d\n", __func__, ret);
1704	}
1705	return ret;
1706}
1707
1708static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue)
1709{
1710	u32 queue_idx = nvme_rdma_queue_idx(queue);
1711
1712	if (queue_idx == 0)
1713		return queue->ctrl->admin_tag_set.tags[queue_idx];
1714	return queue->ctrl->tag_set.tags[queue_idx - 1];
1715}
1716
1717static void nvme_rdma_async_done(struct ib_cq *cq, struct ib_wc *wc)
1718{
1719	if (unlikely(wc->status != IB_WC_SUCCESS))
1720		nvme_rdma_wr_error(cq, wc, "ASYNC");
1721}
1722
1723static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg)
1724{
1725	struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg);
1726	struct nvme_rdma_queue *queue = &ctrl->queues[0];
1727	struct ib_device *dev = queue->device->dev;
1728	struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe;
1729	struct nvme_command *cmd = sqe->data;
1730	struct ib_sge sge;
1731	int ret;
1732
1733	ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE);
1734
1735	memset(cmd, 0, sizeof(*cmd));
1736	cmd->common.opcode = nvme_admin_async_event;
1737	cmd->common.command_id = NVME_AQ_BLK_MQ_DEPTH;
1738	cmd->common.flags |= NVME_CMD_SGL_METABUF;
1739	nvme_rdma_set_sg_null(cmd);
1740
1741	sqe->cqe.done = nvme_rdma_async_done;
1742
1743	ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd),
1744			DMA_TO_DEVICE);
1745
1746	ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL);
1747	WARN_ON_ONCE(ret);
1748}
1749
1750static void nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue,
1751		struct nvme_completion *cqe, struct ib_wc *wc)
1752{
1753	struct request *rq;
1754	struct nvme_rdma_request *req;
1755
1756	rq = nvme_find_rq(nvme_rdma_tagset(queue), cqe->command_id);
1757	if (!rq) {
1758		dev_err(queue->ctrl->ctrl.device,
1759			"got bad command_id %#x on QP %#x\n",
1760			cqe->command_id, queue->qp->qp_num);
1761		nvme_rdma_error_recovery(queue->ctrl);
1762		return;
1763	}
1764	req = blk_mq_rq_to_pdu(rq);
1765
1766	req->status = cqe->status;
1767	req->result = cqe->result;
1768
1769	if (wc->wc_flags & IB_WC_WITH_INVALIDATE) {
1770		if (unlikely(!req->mr ||
1771			     wc->ex.invalidate_rkey != req->mr->rkey)) {
1772			dev_err(queue->ctrl->ctrl.device,
1773				"Bogus remote invalidation for rkey %#x\n",
1774				req->mr ? req->mr->rkey : 0);
1775			nvme_rdma_error_recovery(queue->ctrl);
1776		}
1777	} else if (req->mr) {
1778		int ret;
1779
1780		ret = nvme_rdma_inv_rkey(queue, req);
1781		if (unlikely(ret < 0)) {
1782			dev_err(queue->ctrl->ctrl.device,
1783				"Queueing INV WR for rkey %#x failed (%d)\n",
1784				req->mr->rkey, ret);
1785			nvme_rdma_error_recovery(queue->ctrl);
1786		}
1787		/* the local invalidation completion will end the request */
1788		return;
1789	}
1790
1791	nvme_rdma_end_request(req);
1792}
1793
1794static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc)
1795{
1796	struct nvme_rdma_qe *qe =
1797		container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
1798	struct nvme_rdma_queue *queue = wc->qp->qp_context;
1799	struct ib_device *ibdev = queue->device->dev;
1800	struct nvme_completion *cqe = qe->data;
1801	const size_t len = sizeof(struct nvme_completion);
1802
1803	if (unlikely(wc->status != IB_WC_SUCCESS)) {
1804		nvme_rdma_wr_error(cq, wc, "RECV");
1805		return;
1806	}
1807
1808	/* sanity checking for received data length */
1809	if (unlikely(wc->byte_len < len)) {
1810		dev_err(queue->ctrl->ctrl.device,
1811			"Unexpected nvme completion length(%d)\n", wc->byte_len);
1812		nvme_rdma_error_recovery(queue->ctrl);
1813		return;
1814	}
1815
1816	ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE);
1817	/*
1818	 * AEN requests are special as they don't time out and can
1819	 * survive any kind of queue freeze and often don't respond to
1820	 * aborts.  We don't even bother to allocate a struct request
1821	 * for them but rather special case them here.
1822	 */
1823	if (unlikely(nvme_is_aen_req(nvme_rdma_queue_idx(queue),
1824				     cqe->command_id)))
1825		nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status,
1826				&cqe->result);
1827	else
1828		nvme_rdma_process_nvme_rsp(queue, cqe, wc);
1829	ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE);
1830
1831	nvme_rdma_post_recv(queue, qe);
1832}
1833
1834static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue)
1835{
1836	int ret, i;
1837
1838	for (i = 0; i < queue->queue_size; i++) {
1839		ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]);
1840		if (ret)
1841			return ret;
1842	}
1843
1844	return 0;
1845}
1846
1847static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue,
1848		struct rdma_cm_event *ev)
1849{
1850	struct rdma_cm_id *cm_id = queue->cm_id;
1851	int status = ev->status;
1852	const char *rej_msg;
1853	const struct nvme_rdma_cm_rej *rej_data;
1854	u8 rej_data_len;
1855
1856	rej_msg = rdma_reject_msg(cm_id, status);
1857	rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len);
1858
1859	if (rej_data && rej_data_len >= sizeof(u16)) {
1860		u16 sts = le16_to_cpu(rej_data->sts);
1861
1862		dev_err(queue->ctrl->ctrl.device,
1863		      "Connect rejected: status %d (%s) nvme status %d (%s).\n",
1864		      status, rej_msg, sts, nvme_rdma_cm_msg(sts));
1865	} else {
1866		dev_err(queue->ctrl->ctrl.device,
1867			"Connect rejected: status %d (%s).\n", status, rej_msg);
1868	}
1869
1870	return -ECONNRESET;
1871}
1872
1873static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue)
1874{
1875	struct nvme_ctrl *ctrl = &queue->ctrl->ctrl;
1876	int ret;
1877
1878	ret = nvme_rdma_create_queue_ib(queue);
1879	if (ret)
1880		return ret;
1881
1882	if (ctrl->opts->tos >= 0)
1883		rdma_set_service_type(queue->cm_id, ctrl->opts->tos);
1884	ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS);
1885	if (ret) {
1886		dev_err(ctrl->device, "rdma_resolve_route failed (%d).\n",
1887			queue->cm_error);
1888		goto out_destroy_queue;
1889	}
1890
1891	return 0;
1892
1893out_destroy_queue:
1894	nvme_rdma_destroy_queue_ib(queue);
1895	return ret;
1896}
1897
1898static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue)
1899{
1900	struct nvme_rdma_ctrl *ctrl = queue->ctrl;
1901	struct rdma_conn_param param = { };
1902	struct nvme_rdma_cm_req priv = { };
1903	int ret;
1904
1905	param.qp_num = queue->qp->qp_num;
1906	param.flow_control = 1;
1907
1908	param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom;
1909	/* maximum retry count */
1910	param.retry_count = 7;
1911	param.rnr_retry_count = 7;
1912	param.private_data = &priv;
1913	param.private_data_len = sizeof(priv);
1914
1915	priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
1916	priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue));
1917	/*
1918	 * set the admin queue depth to the minimum size
1919	 * specified by the Fabrics standard.
1920	 */
1921	if (priv.qid == 0) {
1922		priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH);
1923		priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1);
1924	} else {
1925		/*
1926		 * current interpretation of the fabrics spec
1927		 * is at minimum you make hrqsize sqsize+1, or a
1928		 * 1's based representation of sqsize.
1929		 */
1930		priv.hrqsize = cpu_to_le16(queue->queue_size);
1931		priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize);
1932	}
1933
1934	ret = rdma_connect_locked(queue->cm_id, &param);
1935	if (ret) {
1936		dev_err(ctrl->ctrl.device,
1937			"rdma_connect_locked failed (%d).\n", ret);
1938		return ret;
1939	}
1940
1941	return 0;
1942}
1943
1944static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
1945		struct rdma_cm_event *ev)
1946{
1947	struct nvme_rdma_queue *queue = cm_id->context;
1948	int cm_error = 0;
1949
1950	dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n",
1951		rdma_event_msg(ev->event), ev->event,
1952		ev->status, cm_id);
1953
1954	switch (ev->event) {
1955	case RDMA_CM_EVENT_ADDR_RESOLVED:
1956		cm_error = nvme_rdma_addr_resolved(queue);
1957		break;
1958	case RDMA_CM_EVENT_ROUTE_RESOLVED:
1959		cm_error = nvme_rdma_route_resolved(queue);
1960		break;
1961	case RDMA_CM_EVENT_ESTABLISHED:
1962		queue->cm_error = nvme_rdma_conn_established(queue);
1963		/* complete cm_done regardless of success/failure */
1964		complete(&queue->cm_done);
1965		return 0;
1966	case RDMA_CM_EVENT_REJECTED:
1967		cm_error = nvme_rdma_conn_rejected(queue, ev);
1968		break;
1969	case RDMA_CM_EVENT_ROUTE_ERROR:
1970	case RDMA_CM_EVENT_CONNECT_ERROR:
1971	case RDMA_CM_EVENT_UNREACHABLE:
1972	case RDMA_CM_EVENT_ADDR_ERROR:
1973		dev_dbg(queue->ctrl->ctrl.device,
1974			"CM error event %d\n", ev->event);
1975		cm_error = -ECONNRESET;
1976		break;
1977	case RDMA_CM_EVENT_DISCONNECTED:
1978	case RDMA_CM_EVENT_ADDR_CHANGE:
1979	case RDMA_CM_EVENT_TIMEWAIT_EXIT:
1980		dev_dbg(queue->ctrl->ctrl.device,
1981			"disconnect received - connection closed\n");
1982		nvme_rdma_error_recovery(queue->ctrl);
1983		break;
1984	case RDMA_CM_EVENT_DEVICE_REMOVAL:
1985		/* device removal is handled via the ib_client API */
1986		break;
1987	default:
1988		dev_err(queue->ctrl->ctrl.device,
1989			"Unexpected RDMA CM event (%d)\n", ev->event);
1990		nvme_rdma_error_recovery(queue->ctrl);
1991		break;
1992	}
1993
1994	if (cm_error) {
1995		queue->cm_error = cm_error;
1996		complete(&queue->cm_done);
1997	}
1998
1999	return 0;
2000}
2001
2002static void nvme_rdma_complete_timed_out(struct request *rq)
2003{
2004	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
2005	struct nvme_rdma_queue *queue = req->queue;
2006
2007	nvme_rdma_stop_queue(queue);
2008	if (blk_mq_request_started(rq) && !blk_mq_request_completed(rq)) {
2009		nvme_req(rq)->status = NVME_SC_HOST_ABORTED_CMD;
2010		blk_mq_complete_request(rq);
2011	}
2012}
2013
2014static enum blk_eh_timer_return
2015nvme_rdma_timeout(struct request *rq, bool reserved)
2016{
2017	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
2018	struct nvme_rdma_queue *queue = req->queue;
2019	struct nvme_rdma_ctrl *ctrl = queue->ctrl;
2020
2021	dev_warn(ctrl->ctrl.device, "I/O %d QID %d timeout\n",
2022		 rq->tag, nvme_rdma_queue_idx(queue));
2023
2024	if (ctrl->ctrl.state != NVME_CTRL_LIVE) {
2025		/*
2026		 * If we are resetting, connecting or deleting we should
2027		 * complete immediately because we may block controller
2028		 * teardown or setup sequence
2029		 * - ctrl disable/shutdown fabrics requests
2030		 * - connect requests
2031		 * - initialization admin requests
2032		 * - I/O requests that entered after unquiescing and
2033		 *   the controller stopped responding
2034		 *
2035		 * All other requests should be cancelled by the error
2036		 * recovery work, so it's fine that we fail it here.
2037		 */
2038		nvme_rdma_complete_timed_out(rq);
2039		return BLK_EH_DONE;
2040	}
2041
2042	/*
2043	 * LIVE state should trigger the normal error recovery which will
2044	 * handle completing this request.
2045	 */
2046	nvme_rdma_error_recovery(ctrl);
2047	return BLK_EH_RESET_TIMER;
2048}
2049
2050static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx,
2051		const struct blk_mq_queue_data *bd)
2052{
2053	struct nvme_ns *ns = hctx->queue->queuedata;
2054	struct nvme_rdma_queue *queue = hctx->driver_data;
2055	struct request *rq = bd->rq;
2056	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
2057	struct nvme_rdma_qe *sqe = &req->sqe;
2058	struct nvme_command *c = sqe->data;
2059	struct ib_device *dev;
2060	bool queue_ready = test_bit(NVME_RDMA_Q_LIVE, &queue->flags);
2061	blk_status_t ret;
2062	int err;
2063
2064	WARN_ON_ONCE(rq->tag < 0);
2065
2066	if (!nvmf_check_ready(&queue->ctrl->ctrl, rq, queue_ready))
2067		return nvmf_fail_nonready_command(&queue->ctrl->ctrl, rq);
2068
2069	dev = queue->device->dev;
2070
2071	req->sqe.dma = ib_dma_map_single(dev, req->sqe.data,
2072					 sizeof(struct nvme_command),
2073					 DMA_TO_DEVICE);
2074	err = ib_dma_mapping_error(dev, req->sqe.dma);
2075	if (unlikely(err))
2076		return BLK_STS_RESOURCE;
2077
2078	ib_dma_sync_single_for_cpu(dev, sqe->dma,
2079			sizeof(struct nvme_command), DMA_TO_DEVICE);
2080
2081	ret = nvme_setup_cmd(ns, rq, c);
2082	if (ret)
2083		goto unmap_qe;
2084
2085	blk_mq_start_request(rq);
2086
2087	if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) &&
2088	    queue->pi_support &&
2089	    (c->common.opcode == nvme_cmd_write ||
2090	     c->common.opcode == nvme_cmd_read) &&
2091	    nvme_ns_has_pi(ns))
2092		req->use_sig_mr = true;
2093	else
2094		req->use_sig_mr = false;
2095
2096	err = nvme_rdma_map_data(queue, rq, c);
2097	if (unlikely(err < 0)) {
2098		dev_err(queue->ctrl->ctrl.device,
2099			     "Failed to map data (%d)\n", err);
2100		goto err;
2101	}
2102
2103	sqe->cqe.done = nvme_rdma_send_done;
2104
2105	ib_dma_sync_single_for_device(dev, sqe->dma,
2106			sizeof(struct nvme_command), DMA_TO_DEVICE);
2107
2108	err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge,
2109			req->mr ? &req->reg_wr.wr : NULL);
2110	if (unlikely(err))
2111		goto err_unmap;
2112
2113	return BLK_STS_OK;
2114
2115err_unmap:
2116	nvme_rdma_unmap_data(queue, rq);
2117err:
2118	if (err == -ENOMEM || err == -EAGAIN)
2119		ret = BLK_STS_RESOURCE;
2120	else
2121		ret = BLK_STS_IOERR;
2122	nvme_cleanup_cmd(rq);
2123unmap_qe:
2124	ib_dma_unmap_single(dev, req->sqe.dma, sizeof(struct nvme_command),
2125			    DMA_TO_DEVICE);
2126	return ret;
2127}
2128
2129static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx)
2130{
2131	struct nvme_rdma_queue *queue = hctx->driver_data;
2132
2133	return ib_process_cq_direct(queue->ib_cq, -1);
2134}
2135
2136static void nvme_rdma_check_pi_status(struct nvme_rdma_request *req)
2137{
2138	struct request *rq = blk_mq_rq_from_pdu(req);
2139	struct ib_mr_status mr_status;
2140	int ret;
2141
2142	ret = ib_check_mr_status(req->mr, IB_MR_CHECK_SIG_STATUS, &mr_status);
2143	if (ret) {
2144		pr_err("ib_check_mr_status failed, ret %d\n", ret);
2145		nvme_req(rq)->status = NVME_SC_INVALID_PI;
2146		return;
2147	}
2148
2149	if (mr_status.fail_status & IB_MR_CHECK_SIG_STATUS) {
2150		switch (mr_status.sig_err.err_type) {
2151		case IB_SIG_BAD_GUARD:
2152			nvme_req(rq)->status = NVME_SC_GUARD_CHECK;
2153			break;
2154		case IB_SIG_BAD_REFTAG:
2155			nvme_req(rq)->status = NVME_SC_REFTAG_CHECK;
2156			break;
2157		case IB_SIG_BAD_APPTAG:
2158			nvme_req(rq)->status = NVME_SC_APPTAG_CHECK;
2159			break;
2160		}
2161		pr_err("PI error found type %d expected 0x%x vs actual 0x%x\n",
2162		       mr_status.sig_err.err_type, mr_status.sig_err.expected,
2163		       mr_status.sig_err.actual);
2164	}
2165}
2166
2167static void nvme_rdma_complete_rq(struct request *rq)
2168{
2169	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
2170	struct nvme_rdma_queue *queue = req->queue;
2171	struct ib_device *ibdev = queue->device->dev;
2172
2173	if (req->use_sig_mr)
2174		nvme_rdma_check_pi_status(req);
2175
2176	nvme_rdma_unmap_data(queue, rq);
2177	ib_dma_unmap_single(ibdev, req->sqe.dma, sizeof(struct nvme_command),
2178			    DMA_TO_DEVICE);
2179	nvme_complete_rq(rq);
2180}
2181
2182static int nvme_rdma_map_queues(struct blk_mq_tag_set *set)
2183{
2184	struct nvme_rdma_ctrl *ctrl = set->driver_data;
2185	struct nvmf_ctrl_options *opts = ctrl->ctrl.opts;
2186
2187	if (opts->nr_write_queues && ctrl->io_queues[HCTX_TYPE_READ]) {
2188		/* separate read/write queues */
2189		set->map[HCTX_TYPE_DEFAULT].nr_queues =
2190			ctrl->io_queues[HCTX_TYPE_DEFAULT];
2191		set->map[HCTX_TYPE_DEFAULT].queue_offset = 0;
2192		set->map[HCTX_TYPE_READ].nr_queues =
2193			ctrl->io_queues[HCTX_TYPE_READ];
2194		set->map[HCTX_TYPE_READ].queue_offset =
2195			ctrl->io_queues[HCTX_TYPE_DEFAULT];
2196	} else {
2197		/* shared read/write queues */
2198		set->map[HCTX_TYPE_DEFAULT].nr_queues =
2199			ctrl->io_queues[HCTX_TYPE_DEFAULT];
2200		set->map[HCTX_TYPE_DEFAULT].queue_offset = 0;
2201		set->map[HCTX_TYPE_READ].nr_queues =
2202			ctrl->io_queues[HCTX_TYPE_DEFAULT];
2203		set->map[HCTX_TYPE_READ].queue_offset = 0;
2204	}
2205	blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_DEFAULT],
2206			ctrl->device->dev, 0);
2207	blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_READ],
2208			ctrl->device->dev, 0);
2209
2210	if (opts->nr_poll_queues && ctrl->io_queues[HCTX_TYPE_POLL]) {
2211		/* map dedicated poll queues only if we have queues left */
2212		set->map[HCTX_TYPE_POLL].nr_queues =
2213				ctrl->io_queues[HCTX_TYPE_POLL];
2214		set->map[HCTX_TYPE_POLL].queue_offset =
2215			ctrl->io_queues[HCTX_TYPE_DEFAULT] +
2216			ctrl->io_queues[HCTX_TYPE_READ];
2217		blk_mq_map_queues(&set->map[HCTX_TYPE_POLL]);
2218	}
2219
2220	dev_info(ctrl->ctrl.device,
2221		"mapped %d/%d/%d default/read/poll queues.\n",
2222		ctrl->io_queues[HCTX_TYPE_DEFAULT],
2223		ctrl->io_queues[HCTX_TYPE_READ],
2224		ctrl->io_queues[HCTX_TYPE_POLL]);
2225
2226	return 0;
2227}
2228
2229static const struct blk_mq_ops nvme_rdma_mq_ops = {
2230	.queue_rq	= nvme_rdma_queue_rq,
2231	.complete	= nvme_rdma_complete_rq,
2232	.init_request	= nvme_rdma_init_request,
2233	.exit_request	= nvme_rdma_exit_request,
2234	.init_hctx	= nvme_rdma_init_hctx,
2235	.timeout	= nvme_rdma_timeout,
2236	.map_queues	= nvme_rdma_map_queues,
2237	.poll		= nvme_rdma_poll,
2238};
2239
2240static const struct blk_mq_ops nvme_rdma_admin_mq_ops = {
2241	.queue_rq	= nvme_rdma_queue_rq,
2242	.complete	= nvme_rdma_complete_rq,
2243	.init_request	= nvme_rdma_init_request,
2244	.exit_request	= nvme_rdma_exit_request,
2245	.init_hctx	= nvme_rdma_init_admin_hctx,
2246	.timeout	= nvme_rdma_timeout,
2247};
2248
2249static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown)
2250{
2251	nvme_rdma_teardown_io_queues(ctrl, shutdown);
2252	nvme_stop_admin_queue(&ctrl->ctrl);
2253	if (shutdown)
2254		nvme_shutdown_ctrl(&ctrl->ctrl);
2255	else
2256		nvme_disable_ctrl(&ctrl->ctrl);
2257	nvme_rdma_teardown_admin_queue(ctrl, shutdown);
2258}
2259
2260static void nvme_rdma_delete_ctrl(struct nvme_ctrl *ctrl)
2261{
2262	nvme_rdma_shutdown_ctrl(to_rdma_ctrl(ctrl), true);
2263}
2264
2265static void nvme_rdma_reset_ctrl_work(struct work_struct *work)
2266{
2267	struct nvme_rdma_ctrl *ctrl =
2268		container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work);
2269
2270	nvme_stop_ctrl(&ctrl->ctrl);
2271	nvme_rdma_shutdown_ctrl(ctrl, false);
2272
2273	if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
2274		/* state change failure should never happen */
2275		WARN_ON_ONCE(1);
2276		return;
2277	}
2278
2279	if (nvme_rdma_setup_ctrl(ctrl, false))
2280		goto out_fail;
2281
2282	return;
2283
2284out_fail:
2285	++ctrl->ctrl.nr_reconnects;
2286	nvme_rdma_reconnect_or_remove(ctrl);
2287}
2288
2289static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = {
2290	.name			= "rdma",
2291	.module			= THIS_MODULE,
2292	.flags			= NVME_F_FABRICS | NVME_F_METADATA_SUPPORTED,
2293	.reg_read32		= nvmf_reg_read32,
2294	.reg_read64		= nvmf_reg_read64,
2295	.reg_write32		= nvmf_reg_write32,
2296	.free_ctrl		= nvme_rdma_free_ctrl,
2297	.submit_async_event	= nvme_rdma_submit_async_event,
2298	.delete_ctrl		= nvme_rdma_delete_ctrl,
2299	.get_address		= nvmf_get_address,
2300	.stop_ctrl		= nvme_rdma_stop_ctrl,
2301};
2302
2303/*
2304 * Fails a connection request if it matches an existing controller
2305 * (association) with the same tuple:
2306 * <Host NQN, Host ID, local address, remote address, remote port, SUBSYS NQN>
2307 *
2308 * if local address is not specified in the request, it will match an
2309 * existing controller with all the other parameters the same and no
2310 * local port address specified as well.
2311 *
2312 * The ports don't need to be compared as they are intrinsically
2313 * already matched by the port pointers supplied.
2314 */
2315static bool
2316nvme_rdma_existing_controller(struct nvmf_ctrl_options *opts)
2317{
2318	struct nvme_rdma_ctrl *ctrl;
2319	bool found = false;
2320
2321	mutex_lock(&nvme_rdma_ctrl_mutex);
2322	list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
2323		found = nvmf_ip_options_match(&ctrl->ctrl, opts);
2324		if (found)
2325			break;
2326	}
2327	mutex_unlock(&nvme_rdma_ctrl_mutex);
2328
2329	return found;
2330}
2331
2332static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev,
2333		struct nvmf_ctrl_options *opts)
2334{
2335	struct nvme_rdma_ctrl *ctrl;
2336	int ret;
2337	bool changed;
2338
2339	ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
2340	if (!ctrl)
2341		return ERR_PTR(-ENOMEM);
2342	ctrl->ctrl.opts = opts;
2343	INIT_LIST_HEAD(&ctrl->list);
2344
2345	if (!(opts->mask & NVMF_OPT_TRSVCID)) {
2346		opts->trsvcid =
2347			kstrdup(__stringify(NVME_RDMA_IP_PORT), GFP_KERNEL);
2348		if (!opts->trsvcid) {
2349			ret = -ENOMEM;
2350			goto out_free_ctrl;
2351		}
2352		opts->mask |= NVMF_OPT_TRSVCID;
2353	}
2354
2355	ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
2356			opts->traddr, opts->trsvcid, &ctrl->addr);
2357	if (ret) {
2358		pr_err("malformed address passed: %s:%s\n",
2359			opts->traddr, opts->trsvcid);
2360		goto out_free_ctrl;
2361	}
2362
2363	if (opts->mask & NVMF_OPT_HOST_TRADDR) {
2364		ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
2365			opts->host_traddr, NULL, &ctrl->src_addr);
2366		if (ret) {
2367			pr_err("malformed src address passed: %s\n",
2368			       opts->host_traddr);
2369			goto out_free_ctrl;
2370		}
2371	}
2372
2373	if (!opts->duplicate_connect && nvme_rdma_existing_controller(opts)) {
2374		ret = -EALREADY;
2375		goto out_free_ctrl;
2376	}
2377
2378	INIT_DELAYED_WORK(&ctrl->reconnect_work,
2379			nvme_rdma_reconnect_ctrl_work);
2380	INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work);
2381	INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work);
2382
2383	ctrl->ctrl.queue_count = opts->nr_io_queues + opts->nr_write_queues +
2384				opts->nr_poll_queues + 1;
2385	ctrl->ctrl.sqsize = opts->queue_size - 1;
2386	ctrl->ctrl.kato = opts->kato;
2387
2388	ret = -ENOMEM;
2389	ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues),
2390				GFP_KERNEL);
2391	if (!ctrl->queues)
2392		goto out_free_ctrl;
2393
2394	ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops,
2395				0 /* no quirks, we're perfect! */);
2396	if (ret)
2397		goto out_kfree_queues;
2398
2399	changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING);
2400	WARN_ON_ONCE(!changed);
2401
2402	ret = nvme_rdma_setup_ctrl(ctrl, true);
2403	if (ret)
2404		goto out_uninit_ctrl;
2405
2406	dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n",
2407		ctrl->ctrl.opts->subsysnqn, &ctrl->addr);
2408
2409	mutex_lock(&nvme_rdma_ctrl_mutex);
2410	list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list);
2411	mutex_unlock(&nvme_rdma_ctrl_mutex);
2412
2413	return &ctrl->ctrl;
2414
2415out_uninit_ctrl:
2416	nvme_uninit_ctrl(&ctrl->ctrl);
2417	nvme_put_ctrl(&ctrl->ctrl);
2418	if (ret > 0)
2419		ret = -EIO;
2420	return ERR_PTR(ret);
2421out_kfree_queues:
2422	kfree(ctrl->queues);
2423out_free_ctrl:
2424	kfree(ctrl);
2425	return ERR_PTR(ret);
2426}
2427
2428static struct nvmf_transport_ops nvme_rdma_transport = {
2429	.name		= "rdma",
2430	.module		= THIS_MODULE,
2431	.required_opts	= NVMF_OPT_TRADDR,
2432	.allowed_opts	= NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY |
2433			  NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO |
2434			  NVMF_OPT_NR_WRITE_QUEUES | NVMF_OPT_NR_POLL_QUEUES |
2435			  NVMF_OPT_TOS,
2436	.create_ctrl	= nvme_rdma_create_ctrl,
2437};
2438
2439static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data)
2440{
2441	struct nvme_rdma_ctrl *ctrl;
2442	struct nvme_rdma_device *ndev;
2443	bool found = false;
2444
2445	mutex_lock(&device_list_mutex);
2446	list_for_each_entry(ndev, &device_list, entry) {
2447		if (ndev->dev == ib_device) {
2448			found = true;
2449			break;
2450		}
2451	}
2452	mutex_unlock(&device_list_mutex);
2453
2454	if (!found)
2455		return;
2456
2457	/* Delete all controllers using this device */
2458	mutex_lock(&nvme_rdma_ctrl_mutex);
2459	list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
2460		if (ctrl->device->dev != ib_device)
2461			continue;
2462		nvme_delete_ctrl(&ctrl->ctrl);
2463	}
2464	mutex_unlock(&nvme_rdma_ctrl_mutex);
2465
2466	flush_workqueue(nvme_delete_wq);
2467}
2468
2469static struct ib_client nvme_rdma_ib_client = {
2470	.name   = "nvme_rdma",
2471	.remove = nvme_rdma_remove_one
2472};
2473
2474static int __init nvme_rdma_init_module(void)
2475{
2476	int ret;
2477
2478	ret = ib_register_client(&nvme_rdma_ib_client);
2479	if (ret)
2480		return ret;
2481
2482	ret = nvmf_register_transport(&nvme_rdma_transport);
2483	if (ret)
2484		goto err_unreg_client;
2485
2486	return 0;
2487
2488err_unreg_client:
2489	ib_unregister_client(&nvme_rdma_ib_client);
2490	return ret;
2491}
2492
2493static void __exit nvme_rdma_cleanup_module(void)
2494{
2495	struct nvme_rdma_ctrl *ctrl;
2496
2497	nvmf_unregister_transport(&nvme_rdma_transport);
2498	ib_unregister_client(&nvme_rdma_ib_client);
2499
2500	mutex_lock(&nvme_rdma_ctrl_mutex);
2501	list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list)
2502		nvme_delete_ctrl(&ctrl->ctrl);
2503	mutex_unlock(&nvme_rdma_ctrl_mutex);
2504	flush_workqueue(nvme_delete_wq);
2505}
2506
2507module_init(nvme_rdma_init_module);
2508module_exit(nvme_rdma_cleanup_module);
2509
2510MODULE_LICENSE("GPL v2");
2511