1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2 /* QLogic qede NIC Driver
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
5 */
6
7 #include <linux/crash_dump.h>
8 #include <linux/module.h>
9 #include <linux/pci.h>
10 #include <linux/version.h>
11 #include <linux/device.h>
12 #include <linux/netdevice.h>
13 #include <linux/etherdevice.h>
14 #include <linux/skbuff.h>
15 #include <linux/errno.h>
16 #include <linux/list.h>
17 #include <linux/string.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/interrupt.h>
20 #include <asm/byteorder.h>
21 #include <asm/param.h>
22 #include <linux/io.h>
23 #include <linux/netdev_features.h>
24 #include <linux/udp.h>
25 #include <linux/tcp.h>
26 #include <net/udp_tunnel.h>
27 #include <linux/ip.h>
28 #include <net/ipv6.h>
29 #include <net/tcp.h>
30 #include <linux/if_ether.h>
31 #include <linux/if_vlan.h>
32 #include <linux/pkt_sched.h>
33 #include <linux/ethtool.h>
34 #include <linux/in.h>
35 #include <linux/random.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/bitops.h>
38 #include <linux/vmalloc.h>
39 #include <linux/aer.h>
40 #include "qede.h"
41 #include "qede_ptp.h"
42
43 static char version[] =
44 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
45
46 MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
47 MODULE_LICENSE("GPL");
48 MODULE_VERSION(DRV_MODULE_VERSION);
49
50 static uint debug;
51 module_param(debug, uint, 0);
52 MODULE_PARM_DESC(debug, " Default debug msglevel");
53
54 static const struct qed_eth_ops *qed_ops;
55
56 #define CHIP_NUM_57980S_40 0x1634
57 #define CHIP_NUM_57980S_10 0x1666
58 #define CHIP_NUM_57980S_MF 0x1636
59 #define CHIP_NUM_57980S_100 0x1644
60 #define CHIP_NUM_57980S_50 0x1654
61 #define CHIP_NUM_57980S_25 0x1656
62 #define CHIP_NUM_57980S_IOV 0x1664
63 #define CHIP_NUM_AH 0x8070
64 #define CHIP_NUM_AH_IOV 0x8090
65
66 #ifndef PCI_DEVICE_ID_NX2_57980E
67 #define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
68 #define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
69 #define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
70 #define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
71 #define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
72 #define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
73 #define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
74 #define PCI_DEVICE_ID_AH CHIP_NUM_AH
75 #define PCI_DEVICE_ID_AH_IOV CHIP_NUM_AH_IOV
76
77 #endif
78
79 enum qede_pci_private {
80 QEDE_PRIVATE_PF,
81 QEDE_PRIVATE_VF
82 };
83
84 static const struct pci_device_id qede_pci_tbl[] = {
85 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
86 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
87 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
88 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
89 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
90 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
91 #ifdef CONFIG_QED_SRIOV
92 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
93 #endif
94 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH), QEDE_PRIVATE_PF},
95 #ifdef CONFIG_QED_SRIOV
96 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH_IOV), QEDE_PRIVATE_VF},
97 #endif
98 { 0 }
99 };
100
101 MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
102
103 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
104 static pci_ers_result_t
105 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state);
106
107 #define TX_TIMEOUT (5 * HZ)
108
109 /* Utilize last protocol index for XDP */
110 #define XDP_PI 11
111
112 static void qede_remove(struct pci_dev *pdev);
113 static void qede_shutdown(struct pci_dev *pdev);
114 static void qede_link_update(void *dev, struct qed_link_output *link);
115 static void qede_schedule_recovery_handler(void *dev);
116 static void qede_recovery_handler(struct qede_dev *edev);
117 static void qede_schedule_hw_err_handler(void *dev,
118 enum qed_hw_err_type err_type);
119 static void qede_get_eth_tlv_data(void *edev, void *data);
120 static void qede_get_generic_tlv_data(void *edev,
121 struct qed_generic_tlvs *data);
122 static void qede_generic_hw_err_handler(struct qede_dev *edev);
123 #ifdef CONFIG_QED_SRIOV
qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos, __be16 vlan_proto)124 static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos,
125 __be16 vlan_proto)
126 {
127 struct qede_dev *edev = netdev_priv(ndev);
128
129 if (vlan > 4095) {
130 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
131 return -EINVAL;
132 }
133
134 if (vlan_proto != htons(ETH_P_8021Q))
135 return -EPROTONOSUPPORT;
136
137 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
138 vlan, vf);
139
140 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
141 }
142
qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)143 static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
144 {
145 struct qede_dev *edev = netdev_priv(ndev);
146
147 DP_VERBOSE(edev, QED_MSG_IOV, "Setting MAC %pM to VF [%d]\n", mac, vfidx);
148
149 if (!is_valid_ether_addr(mac)) {
150 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
151 return -EINVAL;
152 }
153
154 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
155 }
156
qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)157 static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
158 {
159 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
160 struct qed_dev_info *qed_info = &edev->dev_info.common;
161 struct qed_update_vport_params *vport_params;
162 int rc;
163
164 vport_params = vzalloc(sizeof(*vport_params));
165 if (!vport_params)
166 return -ENOMEM;
167 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
168
169 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
170
171 /* Enable/Disable Tx switching for PF */
172 if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
173 !qed_info->b_inter_pf_switch && qed_info->tx_switching) {
174 vport_params->vport_id = 0;
175 vport_params->update_tx_switching_flg = 1;
176 vport_params->tx_switching_flg = num_vfs_param ? 1 : 0;
177 edev->ops->vport_update(edev->cdev, vport_params);
178 }
179
180 vfree(vport_params);
181 return rc;
182 }
183 #endif
184
185 static const struct pci_error_handlers qede_err_handler = {
186 .error_detected = qede_io_error_detected,
187 };
188
189 static struct pci_driver qede_pci_driver = {
190 .name = "qede",
191 .id_table = qede_pci_tbl,
192 .probe = qede_probe,
193 .remove = qede_remove,
194 .shutdown = qede_shutdown,
195 #ifdef CONFIG_QED_SRIOV
196 .sriov_configure = qede_sriov_configure,
197 #endif
198 .err_handler = &qede_err_handler,
199 };
200
201 static struct qed_eth_cb_ops qede_ll_ops = {
202 {
203 #ifdef CONFIG_RFS_ACCEL
204 .arfs_filter_op = qede_arfs_filter_op,
205 #endif
206 .link_update = qede_link_update,
207 .schedule_recovery_handler = qede_schedule_recovery_handler,
208 .schedule_hw_err_handler = qede_schedule_hw_err_handler,
209 .get_generic_tlv_data = qede_get_generic_tlv_data,
210 .get_protocol_tlv_data = qede_get_eth_tlv_data,
211 },
212 .force_mac = qede_force_mac,
213 .ports_update = qede_udp_ports_update,
214 };
215
qede_netdev_event(struct notifier_block *this, unsigned long event, void *ptr)216 static int qede_netdev_event(struct notifier_block *this, unsigned long event,
217 void *ptr)
218 {
219 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
220 struct ethtool_drvinfo drvinfo;
221 struct qede_dev *edev;
222
223 if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR)
224 goto done;
225
226 /* Check whether this is a qede device */
227 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
228 goto done;
229
230 memset(&drvinfo, 0, sizeof(drvinfo));
231 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
232 if (strcmp(drvinfo.driver, "qede"))
233 goto done;
234 edev = netdev_priv(ndev);
235
236 switch (event) {
237 case NETDEV_CHANGENAME:
238 /* Notify qed of the name change */
239 if (!edev->ops || !edev->ops->common)
240 goto done;
241 edev->ops->common->set_name(edev->cdev, edev->ndev->name);
242 break;
243 case NETDEV_CHANGEADDR:
244 edev = netdev_priv(ndev);
245 qede_rdma_event_changeaddr(edev);
246 break;
247 }
248
249 done:
250 return NOTIFY_DONE;
251 }
252
253 static struct notifier_block qede_netdev_notifier = {
254 .notifier_call = qede_netdev_event,
255 };
256
257 static
qede_init(void)258 int __init qede_init(void)
259 {
260 int ret;
261
262 pr_info("qede_init: %s\n", version);
263
264 qede_forced_speed_maps_init();
265
266 qed_ops = qed_get_eth_ops();
267 if (!qed_ops) {
268 pr_notice("Failed to get qed ethtool operations\n");
269 return -EINVAL;
270 }
271
272 /* Must register notifier before pci ops, since we might miss
273 * interface rename after pci probe and netdev registration.
274 */
275 ret = register_netdevice_notifier(&qede_netdev_notifier);
276 if (ret) {
277 pr_notice("Failed to register netdevice_notifier\n");
278 qed_put_eth_ops();
279 return -EINVAL;
280 }
281
282 ret = pci_register_driver(&qede_pci_driver);
283 if (ret) {
284 pr_notice("Failed to register driver\n");
285 unregister_netdevice_notifier(&qede_netdev_notifier);
286 qed_put_eth_ops();
287 return -EINVAL;
288 }
289
290 return 0;
291 }
292
qede_cleanup(void)293 static void __exit qede_cleanup(void)
294 {
295 if (debug & QED_LOG_INFO_MASK)
296 pr_info("qede_cleanup called\n");
297
298 unregister_netdevice_notifier(&qede_netdev_notifier);
299 pci_unregister_driver(&qede_pci_driver);
300 qed_put_eth_ops();
301 }
302
303 module_init(qede_init);
304 module_exit(qede_cleanup);
305
306 static int qede_open(struct net_device *ndev);
307 static int qede_close(struct net_device *ndev);
308
qede_fill_by_demand_stats(struct qede_dev *edev)309 void qede_fill_by_demand_stats(struct qede_dev *edev)
310 {
311 struct qede_stats_common *p_common = &edev->stats.common;
312 struct qed_eth_stats stats;
313
314 edev->ops->get_vport_stats(edev->cdev, &stats);
315
316 spin_lock(&edev->stats_lock);
317
318 p_common->no_buff_discards = stats.common.no_buff_discards;
319 p_common->packet_too_big_discard = stats.common.packet_too_big_discard;
320 p_common->ttl0_discard = stats.common.ttl0_discard;
321 p_common->rx_ucast_bytes = stats.common.rx_ucast_bytes;
322 p_common->rx_mcast_bytes = stats.common.rx_mcast_bytes;
323 p_common->rx_bcast_bytes = stats.common.rx_bcast_bytes;
324 p_common->rx_ucast_pkts = stats.common.rx_ucast_pkts;
325 p_common->rx_mcast_pkts = stats.common.rx_mcast_pkts;
326 p_common->rx_bcast_pkts = stats.common.rx_bcast_pkts;
327 p_common->mftag_filter_discards = stats.common.mftag_filter_discards;
328 p_common->mac_filter_discards = stats.common.mac_filter_discards;
329 p_common->gft_filter_drop = stats.common.gft_filter_drop;
330
331 p_common->tx_ucast_bytes = stats.common.tx_ucast_bytes;
332 p_common->tx_mcast_bytes = stats.common.tx_mcast_bytes;
333 p_common->tx_bcast_bytes = stats.common.tx_bcast_bytes;
334 p_common->tx_ucast_pkts = stats.common.tx_ucast_pkts;
335 p_common->tx_mcast_pkts = stats.common.tx_mcast_pkts;
336 p_common->tx_bcast_pkts = stats.common.tx_bcast_pkts;
337 p_common->tx_err_drop_pkts = stats.common.tx_err_drop_pkts;
338 p_common->coalesced_pkts = stats.common.tpa_coalesced_pkts;
339 p_common->coalesced_events = stats.common.tpa_coalesced_events;
340 p_common->coalesced_aborts_num = stats.common.tpa_aborts_num;
341 p_common->non_coalesced_pkts = stats.common.tpa_not_coalesced_pkts;
342 p_common->coalesced_bytes = stats.common.tpa_coalesced_bytes;
343
344 p_common->rx_64_byte_packets = stats.common.rx_64_byte_packets;
345 p_common->rx_65_to_127_byte_packets =
346 stats.common.rx_65_to_127_byte_packets;
347 p_common->rx_128_to_255_byte_packets =
348 stats.common.rx_128_to_255_byte_packets;
349 p_common->rx_256_to_511_byte_packets =
350 stats.common.rx_256_to_511_byte_packets;
351 p_common->rx_512_to_1023_byte_packets =
352 stats.common.rx_512_to_1023_byte_packets;
353 p_common->rx_1024_to_1518_byte_packets =
354 stats.common.rx_1024_to_1518_byte_packets;
355 p_common->rx_crc_errors = stats.common.rx_crc_errors;
356 p_common->rx_mac_crtl_frames = stats.common.rx_mac_crtl_frames;
357 p_common->rx_pause_frames = stats.common.rx_pause_frames;
358 p_common->rx_pfc_frames = stats.common.rx_pfc_frames;
359 p_common->rx_align_errors = stats.common.rx_align_errors;
360 p_common->rx_carrier_errors = stats.common.rx_carrier_errors;
361 p_common->rx_oversize_packets = stats.common.rx_oversize_packets;
362 p_common->rx_jabbers = stats.common.rx_jabbers;
363 p_common->rx_undersize_packets = stats.common.rx_undersize_packets;
364 p_common->rx_fragments = stats.common.rx_fragments;
365 p_common->tx_64_byte_packets = stats.common.tx_64_byte_packets;
366 p_common->tx_65_to_127_byte_packets =
367 stats.common.tx_65_to_127_byte_packets;
368 p_common->tx_128_to_255_byte_packets =
369 stats.common.tx_128_to_255_byte_packets;
370 p_common->tx_256_to_511_byte_packets =
371 stats.common.tx_256_to_511_byte_packets;
372 p_common->tx_512_to_1023_byte_packets =
373 stats.common.tx_512_to_1023_byte_packets;
374 p_common->tx_1024_to_1518_byte_packets =
375 stats.common.tx_1024_to_1518_byte_packets;
376 p_common->tx_pause_frames = stats.common.tx_pause_frames;
377 p_common->tx_pfc_frames = stats.common.tx_pfc_frames;
378 p_common->brb_truncates = stats.common.brb_truncates;
379 p_common->brb_discards = stats.common.brb_discards;
380 p_common->tx_mac_ctrl_frames = stats.common.tx_mac_ctrl_frames;
381 p_common->link_change_count = stats.common.link_change_count;
382 p_common->ptp_skip_txts = edev->ptp_skip_txts;
383
384 if (QEDE_IS_BB(edev)) {
385 struct qede_stats_bb *p_bb = &edev->stats.bb;
386
387 p_bb->rx_1519_to_1522_byte_packets =
388 stats.bb.rx_1519_to_1522_byte_packets;
389 p_bb->rx_1519_to_2047_byte_packets =
390 stats.bb.rx_1519_to_2047_byte_packets;
391 p_bb->rx_2048_to_4095_byte_packets =
392 stats.bb.rx_2048_to_4095_byte_packets;
393 p_bb->rx_4096_to_9216_byte_packets =
394 stats.bb.rx_4096_to_9216_byte_packets;
395 p_bb->rx_9217_to_16383_byte_packets =
396 stats.bb.rx_9217_to_16383_byte_packets;
397 p_bb->tx_1519_to_2047_byte_packets =
398 stats.bb.tx_1519_to_2047_byte_packets;
399 p_bb->tx_2048_to_4095_byte_packets =
400 stats.bb.tx_2048_to_4095_byte_packets;
401 p_bb->tx_4096_to_9216_byte_packets =
402 stats.bb.tx_4096_to_9216_byte_packets;
403 p_bb->tx_9217_to_16383_byte_packets =
404 stats.bb.tx_9217_to_16383_byte_packets;
405 p_bb->tx_lpi_entry_count = stats.bb.tx_lpi_entry_count;
406 p_bb->tx_total_collisions = stats.bb.tx_total_collisions;
407 } else {
408 struct qede_stats_ah *p_ah = &edev->stats.ah;
409
410 p_ah->rx_1519_to_max_byte_packets =
411 stats.ah.rx_1519_to_max_byte_packets;
412 p_ah->tx_1519_to_max_byte_packets =
413 stats.ah.tx_1519_to_max_byte_packets;
414 }
415
416 spin_unlock(&edev->stats_lock);
417 }
418
qede_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats)419 static void qede_get_stats64(struct net_device *dev,
420 struct rtnl_link_stats64 *stats)
421 {
422 struct qede_dev *edev = netdev_priv(dev);
423 struct qede_stats_common *p_common;
424
425 p_common = &edev->stats.common;
426
427 spin_lock(&edev->stats_lock);
428
429 stats->rx_packets = p_common->rx_ucast_pkts + p_common->rx_mcast_pkts +
430 p_common->rx_bcast_pkts;
431 stats->tx_packets = p_common->tx_ucast_pkts + p_common->tx_mcast_pkts +
432 p_common->tx_bcast_pkts;
433
434 stats->rx_bytes = p_common->rx_ucast_bytes + p_common->rx_mcast_bytes +
435 p_common->rx_bcast_bytes;
436 stats->tx_bytes = p_common->tx_ucast_bytes + p_common->tx_mcast_bytes +
437 p_common->tx_bcast_bytes;
438
439 stats->tx_errors = p_common->tx_err_drop_pkts;
440 stats->multicast = p_common->rx_mcast_pkts + p_common->rx_bcast_pkts;
441
442 stats->rx_fifo_errors = p_common->no_buff_discards;
443
444 if (QEDE_IS_BB(edev))
445 stats->collisions = edev->stats.bb.tx_total_collisions;
446 stats->rx_crc_errors = p_common->rx_crc_errors;
447 stats->rx_frame_errors = p_common->rx_align_errors;
448
449 spin_unlock(&edev->stats_lock);
450 }
451
452 #ifdef CONFIG_QED_SRIOV
qede_get_vf_config(struct net_device *dev, int vfidx, struct ifla_vf_info *ivi)453 static int qede_get_vf_config(struct net_device *dev, int vfidx,
454 struct ifla_vf_info *ivi)
455 {
456 struct qede_dev *edev = netdev_priv(dev);
457
458 if (!edev->ops)
459 return -EINVAL;
460
461 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
462 }
463
qede_set_vf_rate(struct net_device *dev, int vfidx, int min_tx_rate, int max_tx_rate)464 static int qede_set_vf_rate(struct net_device *dev, int vfidx,
465 int min_tx_rate, int max_tx_rate)
466 {
467 struct qede_dev *edev = netdev_priv(dev);
468
469 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
470 max_tx_rate);
471 }
472
qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)473 static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
474 {
475 struct qede_dev *edev = netdev_priv(dev);
476
477 if (!edev->ops)
478 return -EINVAL;
479
480 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
481 }
482
qede_set_vf_link_state(struct net_device *dev, int vfidx, int link_state)483 static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
484 int link_state)
485 {
486 struct qede_dev *edev = netdev_priv(dev);
487
488 if (!edev->ops)
489 return -EINVAL;
490
491 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
492 }
493
qede_set_vf_trust(struct net_device *dev, int vfidx, bool setting)494 static int qede_set_vf_trust(struct net_device *dev, int vfidx, bool setting)
495 {
496 struct qede_dev *edev = netdev_priv(dev);
497
498 if (!edev->ops)
499 return -EINVAL;
500
501 return edev->ops->iov->set_trust(edev->cdev, vfidx, setting);
502 }
503 #endif
504
qede_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)505 static int qede_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
506 {
507 struct qede_dev *edev = netdev_priv(dev);
508
509 if (!netif_running(dev))
510 return -EAGAIN;
511
512 switch (cmd) {
513 case SIOCSHWTSTAMP:
514 return qede_ptp_hw_ts(edev, ifr);
515 default:
516 DP_VERBOSE(edev, QED_MSG_DEBUG,
517 "default IOCTL cmd 0x%x\n", cmd);
518 return -EOPNOTSUPP;
519 }
520
521 return 0;
522 }
523
qede_tx_log_print(struct qede_dev *edev, struct qede_tx_queue *txq)524 static void qede_tx_log_print(struct qede_dev *edev, struct qede_tx_queue *txq)
525 {
526 DP_NOTICE(edev,
527 "Txq[%d]: FW cons [host] %04x, SW cons %04x, SW prod %04x [Jiffies %lu]\n",
528 txq->index, le16_to_cpu(*txq->hw_cons_ptr),
529 qed_chain_get_cons_idx(&txq->tx_pbl),
530 qed_chain_get_prod_idx(&txq->tx_pbl),
531 jiffies);
532 }
533
qede_tx_timeout(struct net_device *dev, unsigned int txqueue)534 static void qede_tx_timeout(struct net_device *dev, unsigned int txqueue)
535 {
536 struct qede_dev *edev = netdev_priv(dev);
537 struct qede_tx_queue *txq;
538 int cos;
539
540 netif_carrier_off(dev);
541 DP_NOTICE(edev, "TX timeout on queue %u!\n", txqueue);
542
543 if (!(edev->fp_array[txqueue].type & QEDE_FASTPATH_TX))
544 return;
545
546 for_each_cos_in_txq(edev, cos) {
547 txq = &edev->fp_array[txqueue].txq[cos];
548
549 if (qed_chain_get_cons_idx(&txq->tx_pbl) !=
550 qed_chain_get_prod_idx(&txq->tx_pbl))
551 qede_tx_log_print(edev, txq);
552 }
553
554 if (IS_VF(edev))
555 return;
556
557 if (test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) ||
558 edev->state == QEDE_STATE_RECOVERY) {
559 DP_INFO(edev,
560 "Avoid handling a Tx timeout while another HW error is being handled\n");
561 return;
562 }
563
564 set_bit(QEDE_ERR_GET_DBG_INFO, &edev->err_flags);
565 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags);
566 schedule_delayed_work(&edev->sp_task, 0);
567 }
568
qede_setup_tc(struct net_device *ndev, u8 num_tc)569 static int qede_setup_tc(struct net_device *ndev, u8 num_tc)
570 {
571 struct qede_dev *edev = netdev_priv(ndev);
572 int cos, count, offset;
573
574 if (num_tc > edev->dev_info.num_tc)
575 return -EINVAL;
576
577 netdev_reset_tc(ndev);
578 netdev_set_num_tc(ndev, num_tc);
579
580 for_each_cos_in_txq(edev, cos) {
581 count = QEDE_TSS_COUNT(edev);
582 offset = cos * QEDE_TSS_COUNT(edev);
583 netdev_set_tc_queue(ndev, cos, count, offset);
584 }
585
586 return 0;
587 }
588
589 static int
qede_set_flower(struct qede_dev *edev, struct flow_cls_offload *f, __be16 proto)590 qede_set_flower(struct qede_dev *edev, struct flow_cls_offload *f,
591 __be16 proto)
592 {
593 switch (f->command) {
594 case FLOW_CLS_REPLACE:
595 return qede_add_tc_flower_fltr(edev, proto, f);
596 case FLOW_CLS_DESTROY:
597 return qede_delete_flow_filter(edev, f->cookie);
598 default:
599 return -EOPNOTSUPP;
600 }
601 }
602
qede_setup_tc_block_cb(enum tc_setup_type type, void *type_data, void *cb_priv)603 static int qede_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
604 void *cb_priv)
605 {
606 struct flow_cls_offload *f;
607 struct qede_dev *edev = cb_priv;
608
609 if (!tc_cls_can_offload_and_chain0(edev->ndev, type_data))
610 return -EOPNOTSUPP;
611
612 switch (type) {
613 case TC_SETUP_CLSFLOWER:
614 f = type_data;
615 return qede_set_flower(edev, f, f->common.protocol);
616 default:
617 return -EOPNOTSUPP;
618 }
619 }
620
621 static LIST_HEAD(qede_block_cb_list);
622
623 static int
qede_setup_tc_offload(struct net_device *dev, enum tc_setup_type type, void *type_data)624 qede_setup_tc_offload(struct net_device *dev, enum tc_setup_type type,
625 void *type_data)
626 {
627 struct qede_dev *edev = netdev_priv(dev);
628 struct tc_mqprio_qopt *mqprio;
629
630 switch (type) {
631 case TC_SETUP_BLOCK:
632 return flow_block_cb_setup_simple(type_data,
633 &qede_block_cb_list,
634 qede_setup_tc_block_cb,
635 edev, edev, true);
636 case TC_SETUP_QDISC_MQPRIO:
637 mqprio = type_data;
638
639 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
640 return qede_setup_tc(dev, mqprio->num_tc);
641 default:
642 return -EOPNOTSUPP;
643 }
644 }
645
646 static const struct net_device_ops qede_netdev_ops = {
647 .ndo_open = qede_open,
648 .ndo_stop = qede_close,
649 .ndo_start_xmit = qede_start_xmit,
650 .ndo_select_queue = qede_select_queue,
651 .ndo_set_rx_mode = qede_set_rx_mode,
652 .ndo_set_mac_address = qede_set_mac_addr,
653 .ndo_validate_addr = eth_validate_addr,
654 .ndo_change_mtu = qede_change_mtu,
655 .ndo_do_ioctl = qede_ioctl,
656 .ndo_tx_timeout = qede_tx_timeout,
657 #ifdef CONFIG_QED_SRIOV
658 .ndo_set_vf_mac = qede_set_vf_mac,
659 .ndo_set_vf_vlan = qede_set_vf_vlan,
660 .ndo_set_vf_trust = qede_set_vf_trust,
661 #endif
662 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
663 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
664 .ndo_fix_features = qede_fix_features,
665 .ndo_set_features = qede_set_features,
666 .ndo_get_stats64 = qede_get_stats64,
667 #ifdef CONFIG_QED_SRIOV
668 .ndo_set_vf_link_state = qede_set_vf_link_state,
669 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
670 .ndo_get_vf_config = qede_get_vf_config,
671 .ndo_set_vf_rate = qede_set_vf_rate,
672 #endif
673 .ndo_udp_tunnel_add = udp_tunnel_nic_add_port,
674 .ndo_udp_tunnel_del = udp_tunnel_nic_del_port,
675 .ndo_features_check = qede_features_check,
676 .ndo_bpf = qede_xdp,
677 #ifdef CONFIG_RFS_ACCEL
678 .ndo_rx_flow_steer = qede_rx_flow_steer,
679 #endif
680 .ndo_xdp_xmit = qede_xdp_transmit,
681 .ndo_setup_tc = qede_setup_tc_offload,
682 };
683
684 static const struct net_device_ops qede_netdev_vf_ops = {
685 .ndo_open = qede_open,
686 .ndo_stop = qede_close,
687 .ndo_start_xmit = qede_start_xmit,
688 .ndo_select_queue = qede_select_queue,
689 .ndo_set_rx_mode = qede_set_rx_mode,
690 .ndo_set_mac_address = qede_set_mac_addr,
691 .ndo_validate_addr = eth_validate_addr,
692 .ndo_change_mtu = qede_change_mtu,
693 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
694 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
695 .ndo_fix_features = qede_fix_features,
696 .ndo_set_features = qede_set_features,
697 .ndo_get_stats64 = qede_get_stats64,
698 .ndo_udp_tunnel_add = udp_tunnel_nic_add_port,
699 .ndo_udp_tunnel_del = udp_tunnel_nic_del_port,
700 .ndo_features_check = qede_features_check,
701 };
702
703 static const struct net_device_ops qede_netdev_vf_xdp_ops = {
704 .ndo_open = qede_open,
705 .ndo_stop = qede_close,
706 .ndo_start_xmit = qede_start_xmit,
707 .ndo_select_queue = qede_select_queue,
708 .ndo_set_rx_mode = qede_set_rx_mode,
709 .ndo_set_mac_address = qede_set_mac_addr,
710 .ndo_validate_addr = eth_validate_addr,
711 .ndo_change_mtu = qede_change_mtu,
712 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
713 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
714 .ndo_fix_features = qede_fix_features,
715 .ndo_set_features = qede_set_features,
716 .ndo_get_stats64 = qede_get_stats64,
717 .ndo_udp_tunnel_add = udp_tunnel_nic_add_port,
718 .ndo_udp_tunnel_del = udp_tunnel_nic_del_port,
719 .ndo_features_check = qede_features_check,
720 .ndo_bpf = qede_xdp,
721 .ndo_xdp_xmit = qede_xdp_transmit,
722 };
723
724 /* -------------------------------------------------------------------------
725 * START OF PROBE / REMOVE
726 * -------------------------------------------------------------------------
727 */
728
qede_alloc_etherdev(struct qed_dev *cdev, struct pci_dev *pdev, struct qed_dev_eth_info *info, u32 dp_module, u8 dp_level)729 static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
730 struct pci_dev *pdev,
731 struct qed_dev_eth_info *info,
732 u32 dp_module, u8 dp_level)
733 {
734 struct net_device *ndev;
735 struct qede_dev *edev;
736
737 ndev = alloc_etherdev_mqs(sizeof(*edev),
738 info->num_queues * info->num_tc,
739 info->num_queues);
740 if (!ndev) {
741 pr_err("etherdev allocation failed\n");
742 return NULL;
743 }
744
745 edev = netdev_priv(ndev);
746 edev->ndev = ndev;
747 edev->cdev = cdev;
748 edev->pdev = pdev;
749 edev->dp_module = dp_module;
750 edev->dp_level = dp_level;
751 edev->ops = qed_ops;
752
753 if (is_kdump_kernel()) {
754 edev->q_num_rx_buffers = NUM_RX_BDS_KDUMP_MIN;
755 edev->q_num_tx_buffers = NUM_TX_BDS_KDUMP_MIN;
756 } else {
757 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
758 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
759 }
760
761 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n",
762 info->num_queues, info->num_queues);
763
764 SET_NETDEV_DEV(ndev, &pdev->dev);
765
766 memset(&edev->stats, 0, sizeof(edev->stats));
767 memcpy(&edev->dev_info, info, sizeof(*info));
768
769 /* As ethtool doesn't have the ability to show WoL behavior as
770 * 'default', if device supports it declare it's enabled.
771 */
772 if (edev->dev_info.common.wol_support)
773 edev->wol_enabled = true;
774
775 INIT_LIST_HEAD(&edev->vlan_list);
776
777 return edev;
778 }
779
qede_init_ndev(struct qede_dev *edev)780 static void qede_init_ndev(struct qede_dev *edev)
781 {
782 struct net_device *ndev = edev->ndev;
783 struct pci_dev *pdev = edev->pdev;
784 bool udp_tunnel_enable = false;
785 netdev_features_t hw_features;
786
787 pci_set_drvdata(pdev, ndev);
788
789 ndev->mem_start = edev->dev_info.common.pci_mem_start;
790 ndev->base_addr = ndev->mem_start;
791 ndev->mem_end = edev->dev_info.common.pci_mem_end;
792 ndev->irq = edev->dev_info.common.pci_irq;
793
794 ndev->watchdog_timeo = TX_TIMEOUT;
795
796 if (IS_VF(edev)) {
797 if (edev->dev_info.xdp_supported)
798 ndev->netdev_ops = &qede_netdev_vf_xdp_ops;
799 else
800 ndev->netdev_ops = &qede_netdev_vf_ops;
801 } else {
802 ndev->netdev_ops = &qede_netdev_ops;
803 }
804
805 qede_set_ethtool_ops(ndev);
806
807 ndev->priv_flags |= IFF_UNICAST_FLT;
808
809 /* user-changeble features */
810 hw_features = NETIF_F_GRO | NETIF_F_GRO_HW | NETIF_F_SG |
811 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
812 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_TC;
813
814 if (edev->dev_info.common.b_arfs_capable)
815 hw_features |= NETIF_F_NTUPLE;
816
817 if (edev->dev_info.common.vxlan_enable ||
818 edev->dev_info.common.geneve_enable)
819 udp_tunnel_enable = true;
820
821 if (udp_tunnel_enable || edev->dev_info.common.gre_enable) {
822 hw_features |= NETIF_F_TSO_ECN;
823 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
824 NETIF_F_SG | NETIF_F_TSO |
825 NETIF_F_TSO_ECN | NETIF_F_TSO6 |
826 NETIF_F_RXCSUM;
827 }
828
829 if (udp_tunnel_enable) {
830 hw_features |= (NETIF_F_GSO_UDP_TUNNEL |
831 NETIF_F_GSO_UDP_TUNNEL_CSUM);
832 ndev->hw_enc_features |= (NETIF_F_GSO_UDP_TUNNEL |
833 NETIF_F_GSO_UDP_TUNNEL_CSUM);
834
835 qede_set_udp_tunnels(edev);
836 }
837
838 if (edev->dev_info.common.gre_enable) {
839 hw_features |= (NETIF_F_GSO_GRE | NETIF_F_GSO_GRE_CSUM);
840 ndev->hw_enc_features |= (NETIF_F_GSO_GRE |
841 NETIF_F_GSO_GRE_CSUM);
842 }
843
844 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
845 NETIF_F_HIGHDMA;
846 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
847 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
848 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
849
850 ndev->hw_features = hw_features;
851
852 /* MTU range: 46 - 9600 */
853 ndev->min_mtu = ETH_ZLEN - ETH_HLEN;
854 ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE;
855
856 /* Set network device HW mac */
857 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
858
859 ndev->mtu = edev->dev_info.common.mtu;
860 }
861
862 /* This function converts from 32b param to two params of level and module
863 * Input 32b decoding:
864 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
865 * 'happy' flow, e.g. memory allocation failed.
866 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
867 * and provide important parameters.
868 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
869 * module. VERBOSE prints are for tracking the specific flow in low level.
870 *
871 * Notice that the level should be that of the lowest required logs.
872 */
qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)873 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
874 {
875 *p_dp_level = QED_LEVEL_NOTICE;
876 *p_dp_module = 0;
877
878 if (debug & QED_LOG_VERBOSE_MASK) {
879 *p_dp_level = QED_LEVEL_VERBOSE;
880 *p_dp_module = (debug & 0x3FFFFFFF);
881 } else if (debug & QED_LOG_INFO_MASK) {
882 *p_dp_level = QED_LEVEL_INFO;
883 } else if (debug & QED_LOG_NOTICE_MASK) {
884 *p_dp_level = QED_LEVEL_NOTICE;
885 }
886 }
887
qede_free_fp_array(struct qede_dev *edev)888 static void qede_free_fp_array(struct qede_dev *edev)
889 {
890 if (edev->fp_array) {
891 struct qede_fastpath *fp;
892 int i;
893
894 for_each_queue(i) {
895 fp = &edev->fp_array[i];
896
897 kfree(fp->sb_info);
898 /* Handle mem alloc failure case where qede_init_fp
899 * didn't register xdp_rxq_info yet.
900 * Implicit only (fp->type & QEDE_FASTPATH_RX)
901 */
902 if (fp->rxq && xdp_rxq_info_is_reg(&fp->rxq->xdp_rxq))
903 xdp_rxq_info_unreg(&fp->rxq->xdp_rxq);
904 kfree(fp->rxq);
905 kfree(fp->xdp_tx);
906 kfree(fp->txq);
907 }
908 kfree(edev->fp_array);
909 }
910
911 edev->num_queues = 0;
912 edev->fp_num_tx = 0;
913 edev->fp_num_rx = 0;
914 }
915
qede_alloc_fp_array(struct qede_dev *edev)916 static int qede_alloc_fp_array(struct qede_dev *edev)
917 {
918 u8 fp_combined, fp_rx = edev->fp_num_rx;
919 struct qede_fastpath *fp;
920 int i;
921
922 edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev),
923 sizeof(*edev->fp_array), GFP_KERNEL);
924 if (!edev->fp_array) {
925 DP_NOTICE(edev, "fp array allocation failed\n");
926 goto err;
927 }
928
929 fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx;
930
931 /* Allocate the FP elements for Rx queues followed by combined and then
932 * the Tx. This ordering should be maintained so that the respective
933 * queues (Rx or Tx) will be together in the fastpath array and the
934 * associated ids will be sequential.
935 */
936 for_each_queue(i) {
937 fp = &edev->fp_array[i];
938
939 fp->sb_info = kzalloc(sizeof(*fp->sb_info), GFP_KERNEL);
940 if (!fp->sb_info) {
941 DP_NOTICE(edev, "sb info struct allocation failed\n");
942 goto err;
943 }
944
945 if (fp_rx) {
946 fp->type = QEDE_FASTPATH_RX;
947 fp_rx--;
948 } else if (fp_combined) {
949 fp->type = QEDE_FASTPATH_COMBINED;
950 fp_combined--;
951 } else {
952 fp->type = QEDE_FASTPATH_TX;
953 }
954
955 if (fp->type & QEDE_FASTPATH_TX) {
956 fp->txq = kcalloc(edev->dev_info.num_tc,
957 sizeof(*fp->txq), GFP_KERNEL);
958 if (!fp->txq)
959 goto err;
960 }
961
962 if (fp->type & QEDE_FASTPATH_RX) {
963 fp->rxq = kzalloc(sizeof(*fp->rxq), GFP_KERNEL);
964 if (!fp->rxq)
965 goto err;
966
967 if (edev->xdp_prog) {
968 fp->xdp_tx = kzalloc(sizeof(*fp->xdp_tx),
969 GFP_KERNEL);
970 if (!fp->xdp_tx)
971 goto err;
972 fp->type |= QEDE_FASTPATH_XDP;
973 }
974 }
975 }
976
977 return 0;
978 err:
979 qede_free_fp_array(edev);
980 return -ENOMEM;
981 }
982
983 /* The qede lock is used to protect driver state change and driver flows that
984 * are not reentrant.
985 */
__qede_lock(struct qede_dev *edev)986 void __qede_lock(struct qede_dev *edev)
987 {
988 mutex_lock(&edev->qede_lock);
989 }
990
__qede_unlock(struct qede_dev *edev)991 void __qede_unlock(struct qede_dev *edev)
992 {
993 mutex_unlock(&edev->qede_lock);
994 }
995
996 /* This version of the lock should be used when acquiring the RTNL lock is also
997 * needed in addition to the internal qede lock.
998 */
qede_lock(struct qede_dev *edev)999 static void qede_lock(struct qede_dev *edev)
1000 {
1001 rtnl_lock();
1002 __qede_lock(edev);
1003 }
1004
qede_unlock(struct qede_dev *edev)1005 static void qede_unlock(struct qede_dev *edev)
1006 {
1007 __qede_unlock(edev);
1008 rtnl_unlock();
1009 }
1010
qede_periodic_task(struct work_struct *work)1011 static void qede_periodic_task(struct work_struct *work)
1012 {
1013 struct qede_dev *edev = container_of(work, struct qede_dev,
1014 periodic_task.work);
1015
1016 qede_fill_by_demand_stats(edev);
1017 schedule_delayed_work(&edev->periodic_task, edev->stats_coal_ticks);
1018 }
1019
qede_init_periodic_task(struct qede_dev *edev)1020 static void qede_init_periodic_task(struct qede_dev *edev)
1021 {
1022 INIT_DELAYED_WORK(&edev->periodic_task, qede_periodic_task);
1023 spin_lock_init(&edev->stats_lock);
1024 edev->stats_coal_usecs = USEC_PER_SEC;
1025 edev->stats_coal_ticks = usecs_to_jiffies(USEC_PER_SEC);
1026 }
1027
qede_sp_task(struct work_struct *work)1028 static void qede_sp_task(struct work_struct *work)
1029 {
1030 struct qede_dev *edev = container_of(work, struct qede_dev,
1031 sp_task.work);
1032
1033 /* Disable execution of this deferred work once
1034 * qede removal is in progress, this stop any future
1035 * scheduling of sp_task.
1036 */
1037 if (test_bit(QEDE_SP_DISABLE, &edev->sp_flags))
1038 return;
1039
1040 /* The locking scheme depends on the specific flag:
1041 * In case of QEDE_SP_RECOVERY, acquiring the RTNL lock is required to
1042 * ensure that ongoing flows are ended and new ones are not started.
1043 * In other cases - only the internal qede lock should be acquired.
1044 */
1045
1046 if (test_and_clear_bit(QEDE_SP_RECOVERY, &edev->sp_flags)) {
1047 cancel_delayed_work_sync(&edev->periodic_task);
1048 #ifdef CONFIG_QED_SRIOV
1049 /* SRIOV must be disabled outside the lock to avoid a deadlock.
1050 * The recovery of the active VFs is currently not supported.
1051 */
1052 if (pci_num_vf(edev->pdev))
1053 qede_sriov_configure(edev->pdev, 0);
1054 #endif
1055 qede_lock(edev);
1056 qede_recovery_handler(edev);
1057 qede_unlock(edev);
1058 }
1059
1060 __qede_lock(edev);
1061
1062 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
1063 if (edev->state == QEDE_STATE_OPEN)
1064 qede_config_rx_mode(edev->ndev);
1065
1066 #ifdef CONFIG_RFS_ACCEL
1067 if (test_and_clear_bit(QEDE_SP_ARFS_CONFIG, &edev->sp_flags)) {
1068 if (edev->state == QEDE_STATE_OPEN)
1069 qede_process_arfs_filters(edev, false);
1070 }
1071 #endif
1072 if (test_and_clear_bit(QEDE_SP_HW_ERR, &edev->sp_flags))
1073 qede_generic_hw_err_handler(edev);
1074 __qede_unlock(edev);
1075
1076 if (test_and_clear_bit(QEDE_SP_AER, &edev->sp_flags)) {
1077 #ifdef CONFIG_QED_SRIOV
1078 /* SRIOV must be disabled outside the lock to avoid a deadlock.
1079 * The recovery of the active VFs is currently not supported.
1080 */
1081 if (pci_num_vf(edev->pdev))
1082 qede_sriov_configure(edev->pdev, 0);
1083 #endif
1084 edev->ops->common->recovery_process(edev->cdev);
1085 }
1086 }
1087
qede_update_pf_params(struct qed_dev *cdev)1088 static void qede_update_pf_params(struct qed_dev *cdev)
1089 {
1090 struct qed_pf_params pf_params;
1091 u16 num_cons;
1092
1093 /* 64 rx + 64 tx + 64 XDP */
1094 memset(&pf_params, 0, sizeof(struct qed_pf_params));
1095
1096 /* 1 rx + 1 xdp + max tx cos */
1097 num_cons = QED_MIN_L2_CONS;
1098
1099 pf_params.eth_pf_params.num_cons = (MAX_SB_PER_PF_MIMD - 1) * num_cons;
1100
1101 /* Same for VFs - make sure they'll have sufficient connections
1102 * to support XDP Tx queues.
1103 */
1104 pf_params.eth_pf_params.num_vf_cons = 48;
1105
1106 pf_params.eth_pf_params.num_arfs_filters = QEDE_RFS_MAX_FLTR;
1107 qed_ops->common->update_pf_params(cdev, &pf_params);
1108 }
1109
1110 #define QEDE_FW_VER_STR_SIZE 80
1111
qede_log_probe(struct qede_dev *edev)1112 static void qede_log_probe(struct qede_dev *edev)
1113 {
1114 struct qed_dev_info *p_dev_info = &edev->dev_info.common;
1115 u8 buf[QEDE_FW_VER_STR_SIZE];
1116 size_t left_size;
1117
1118 snprintf(buf, QEDE_FW_VER_STR_SIZE,
1119 "Storm FW %d.%d.%d.%d, Management FW %d.%d.%d.%d",
1120 p_dev_info->fw_major, p_dev_info->fw_minor, p_dev_info->fw_rev,
1121 p_dev_info->fw_eng,
1122 (p_dev_info->mfw_rev & QED_MFW_VERSION_3_MASK) >>
1123 QED_MFW_VERSION_3_OFFSET,
1124 (p_dev_info->mfw_rev & QED_MFW_VERSION_2_MASK) >>
1125 QED_MFW_VERSION_2_OFFSET,
1126 (p_dev_info->mfw_rev & QED_MFW_VERSION_1_MASK) >>
1127 QED_MFW_VERSION_1_OFFSET,
1128 (p_dev_info->mfw_rev & QED_MFW_VERSION_0_MASK) >>
1129 QED_MFW_VERSION_0_OFFSET);
1130
1131 left_size = QEDE_FW_VER_STR_SIZE - strlen(buf);
1132 if (p_dev_info->mbi_version && left_size)
1133 snprintf(buf + strlen(buf), left_size,
1134 " [MBI %d.%d.%d]",
1135 (p_dev_info->mbi_version & QED_MBI_VERSION_2_MASK) >>
1136 QED_MBI_VERSION_2_OFFSET,
1137 (p_dev_info->mbi_version & QED_MBI_VERSION_1_MASK) >>
1138 QED_MBI_VERSION_1_OFFSET,
1139 (p_dev_info->mbi_version & QED_MBI_VERSION_0_MASK) >>
1140 QED_MBI_VERSION_0_OFFSET);
1141
1142 pr_info("qede %02x:%02x.%02x: %s [%s]\n", edev->pdev->bus->number,
1143 PCI_SLOT(edev->pdev->devfn), PCI_FUNC(edev->pdev->devfn),
1144 buf, edev->ndev->name);
1145 }
1146
1147 enum qede_probe_mode {
1148 QEDE_PROBE_NORMAL,
1149 QEDE_PROBE_RECOVERY,
1150 };
1151
__qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level, bool is_vf, enum qede_probe_mode mode)1152 static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
1153 bool is_vf, enum qede_probe_mode mode)
1154 {
1155 struct qed_probe_params probe_params;
1156 struct qed_slowpath_params sp_params;
1157 struct qed_dev_eth_info dev_info;
1158 struct qede_dev *edev;
1159 struct qed_dev *cdev;
1160 int rc;
1161
1162 if (unlikely(dp_level & QED_LEVEL_INFO))
1163 pr_notice("Starting qede probe\n");
1164
1165 memset(&probe_params, 0, sizeof(probe_params));
1166 probe_params.protocol = QED_PROTOCOL_ETH;
1167 probe_params.dp_module = dp_module;
1168 probe_params.dp_level = dp_level;
1169 probe_params.is_vf = is_vf;
1170 probe_params.recov_in_prog = (mode == QEDE_PROBE_RECOVERY);
1171 cdev = qed_ops->common->probe(pdev, &probe_params);
1172 if (!cdev) {
1173 rc = -ENODEV;
1174 goto err0;
1175 }
1176
1177 qede_update_pf_params(cdev);
1178
1179 /* Start the Slowpath-process */
1180 memset(&sp_params, 0, sizeof(sp_params));
1181 sp_params.int_mode = QED_INT_MODE_MSIX;
1182 sp_params.drv_major = QEDE_MAJOR_VERSION;
1183 sp_params.drv_minor = QEDE_MINOR_VERSION;
1184 sp_params.drv_rev = QEDE_REVISION_VERSION;
1185 sp_params.drv_eng = QEDE_ENGINEERING_VERSION;
1186 strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
1187 rc = qed_ops->common->slowpath_start(cdev, &sp_params);
1188 if (rc) {
1189 pr_notice("Cannot start slowpath\n");
1190 goto err1;
1191 }
1192
1193 /* Learn information crucial for qede to progress */
1194 rc = qed_ops->fill_dev_info(cdev, &dev_info);
1195 if (rc)
1196 goto err2;
1197
1198 if (mode != QEDE_PROBE_RECOVERY) {
1199 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
1200 dp_level);
1201 if (!edev) {
1202 rc = -ENOMEM;
1203 goto err2;
1204 }
1205
1206 edev->devlink = qed_ops->common->devlink_register(cdev);
1207 if (IS_ERR(edev->devlink)) {
1208 DP_NOTICE(edev, "Cannot register devlink\n");
1209 edev->devlink = NULL;
1210 /* Go on, we can live without devlink */
1211 }
1212 } else {
1213 struct net_device *ndev = pci_get_drvdata(pdev);
1214
1215 edev = netdev_priv(ndev);
1216
1217 if (edev->devlink) {
1218 struct qed_devlink *qdl = devlink_priv(edev->devlink);
1219
1220 qdl->cdev = cdev;
1221 }
1222 edev->cdev = cdev;
1223 memset(&edev->stats, 0, sizeof(edev->stats));
1224 memcpy(&edev->dev_info, &dev_info, sizeof(dev_info));
1225 }
1226
1227 if (is_vf)
1228 set_bit(QEDE_FLAGS_IS_VF, &edev->flags);
1229
1230 qede_init_ndev(edev);
1231
1232 rc = qede_rdma_dev_add(edev, (mode == QEDE_PROBE_RECOVERY));
1233 if (rc)
1234 goto err3;
1235
1236 if (mode != QEDE_PROBE_RECOVERY) {
1237 /* Prepare the lock prior to the registration of the netdev,
1238 * as once it's registered we might reach flows requiring it
1239 * [it's even possible to reach a flow needing it directly
1240 * from there, although it's unlikely].
1241 */
1242 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
1243 mutex_init(&edev->qede_lock);
1244 qede_init_periodic_task(edev);
1245
1246 rc = register_netdev(edev->ndev);
1247 if (rc) {
1248 DP_NOTICE(edev, "Cannot register net-device\n");
1249 goto err4;
1250 }
1251 }
1252
1253 edev->ops->common->set_name(cdev, edev->ndev->name);
1254
1255 /* PTP not supported on VFs */
1256 if (!is_vf)
1257 qede_ptp_enable(edev);
1258
1259 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
1260
1261 #ifdef CONFIG_DCB
1262 if (!IS_VF(edev))
1263 qede_set_dcbnl_ops(edev->ndev);
1264 #endif
1265
1266 edev->rx_copybreak = QEDE_RX_HDR_SIZE;
1267
1268 qede_log_probe(edev);
1269
1270 /* retain user config (for example - after recovery) */
1271 if (edev->stats_coal_usecs)
1272 schedule_delayed_work(&edev->periodic_task, 0);
1273
1274 return 0;
1275
1276 err4:
1277 qede_rdma_dev_remove(edev, (mode == QEDE_PROBE_RECOVERY));
1278 err3:
1279 if (mode != QEDE_PROBE_RECOVERY)
1280 free_netdev(edev->ndev);
1281 else
1282 edev->cdev = NULL;
1283 err2:
1284 qed_ops->common->slowpath_stop(cdev);
1285 err1:
1286 qed_ops->common->remove(cdev);
1287 err0:
1288 return rc;
1289 }
1290
qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)1291 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1292 {
1293 bool is_vf = false;
1294 u32 dp_module = 0;
1295 u8 dp_level = 0;
1296
1297 switch ((enum qede_pci_private)id->driver_data) {
1298 case QEDE_PRIVATE_VF:
1299 if (debug & QED_LOG_VERBOSE_MASK)
1300 dev_err(&pdev->dev, "Probing a VF\n");
1301 is_vf = true;
1302 break;
1303 default:
1304 if (debug & QED_LOG_VERBOSE_MASK)
1305 dev_err(&pdev->dev, "Probing a PF\n");
1306 }
1307
1308 qede_config_debug(debug, &dp_module, &dp_level);
1309
1310 return __qede_probe(pdev, dp_module, dp_level, is_vf,
1311 QEDE_PROBE_NORMAL);
1312 }
1313
1314 enum qede_remove_mode {
1315 QEDE_REMOVE_NORMAL,
1316 QEDE_REMOVE_RECOVERY,
1317 };
1318
__qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)1319 static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
1320 {
1321 struct net_device *ndev = pci_get_drvdata(pdev);
1322 struct qede_dev *edev;
1323 struct qed_dev *cdev;
1324
1325 if (!ndev) {
1326 dev_info(&pdev->dev, "Device has already been removed\n");
1327 return;
1328 }
1329
1330 edev = netdev_priv(ndev);
1331 cdev = edev->cdev;
1332
1333 DP_INFO(edev, "Starting qede_remove\n");
1334
1335 qede_rdma_dev_remove(edev, (mode == QEDE_REMOVE_RECOVERY));
1336
1337 if (mode != QEDE_REMOVE_RECOVERY) {
1338 set_bit(QEDE_SP_DISABLE, &edev->sp_flags);
1339 unregister_netdev(ndev);
1340
1341 cancel_delayed_work_sync(&edev->sp_task);
1342 cancel_delayed_work_sync(&edev->periodic_task);
1343
1344 edev->ops->common->set_power_state(cdev, PCI_D0);
1345
1346 pci_set_drvdata(pdev, NULL);
1347 }
1348
1349 qede_ptp_disable(edev);
1350
1351 /* Use global ops since we've freed edev */
1352 qed_ops->common->slowpath_stop(cdev);
1353 if (system_state == SYSTEM_POWER_OFF)
1354 return;
1355
1356 if (mode != QEDE_REMOVE_RECOVERY && edev->devlink) {
1357 qed_ops->common->devlink_unregister(edev->devlink);
1358 edev->devlink = NULL;
1359 }
1360 qed_ops->common->remove(cdev);
1361 edev->cdev = NULL;
1362
1363 /* Since this can happen out-of-sync with other flows,
1364 * don't release the netdevice until after slowpath stop
1365 * has been called to guarantee various other contexts
1366 * [e.g., QED register callbacks] won't break anything when
1367 * accessing the netdevice.
1368 */
1369 if (mode != QEDE_REMOVE_RECOVERY)
1370 free_netdev(ndev);
1371
1372 dev_info(&pdev->dev, "Ending qede_remove successfully\n");
1373 }
1374
qede_remove(struct pci_dev *pdev)1375 static void qede_remove(struct pci_dev *pdev)
1376 {
1377 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
1378 }
1379
qede_shutdown(struct pci_dev *pdev)1380 static void qede_shutdown(struct pci_dev *pdev)
1381 {
1382 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
1383 }
1384
1385 /* -------------------------------------------------------------------------
1386 * START OF LOAD / UNLOAD
1387 * -------------------------------------------------------------------------
1388 */
1389
qede_set_num_queues(struct qede_dev *edev)1390 static int qede_set_num_queues(struct qede_dev *edev)
1391 {
1392 int rc;
1393 u16 rss_num;
1394
1395 /* Setup queues according to possible resources*/
1396 if (edev->req_queues)
1397 rss_num = edev->req_queues;
1398 else
1399 rss_num = netif_get_num_default_rss_queues() *
1400 edev->dev_info.common.num_hwfns;
1401
1402 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
1403
1404 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
1405 if (rc > 0) {
1406 /* Managed to request interrupts for our queues */
1407 edev->num_queues = rc;
1408 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
1409 QEDE_QUEUE_CNT(edev), rss_num);
1410 rc = 0;
1411 }
1412
1413 edev->fp_num_tx = edev->req_num_tx;
1414 edev->fp_num_rx = edev->req_num_rx;
1415
1416 return rc;
1417 }
1418
qede_free_mem_sb(struct qede_dev *edev, struct qed_sb_info *sb_info, u16 sb_id)1419 static void qede_free_mem_sb(struct qede_dev *edev, struct qed_sb_info *sb_info,
1420 u16 sb_id)
1421 {
1422 if (sb_info->sb_virt) {
1423 edev->ops->common->sb_release(edev->cdev, sb_info, sb_id,
1424 QED_SB_TYPE_L2_QUEUE);
1425 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
1426 (void *)sb_info->sb_virt, sb_info->sb_phys);
1427 memset(sb_info, 0, sizeof(*sb_info));
1428 }
1429 }
1430
1431 /* This function allocates fast-path status block memory */
qede_alloc_mem_sb(struct qede_dev *edev, struct qed_sb_info *sb_info, u16 sb_id)1432 static int qede_alloc_mem_sb(struct qede_dev *edev,
1433 struct qed_sb_info *sb_info, u16 sb_id)
1434 {
1435 struct status_block_e4 *sb_virt;
1436 dma_addr_t sb_phys;
1437 int rc;
1438
1439 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
1440 sizeof(*sb_virt), &sb_phys, GFP_KERNEL);
1441 if (!sb_virt) {
1442 DP_ERR(edev, "Status block allocation failed\n");
1443 return -ENOMEM;
1444 }
1445
1446 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
1447 sb_virt, sb_phys, sb_id,
1448 QED_SB_TYPE_L2_QUEUE);
1449 if (rc) {
1450 DP_ERR(edev, "Status block initialization failed\n");
1451 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
1452 sb_virt, sb_phys);
1453 return rc;
1454 }
1455
1456 return 0;
1457 }
1458
qede_free_rx_buffers(struct qede_dev *edev, struct qede_rx_queue *rxq)1459 static void qede_free_rx_buffers(struct qede_dev *edev,
1460 struct qede_rx_queue *rxq)
1461 {
1462 u16 i;
1463
1464 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
1465 struct sw_rx_data *rx_buf;
1466 struct page *data;
1467
1468 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
1469 data = rx_buf->data;
1470
1471 dma_unmap_page(&edev->pdev->dev,
1472 rx_buf->mapping, PAGE_SIZE, rxq->data_direction);
1473
1474 rx_buf->data = NULL;
1475 __free_page(data);
1476 }
1477 }
1478
qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)1479 static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
1480 {
1481 /* Free rx buffers */
1482 qede_free_rx_buffers(edev, rxq);
1483
1484 /* Free the parallel SW ring */
1485 kfree(rxq->sw_rx_ring);
1486
1487 /* Free the real RQ ring used by FW */
1488 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
1489 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
1490 }
1491
qede_set_tpa_param(struct qede_rx_queue *rxq)1492 static void qede_set_tpa_param(struct qede_rx_queue *rxq)
1493 {
1494 int i;
1495
1496 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
1497 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
1498
1499 tpa_info->state = QEDE_AGG_STATE_NONE;
1500 }
1501 }
1502
1503 /* This function allocates all memory needed per Rx queue */
qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)1504 static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
1505 {
1506 struct qed_chain_init_params params = {
1507 .cnt_type = QED_CHAIN_CNT_TYPE_U16,
1508 .num_elems = RX_RING_SIZE,
1509 };
1510 struct qed_dev *cdev = edev->cdev;
1511 int i, rc, size;
1512
1513 rxq->num_rx_buffers = edev->q_num_rx_buffers;
1514
1515 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu;
1516
1517 rxq->rx_headroom = edev->xdp_prog ? XDP_PACKET_HEADROOM : NET_SKB_PAD;
1518 size = rxq->rx_headroom +
1519 SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
1520
1521 /* Make sure that the headroom and payload fit in a single page */
1522 if (rxq->rx_buf_size + size > PAGE_SIZE)
1523 rxq->rx_buf_size = PAGE_SIZE - size;
1524
1525 /* Segment size to split a page in multiple equal parts,
1526 * unless XDP is used in which case we'd use the entire page.
1527 */
1528 if (!edev->xdp_prog) {
1529 size = size + rxq->rx_buf_size;
1530 rxq->rx_buf_seg_size = roundup_pow_of_two(size);
1531 } else {
1532 rxq->rx_buf_seg_size = PAGE_SIZE;
1533 edev->ndev->features &= ~NETIF_F_GRO_HW;
1534 }
1535
1536 /* Allocate the parallel driver ring for Rx buffers */
1537 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
1538 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
1539 if (!rxq->sw_rx_ring) {
1540 DP_ERR(edev, "Rx buffers ring allocation failed\n");
1541 rc = -ENOMEM;
1542 goto err;
1543 }
1544
1545 /* Allocate FW Rx ring */
1546 params.mode = QED_CHAIN_MODE_NEXT_PTR;
1547 params.intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE;
1548 params.elem_size = sizeof(struct eth_rx_bd);
1549
1550 rc = edev->ops->common->chain_alloc(cdev, &rxq->rx_bd_ring, ¶ms);
1551 if (rc)
1552 goto err;
1553
1554 /* Allocate FW completion ring */
1555 params.mode = QED_CHAIN_MODE_PBL;
1556 params.intended_use = QED_CHAIN_USE_TO_CONSUME;
1557 params.elem_size = sizeof(union eth_rx_cqe);
1558
1559 rc = edev->ops->common->chain_alloc(cdev, &rxq->rx_comp_ring, ¶ms);
1560 if (rc)
1561 goto err;
1562
1563 /* Allocate buffers for the Rx ring */
1564 rxq->filled_buffers = 0;
1565 for (i = 0; i < rxq->num_rx_buffers; i++) {
1566 rc = qede_alloc_rx_buffer(rxq, false);
1567 if (rc) {
1568 DP_ERR(edev,
1569 "Rx buffers allocation failed at index %d\n", i);
1570 goto err;
1571 }
1572 }
1573
1574 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO_HW);
1575 if (!edev->gro_disable)
1576 qede_set_tpa_param(rxq);
1577 err:
1578 return rc;
1579 }
1580
qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)1581 static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
1582 {
1583 /* Free the parallel SW ring */
1584 if (txq->is_xdp)
1585 kfree(txq->sw_tx_ring.xdp);
1586 else
1587 kfree(txq->sw_tx_ring.skbs);
1588
1589 /* Free the real RQ ring used by FW */
1590 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
1591 }
1592
1593 /* This function allocates all memory needed per Tx queue */
qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)1594 static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
1595 {
1596 struct qed_chain_init_params params = {
1597 .mode = QED_CHAIN_MODE_PBL,
1598 .intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1599 .cnt_type = QED_CHAIN_CNT_TYPE_U16,
1600 .num_elems = edev->q_num_tx_buffers,
1601 .elem_size = sizeof(union eth_tx_bd_types),
1602 };
1603 int size, rc;
1604
1605 txq->num_tx_buffers = edev->q_num_tx_buffers;
1606
1607 /* Allocate the parallel driver ring for Tx buffers */
1608 if (txq->is_xdp) {
1609 size = sizeof(*txq->sw_tx_ring.xdp) * txq->num_tx_buffers;
1610 txq->sw_tx_ring.xdp = kzalloc(size, GFP_KERNEL);
1611 if (!txq->sw_tx_ring.xdp)
1612 goto err;
1613 } else {
1614 size = sizeof(*txq->sw_tx_ring.skbs) * txq->num_tx_buffers;
1615 txq->sw_tx_ring.skbs = kzalloc(size, GFP_KERNEL);
1616 if (!txq->sw_tx_ring.skbs)
1617 goto err;
1618 }
1619
1620 rc = edev->ops->common->chain_alloc(edev->cdev, &txq->tx_pbl, ¶ms);
1621 if (rc)
1622 goto err;
1623
1624 return 0;
1625
1626 err:
1627 qede_free_mem_txq(edev, txq);
1628 return -ENOMEM;
1629 }
1630
1631 /* This function frees all memory of a single fp */
qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)1632 static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
1633 {
1634 qede_free_mem_sb(edev, fp->sb_info, fp->id);
1635
1636 if (fp->type & QEDE_FASTPATH_RX)
1637 qede_free_mem_rxq(edev, fp->rxq);
1638
1639 if (fp->type & QEDE_FASTPATH_XDP)
1640 qede_free_mem_txq(edev, fp->xdp_tx);
1641
1642 if (fp->type & QEDE_FASTPATH_TX) {
1643 int cos;
1644
1645 for_each_cos_in_txq(edev, cos)
1646 qede_free_mem_txq(edev, &fp->txq[cos]);
1647 }
1648 }
1649
1650 /* This function allocates all memory needed for a single fp (i.e. an entity
1651 * which contains status block, one rx queue and/or multiple per-TC tx queues.
1652 */
qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)1653 static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
1654 {
1655 int rc = 0;
1656
1657 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id);
1658 if (rc)
1659 goto out;
1660
1661 if (fp->type & QEDE_FASTPATH_RX) {
1662 rc = qede_alloc_mem_rxq(edev, fp->rxq);
1663 if (rc)
1664 goto out;
1665 }
1666
1667 if (fp->type & QEDE_FASTPATH_XDP) {
1668 rc = qede_alloc_mem_txq(edev, fp->xdp_tx);
1669 if (rc)
1670 goto out;
1671 }
1672
1673 if (fp->type & QEDE_FASTPATH_TX) {
1674 int cos;
1675
1676 for_each_cos_in_txq(edev, cos) {
1677 rc = qede_alloc_mem_txq(edev, &fp->txq[cos]);
1678 if (rc)
1679 goto out;
1680 }
1681 }
1682
1683 out:
1684 return rc;
1685 }
1686
qede_free_mem_load(struct qede_dev *edev)1687 static void qede_free_mem_load(struct qede_dev *edev)
1688 {
1689 int i;
1690
1691 for_each_queue(i) {
1692 struct qede_fastpath *fp = &edev->fp_array[i];
1693
1694 qede_free_mem_fp(edev, fp);
1695 }
1696 }
1697
1698 /* This function allocates all qede memory at NIC load. */
qede_alloc_mem_load(struct qede_dev *edev)1699 static int qede_alloc_mem_load(struct qede_dev *edev)
1700 {
1701 int rc = 0, queue_id;
1702
1703 for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) {
1704 struct qede_fastpath *fp = &edev->fp_array[queue_id];
1705
1706 rc = qede_alloc_mem_fp(edev, fp);
1707 if (rc) {
1708 DP_ERR(edev,
1709 "Failed to allocate memory for fastpath - rss id = %d\n",
1710 queue_id);
1711 qede_free_mem_load(edev);
1712 return rc;
1713 }
1714 }
1715
1716 return 0;
1717 }
1718
qede_empty_tx_queue(struct qede_dev *edev, struct qede_tx_queue *txq)1719 static void qede_empty_tx_queue(struct qede_dev *edev,
1720 struct qede_tx_queue *txq)
1721 {
1722 unsigned int pkts_compl = 0, bytes_compl = 0;
1723 struct netdev_queue *netdev_txq;
1724 int rc, len = 0;
1725
1726 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id);
1727
1728 while (qed_chain_get_cons_idx(&txq->tx_pbl) !=
1729 qed_chain_get_prod_idx(&txq->tx_pbl)) {
1730 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1731 "Freeing a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n",
1732 txq->index, qed_chain_get_cons_idx(&txq->tx_pbl),
1733 qed_chain_get_prod_idx(&txq->tx_pbl));
1734
1735 rc = qede_free_tx_pkt(edev, txq, &len);
1736 if (rc) {
1737 DP_NOTICE(edev,
1738 "Failed to free a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n",
1739 txq->index,
1740 qed_chain_get_cons_idx(&txq->tx_pbl),
1741 qed_chain_get_prod_idx(&txq->tx_pbl));
1742 break;
1743 }
1744
1745 bytes_compl += len;
1746 pkts_compl++;
1747 txq->sw_tx_cons++;
1748 }
1749
1750 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
1751 }
1752
qede_empty_tx_queues(struct qede_dev *edev)1753 static void qede_empty_tx_queues(struct qede_dev *edev)
1754 {
1755 int i;
1756
1757 for_each_queue(i)
1758 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
1759 int cos;
1760
1761 for_each_cos_in_txq(edev, cos) {
1762 struct qede_fastpath *fp;
1763
1764 fp = &edev->fp_array[i];
1765 qede_empty_tx_queue(edev,
1766 &fp->txq[cos]);
1767 }
1768 }
1769 }
1770
1771 /* This function inits fp content and resets the SB, RXQ and TXQ structures */
qede_init_fp(struct qede_dev *edev)1772 static void qede_init_fp(struct qede_dev *edev)
1773 {
1774 int queue_id, rxq_index = 0, txq_index = 0;
1775 struct qede_fastpath *fp;
1776 bool init_xdp = false;
1777
1778 for_each_queue(queue_id) {
1779 fp = &edev->fp_array[queue_id];
1780
1781 fp->edev = edev;
1782 fp->id = queue_id;
1783
1784 if (fp->type & QEDE_FASTPATH_XDP) {
1785 fp->xdp_tx->index = QEDE_TXQ_IDX_TO_XDP(edev,
1786 rxq_index);
1787 fp->xdp_tx->is_xdp = 1;
1788
1789 spin_lock_init(&fp->xdp_tx->xdp_tx_lock);
1790 init_xdp = true;
1791 }
1792
1793 if (fp->type & QEDE_FASTPATH_RX) {
1794 fp->rxq->rxq_id = rxq_index++;
1795
1796 /* Determine how to map buffers for this queue */
1797 if (fp->type & QEDE_FASTPATH_XDP)
1798 fp->rxq->data_direction = DMA_BIDIRECTIONAL;
1799 else
1800 fp->rxq->data_direction = DMA_FROM_DEVICE;
1801 fp->rxq->dev = &edev->pdev->dev;
1802
1803 /* Driver have no error path from here */
1804 WARN_ON(xdp_rxq_info_reg(&fp->rxq->xdp_rxq, edev->ndev,
1805 fp->rxq->rxq_id) < 0);
1806
1807 if (xdp_rxq_info_reg_mem_model(&fp->rxq->xdp_rxq,
1808 MEM_TYPE_PAGE_ORDER0,
1809 NULL)) {
1810 DP_NOTICE(edev,
1811 "Failed to register XDP memory model\n");
1812 }
1813 }
1814
1815 if (fp->type & QEDE_FASTPATH_TX) {
1816 int cos;
1817
1818 for_each_cos_in_txq(edev, cos) {
1819 struct qede_tx_queue *txq = &fp->txq[cos];
1820 u16 ndev_tx_id;
1821
1822 txq->cos = cos;
1823 txq->index = txq_index;
1824 ndev_tx_id = QEDE_TXQ_TO_NDEV_TXQ_ID(edev, txq);
1825 txq->ndev_txq_id = ndev_tx_id;
1826
1827 if (edev->dev_info.is_legacy)
1828 txq->is_legacy = true;
1829 txq->dev = &edev->pdev->dev;
1830 }
1831
1832 txq_index++;
1833 }
1834
1835 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
1836 edev->ndev->name, queue_id);
1837 }
1838
1839 if (init_xdp) {
1840 edev->total_xdp_queues = QEDE_RSS_COUNT(edev);
1841 DP_INFO(edev, "Total XDP queues: %u\n", edev->total_xdp_queues);
1842 }
1843 }
1844
qede_set_real_num_queues(struct qede_dev *edev)1845 static int qede_set_real_num_queues(struct qede_dev *edev)
1846 {
1847 int rc = 0;
1848
1849 rc = netif_set_real_num_tx_queues(edev->ndev,
1850 QEDE_TSS_COUNT(edev) *
1851 edev->dev_info.num_tc);
1852 if (rc) {
1853 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
1854 return rc;
1855 }
1856
1857 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev));
1858 if (rc) {
1859 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
1860 return rc;
1861 }
1862
1863 return 0;
1864 }
1865
qede_napi_disable_remove(struct qede_dev *edev)1866 static void qede_napi_disable_remove(struct qede_dev *edev)
1867 {
1868 int i;
1869
1870 for_each_queue(i) {
1871 napi_disable(&edev->fp_array[i].napi);
1872
1873 netif_napi_del(&edev->fp_array[i].napi);
1874 }
1875 }
1876
qede_napi_add_enable(struct qede_dev *edev)1877 static void qede_napi_add_enable(struct qede_dev *edev)
1878 {
1879 int i;
1880
1881 /* Add NAPI objects */
1882 for_each_queue(i) {
1883 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
1884 qede_poll, NAPI_POLL_WEIGHT);
1885 napi_enable(&edev->fp_array[i].napi);
1886 }
1887 }
1888
qede_sync_free_irqs(struct qede_dev *edev)1889 static void qede_sync_free_irqs(struct qede_dev *edev)
1890 {
1891 int i;
1892
1893 for (i = 0; i < edev->int_info.used_cnt; i++) {
1894 if (edev->int_info.msix_cnt) {
1895 synchronize_irq(edev->int_info.msix[i].vector);
1896 free_irq(edev->int_info.msix[i].vector,
1897 &edev->fp_array[i]);
1898 } else {
1899 edev->ops->common->simd_handler_clean(edev->cdev, i);
1900 }
1901 }
1902
1903 edev->int_info.used_cnt = 0;
1904 edev->int_info.msix_cnt = 0;
1905 }
1906
qede_req_msix_irqs(struct qede_dev *edev)1907 static int qede_req_msix_irqs(struct qede_dev *edev)
1908 {
1909 int i, rc;
1910
1911 /* Sanitize number of interrupts == number of prepared RSS queues */
1912 if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) {
1913 DP_ERR(edev,
1914 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
1915 QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt);
1916 return -EINVAL;
1917 }
1918
1919 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
1920 #ifdef CONFIG_RFS_ACCEL
1921 struct qede_fastpath *fp = &edev->fp_array[i];
1922
1923 if (edev->ndev->rx_cpu_rmap && (fp->type & QEDE_FASTPATH_RX)) {
1924 rc = irq_cpu_rmap_add(edev->ndev->rx_cpu_rmap,
1925 edev->int_info.msix[i].vector);
1926 if (rc) {
1927 DP_ERR(edev, "Failed to add CPU rmap\n");
1928 qede_free_arfs(edev);
1929 }
1930 }
1931 #endif
1932 rc = request_irq(edev->int_info.msix[i].vector,
1933 qede_msix_fp_int, 0, edev->fp_array[i].name,
1934 &edev->fp_array[i]);
1935 if (rc) {
1936 DP_ERR(edev, "Request fp %d irq failed\n", i);
1937 qede_sync_free_irqs(edev);
1938 return rc;
1939 }
1940 DP_VERBOSE(edev, NETIF_MSG_INTR,
1941 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
1942 edev->fp_array[i].name, i,
1943 &edev->fp_array[i]);
1944 edev->int_info.used_cnt++;
1945 }
1946
1947 return 0;
1948 }
1949
qede_simd_fp_handler(void *cookie)1950 static void qede_simd_fp_handler(void *cookie)
1951 {
1952 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
1953
1954 napi_schedule_irqoff(&fp->napi);
1955 }
1956
qede_setup_irqs(struct qede_dev *edev)1957 static int qede_setup_irqs(struct qede_dev *edev)
1958 {
1959 int i, rc = 0;
1960
1961 /* Learn Interrupt configuration */
1962 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
1963 if (rc)
1964 return rc;
1965
1966 if (edev->int_info.msix_cnt) {
1967 rc = qede_req_msix_irqs(edev);
1968 if (rc)
1969 return rc;
1970 edev->ndev->irq = edev->int_info.msix[0].vector;
1971 } else {
1972 const struct qed_common_ops *ops;
1973
1974 /* qed should learn receive the RSS ids and callbacks */
1975 ops = edev->ops->common;
1976 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++)
1977 ops->simd_handler_config(edev->cdev,
1978 &edev->fp_array[i], i,
1979 qede_simd_fp_handler);
1980 edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev);
1981 }
1982 return 0;
1983 }
1984
qede_drain_txq(struct qede_dev *edev, struct qede_tx_queue *txq, bool allow_drain)1985 static int qede_drain_txq(struct qede_dev *edev,
1986 struct qede_tx_queue *txq, bool allow_drain)
1987 {
1988 int rc, cnt = 1000;
1989
1990 while (txq->sw_tx_cons != txq->sw_tx_prod) {
1991 if (!cnt) {
1992 if (allow_drain) {
1993 DP_NOTICE(edev,
1994 "Tx queue[%d] is stuck, requesting MCP to drain\n",
1995 txq->index);
1996 rc = edev->ops->common->drain(edev->cdev);
1997 if (rc)
1998 return rc;
1999 return qede_drain_txq(edev, txq, false);
2000 }
2001 DP_NOTICE(edev,
2002 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
2003 txq->index, txq->sw_tx_prod,
2004 txq->sw_tx_cons);
2005 return -ENODEV;
2006 }
2007 cnt--;
2008 usleep_range(1000, 2000);
2009 barrier();
2010 }
2011
2012 /* FW finished processing, wait for HW to transmit all tx packets */
2013 usleep_range(1000, 2000);
2014
2015 return 0;
2016 }
2017
qede_stop_txq(struct qede_dev *edev, struct qede_tx_queue *txq, int rss_id)2018 static int qede_stop_txq(struct qede_dev *edev,
2019 struct qede_tx_queue *txq, int rss_id)
2020 {
2021 /* delete doorbell from doorbell recovery mechanism */
2022 edev->ops->common->db_recovery_del(edev->cdev, txq->doorbell_addr,
2023 &txq->tx_db);
2024
2025 return edev->ops->q_tx_stop(edev->cdev, rss_id, txq->handle);
2026 }
2027
qede_stop_queues(struct qede_dev *edev)2028 static int qede_stop_queues(struct qede_dev *edev)
2029 {
2030 struct qed_update_vport_params *vport_update_params;
2031 struct qed_dev *cdev = edev->cdev;
2032 struct qede_fastpath *fp;
2033 int rc, i;
2034
2035 /* Disable the vport */
2036 vport_update_params = vzalloc(sizeof(*vport_update_params));
2037 if (!vport_update_params)
2038 return -ENOMEM;
2039
2040 vport_update_params->vport_id = 0;
2041 vport_update_params->update_vport_active_flg = 1;
2042 vport_update_params->vport_active_flg = 0;
2043 vport_update_params->update_rss_flg = 0;
2044
2045 rc = edev->ops->vport_update(cdev, vport_update_params);
2046 vfree(vport_update_params);
2047
2048 if (rc) {
2049 DP_ERR(edev, "Failed to update vport\n");
2050 return rc;
2051 }
2052
2053 /* Flush Tx queues. If needed, request drain from MCP */
2054 for_each_queue(i) {
2055 fp = &edev->fp_array[i];
2056
2057 if (fp->type & QEDE_FASTPATH_TX) {
2058 int cos;
2059
2060 for_each_cos_in_txq(edev, cos) {
2061 rc = qede_drain_txq(edev, &fp->txq[cos], true);
2062 if (rc)
2063 return rc;
2064 }
2065 }
2066
2067 if (fp->type & QEDE_FASTPATH_XDP) {
2068 rc = qede_drain_txq(edev, fp->xdp_tx, true);
2069 if (rc)
2070 return rc;
2071 }
2072 }
2073
2074 /* Stop all Queues in reverse order */
2075 for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) {
2076 fp = &edev->fp_array[i];
2077
2078 /* Stop the Tx Queue(s) */
2079 if (fp->type & QEDE_FASTPATH_TX) {
2080 int cos;
2081
2082 for_each_cos_in_txq(edev, cos) {
2083 rc = qede_stop_txq(edev, &fp->txq[cos], i);
2084 if (rc)
2085 return rc;
2086 }
2087 }
2088
2089 /* Stop the Rx Queue */
2090 if (fp->type & QEDE_FASTPATH_RX) {
2091 rc = edev->ops->q_rx_stop(cdev, i, fp->rxq->handle);
2092 if (rc) {
2093 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
2094 return rc;
2095 }
2096 }
2097
2098 /* Stop the XDP forwarding queue */
2099 if (fp->type & QEDE_FASTPATH_XDP) {
2100 rc = qede_stop_txq(edev, fp->xdp_tx, i);
2101 if (rc)
2102 return rc;
2103
2104 bpf_prog_put(fp->rxq->xdp_prog);
2105 }
2106 }
2107
2108 /* Stop the vport */
2109 rc = edev->ops->vport_stop(cdev, 0);
2110 if (rc)
2111 DP_ERR(edev, "Failed to stop VPORT\n");
2112
2113 return rc;
2114 }
2115
qede_start_txq(struct qede_dev *edev, struct qede_fastpath *fp, struct qede_tx_queue *txq, u8 rss_id, u16 sb_idx)2116 static int qede_start_txq(struct qede_dev *edev,
2117 struct qede_fastpath *fp,
2118 struct qede_tx_queue *txq, u8 rss_id, u16 sb_idx)
2119 {
2120 dma_addr_t phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl);
2121 u32 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl);
2122 struct qed_queue_start_common_params params;
2123 struct qed_txq_start_ret_params ret_params;
2124 int rc;
2125
2126 memset(¶ms, 0, sizeof(params));
2127 memset(&ret_params, 0, sizeof(ret_params));
2128
2129 /* Let the XDP queue share the queue-zone with one of the regular txq.
2130 * We don't really care about its coalescing.
2131 */
2132 if (txq->is_xdp)
2133 params.queue_id = QEDE_TXQ_XDP_TO_IDX(edev, txq);
2134 else
2135 params.queue_id = txq->index;
2136
2137 params.p_sb = fp->sb_info;
2138 params.sb_idx = sb_idx;
2139 params.tc = txq->cos;
2140
2141 rc = edev->ops->q_tx_start(edev->cdev, rss_id, ¶ms, phys_table,
2142 page_cnt, &ret_params);
2143 if (rc) {
2144 DP_ERR(edev, "Start TXQ #%d failed %d\n", txq->index, rc);
2145 return rc;
2146 }
2147
2148 txq->doorbell_addr = ret_params.p_doorbell;
2149 txq->handle = ret_params.p_handle;
2150
2151 /* Determine the FW consumer address associated */
2152 txq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[sb_idx];
2153
2154 /* Prepare the doorbell parameters */
2155 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_DEST, DB_DEST_XCM);
2156 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
2157 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_VAL_SEL,
2158 DQ_XCM_ETH_TX_BD_PROD_CMD);
2159 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
2160
2161 /* register doorbell with doorbell recovery mechanism */
2162 rc = edev->ops->common->db_recovery_add(edev->cdev, txq->doorbell_addr,
2163 &txq->tx_db, DB_REC_WIDTH_32B,
2164 DB_REC_KERNEL);
2165
2166 return rc;
2167 }
2168
qede_start_queues(struct qede_dev *edev, bool clear_stats)2169 static int qede_start_queues(struct qede_dev *edev, bool clear_stats)
2170 {
2171 int vlan_removal_en = 1;
2172 struct qed_dev *cdev = edev->cdev;
2173 struct qed_dev_info *qed_info = &edev->dev_info.common;
2174 struct qed_update_vport_params *vport_update_params;
2175 struct qed_queue_start_common_params q_params;
2176 struct qed_start_vport_params start = {0};
2177 int rc, i;
2178
2179 if (!edev->num_queues) {
2180 DP_ERR(edev,
2181 "Cannot update V-VPORT as active as there are no Rx queues\n");
2182 return -EINVAL;
2183 }
2184
2185 vport_update_params = vzalloc(sizeof(*vport_update_params));
2186 if (!vport_update_params)
2187 return -ENOMEM;
2188
2189 start.handle_ptp_pkts = !!(edev->ptp);
2190 start.gro_enable = !edev->gro_disable;
2191 start.mtu = edev->ndev->mtu;
2192 start.vport_id = 0;
2193 start.drop_ttl0 = true;
2194 start.remove_inner_vlan = vlan_removal_en;
2195 start.clear_stats = clear_stats;
2196
2197 rc = edev->ops->vport_start(cdev, &start);
2198
2199 if (rc) {
2200 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
2201 goto out;
2202 }
2203
2204 DP_VERBOSE(edev, NETIF_MSG_IFUP,
2205 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
2206 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
2207
2208 for_each_queue(i) {
2209 struct qede_fastpath *fp = &edev->fp_array[i];
2210 dma_addr_t p_phys_table;
2211 u32 page_cnt;
2212
2213 if (fp->type & QEDE_FASTPATH_RX) {
2214 struct qed_rxq_start_ret_params ret_params;
2215 struct qede_rx_queue *rxq = fp->rxq;
2216 __le16 *val;
2217
2218 memset(&ret_params, 0, sizeof(ret_params));
2219 memset(&q_params, 0, sizeof(q_params));
2220 q_params.queue_id = rxq->rxq_id;
2221 q_params.vport_id = 0;
2222 q_params.p_sb = fp->sb_info;
2223 q_params.sb_idx = RX_PI;
2224
2225 p_phys_table =
2226 qed_chain_get_pbl_phys(&rxq->rx_comp_ring);
2227 page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring);
2228
2229 rc = edev->ops->q_rx_start(cdev, i, &q_params,
2230 rxq->rx_buf_size,
2231 rxq->rx_bd_ring.p_phys_addr,
2232 p_phys_table,
2233 page_cnt, &ret_params);
2234 if (rc) {
2235 DP_ERR(edev, "Start RXQ #%d failed %d\n", i,
2236 rc);
2237 goto out;
2238 }
2239
2240 /* Use the return parameters */
2241 rxq->hw_rxq_prod_addr = ret_params.p_prod;
2242 rxq->handle = ret_params.p_handle;
2243
2244 val = &fp->sb_info->sb_virt->pi_array[RX_PI];
2245 rxq->hw_cons_ptr = val;
2246
2247 qede_update_rx_prod(edev, rxq);
2248 }
2249
2250 if (fp->type & QEDE_FASTPATH_XDP) {
2251 rc = qede_start_txq(edev, fp, fp->xdp_tx, i, XDP_PI);
2252 if (rc)
2253 goto out;
2254
2255 bpf_prog_add(edev->xdp_prog, 1);
2256 fp->rxq->xdp_prog = edev->xdp_prog;
2257 }
2258
2259 if (fp->type & QEDE_FASTPATH_TX) {
2260 int cos;
2261
2262 for_each_cos_in_txq(edev, cos) {
2263 rc = qede_start_txq(edev, fp, &fp->txq[cos], i,
2264 TX_PI(cos));
2265 if (rc)
2266 goto out;
2267 }
2268 }
2269 }
2270
2271 /* Prepare and send the vport enable */
2272 vport_update_params->vport_id = start.vport_id;
2273 vport_update_params->update_vport_active_flg = 1;
2274 vport_update_params->vport_active_flg = 1;
2275
2276 if ((qed_info->b_inter_pf_switch || pci_num_vf(edev->pdev)) &&
2277 qed_info->tx_switching) {
2278 vport_update_params->update_tx_switching_flg = 1;
2279 vport_update_params->tx_switching_flg = 1;
2280 }
2281
2282 qede_fill_rss_params(edev, &vport_update_params->rss_params,
2283 &vport_update_params->update_rss_flg);
2284
2285 rc = edev->ops->vport_update(cdev, vport_update_params);
2286 if (rc)
2287 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
2288
2289 out:
2290 vfree(vport_update_params);
2291 return rc;
2292 }
2293
2294 enum qede_unload_mode {
2295 QEDE_UNLOAD_NORMAL,
2296 QEDE_UNLOAD_RECOVERY,
2297 };
2298
qede_unload(struct qede_dev *edev, enum qede_unload_mode mode, bool is_locked)2299 static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode,
2300 bool is_locked)
2301 {
2302 struct qed_link_params link_params;
2303 int rc;
2304
2305 DP_INFO(edev, "Starting qede unload\n");
2306
2307 if (!is_locked)
2308 __qede_lock(edev);
2309
2310 clear_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags);
2311
2312 if (mode != QEDE_UNLOAD_RECOVERY)
2313 edev->state = QEDE_STATE_CLOSED;
2314
2315 qede_rdma_dev_event_close(edev);
2316
2317 /* Close OS Tx */
2318 netif_tx_disable(edev->ndev);
2319 netif_carrier_off(edev->ndev);
2320
2321 if (mode != QEDE_UNLOAD_RECOVERY) {
2322 /* Reset the link */
2323 memset(&link_params, 0, sizeof(link_params));
2324 link_params.link_up = false;
2325 edev->ops->common->set_link(edev->cdev, &link_params);
2326
2327 rc = qede_stop_queues(edev);
2328 if (rc) {
2329 qede_sync_free_irqs(edev);
2330 goto out;
2331 }
2332
2333 DP_INFO(edev, "Stopped Queues\n");
2334 }
2335
2336 qede_vlan_mark_nonconfigured(edev);
2337 edev->ops->fastpath_stop(edev->cdev);
2338
2339 if (edev->dev_info.common.b_arfs_capable) {
2340 qede_poll_for_freeing_arfs_filters(edev);
2341 qede_free_arfs(edev);
2342 }
2343
2344 /* Release the interrupts */
2345 qede_sync_free_irqs(edev);
2346 edev->ops->common->set_fp_int(edev->cdev, 0);
2347
2348 qede_napi_disable_remove(edev);
2349
2350 if (mode == QEDE_UNLOAD_RECOVERY)
2351 qede_empty_tx_queues(edev);
2352
2353 qede_free_mem_load(edev);
2354 qede_free_fp_array(edev);
2355
2356 out:
2357 if (!is_locked)
2358 __qede_unlock(edev);
2359
2360 if (mode != QEDE_UNLOAD_RECOVERY)
2361 DP_NOTICE(edev, "Link is down\n");
2362
2363 edev->ptp_skip_txts = 0;
2364
2365 DP_INFO(edev, "Ending qede unload\n");
2366 }
2367
2368 enum qede_load_mode {
2369 QEDE_LOAD_NORMAL,
2370 QEDE_LOAD_RELOAD,
2371 QEDE_LOAD_RECOVERY,
2372 };
2373
qede_load(struct qede_dev *edev, enum qede_load_mode mode, bool is_locked)2374 static int qede_load(struct qede_dev *edev, enum qede_load_mode mode,
2375 bool is_locked)
2376 {
2377 struct qed_link_params link_params;
2378 u8 num_tc;
2379 int rc;
2380
2381 DP_INFO(edev, "Starting qede load\n");
2382
2383 if (!is_locked)
2384 __qede_lock(edev);
2385
2386 rc = qede_set_num_queues(edev);
2387 if (rc)
2388 goto out;
2389
2390 rc = qede_alloc_fp_array(edev);
2391 if (rc)
2392 goto out;
2393
2394 qede_init_fp(edev);
2395
2396 rc = qede_alloc_mem_load(edev);
2397 if (rc)
2398 goto err1;
2399 DP_INFO(edev, "Allocated %d Rx, %d Tx queues\n",
2400 QEDE_RSS_COUNT(edev), QEDE_TSS_COUNT(edev));
2401
2402 rc = qede_set_real_num_queues(edev);
2403 if (rc)
2404 goto err2;
2405
2406 if (qede_alloc_arfs(edev)) {
2407 edev->ndev->features &= ~NETIF_F_NTUPLE;
2408 edev->dev_info.common.b_arfs_capable = false;
2409 }
2410
2411 qede_napi_add_enable(edev);
2412 DP_INFO(edev, "Napi added and enabled\n");
2413
2414 rc = qede_setup_irqs(edev);
2415 if (rc)
2416 goto err3;
2417 DP_INFO(edev, "Setup IRQs succeeded\n");
2418
2419 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD);
2420 if (rc)
2421 goto err4;
2422 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
2423
2424 num_tc = netdev_get_num_tc(edev->ndev);
2425 num_tc = num_tc ? num_tc : edev->dev_info.num_tc;
2426 qede_setup_tc(edev->ndev, num_tc);
2427
2428 /* Program un-configured VLANs */
2429 qede_configure_vlan_filters(edev);
2430
2431 set_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags);
2432
2433 /* Ask for link-up using current configuration */
2434 memset(&link_params, 0, sizeof(link_params));
2435 link_params.link_up = true;
2436 edev->ops->common->set_link(edev->cdev, &link_params);
2437
2438 edev->state = QEDE_STATE_OPEN;
2439
2440 DP_INFO(edev, "Ending successfully qede load\n");
2441
2442 goto out;
2443 err4:
2444 qede_sync_free_irqs(edev);
2445 err3:
2446 qede_napi_disable_remove(edev);
2447 err2:
2448 qede_free_mem_load(edev);
2449 err1:
2450 edev->ops->common->set_fp_int(edev->cdev, 0);
2451 qede_free_fp_array(edev);
2452 edev->num_queues = 0;
2453 edev->fp_num_tx = 0;
2454 edev->fp_num_rx = 0;
2455 out:
2456 if (!is_locked)
2457 __qede_unlock(edev);
2458
2459 return rc;
2460 }
2461
2462 /* 'func' should be able to run between unload and reload assuming interface
2463 * is actually running, or afterwards in case it's currently DOWN.
2464 */
qede_reload(struct qede_dev *edev, struct qede_reload_args *args, bool is_locked)2465 void qede_reload(struct qede_dev *edev,
2466 struct qede_reload_args *args, bool is_locked)
2467 {
2468 if (!is_locked)
2469 __qede_lock(edev);
2470
2471 /* Since qede_lock is held, internal state wouldn't change even
2472 * if netdev state would start transitioning. Check whether current
2473 * internal configuration indicates device is up, then reload.
2474 */
2475 if (edev->state == QEDE_STATE_OPEN) {
2476 qede_unload(edev, QEDE_UNLOAD_NORMAL, true);
2477 if (args)
2478 args->func(edev, args);
2479 qede_load(edev, QEDE_LOAD_RELOAD, true);
2480
2481 /* Since no one is going to do it for us, re-configure */
2482 qede_config_rx_mode(edev->ndev);
2483 } else if (args) {
2484 args->func(edev, args);
2485 }
2486
2487 if (!is_locked)
2488 __qede_unlock(edev);
2489 }
2490
2491 /* called with rtnl_lock */
qede_open(struct net_device *ndev)2492 static int qede_open(struct net_device *ndev)
2493 {
2494 struct qede_dev *edev = netdev_priv(ndev);
2495 int rc;
2496
2497 netif_carrier_off(ndev);
2498
2499 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
2500
2501 rc = qede_load(edev, QEDE_LOAD_NORMAL, false);
2502 if (rc)
2503 return rc;
2504
2505 udp_tunnel_nic_reset_ntf(ndev);
2506
2507 edev->ops->common->update_drv_state(edev->cdev, true);
2508
2509 return 0;
2510 }
2511
qede_close(struct net_device *ndev)2512 static int qede_close(struct net_device *ndev)
2513 {
2514 struct qede_dev *edev = netdev_priv(ndev);
2515
2516 qede_unload(edev, QEDE_UNLOAD_NORMAL, false);
2517
2518 if (edev->cdev)
2519 edev->ops->common->update_drv_state(edev->cdev, false);
2520
2521 return 0;
2522 }
2523
qede_link_update(void *dev, struct qed_link_output *link)2524 static void qede_link_update(void *dev, struct qed_link_output *link)
2525 {
2526 struct qede_dev *edev = dev;
2527
2528 if (!test_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags)) {
2529 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not ready\n");
2530 return;
2531 }
2532
2533 if (link->link_up) {
2534 if (!netif_carrier_ok(edev->ndev)) {
2535 DP_NOTICE(edev, "Link is up\n");
2536 netif_tx_start_all_queues(edev->ndev);
2537 netif_carrier_on(edev->ndev);
2538 qede_rdma_dev_event_open(edev);
2539 }
2540 } else {
2541 if (netif_carrier_ok(edev->ndev)) {
2542 DP_NOTICE(edev, "Link is down\n");
2543 netif_tx_disable(edev->ndev);
2544 netif_carrier_off(edev->ndev);
2545 qede_rdma_dev_event_close(edev);
2546 }
2547 }
2548 }
2549
qede_schedule_recovery_handler(void *dev)2550 static void qede_schedule_recovery_handler(void *dev)
2551 {
2552 struct qede_dev *edev = dev;
2553
2554 if (edev->state == QEDE_STATE_RECOVERY) {
2555 DP_NOTICE(edev,
2556 "Avoid scheduling a recovery handling since already in recovery state\n");
2557 return;
2558 }
2559
2560 set_bit(QEDE_SP_RECOVERY, &edev->sp_flags);
2561 schedule_delayed_work(&edev->sp_task, 0);
2562
2563 DP_INFO(edev, "Scheduled a recovery handler\n");
2564 }
2565
qede_recovery_failed(struct qede_dev *edev)2566 static void qede_recovery_failed(struct qede_dev *edev)
2567 {
2568 netdev_err(edev->ndev, "Recovery handling has failed. Power cycle is needed.\n");
2569
2570 netif_device_detach(edev->ndev);
2571
2572 if (edev->cdev)
2573 edev->ops->common->set_power_state(edev->cdev, PCI_D3hot);
2574 }
2575
qede_recovery_handler(struct qede_dev *edev)2576 static void qede_recovery_handler(struct qede_dev *edev)
2577 {
2578 u32 curr_state = edev->state;
2579 int rc;
2580
2581 DP_NOTICE(edev, "Starting a recovery process\n");
2582
2583 /* No need to acquire first the qede_lock since is done by qede_sp_task
2584 * before calling this function.
2585 */
2586 edev->state = QEDE_STATE_RECOVERY;
2587
2588 edev->ops->common->recovery_prolog(edev->cdev);
2589
2590 if (curr_state == QEDE_STATE_OPEN)
2591 qede_unload(edev, QEDE_UNLOAD_RECOVERY, true);
2592
2593 __qede_remove(edev->pdev, QEDE_REMOVE_RECOVERY);
2594
2595 rc = __qede_probe(edev->pdev, edev->dp_module, edev->dp_level,
2596 IS_VF(edev), QEDE_PROBE_RECOVERY);
2597 if (rc) {
2598 edev->cdev = NULL;
2599 goto err;
2600 }
2601
2602 if (curr_state == QEDE_STATE_OPEN) {
2603 rc = qede_load(edev, QEDE_LOAD_RECOVERY, true);
2604 if (rc)
2605 goto err;
2606
2607 qede_config_rx_mode(edev->ndev);
2608 udp_tunnel_nic_reset_ntf(edev->ndev);
2609 }
2610
2611 edev->state = curr_state;
2612
2613 DP_NOTICE(edev, "Recovery handling is done\n");
2614
2615 return;
2616
2617 err:
2618 qede_recovery_failed(edev);
2619 }
2620
qede_atomic_hw_err_handler(struct qede_dev *edev)2621 static void qede_atomic_hw_err_handler(struct qede_dev *edev)
2622 {
2623 struct qed_dev *cdev = edev->cdev;
2624
2625 DP_NOTICE(edev,
2626 "Generic non-sleepable HW error handling started - err_flags 0x%lx\n",
2627 edev->err_flags);
2628
2629 /* Get a call trace of the flow that led to the error */
2630 WARN_ON(test_bit(QEDE_ERR_WARN, &edev->err_flags));
2631
2632 /* Prevent HW attentions from being reasserted */
2633 if (test_bit(QEDE_ERR_ATTN_CLR_EN, &edev->err_flags))
2634 edev->ops->common->attn_clr_enable(cdev, true);
2635
2636 DP_NOTICE(edev, "Generic non-sleepable HW error handling is done\n");
2637 }
2638
qede_generic_hw_err_handler(struct qede_dev *edev)2639 static void qede_generic_hw_err_handler(struct qede_dev *edev)
2640 {
2641 DP_NOTICE(edev,
2642 "Generic sleepable HW error handling started - err_flags 0x%lx\n",
2643 edev->err_flags);
2644
2645 if (edev->devlink)
2646 edev->ops->common->report_fatal_error(edev->devlink, edev->last_err_type);
2647
2648 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags);
2649
2650 DP_NOTICE(edev, "Generic sleepable HW error handling is done\n");
2651 }
2652
qede_set_hw_err_flags(struct qede_dev *edev, enum qed_hw_err_type err_type)2653 static void qede_set_hw_err_flags(struct qede_dev *edev,
2654 enum qed_hw_err_type err_type)
2655 {
2656 unsigned long err_flags = 0;
2657
2658 switch (err_type) {
2659 case QED_HW_ERR_DMAE_FAIL:
2660 set_bit(QEDE_ERR_WARN, &err_flags);
2661 fallthrough;
2662 case QED_HW_ERR_MFW_RESP_FAIL:
2663 case QED_HW_ERR_HW_ATTN:
2664 case QED_HW_ERR_RAMROD_FAIL:
2665 case QED_HW_ERR_FW_ASSERT:
2666 set_bit(QEDE_ERR_ATTN_CLR_EN, &err_flags);
2667 set_bit(QEDE_ERR_GET_DBG_INFO, &err_flags);
2668 break;
2669
2670 default:
2671 DP_NOTICE(edev, "Unexpected HW error [%d]\n", err_type);
2672 break;
2673 }
2674
2675 edev->err_flags |= err_flags;
2676 }
2677
qede_schedule_hw_err_handler(void *dev, enum qed_hw_err_type err_type)2678 static void qede_schedule_hw_err_handler(void *dev,
2679 enum qed_hw_err_type err_type)
2680 {
2681 struct qede_dev *edev = dev;
2682
2683 /* Fan failure cannot be masked by handling of another HW error or by a
2684 * concurrent recovery process.
2685 */
2686 if ((test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) ||
2687 edev->state == QEDE_STATE_RECOVERY) &&
2688 err_type != QED_HW_ERR_FAN_FAIL) {
2689 DP_INFO(edev,
2690 "Avoid scheduling an error handling while another HW error is being handled\n");
2691 return;
2692 }
2693
2694 if (err_type >= QED_HW_ERR_LAST) {
2695 DP_NOTICE(edev, "Unknown HW error [%d]\n", err_type);
2696 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags);
2697 return;
2698 }
2699
2700 edev->last_err_type = err_type;
2701 qede_set_hw_err_flags(edev, err_type);
2702 qede_atomic_hw_err_handler(edev);
2703 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags);
2704 schedule_delayed_work(&edev->sp_task, 0);
2705
2706 DP_INFO(edev, "Scheduled a error handler [err_type %d]\n", err_type);
2707 }
2708
qede_is_txq_full(struct qede_dev *edev, struct qede_tx_queue *txq)2709 static bool qede_is_txq_full(struct qede_dev *edev, struct qede_tx_queue *txq)
2710 {
2711 struct netdev_queue *netdev_txq;
2712
2713 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id);
2714 if (netif_xmit_stopped(netdev_txq))
2715 return true;
2716
2717 return false;
2718 }
2719
qede_get_generic_tlv_data(void *dev, struct qed_generic_tlvs *data)2720 static void qede_get_generic_tlv_data(void *dev, struct qed_generic_tlvs *data)
2721 {
2722 struct qede_dev *edev = dev;
2723 struct netdev_hw_addr *ha;
2724 int i;
2725
2726 if (edev->ndev->features & NETIF_F_IP_CSUM)
2727 data->feat_flags |= QED_TLV_IP_CSUM;
2728 if (edev->ndev->features & NETIF_F_TSO)
2729 data->feat_flags |= QED_TLV_LSO;
2730
2731 ether_addr_copy(data->mac[0], edev->ndev->dev_addr);
2732 eth_zero_addr(data->mac[1]);
2733 eth_zero_addr(data->mac[2]);
2734 /* Copy the first two UC macs */
2735 netif_addr_lock_bh(edev->ndev);
2736 i = 1;
2737 netdev_for_each_uc_addr(ha, edev->ndev) {
2738 ether_addr_copy(data->mac[i++], ha->addr);
2739 if (i == QED_TLV_MAC_COUNT)
2740 break;
2741 }
2742
2743 netif_addr_unlock_bh(edev->ndev);
2744 }
2745
qede_get_eth_tlv_data(void *dev, void *data)2746 static void qede_get_eth_tlv_data(void *dev, void *data)
2747 {
2748 struct qed_mfw_tlv_eth *etlv = data;
2749 struct qede_dev *edev = dev;
2750 struct qede_fastpath *fp;
2751 int i;
2752
2753 etlv->lso_maxoff_size = 0XFFFF;
2754 etlv->lso_maxoff_size_set = true;
2755 etlv->lso_minseg_size = (u16)ETH_TX_LSO_WINDOW_MIN_LEN;
2756 etlv->lso_minseg_size_set = true;
2757 etlv->prom_mode = !!(edev->ndev->flags & IFF_PROMISC);
2758 etlv->prom_mode_set = true;
2759 etlv->tx_descr_size = QEDE_TSS_COUNT(edev);
2760 etlv->tx_descr_size_set = true;
2761 etlv->rx_descr_size = QEDE_RSS_COUNT(edev);
2762 etlv->rx_descr_size_set = true;
2763 etlv->iov_offload = QED_MFW_TLV_IOV_OFFLOAD_VEB;
2764 etlv->iov_offload_set = true;
2765
2766 /* Fill information regarding queues; Should be done under the qede
2767 * lock to guarantee those don't change beneath our feet.
2768 */
2769 etlv->txqs_empty = true;
2770 etlv->rxqs_empty = true;
2771 etlv->num_txqs_full = 0;
2772 etlv->num_rxqs_full = 0;
2773
2774 __qede_lock(edev);
2775 for_each_queue(i) {
2776 fp = &edev->fp_array[i];
2777 if (fp->type & QEDE_FASTPATH_TX) {
2778 struct qede_tx_queue *txq = QEDE_FP_TC0_TXQ(fp);
2779
2780 if (txq->sw_tx_cons != txq->sw_tx_prod)
2781 etlv->txqs_empty = false;
2782 if (qede_is_txq_full(edev, txq))
2783 etlv->num_txqs_full++;
2784 }
2785 if (fp->type & QEDE_FASTPATH_RX) {
2786 if (qede_has_rx_work(fp->rxq))
2787 etlv->rxqs_empty = false;
2788
2789 /* This one is a bit tricky; Firmware might stop
2790 * placing packets if ring is not yet full.
2791 * Give an approximation.
2792 */
2793 if (le16_to_cpu(*fp->rxq->hw_cons_ptr) -
2794 qed_chain_get_cons_idx(&fp->rxq->rx_comp_ring) >
2795 RX_RING_SIZE - 100)
2796 etlv->num_rxqs_full++;
2797 }
2798 }
2799 __qede_unlock(edev);
2800
2801 etlv->txqs_empty_set = true;
2802 etlv->rxqs_empty_set = true;
2803 etlv->num_txqs_full_set = true;
2804 etlv->num_rxqs_full_set = true;
2805 }
2806
2807 /**
2808 * qede_io_error_detected - called when PCI error is detected
2809 * @pdev: Pointer to PCI device
2810 * @state: The current pci connection state
2811 *
2812 * This function is called after a PCI bus error affecting
2813 * this device has been detected.
2814 */
2815 static pci_ers_result_t
qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)2816 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
2817 {
2818 struct net_device *dev = pci_get_drvdata(pdev);
2819 struct qede_dev *edev = netdev_priv(dev);
2820
2821 if (!edev)
2822 return PCI_ERS_RESULT_NONE;
2823
2824 DP_NOTICE(edev, "IO error detected [%d]\n", state);
2825
2826 __qede_lock(edev);
2827 if (edev->state == QEDE_STATE_RECOVERY) {
2828 DP_NOTICE(edev, "Device already in the recovery state\n");
2829 __qede_unlock(edev);
2830 return PCI_ERS_RESULT_NONE;
2831 }
2832
2833 /* PF handles the recovery of its VFs */
2834 if (IS_VF(edev)) {
2835 DP_VERBOSE(edev, QED_MSG_IOV,
2836 "VF recovery is handled by its PF\n");
2837 __qede_unlock(edev);
2838 return PCI_ERS_RESULT_RECOVERED;
2839 }
2840
2841 /* Close OS Tx */
2842 netif_tx_disable(edev->ndev);
2843 netif_carrier_off(edev->ndev);
2844
2845 set_bit(QEDE_SP_AER, &edev->sp_flags);
2846 schedule_delayed_work(&edev->sp_task, 0);
2847
2848 __qede_unlock(edev);
2849
2850 return PCI_ERS_RESULT_CAN_RECOVER;
2851 }
2852