1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * A V4L2 driver for Sony IMX219 cameras.
4 * Copyright (C) 2019, Raspberry Pi (Trading) Ltd
5 *
6 * Based on Sony imx258 camera driver
7 * Copyright (C) 2018 Intel Corporation
8 *
9 * DT / fwnode changes, and regulator / GPIO control taken from imx214 driver
10 * Copyright 2018 Qtechnology A/S
11 *
12 * Flip handling taken from the Sony IMX319 driver.
13 * Copyright (C) 2018 Intel Corporation
14 *
15 */
16
17 #include <linux/clk.h>
18 #include <linux/delay.h>
19 #include <linux/gpio/consumer.h>
20 #include <linux/i2c.h>
21 #include <linux/module.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/regulator/consumer.h>
24 #include <media/v4l2-ctrls.h>
25 #include <media/v4l2-device.h>
26 #include <media/v4l2-event.h>
27 #include <media/v4l2-fwnode.h>
28 #include <media/v4l2-mediabus.h>
29 #include <asm/unaligned.h>
30
31 #define IMX219_REG_VALUE_08BIT 1
32 #define IMX219_REG_VALUE_16BIT 2
33
34 #define IMX219_REG_MODE_SELECT 0x0100
35 #define IMX219_MODE_STANDBY 0x00
36 #define IMX219_MODE_STREAMING 0x01
37
38 /* Chip ID */
39 #define IMX219_REG_CHIP_ID 0x0000
40 #define IMX219_CHIP_ID 0x0219
41
42 /* External clock frequency is 24.0M */
43 #define IMX219_XCLK_FREQ 24000000
44
45 /* Pixel rate is fixed at 182.4M for all the modes */
46 #define IMX219_PIXEL_RATE 182400000
47
48 #define IMX219_DEFAULT_LINK_FREQ 456000000
49
50 /* V_TIMING internal */
51 #define IMX219_REG_VTS 0x0160
52 #define IMX219_VTS_15FPS 0x0dc6
53 #define IMX219_VTS_30FPS_1080P 0x06e3
54 #define IMX219_VTS_30FPS_BINNED 0x06e3
55 #define IMX219_VTS_30FPS_640x480 0x06e3
56 #define IMX219_VTS_MAX 0xffff
57
58 #define IMX219_VBLANK_MIN 4
59
60 /*Frame Length Line*/
61 #define IMX219_FLL_MIN 0x08a6
62 #define IMX219_FLL_MAX 0xffff
63 #define IMX219_FLL_STEP 1
64 #define IMX219_FLL_DEFAULT 0x0c98
65
66 /* HBLANK control - read only */
67 #define IMX219_PPL_DEFAULT 3448
68
69 /* Exposure control */
70 #define IMX219_REG_EXPOSURE 0x015a
71 #define IMX219_EXPOSURE_MIN 4
72 #define IMX219_EXPOSURE_STEP 1
73 #define IMX219_EXPOSURE_DEFAULT 0x640
74 #define IMX219_EXPOSURE_MAX 65535
75
76 /* Analog gain control */
77 #define IMX219_REG_ANALOG_GAIN 0x0157
78 #define IMX219_ANA_GAIN_MIN 0
79 #define IMX219_ANA_GAIN_MAX 232
80 #define IMX219_ANA_GAIN_STEP 1
81 #define IMX219_ANA_GAIN_DEFAULT 0x0
82
83 /* Digital gain control */
84 #define IMX219_REG_DIGITAL_GAIN 0x0158
85 #define IMX219_DGTL_GAIN_MIN 0x0100
86 #define IMX219_DGTL_GAIN_MAX 0x0fff
87 #define IMX219_DGTL_GAIN_DEFAULT 0x0100
88 #define IMX219_DGTL_GAIN_STEP 1
89
90 #define IMX219_REG_ORIENTATION 0x0172
91
92 /* Binning Mode */
93 #define IMX219_REG_BINNING_MODE 0x0174
94 #define IMX219_BINNING_NONE 0x0000
95 #define IMX219_BINNING_2X2 0x0101
96 #define IMX219_BINNING_2X2_ANALOG 0x0303
97
98 /* Test Pattern Control */
99 #define IMX219_REG_TEST_PATTERN 0x0600
100 #define IMX219_TEST_PATTERN_DISABLE 0
101 #define IMX219_TEST_PATTERN_SOLID_COLOR 1
102 #define IMX219_TEST_PATTERN_COLOR_BARS 2
103 #define IMX219_TEST_PATTERN_GREY_COLOR 3
104 #define IMX219_TEST_PATTERN_PN9 4
105
106 /* Test pattern colour components */
107 #define IMX219_REG_TESTP_RED 0x0602
108 #define IMX219_REG_TESTP_GREENR 0x0604
109 #define IMX219_REG_TESTP_BLUE 0x0606
110 #define IMX219_REG_TESTP_GREENB 0x0608
111 #define IMX219_TESTP_COLOUR_MIN 0
112 #define IMX219_TESTP_COLOUR_MAX 0x03ff
113 #define IMX219_TESTP_COLOUR_STEP 1
114 #define IMX219_TESTP_RED_DEFAULT IMX219_TESTP_COLOUR_MAX
115 #define IMX219_TESTP_GREENR_DEFAULT 0
116 #define IMX219_TESTP_BLUE_DEFAULT 0
117 #define IMX219_TESTP_GREENB_DEFAULT 0
118
119 /* IMX219 native and active pixel array size. */
120 #define IMX219_NATIVE_WIDTH 3296U
121 #define IMX219_NATIVE_HEIGHT 2480U
122 #define IMX219_PIXEL_ARRAY_LEFT 8U
123 #define IMX219_PIXEL_ARRAY_TOP 8U
124 #define IMX219_PIXEL_ARRAY_WIDTH 3280U
125 #define IMX219_PIXEL_ARRAY_HEIGHT 2464U
126
127 struct imx219_reg {
128 u16 address;
129 u8 val;
130 };
131
132 struct imx219_reg_list {
133 unsigned int num_of_regs;
134 const struct imx219_reg *regs;
135 };
136
137 /* Mode : resolution and related config&values */
138 struct imx219_mode {
139 /* Frame width */
140 unsigned int width;
141 /* Frame height */
142 unsigned int height;
143
144 /* Analog crop rectangle. */
145 struct v4l2_rect crop;
146
147 /* V-timing */
148 unsigned int vts_def;
149
150 /* Default register values */
151 struct imx219_reg_list reg_list;
152
153 /* 2x2 binning is used */
154 bool binning;
155 };
156
157 static const struct imx219_reg imx219_common_regs[] = {
158 {0x0100, 0x00}, /* Mode Select */
159
160 /* To Access Addresses 3000-5fff, send the following commands */
161 {0x30eb, 0x0c},
162 {0x30eb, 0x05},
163 {0x300a, 0xff},
164 {0x300b, 0xff},
165 {0x30eb, 0x05},
166 {0x30eb, 0x09},
167
168 /* PLL Clock Table */
169 {0x0301, 0x05}, /* VTPXCK_DIV */
170 {0x0303, 0x01}, /* VTSYSCK_DIV */
171 {0x0304, 0x03}, /* PREPLLCK_VT_DIV 0x03 = AUTO set */
172 {0x0305, 0x03}, /* PREPLLCK_OP_DIV 0x03 = AUTO set */
173 {0x0306, 0x00}, /* PLL_VT_MPY */
174 {0x0307, 0x39},
175 {0x030b, 0x01}, /* OP_SYS_CLK_DIV */
176 {0x030c, 0x00}, /* PLL_OP_MPY */
177 {0x030d, 0x72},
178
179 /* Undocumented registers */
180 {0x455e, 0x00},
181 {0x471e, 0x4b},
182 {0x4767, 0x0f},
183 {0x4750, 0x14},
184 {0x4540, 0x00},
185 {0x47b4, 0x14},
186 {0x4713, 0x30},
187 {0x478b, 0x10},
188 {0x478f, 0x10},
189 {0x4793, 0x10},
190 {0x4797, 0x0e},
191 {0x479b, 0x0e},
192
193 /* Frame Bank Register Group "A" */
194 {0x0162, 0x0d}, /* Line_Length_A */
195 {0x0163, 0x78},
196 {0x0170, 0x01}, /* X_ODD_INC_A */
197 {0x0171, 0x01}, /* Y_ODD_INC_A */
198
199 /* Output setup registers */
200 {0x0114, 0x01}, /* CSI 2-Lane Mode */
201 {0x0128, 0x00}, /* DPHY Auto Mode */
202 {0x012a, 0x18}, /* EXCK_Freq */
203 {0x012b, 0x00},
204 };
205
206 /*
207 * Register sets lifted off the i2C interface from the Raspberry Pi firmware
208 * driver.
209 * 3280x2464 = mode 2, 1920x1080 = mode 1, 1640x1232 = mode 4, 640x480 = mode 7.
210 */
211 static const struct imx219_reg mode_3280x2464_regs[] = {
212 {0x0164, 0x00},
213 {0x0165, 0x00},
214 {0x0166, 0x0c},
215 {0x0167, 0xcf},
216 {0x0168, 0x00},
217 {0x0169, 0x00},
218 {0x016a, 0x09},
219 {0x016b, 0x9f},
220 {0x016c, 0x0c},
221 {0x016d, 0xd0},
222 {0x016e, 0x09},
223 {0x016f, 0xa0},
224 {0x0624, 0x0c},
225 {0x0625, 0xd0},
226 {0x0626, 0x09},
227 {0x0627, 0xa0},
228 };
229
230 static const struct imx219_reg mode_1920_1080_regs[] = {
231 {0x0164, 0x02},
232 {0x0165, 0xa8},
233 {0x0166, 0x0a},
234 {0x0167, 0x27},
235 {0x0168, 0x02},
236 {0x0169, 0xb4},
237 {0x016a, 0x06},
238 {0x016b, 0xeb},
239 {0x016c, 0x07},
240 {0x016d, 0x80},
241 {0x016e, 0x04},
242 {0x016f, 0x38},
243 {0x0624, 0x07},
244 {0x0625, 0x80},
245 {0x0626, 0x04},
246 {0x0627, 0x38},
247 };
248
249 static const struct imx219_reg mode_1640_1232_regs[] = {
250 {0x0164, 0x00},
251 {0x0165, 0x00},
252 {0x0166, 0x0c},
253 {0x0167, 0xcf},
254 {0x0168, 0x00},
255 {0x0169, 0x00},
256 {0x016a, 0x09},
257 {0x016b, 0x9f},
258 {0x016c, 0x06},
259 {0x016d, 0x68},
260 {0x016e, 0x04},
261 {0x016f, 0xd0},
262 {0x0624, 0x06},
263 {0x0625, 0x68},
264 {0x0626, 0x04},
265 {0x0627, 0xd0},
266 };
267
268 static const struct imx219_reg mode_640_480_regs[] = {
269 {0x0164, 0x03},
270 {0x0165, 0xe8},
271 {0x0166, 0x08},
272 {0x0167, 0xe7},
273 {0x0168, 0x02},
274 {0x0169, 0xf0},
275 {0x016a, 0x06},
276 {0x016b, 0xaf},
277 {0x016c, 0x02},
278 {0x016d, 0x80},
279 {0x016e, 0x01},
280 {0x016f, 0xe0},
281 {0x0624, 0x06},
282 {0x0625, 0x68},
283 {0x0626, 0x04},
284 {0x0627, 0xd0},
285 };
286
287 static const struct imx219_reg raw8_framefmt_regs[] = {
288 {0x018c, 0x08},
289 {0x018d, 0x08},
290 {0x0309, 0x08},
291 };
292
293 static const struct imx219_reg raw10_framefmt_regs[] = {
294 {0x018c, 0x0a},
295 {0x018d, 0x0a},
296 {0x0309, 0x0a},
297 };
298
299 static const char * const imx219_test_pattern_menu[] = {
300 "Disabled",
301 "Color Bars",
302 "Solid Color",
303 "Grey Color Bars",
304 "PN9"
305 };
306
307 static const int imx219_test_pattern_val[] = {
308 IMX219_TEST_PATTERN_DISABLE,
309 IMX219_TEST_PATTERN_COLOR_BARS,
310 IMX219_TEST_PATTERN_SOLID_COLOR,
311 IMX219_TEST_PATTERN_GREY_COLOR,
312 IMX219_TEST_PATTERN_PN9,
313 };
314
315 /* regulator supplies */
316 static const char * const imx219_supply_name[] = {
317 /* Supplies can be enabled in any order */
318 "VANA", /* Analog (2.8V) supply */
319 "VDIG", /* Digital Core (1.8V) supply */
320 "VDDL", /* IF (1.2V) supply */
321 };
322
323 #define IMX219_NUM_SUPPLIES ARRAY_SIZE(imx219_supply_name)
324
325 /*
326 * The supported formats.
327 * This table MUST contain 4 entries per format, to cover the various flip
328 * combinations in the order
329 * - no flip
330 * - h flip
331 * - v flip
332 * - h&v flips
333 */
334 static const u32 codes[] = {
335 MEDIA_BUS_FMT_SRGGB10_1X10,
336 MEDIA_BUS_FMT_SGRBG10_1X10,
337 MEDIA_BUS_FMT_SGBRG10_1X10,
338 MEDIA_BUS_FMT_SBGGR10_1X10,
339
340 MEDIA_BUS_FMT_SRGGB8_1X8,
341 MEDIA_BUS_FMT_SGRBG8_1X8,
342 MEDIA_BUS_FMT_SGBRG8_1X8,
343 MEDIA_BUS_FMT_SBGGR8_1X8,
344 };
345
346 /*
347 * Initialisation delay between XCLR low->high and the moment when the sensor
348 * can start capture (i.e. can leave software stanby) must be not less than:
349 * t4 + max(t5, t6 + <time to initialize the sensor register over I2C>)
350 * where
351 * t4 is fixed, and is max 200uS,
352 * t5 is fixed, and is 6000uS,
353 * t6 depends on the sensor external clock, and is max 32000 clock periods.
354 * As per sensor datasheet, the external clock must be from 6MHz to 27MHz.
355 * So for any acceptable external clock t6 is always within the range of
356 * 1185 to 5333 uS, and is always less than t5.
357 * For this reason this is always safe to wait (t4 + t5) = 6200 uS, then
358 * initialize the sensor over I2C, and then exit the software standby.
359 *
360 * This start-up time can be optimized a bit more, if we start the writes
361 * over I2C after (t4+t6), but before (t4+t5) expires. But then sensor
362 * initialization over I2C may complete before (t4+t5) expires, and we must
363 * ensure that capture is not started before (t4+t5).
364 *
365 * This delay doesn't account for the power supply startup time. If needed,
366 * this should be taken care of via the regulator framework. E.g. in the
367 * case of DT for regulator-fixed one should define the startup-delay-us
368 * property.
369 */
370 #define IMX219_XCLR_MIN_DELAY_US 6200
371 #define IMX219_XCLR_DELAY_RANGE_US 1000
372
373 /* Mode configs */
374 static const struct imx219_mode supported_modes[] = {
375 {
376 /* 8MPix 15fps mode */
377 .width = 3280,
378 .height = 2464,
379 .crop = {
380 .left = IMX219_PIXEL_ARRAY_LEFT,
381 .top = IMX219_PIXEL_ARRAY_TOP,
382 .width = 3280,
383 .height = 2464
384 },
385 .vts_def = IMX219_VTS_15FPS,
386 .reg_list = {
387 .num_of_regs = ARRAY_SIZE(mode_3280x2464_regs),
388 .regs = mode_3280x2464_regs,
389 },
390 .binning = false,
391 },
392 {
393 /* 1080P 30fps cropped */
394 .width = 1920,
395 .height = 1080,
396 .crop = {
397 .left = 688,
398 .top = 700,
399 .width = 1920,
400 .height = 1080
401 },
402 .vts_def = IMX219_VTS_30FPS_1080P,
403 .reg_list = {
404 .num_of_regs = ARRAY_SIZE(mode_1920_1080_regs),
405 .regs = mode_1920_1080_regs,
406 },
407 .binning = false,
408 },
409 {
410 /* 2x2 binned 30fps mode */
411 .width = 1640,
412 .height = 1232,
413 .crop = {
414 .left = IMX219_PIXEL_ARRAY_LEFT,
415 .top = IMX219_PIXEL_ARRAY_TOP,
416 .width = 3280,
417 .height = 2464
418 },
419 .vts_def = IMX219_VTS_30FPS_BINNED,
420 .reg_list = {
421 .num_of_regs = ARRAY_SIZE(mode_1640_1232_regs),
422 .regs = mode_1640_1232_regs,
423 },
424 .binning = true,
425 },
426 {
427 /* 640x480 30fps mode */
428 .width = 640,
429 .height = 480,
430 .crop = {
431 .left = 1008,
432 .top = 760,
433 .width = 1280,
434 .height = 960
435 },
436 .vts_def = IMX219_VTS_30FPS_640x480,
437 .reg_list = {
438 .num_of_regs = ARRAY_SIZE(mode_640_480_regs),
439 .regs = mode_640_480_regs,
440 },
441 .binning = true,
442 },
443 };
444
445 struct imx219 {
446 struct v4l2_subdev sd;
447 struct media_pad pad;
448
449 struct v4l2_mbus_framefmt fmt;
450
451 struct clk *xclk; /* system clock to IMX219 */
452 u32 xclk_freq;
453
454 struct gpio_desc *reset_gpio;
455 struct regulator_bulk_data supplies[IMX219_NUM_SUPPLIES];
456
457 struct v4l2_ctrl_handler ctrl_handler;
458 /* V4L2 Controls */
459 struct v4l2_ctrl *pixel_rate;
460 struct v4l2_ctrl *exposure;
461 struct v4l2_ctrl *vflip;
462 struct v4l2_ctrl *hflip;
463 struct v4l2_ctrl *vblank;
464 struct v4l2_ctrl *hblank;
465
466 /* Current mode */
467 const struct imx219_mode *mode;
468
469 /*
470 * Mutex for serialized access:
471 * Protect sensor module set pad format and start/stop streaming safely.
472 */
473 struct mutex mutex;
474
475 /* Streaming on/off */
476 bool streaming;
477 };
478
to_imx219(struct v4l2_subdev *_sd)479 static inline struct imx219 *to_imx219(struct v4l2_subdev *_sd)
480 {
481 return container_of(_sd, struct imx219, sd);
482 }
483
484 /* Read registers up to 2 at a time */
imx219_read_reg(struct imx219 *imx219, u16 reg, u32 len, u32 *val)485 static int imx219_read_reg(struct imx219 *imx219, u16 reg, u32 len, u32 *val)
486 {
487 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
488 struct i2c_msg msgs[2];
489 u8 addr_buf[2] = { reg >> 8, reg & 0xff };
490 u8 data_buf[4] = { 0, };
491 int ret;
492
493 if (len > 4)
494 return -EINVAL;
495
496 /* Write register address */
497 msgs[0].addr = client->addr;
498 msgs[0].flags = 0;
499 msgs[0].len = ARRAY_SIZE(addr_buf);
500 msgs[0].buf = addr_buf;
501
502 /* Read data from register */
503 msgs[1].addr = client->addr;
504 msgs[1].flags = I2C_M_RD;
505 msgs[1].len = len;
506 msgs[1].buf = &data_buf[4 - len];
507
508 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
509 if (ret != ARRAY_SIZE(msgs))
510 return -EIO;
511
512 *val = get_unaligned_be32(data_buf);
513
514 return 0;
515 }
516
517 /* Write registers up to 2 at a time */
imx219_write_reg(struct imx219 *imx219, u16 reg, u32 len, u32 val)518 static int imx219_write_reg(struct imx219 *imx219, u16 reg, u32 len, u32 val)
519 {
520 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
521 u8 buf[6];
522
523 if (len > 4)
524 return -EINVAL;
525
526 put_unaligned_be16(reg, buf);
527 put_unaligned_be32(val << (8 * (4 - len)), buf + 2);
528 if (i2c_master_send(client, buf, len + 2) != len + 2)
529 return -EIO;
530
531 return 0;
532 }
533
534 /* Write a list of registers */
imx219_write_regs(struct imx219 *imx219, const struct imx219_reg *regs, u32 len)535 static int imx219_write_regs(struct imx219 *imx219,
536 const struct imx219_reg *regs, u32 len)
537 {
538 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
539 unsigned int i;
540 int ret;
541
542 for (i = 0; i < len; i++) {
543 ret = imx219_write_reg(imx219, regs[i].address, 1, regs[i].val);
544 if (ret) {
545 dev_err_ratelimited(&client->dev,
546 "Failed to write reg 0x%4.4x. error = %d\n",
547 regs[i].address, ret);
548
549 return ret;
550 }
551 }
552
553 return 0;
554 }
555
556 /* Get bayer order based on flip setting. */
imx219_get_format_code(struct imx219 *imx219, u32 code)557 static u32 imx219_get_format_code(struct imx219 *imx219, u32 code)
558 {
559 unsigned int i;
560
561 lockdep_assert_held(&imx219->mutex);
562
563 for (i = 0; i < ARRAY_SIZE(codes); i++)
564 if (codes[i] == code)
565 break;
566
567 if (i >= ARRAY_SIZE(codes))
568 i = 0;
569
570 i = (i & ~3) | (imx219->vflip->val ? 2 : 0) |
571 (imx219->hflip->val ? 1 : 0);
572
573 return codes[i];
574 }
575
imx219_set_default_format(struct imx219 *imx219)576 static void imx219_set_default_format(struct imx219 *imx219)
577 {
578 struct v4l2_mbus_framefmt *fmt;
579
580 fmt = &imx219->fmt;
581 fmt->code = MEDIA_BUS_FMT_SRGGB10_1X10;
582 fmt->colorspace = V4L2_COLORSPACE_SRGB;
583 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
584 fmt->quantization = V4L2_MAP_QUANTIZATION_DEFAULT(true,
585 fmt->colorspace,
586 fmt->ycbcr_enc);
587 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
588 fmt->width = supported_modes[0].width;
589 fmt->height = supported_modes[0].height;
590 fmt->field = V4L2_FIELD_NONE;
591 }
592
imx219_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)593 static int imx219_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
594 {
595 struct imx219 *imx219 = to_imx219(sd);
596 struct v4l2_mbus_framefmt *try_fmt =
597 v4l2_subdev_get_try_format(sd, fh->pad, 0);
598 struct v4l2_rect *try_crop;
599
600 mutex_lock(&imx219->mutex);
601
602 /* Initialize try_fmt */
603 try_fmt->width = supported_modes[0].width;
604 try_fmt->height = supported_modes[0].height;
605 try_fmt->code = imx219_get_format_code(imx219,
606 MEDIA_BUS_FMT_SRGGB10_1X10);
607 try_fmt->field = V4L2_FIELD_NONE;
608
609 /* Initialize try_crop rectangle. */
610 try_crop = v4l2_subdev_get_try_crop(sd, fh->pad, 0);
611 try_crop->top = IMX219_PIXEL_ARRAY_TOP;
612 try_crop->left = IMX219_PIXEL_ARRAY_LEFT;
613 try_crop->width = IMX219_PIXEL_ARRAY_WIDTH;
614 try_crop->height = IMX219_PIXEL_ARRAY_HEIGHT;
615
616 mutex_unlock(&imx219->mutex);
617
618 return 0;
619 }
620
imx219_set_ctrl(struct v4l2_ctrl *ctrl)621 static int imx219_set_ctrl(struct v4l2_ctrl *ctrl)
622 {
623 struct imx219 *imx219 =
624 container_of(ctrl->handler, struct imx219, ctrl_handler);
625 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
626 int ret;
627
628 if (ctrl->id == V4L2_CID_VBLANK) {
629 int exposure_max, exposure_def;
630
631 /* Update max exposure while meeting expected vblanking */
632 exposure_max = imx219->mode->height + ctrl->val - 4;
633 exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ?
634 exposure_max : IMX219_EXPOSURE_DEFAULT;
635 __v4l2_ctrl_modify_range(imx219->exposure,
636 imx219->exposure->minimum,
637 exposure_max, imx219->exposure->step,
638 exposure_def);
639 }
640
641 /*
642 * Applying V4L2 control value only happens
643 * when power is up for streaming
644 */
645 if (pm_runtime_get_if_in_use(&client->dev) == 0)
646 return 0;
647
648 switch (ctrl->id) {
649 case V4L2_CID_ANALOGUE_GAIN:
650 ret = imx219_write_reg(imx219, IMX219_REG_ANALOG_GAIN,
651 IMX219_REG_VALUE_08BIT, ctrl->val);
652 break;
653 case V4L2_CID_EXPOSURE:
654 ret = imx219_write_reg(imx219, IMX219_REG_EXPOSURE,
655 IMX219_REG_VALUE_16BIT, ctrl->val);
656 break;
657 case V4L2_CID_DIGITAL_GAIN:
658 ret = imx219_write_reg(imx219, IMX219_REG_DIGITAL_GAIN,
659 IMX219_REG_VALUE_16BIT, ctrl->val);
660 break;
661 case V4L2_CID_TEST_PATTERN:
662 ret = imx219_write_reg(imx219, IMX219_REG_TEST_PATTERN,
663 IMX219_REG_VALUE_16BIT,
664 imx219_test_pattern_val[ctrl->val]);
665 break;
666 case V4L2_CID_HFLIP:
667 case V4L2_CID_VFLIP:
668 ret = imx219_write_reg(imx219, IMX219_REG_ORIENTATION, 1,
669 imx219->hflip->val |
670 imx219->vflip->val << 1);
671 break;
672 case V4L2_CID_VBLANK:
673 ret = imx219_write_reg(imx219, IMX219_REG_VTS,
674 IMX219_REG_VALUE_16BIT,
675 imx219->mode->height + ctrl->val);
676 break;
677 case V4L2_CID_TEST_PATTERN_RED:
678 ret = imx219_write_reg(imx219, IMX219_REG_TESTP_RED,
679 IMX219_REG_VALUE_16BIT, ctrl->val);
680 break;
681 case V4L2_CID_TEST_PATTERN_GREENR:
682 ret = imx219_write_reg(imx219, IMX219_REG_TESTP_GREENR,
683 IMX219_REG_VALUE_16BIT, ctrl->val);
684 break;
685 case V4L2_CID_TEST_PATTERN_BLUE:
686 ret = imx219_write_reg(imx219, IMX219_REG_TESTP_BLUE,
687 IMX219_REG_VALUE_16BIT, ctrl->val);
688 break;
689 case V4L2_CID_TEST_PATTERN_GREENB:
690 ret = imx219_write_reg(imx219, IMX219_REG_TESTP_GREENB,
691 IMX219_REG_VALUE_16BIT, ctrl->val);
692 break;
693 default:
694 dev_info(&client->dev,
695 "ctrl(id:0x%x,val:0x%x) is not handled\n",
696 ctrl->id, ctrl->val);
697 ret = -EINVAL;
698 break;
699 }
700
701 pm_runtime_put(&client->dev);
702
703 return ret;
704 }
705
706 static const struct v4l2_ctrl_ops imx219_ctrl_ops = {
707 .s_ctrl = imx219_set_ctrl,
708 };
709
imx219_enum_mbus_code(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_mbus_code_enum *code)710 static int imx219_enum_mbus_code(struct v4l2_subdev *sd,
711 struct v4l2_subdev_pad_config *cfg,
712 struct v4l2_subdev_mbus_code_enum *code)
713 {
714 struct imx219 *imx219 = to_imx219(sd);
715
716 if (code->index >= (ARRAY_SIZE(codes) / 4))
717 return -EINVAL;
718
719 code->code = imx219_get_format_code(imx219, codes[code->index * 4]);
720
721 return 0;
722 }
723
imx219_enum_frame_size(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_frame_size_enum *fse)724 static int imx219_enum_frame_size(struct v4l2_subdev *sd,
725 struct v4l2_subdev_pad_config *cfg,
726 struct v4l2_subdev_frame_size_enum *fse)
727 {
728 struct imx219 *imx219 = to_imx219(sd);
729
730 if (fse->index >= ARRAY_SIZE(supported_modes))
731 return -EINVAL;
732
733 if (fse->code != imx219_get_format_code(imx219, fse->code))
734 return -EINVAL;
735
736 fse->min_width = supported_modes[fse->index].width;
737 fse->max_width = fse->min_width;
738 fse->min_height = supported_modes[fse->index].height;
739 fse->max_height = fse->min_height;
740
741 return 0;
742 }
743
imx219_reset_colorspace(struct v4l2_mbus_framefmt *fmt)744 static void imx219_reset_colorspace(struct v4l2_mbus_framefmt *fmt)
745 {
746 fmt->colorspace = V4L2_COLORSPACE_SRGB;
747 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
748 fmt->quantization = V4L2_MAP_QUANTIZATION_DEFAULT(true,
749 fmt->colorspace,
750 fmt->ycbcr_enc);
751 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
752 }
753
imx219_update_pad_format(struct imx219 *imx219, const struct imx219_mode *mode, struct v4l2_subdev_format *fmt)754 static void imx219_update_pad_format(struct imx219 *imx219,
755 const struct imx219_mode *mode,
756 struct v4l2_subdev_format *fmt)
757 {
758 fmt->format.width = mode->width;
759 fmt->format.height = mode->height;
760 fmt->format.field = V4L2_FIELD_NONE;
761 imx219_reset_colorspace(&fmt->format);
762 }
763
__imx219_get_pad_format(struct imx219 *imx219, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_format *fmt)764 static int __imx219_get_pad_format(struct imx219 *imx219,
765 struct v4l2_subdev_pad_config *cfg,
766 struct v4l2_subdev_format *fmt)
767 {
768 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
769 struct v4l2_mbus_framefmt *try_fmt =
770 v4l2_subdev_get_try_format(&imx219->sd, cfg, fmt->pad);
771 /* update the code which could change due to vflip or hflip: */
772 try_fmt->code = imx219_get_format_code(imx219, try_fmt->code);
773 fmt->format = *try_fmt;
774 } else {
775 imx219_update_pad_format(imx219, imx219->mode, fmt);
776 fmt->format.code = imx219_get_format_code(imx219,
777 imx219->fmt.code);
778 }
779
780 return 0;
781 }
782
imx219_get_pad_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_format *fmt)783 static int imx219_get_pad_format(struct v4l2_subdev *sd,
784 struct v4l2_subdev_pad_config *cfg,
785 struct v4l2_subdev_format *fmt)
786 {
787 struct imx219 *imx219 = to_imx219(sd);
788 int ret;
789
790 mutex_lock(&imx219->mutex);
791 ret = __imx219_get_pad_format(imx219, cfg, fmt);
792 mutex_unlock(&imx219->mutex);
793
794 return ret;
795 }
796
imx219_set_pad_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_format *fmt)797 static int imx219_set_pad_format(struct v4l2_subdev *sd,
798 struct v4l2_subdev_pad_config *cfg,
799 struct v4l2_subdev_format *fmt)
800 {
801 struct imx219 *imx219 = to_imx219(sd);
802 const struct imx219_mode *mode;
803 struct v4l2_mbus_framefmt *framefmt;
804 int exposure_max, exposure_def, hblank;
805 unsigned int i;
806
807 mutex_lock(&imx219->mutex);
808
809 for (i = 0; i < ARRAY_SIZE(codes); i++)
810 if (codes[i] == fmt->format.code)
811 break;
812 if (i >= ARRAY_SIZE(codes))
813 i = 0;
814
815 /* Bayer order varies with flips */
816 fmt->format.code = imx219_get_format_code(imx219, codes[i]);
817
818 mode = v4l2_find_nearest_size(supported_modes,
819 ARRAY_SIZE(supported_modes),
820 width, height,
821 fmt->format.width, fmt->format.height);
822 imx219_update_pad_format(imx219, mode, fmt);
823 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
824 framefmt = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
825 *framefmt = fmt->format;
826 } else if (imx219->mode != mode ||
827 imx219->fmt.code != fmt->format.code) {
828 imx219->fmt = fmt->format;
829 imx219->mode = mode;
830 /* Update limits and set FPS to default */
831 __v4l2_ctrl_modify_range(imx219->vblank, IMX219_VBLANK_MIN,
832 IMX219_VTS_MAX - mode->height, 1,
833 mode->vts_def - mode->height);
834 __v4l2_ctrl_s_ctrl(imx219->vblank,
835 mode->vts_def - mode->height);
836 /* Update max exposure while meeting expected vblanking */
837 exposure_max = mode->vts_def - 4;
838 exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ?
839 exposure_max : IMX219_EXPOSURE_DEFAULT;
840 __v4l2_ctrl_modify_range(imx219->exposure,
841 imx219->exposure->minimum,
842 exposure_max, imx219->exposure->step,
843 exposure_def);
844 /*
845 * Currently PPL is fixed to IMX219_PPL_DEFAULT, so hblank
846 * depends on mode->width only, and is not changeble in any
847 * way other than changing the mode.
848 */
849 hblank = IMX219_PPL_DEFAULT - mode->width;
850 __v4l2_ctrl_modify_range(imx219->hblank, hblank, hblank, 1,
851 hblank);
852 }
853
854 mutex_unlock(&imx219->mutex);
855
856 return 0;
857 }
858
imx219_set_framefmt(struct imx219 *imx219)859 static int imx219_set_framefmt(struct imx219 *imx219)
860 {
861 switch (imx219->fmt.code) {
862 case MEDIA_BUS_FMT_SRGGB8_1X8:
863 case MEDIA_BUS_FMT_SGRBG8_1X8:
864 case MEDIA_BUS_FMT_SGBRG8_1X8:
865 case MEDIA_BUS_FMT_SBGGR8_1X8:
866 return imx219_write_regs(imx219, raw8_framefmt_regs,
867 ARRAY_SIZE(raw8_framefmt_regs));
868
869 case MEDIA_BUS_FMT_SRGGB10_1X10:
870 case MEDIA_BUS_FMT_SGRBG10_1X10:
871 case MEDIA_BUS_FMT_SGBRG10_1X10:
872 case MEDIA_BUS_FMT_SBGGR10_1X10:
873 return imx219_write_regs(imx219, raw10_framefmt_regs,
874 ARRAY_SIZE(raw10_framefmt_regs));
875 }
876
877 return -EINVAL;
878 }
879
imx219_set_binning(struct imx219 *imx219)880 static int imx219_set_binning(struct imx219 *imx219)
881 {
882 if (!imx219->mode->binning) {
883 return imx219_write_reg(imx219, IMX219_REG_BINNING_MODE,
884 IMX219_REG_VALUE_16BIT,
885 IMX219_BINNING_NONE);
886 }
887
888 switch (imx219->fmt.code) {
889 case MEDIA_BUS_FMT_SRGGB8_1X8:
890 case MEDIA_BUS_FMT_SGRBG8_1X8:
891 case MEDIA_BUS_FMT_SGBRG8_1X8:
892 case MEDIA_BUS_FMT_SBGGR8_1X8:
893 return imx219_write_reg(imx219, IMX219_REG_BINNING_MODE,
894 IMX219_REG_VALUE_16BIT,
895 IMX219_BINNING_2X2_ANALOG);
896
897 case MEDIA_BUS_FMT_SRGGB10_1X10:
898 case MEDIA_BUS_FMT_SGRBG10_1X10:
899 case MEDIA_BUS_FMT_SGBRG10_1X10:
900 case MEDIA_BUS_FMT_SBGGR10_1X10:
901 return imx219_write_reg(imx219, IMX219_REG_BINNING_MODE,
902 IMX219_REG_VALUE_16BIT,
903 IMX219_BINNING_2X2);
904 }
905
906 return -EINVAL;
907 }
908
909 static const struct v4l2_rect *
__imx219_get_pad_crop(struct imx219 *imx219, struct v4l2_subdev_pad_config *cfg, unsigned int pad, enum v4l2_subdev_format_whence which)910 __imx219_get_pad_crop(struct imx219 *imx219, struct v4l2_subdev_pad_config *cfg,
911 unsigned int pad, enum v4l2_subdev_format_whence which)
912 {
913 switch (which) {
914 case V4L2_SUBDEV_FORMAT_TRY:
915 return v4l2_subdev_get_try_crop(&imx219->sd, cfg, pad);
916 case V4L2_SUBDEV_FORMAT_ACTIVE:
917 return &imx219->mode->crop;
918 }
919
920 return NULL;
921 }
922
imx219_get_selection(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_selection *sel)923 static int imx219_get_selection(struct v4l2_subdev *sd,
924 struct v4l2_subdev_pad_config *cfg,
925 struct v4l2_subdev_selection *sel)
926 {
927 switch (sel->target) {
928 case V4L2_SEL_TGT_CROP: {
929 struct imx219 *imx219 = to_imx219(sd);
930
931 mutex_lock(&imx219->mutex);
932 sel->r = *__imx219_get_pad_crop(imx219, cfg, sel->pad,
933 sel->which);
934 mutex_unlock(&imx219->mutex);
935
936 return 0;
937 }
938
939 case V4L2_SEL_TGT_NATIVE_SIZE:
940 sel->r.top = 0;
941 sel->r.left = 0;
942 sel->r.width = IMX219_NATIVE_WIDTH;
943 sel->r.height = IMX219_NATIVE_HEIGHT;
944
945 return 0;
946
947 case V4L2_SEL_TGT_CROP_DEFAULT:
948 case V4L2_SEL_TGT_CROP_BOUNDS:
949 sel->r.top = IMX219_PIXEL_ARRAY_TOP;
950 sel->r.left = IMX219_PIXEL_ARRAY_LEFT;
951 sel->r.width = IMX219_PIXEL_ARRAY_WIDTH;
952 sel->r.height = IMX219_PIXEL_ARRAY_HEIGHT;
953
954 return 0;
955 }
956
957 return -EINVAL;
958 }
959
imx219_start_streaming(struct imx219 *imx219)960 static int imx219_start_streaming(struct imx219 *imx219)
961 {
962 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
963 const struct imx219_reg_list *reg_list;
964 int ret;
965
966 ret = pm_runtime_get_sync(&client->dev);
967 if (ret < 0) {
968 pm_runtime_put_noidle(&client->dev);
969 return ret;
970 }
971
972 /* Send all registers that are common to all modes */
973 ret = imx219_write_regs(imx219, imx219_common_regs, ARRAY_SIZE(imx219_common_regs));
974 if (ret) {
975 dev_err(&client->dev, "%s failed to send mfg header\n", __func__);
976 goto err_rpm_put;
977 }
978
979 /* Apply default values of current mode */
980 reg_list = &imx219->mode->reg_list;
981 ret = imx219_write_regs(imx219, reg_list->regs, reg_list->num_of_regs);
982 if (ret) {
983 dev_err(&client->dev, "%s failed to set mode\n", __func__);
984 goto err_rpm_put;
985 }
986
987 ret = imx219_set_framefmt(imx219);
988 if (ret) {
989 dev_err(&client->dev, "%s failed to set frame format: %d\n",
990 __func__, ret);
991 goto err_rpm_put;
992 }
993
994 ret = imx219_set_binning(imx219);
995 if (ret) {
996 dev_err(&client->dev, "%s failed to set binning: %d\n",
997 __func__, ret);
998 goto err_rpm_put;
999 }
1000
1001 /* Apply customized values from user */
1002 ret = __v4l2_ctrl_handler_setup(imx219->sd.ctrl_handler);
1003 if (ret)
1004 goto err_rpm_put;
1005
1006 /* set stream on register */
1007 ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT,
1008 IMX219_REG_VALUE_08BIT, IMX219_MODE_STREAMING);
1009 if (ret)
1010 goto err_rpm_put;
1011
1012 /* vflip and hflip cannot change during streaming */
1013 __v4l2_ctrl_grab(imx219->vflip, true);
1014 __v4l2_ctrl_grab(imx219->hflip, true);
1015
1016 return 0;
1017
1018 err_rpm_put:
1019 pm_runtime_put(&client->dev);
1020 return ret;
1021 }
1022
imx219_stop_streaming(struct imx219 *imx219)1023 static void imx219_stop_streaming(struct imx219 *imx219)
1024 {
1025 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1026 int ret;
1027
1028 /* set stream off register */
1029 ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT,
1030 IMX219_REG_VALUE_08BIT, IMX219_MODE_STANDBY);
1031 if (ret)
1032 dev_err(&client->dev, "%s failed to set stream\n", __func__);
1033
1034 __v4l2_ctrl_grab(imx219->vflip, false);
1035 __v4l2_ctrl_grab(imx219->hflip, false);
1036
1037 pm_runtime_put(&client->dev);
1038 }
1039
imx219_set_stream(struct v4l2_subdev *sd, int enable)1040 static int imx219_set_stream(struct v4l2_subdev *sd, int enable)
1041 {
1042 struct imx219 *imx219 = to_imx219(sd);
1043 int ret = 0;
1044
1045 mutex_lock(&imx219->mutex);
1046 if (imx219->streaming == enable) {
1047 mutex_unlock(&imx219->mutex);
1048 return 0;
1049 }
1050
1051 if (enable) {
1052 /*
1053 * Apply default & customized values
1054 * and then start streaming.
1055 */
1056 ret = imx219_start_streaming(imx219);
1057 if (ret)
1058 goto err_unlock;
1059 } else {
1060 imx219_stop_streaming(imx219);
1061 }
1062
1063 imx219->streaming = enable;
1064
1065 mutex_unlock(&imx219->mutex);
1066
1067 return ret;
1068
1069 err_unlock:
1070 mutex_unlock(&imx219->mutex);
1071
1072 return ret;
1073 }
1074
1075 /* Power/clock management functions */
imx219_power_on(struct device *dev)1076 static int imx219_power_on(struct device *dev)
1077 {
1078 struct i2c_client *client = to_i2c_client(dev);
1079 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1080 struct imx219 *imx219 = to_imx219(sd);
1081 int ret;
1082
1083 ret = regulator_bulk_enable(IMX219_NUM_SUPPLIES,
1084 imx219->supplies);
1085 if (ret) {
1086 dev_err(&client->dev, "%s: failed to enable regulators\n",
1087 __func__);
1088 return ret;
1089 }
1090
1091 ret = clk_prepare_enable(imx219->xclk);
1092 if (ret) {
1093 dev_err(&client->dev, "%s: failed to enable clock\n",
1094 __func__);
1095 goto reg_off;
1096 }
1097
1098 gpiod_set_value_cansleep(imx219->reset_gpio, 1);
1099 usleep_range(IMX219_XCLR_MIN_DELAY_US,
1100 IMX219_XCLR_MIN_DELAY_US + IMX219_XCLR_DELAY_RANGE_US);
1101
1102 return 0;
1103
1104 reg_off:
1105 regulator_bulk_disable(IMX219_NUM_SUPPLIES, imx219->supplies);
1106
1107 return ret;
1108 }
1109
imx219_power_off(struct device *dev)1110 static int imx219_power_off(struct device *dev)
1111 {
1112 struct i2c_client *client = to_i2c_client(dev);
1113 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1114 struct imx219 *imx219 = to_imx219(sd);
1115
1116 gpiod_set_value_cansleep(imx219->reset_gpio, 0);
1117 regulator_bulk_disable(IMX219_NUM_SUPPLIES, imx219->supplies);
1118 clk_disable_unprepare(imx219->xclk);
1119
1120 return 0;
1121 }
1122
imx219_suspend(struct device *dev)1123 static int __maybe_unused imx219_suspend(struct device *dev)
1124 {
1125 struct i2c_client *client = to_i2c_client(dev);
1126 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1127 struct imx219 *imx219 = to_imx219(sd);
1128
1129 if (imx219->streaming)
1130 imx219_stop_streaming(imx219);
1131
1132 return 0;
1133 }
1134
imx219_resume(struct device *dev)1135 static int __maybe_unused imx219_resume(struct device *dev)
1136 {
1137 struct i2c_client *client = to_i2c_client(dev);
1138 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1139 struct imx219 *imx219 = to_imx219(sd);
1140 int ret;
1141
1142 if (imx219->streaming) {
1143 ret = imx219_start_streaming(imx219);
1144 if (ret)
1145 goto error;
1146 }
1147
1148 return 0;
1149
1150 error:
1151 imx219_stop_streaming(imx219);
1152 imx219->streaming = false;
1153
1154 return ret;
1155 }
1156
imx219_get_regulators(struct imx219 *imx219)1157 static int imx219_get_regulators(struct imx219 *imx219)
1158 {
1159 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1160 unsigned int i;
1161
1162 for (i = 0; i < IMX219_NUM_SUPPLIES; i++)
1163 imx219->supplies[i].supply = imx219_supply_name[i];
1164
1165 return devm_regulator_bulk_get(&client->dev,
1166 IMX219_NUM_SUPPLIES,
1167 imx219->supplies);
1168 }
1169
1170 /* Verify chip ID */
imx219_identify_module(struct imx219 *imx219)1171 static int imx219_identify_module(struct imx219 *imx219)
1172 {
1173 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1174 int ret;
1175 u32 val;
1176
1177 ret = imx219_read_reg(imx219, IMX219_REG_CHIP_ID,
1178 IMX219_REG_VALUE_16BIT, &val);
1179 if (ret) {
1180 dev_err(&client->dev, "failed to read chip id %x\n",
1181 IMX219_CHIP_ID);
1182 return ret;
1183 }
1184
1185 if (val != IMX219_CHIP_ID) {
1186 dev_err(&client->dev, "chip id mismatch: %x!=%x\n",
1187 IMX219_CHIP_ID, val);
1188 return -EIO;
1189 }
1190
1191 return 0;
1192 }
1193
1194 static const struct v4l2_subdev_core_ops imx219_core_ops = {
1195 .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
1196 .unsubscribe_event = v4l2_event_subdev_unsubscribe,
1197 };
1198
1199 static const struct v4l2_subdev_video_ops imx219_video_ops = {
1200 .s_stream = imx219_set_stream,
1201 };
1202
1203 static const struct v4l2_subdev_pad_ops imx219_pad_ops = {
1204 .enum_mbus_code = imx219_enum_mbus_code,
1205 .get_fmt = imx219_get_pad_format,
1206 .set_fmt = imx219_set_pad_format,
1207 .get_selection = imx219_get_selection,
1208 .enum_frame_size = imx219_enum_frame_size,
1209 };
1210
1211 static const struct v4l2_subdev_ops imx219_subdev_ops = {
1212 .core = &imx219_core_ops,
1213 .video = &imx219_video_ops,
1214 .pad = &imx219_pad_ops,
1215 };
1216
1217 static const struct v4l2_subdev_internal_ops imx219_internal_ops = {
1218 .open = imx219_open,
1219 };
1220
1221 /* Initialize control handlers */
imx219_init_controls(struct imx219 *imx219)1222 static int imx219_init_controls(struct imx219 *imx219)
1223 {
1224 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1225 struct v4l2_ctrl_handler *ctrl_hdlr;
1226 unsigned int height = imx219->mode->height;
1227 struct v4l2_fwnode_device_properties props;
1228 int exposure_max, exposure_def, hblank;
1229 int i, ret;
1230
1231 ctrl_hdlr = &imx219->ctrl_handler;
1232 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 11);
1233 if (ret)
1234 return ret;
1235
1236 mutex_init(&imx219->mutex);
1237 ctrl_hdlr->lock = &imx219->mutex;
1238
1239 /* By default, PIXEL_RATE is read only */
1240 imx219->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1241 V4L2_CID_PIXEL_RATE,
1242 IMX219_PIXEL_RATE,
1243 IMX219_PIXEL_RATE, 1,
1244 IMX219_PIXEL_RATE);
1245
1246 /* Initial vblank/hblank/exposure parameters based on current mode */
1247 imx219->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1248 V4L2_CID_VBLANK, IMX219_VBLANK_MIN,
1249 IMX219_VTS_MAX - height, 1,
1250 imx219->mode->vts_def - height);
1251 hblank = IMX219_PPL_DEFAULT - imx219->mode->width;
1252 imx219->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1253 V4L2_CID_HBLANK, hblank, hblank,
1254 1, hblank);
1255 if (imx219->hblank)
1256 imx219->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1257 exposure_max = imx219->mode->vts_def - 4;
1258 exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ?
1259 exposure_max : IMX219_EXPOSURE_DEFAULT;
1260 imx219->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1261 V4L2_CID_EXPOSURE,
1262 IMX219_EXPOSURE_MIN, exposure_max,
1263 IMX219_EXPOSURE_STEP,
1264 exposure_def);
1265
1266 v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
1267 IMX219_ANA_GAIN_MIN, IMX219_ANA_GAIN_MAX,
1268 IMX219_ANA_GAIN_STEP, IMX219_ANA_GAIN_DEFAULT);
1269
1270 v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
1271 IMX219_DGTL_GAIN_MIN, IMX219_DGTL_GAIN_MAX,
1272 IMX219_DGTL_GAIN_STEP, IMX219_DGTL_GAIN_DEFAULT);
1273
1274 imx219->hflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1275 V4L2_CID_HFLIP, 0, 1, 1, 0);
1276 if (imx219->hflip)
1277 imx219->hflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT;
1278
1279 imx219->vflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1280 V4L2_CID_VFLIP, 0, 1, 1, 0);
1281 if (imx219->vflip)
1282 imx219->vflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT;
1283
1284 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &imx219_ctrl_ops,
1285 V4L2_CID_TEST_PATTERN,
1286 ARRAY_SIZE(imx219_test_pattern_menu) - 1,
1287 0, 0, imx219_test_pattern_menu);
1288 for (i = 0; i < 4; i++) {
1289 /*
1290 * The assumption is that
1291 * V4L2_CID_TEST_PATTERN_GREENR == V4L2_CID_TEST_PATTERN_RED + 1
1292 * V4L2_CID_TEST_PATTERN_BLUE == V4L2_CID_TEST_PATTERN_RED + 2
1293 * V4L2_CID_TEST_PATTERN_GREENB == V4L2_CID_TEST_PATTERN_RED + 3
1294 */
1295 v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1296 V4L2_CID_TEST_PATTERN_RED + i,
1297 IMX219_TESTP_COLOUR_MIN,
1298 IMX219_TESTP_COLOUR_MAX,
1299 IMX219_TESTP_COLOUR_STEP,
1300 IMX219_TESTP_COLOUR_MAX);
1301 /* The "Solid color" pattern is white by default */
1302 }
1303
1304 if (ctrl_hdlr->error) {
1305 ret = ctrl_hdlr->error;
1306 dev_err(&client->dev, "%s control init failed (%d)\n",
1307 __func__, ret);
1308 goto error;
1309 }
1310
1311 ret = v4l2_fwnode_device_parse(&client->dev, &props);
1312 if (ret)
1313 goto error;
1314
1315 ret = v4l2_ctrl_new_fwnode_properties(ctrl_hdlr, &imx219_ctrl_ops,
1316 &props);
1317 if (ret)
1318 goto error;
1319
1320 imx219->sd.ctrl_handler = ctrl_hdlr;
1321
1322 return 0;
1323
1324 error:
1325 v4l2_ctrl_handler_free(ctrl_hdlr);
1326 mutex_destroy(&imx219->mutex);
1327
1328 return ret;
1329 }
1330
imx219_free_controls(struct imx219 *imx219)1331 static void imx219_free_controls(struct imx219 *imx219)
1332 {
1333 v4l2_ctrl_handler_free(imx219->sd.ctrl_handler);
1334 mutex_destroy(&imx219->mutex);
1335 }
1336
imx219_check_hwcfg(struct device *dev)1337 static int imx219_check_hwcfg(struct device *dev)
1338 {
1339 struct fwnode_handle *endpoint;
1340 struct v4l2_fwnode_endpoint ep_cfg = {
1341 .bus_type = V4L2_MBUS_CSI2_DPHY
1342 };
1343 int ret = -EINVAL;
1344
1345 endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(dev), NULL);
1346 if (!endpoint) {
1347 dev_err(dev, "endpoint node not found\n");
1348 return -EINVAL;
1349 }
1350
1351 if (v4l2_fwnode_endpoint_alloc_parse(endpoint, &ep_cfg)) {
1352 dev_err(dev, "could not parse endpoint\n");
1353 goto error_out;
1354 }
1355
1356 /* Check the number of MIPI CSI2 data lanes */
1357 if (ep_cfg.bus.mipi_csi2.num_data_lanes != 2) {
1358 dev_err(dev, "only 2 data lanes are currently supported\n");
1359 goto error_out;
1360 }
1361
1362 /* Check the link frequency set in device tree */
1363 if (!ep_cfg.nr_of_link_frequencies) {
1364 dev_err(dev, "link-frequency property not found in DT\n");
1365 goto error_out;
1366 }
1367
1368 if (ep_cfg.nr_of_link_frequencies != 1 ||
1369 ep_cfg.link_frequencies[0] != IMX219_DEFAULT_LINK_FREQ) {
1370 dev_err(dev, "Link frequency not supported: %lld\n",
1371 ep_cfg.link_frequencies[0]);
1372 goto error_out;
1373 }
1374
1375 ret = 0;
1376
1377 error_out:
1378 v4l2_fwnode_endpoint_free(&ep_cfg);
1379 fwnode_handle_put(endpoint);
1380
1381 return ret;
1382 }
1383
imx219_probe(struct i2c_client *client)1384 static int imx219_probe(struct i2c_client *client)
1385 {
1386 struct device *dev = &client->dev;
1387 struct imx219 *imx219;
1388 int ret;
1389
1390 imx219 = devm_kzalloc(&client->dev, sizeof(*imx219), GFP_KERNEL);
1391 if (!imx219)
1392 return -ENOMEM;
1393
1394 v4l2_i2c_subdev_init(&imx219->sd, client, &imx219_subdev_ops);
1395
1396 /* Check the hardware configuration in device tree */
1397 if (imx219_check_hwcfg(dev))
1398 return -EINVAL;
1399
1400 /* Get system clock (xclk) */
1401 imx219->xclk = devm_clk_get(dev, NULL);
1402 if (IS_ERR(imx219->xclk)) {
1403 dev_err(dev, "failed to get xclk\n");
1404 return PTR_ERR(imx219->xclk);
1405 }
1406
1407 imx219->xclk_freq = clk_get_rate(imx219->xclk);
1408 if (imx219->xclk_freq != IMX219_XCLK_FREQ) {
1409 dev_err(dev, "xclk frequency not supported: %d Hz\n",
1410 imx219->xclk_freq);
1411 return -EINVAL;
1412 }
1413
1414 ret = imx219_get_regulators(imx219);
1415 if (ret) {
1416 dev_err(dev, "failed to get regulators\n");
1417 return ret;
1418 }
1419
1420 /* Request optional enable pin */
1421 imx219->reset_gpio = devm_gpiod_get_optional(dev, "reset",
1422 GPIOD_OUT_HIGH);
1423
1424 /*
1425 * The sensor must be powered for imx219_identify_module()
1426 * to be able to read the CHIP_ID register
1427 */
1428 ret = imx219_power_on(dev);
1429 if (ret)
1430 return ret;
1431
1432 ret = imx219_identify_module(imx219);
1433 if (ret)
1434 goto error_power_off;
1435
1436 /* Set default mode to max resolution */
1437 imx219->mode = &supported_modes[0];
1438
1439 /* sensor doesn't enter LP-11 state upon power up until and unless
1440 * streaming is started, so upon power up switch the modes to:
1441 * streaming -> standby
1442 */
1443 ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT,
1444 IMX219_REG_VALUE_08BIT, IMX219_MODE_STREAMING);
1445 if (ret < 0)
1446 goto error_power_off;
1447 usleep_range(100, 110);
1448
1449 /* put sensor back to standby mode */
1450 ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT,
1451 IMX219_REG_VALUE_08BIT, IMX219_MODE_STANDBY);
1452 if (ret < 0)
1453 goto error_power_off;
1454 usleep_range(100, 110);
1455
1456 ret = imx219_init_controls(imx219);
1457 if (ret)
1458 goto error_power_off;
1459
1460 /* Initialize subdev */
1461 imx219->sd.internal_ops = &imx219_internal_ops;
1462 imx219->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1463 imx219->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1464
1465 /* Initialize source pad */
1466 imx219->pad.flags = MEDIA_PAD_FL_SOURCE;
1467
1468 /* Initialize default format */
1469 imx219_set_default_format(imx219);
1470
1471 ret = media_entity_pads_init(&imx219->sd.entity, 1, &imx219->pad);
1472 if (ret) {
1473 dev_err(dev, "failed to init entity pads: %d\n", ret);
1474 goto error_handler_free;
1475 }
1476
1477 ret = v4l2_async_register_subdev_sensor_common(&imx219->sd);
1478 if (ret < 0) {
1479 dev_err(dev, "failed to register sensor sub-device: %d\n", ret);
1480 goto error_media_entity;
1481 }
1482
1483 /* Enable runtime PM and turn off the device */
1484 pm_runtime_set_active(dev);
1485 pm_runtime_enable(dev);
1486 pm_runtime_idle(dev);
1487
1488 return 0;
1489
1490 error_media_entity:
1491 media_entity_cleanup(&imx219->sd.entity);
1492
1493 error_handler_free:
1494 imx219_free_controls(imx219);
1495
1496 error_power_off:
1497 imx219_power_off(dev);
1498
1499 return ret;
1500 }
1501
imx219_remove(struct i2c_client *client)1502 static int imx219_remove(struct i2c_client *client)
1503 {
1504 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1505 struct imx219 *imx219 = to_imx219(sd);
1506
1507 v4l2_async_unregister_subdev(sd);
1508 media_entity_cleanup(&sd->entity);
1509 imx219_free_controls(imx219);
1510
1511 pm_runtime_disable(&client->dev);
1512 if (!pm_runtime_status_suspended(&client->dev))
1513 imx219_power_off(&client->dev);
1514 pm_runtime_set_suspended(&client->dev);
1515
1516 return 0;
1517 }
1518
1519 static const struct of_device_id imx219_dt_ids[] = {
1520 { .compatible = "sony,imx219" },
1521 { /* sentinel */ }
1522 };
1523 MODULE_DEVICE_TABLE(of, imx219_dt_ids);
1524
1525 static const struct dev_pm_ops imx219_pm_ops = {
1526 SET_SYSTEM_SLEEP_PM_OPS(imx219_suspend, imx219_resume)
1527 SET_RUNTIME_PM_OPS(imx219_power_off, imx219_power_on, NULL)
1528 };
1529
1530 static struct i2c_driver imx219_i2c_driver = {
1531 .driver = {
1532 .name = "imx219",
1533 .of_match_table = imx219_dt_ids,
1534 .pm = &imx219_pm_ops,
1535 },
1536 .probe_new = imx219_probe,
1537 .remove = imx219_remove,
1538 };
1539
1540 module_i2c_driver(imx219_i2c_driver);
1541
1542 MODULE_AUTHOR("Dave Stevenson <dave.stevenson@raspberrypi.com");
1543 MODULE_DESCRIPTION("Sony IMX219 sensor driver");
1544 MODULE_LICENSE("GPL v2");
1545