1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * (C) COPYRIGHT 2016 ARM Limited. All rights reserved.
4 * Author: Brian Starkey <brian.starkey@arm.com>
5 *
6 * ARM Mali DP Writeback connector implementation
7 */
8
9 #include <drm/drm_atomic.h>
10 #include <drm/drm_atomic_helper.h>
11 #include <drm/drm_crtc.h>
12 #include <drm/drm_fb_cma_helper.h>
13 #include <drm/drm_fourcc.h>
14 #include <drm/drm_gem_cma_helper.h>
15 #include <drm/drm_probe_helper.h>
16 #include <drm/drm_writeback.h>
17
18 #include "malidp_drv.h"
19 #include "malidp_hw.h"
20 #include "malidp_mw.h"
21
22 #define to_mw_state(_state) (struct malidp_mw_connector_state *)(_state)
23
24 struct malidp_mw_connector_state {
25 struct drm_connector_state base;
26 dma_addr_t addrs[2];
27 s32 pitches[2];
28 u8 format;
29 u8 n_planes;
30 bool rgb2yuv_initialized;
31 const s16 *rgb2yuv_coeffs;
32 };
33
malidp_mw_connector_get_modes(struct drm_connector *connector)34 static int malidp_mw_connector_get_modes(struct drm_connector *connector)
35 {
36 struct drm_device *dev = connector->dev;
37
38 return drm_add_modes_noedid(connector, dev->mode_config.max_width,
39 dev->mode_config.max_height);
40 }
41
42 static enum drm_mode_status
malidp_mw_connector_mode_valid(struct drm_connector *connector, struct drm_display_mode *mode)43 malidp_mw_connector_mode_valid(struct drm_connector *connector,
44 struct drm_display_mode *mode)
45 {
46 struct drm_device *dev = connector->dev;
47 struct drm_mode_config *mode_config = &dev->mode_config;
48 int w = mode->hdisplay, h = mode->vdisplay;
49
50 if ((w < mode_config->min_width) || (w > mode_config->max_width))
51 return MODE_BAD_HVALUE;
52
53 if ((h < mode_config->min_height) || (h > mode_config->max_height))
54 return MODE_BAD_VVALUE;
55
56 return MODE_OK;
57 }
58
59 static const struct drm_connector_helper_funcs malidp_mw_connector_helper_funcs = {
60 .get_modes = malidp_mw_connector_get_modes,
61 .mode_valid = malidp_mw_connector_mode_valid,
62 };
63
malidp_mw_connector_reset(struct drm_connector *connector)64 static void malidp_mw_connector_reset(struct drm_connector *connector)
65 {
66 struct malidp_mw_connector_state *mw_state =
67 kzalloc(sizeof(*mw_state), GFP_KERNEL);
68
69 if (connector->state)
70 __drm_atomic_helper_connector_destroy_state(connector->state);
71
72 kfree(connector->state);
73 connector->state = NULL;
74
75 if (mw_state)
76 __drm_atomic_helper_connector_reset(connector, &mw_state->base);
77 }
78
79 static enum drm_connector_status
malidp_mw_connector_detect(struct drm_connector *connector, bool force)80 malidp_mw_connector_detect(struct drm_connector *connector, bool force)
81 {
82 return connector_status_connected;
83 }
84
malidp_mw_connector_destroy(struct drm_connector *connector)85 static void malidp_mw_connector_destroy(struct drm_connector *connector)
86 {
87 drm_connector_cleanup(connector);
88 }
89
90 static struct drm_connector_state *
malidp_mw_connector_duplicate_state(struct drm_connector *connector)91 malidp_mw_connector_duplicate_state(struct drm_connector *connector)
92 {
93 struct malidp_mw_connector_state *mw_state, *mw_current_state;
94
95 if (WARN_ON(!connector->state))
96 return NULL;
97
98 mw_state = kzalloc(sizeof(*mw_state), GFP_KERNEL);
99 if (!mw_state)
100 return NULL;
101
102 mw_current_state = to_mw_state(connector->state);
103 mw_state->rgb2yuv_coeffs = mw_current_state->rgb2yuv_coeffs;
104 mw_state->rgb2yuv_initialized = mw_current_state->rgb2yuv_initialized;
105
106 __drm_atomic_helper_connector_duplicate_state(connector, &mw_state->base);
107
108 return &mw_state->base;
109 }
110
111 static const struct drm_connector_funcs malidp_mw_connector_funcs = {
112 .reset = malidp_mw_connector_reset,
113 .detect = malidp_mw_connector_detect,
114 .fill_modes = drm_helper_probe_single_connector_modes,
115 .destroy = malidp_mw_connector_destroy,
116 .atomic_duplicate_state = malidp_mw_connector_duplicate_state,
117 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
118 };
119
120 static const s16 rgb2yuv_coeffs_bt709_limited[MALIDP_COLORADJ_NUM_COEFFS] = {
121 47, 157, 16,
122 -26, -87, 112,
123 112, -102, -10,
124 16, 128, 128
125 };
126
127 static int
malidp_mw_encoder_atomic_check(struct drm_encoder *encoder, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state)128 malidp_mw_encoder_atomic_check(struct drm_encoder *encoder,
129 struct drm_crtc_state *crtc_state,
130 struct drm_connector_state *conn_state)
131 {
132 struct malidp_mw_connector_state *mw_state = to_mw_state(conn_state);
133 struct malidp_drm *malidp = encoder->dev->dev_private;
134 struct drm_framebuffer *fb;
135 int i, n_planes;
136
137 if (!conn_state->writeback_job)
138 return 0;
139
140 fb = conn_state->writeback_job->fb;
141 if ((fb->width != crtc_state->mode.hdisplay) ||
142 (fb->height != crtc_state->mode.vdisplay)) {
143 DRM_DEBUG_KMS("Invalid framebuffer size %ux%u\n",
144 fb->width, fb->height);
145 return -EINVAL;
146 }
147
148 if (fb->modifier) {
149 DRM_DEBUG_KMS("Writeback framebuffer does not support modifiers\n");
150 return -EINVAL;
151 }
152
153 mw_state->format =
154 malidp_hw_get_format_id(&malidp->dev->hw->map, SE_MEMWRITE,
155 fb->format->format, !!fb->modifier);
156 if (mw_state->format == MALIDP_INVALID_FORMAT_ID) {
157 struct drm_format_name_buf format_name;
158
159 DRM_DEBUG_KMS("Invalid pixel format %s\n",
160 drm_get_format_name(fb->format->format,
161 &format_name));
162 return -EINVAL;
163 }
164
165 n_planes = fb->format->num_planes;
166 for (i = 0; i < n_planes; i++) {
167 struct drm_gem_cma_object *obj = drm_fb_cma_get_gem_obj(fb, i);
168 /* memory write buffers are never rotated */
169 u8 alignment = malidp_hw_get_pitch_align(malidp->dev, 0);
170
171 if (fb->pitches[i] & (alignment - 1)) {
172 DRM_DEBUG_KMS("Invalid pitch %u for plane %d\n",
173 fb->pitches[i], i);
174 return -EINVAL;
175 }
176 mw_state->pitches[i] = fb->pitches[i];
177 mw_state->addrs[i] = obj->paddr + fb->offsets[i];
178 }
179 mw_state->n_planes = n_planes;
180
181 if (fb->format->is_yuv)
182 mw_state->rgb2yuv_coeffs = rgb2yuv_coeffs_bt709_limited;
183
184 return 0;
185 }
186
187 static const struct drm_encoder_helper_funcs malidp_mw_encoder_helper_funcs = {
188 .atomic_check = malidp_mw_encoder_atomic_check,
189 };
190
get_writeback_formats(struct malidp_drm *malidp, int *n_formats)191 static u32 *get_writeback_formats(struct malidp_drm *malidp, int *n_formats)
192 {
193 const struct malidp_hw_regmap *map = &malidp->dev->hw->map;
194 u32 *formats;
195 int n, i;
196
197 formats = kcalloc(map->n_pixel_formats, sizeof(*formats),
198 GFP_KERNEL);
199 if (!formats)
200 return NULL;
201
202 for (n = 0, i = 0; i < map->n_pixel_formats; i++) {
203 if (map->pixel_formats[i].layer & SE_MEMWRITE)
204 formats[n++] = map->pixel_formats[i].format;
205 }
206
207 *n_formats = n;
208
209 return formats;
210 }
211
malidp_mw_connector_init(struct drm_device *drm)212 int malidp_mw_connector_init(struct drm_device *drm)
213 {
214 struct malidp_drm *malidp = drm->dev_private;
215 u32 *formats;
216 int ret, n_formats;
217
218 if (!malidp->dev->hw->enable_memwrite)
219 return 0;
220
221 malidp->mw_connector.encoder.possible_crtcs = 1 << drm_crtc_index(&malidp->crtc);
222 drm_connector_helper_add(&malidp->mw_connector.base,
223 &malidp_mw_connector_helper_funcs);
224
225 formats = get_writeback_formats(malidp, &n_formats);
226 if (!formats)
227 return -ENOMEM;
228
229 ret = drm_writeback_connector_init(drm, &malidp->mw_connector,
230 &malidp_mw_connector_funcs,
231 &malidp_mw_encoder_helper_funcs,
232 formats, n_formats);
233 kfree(formats);
234 if (ret)
235 return ret;
236
237 return 0;
238 }
239
malidp_mw_atomic_commit(struct drm_device *drm, struct drm_atomic_state *old_state)240 void malidp_mw_atomic_commit(struct drm_device *drm,
241 struct drm_atomic_state *old_state)
242 {
243 struct malidp_drm *malidp = drm->dev_private;
244 struct drm_writeback_connector *mw_conn = &malidp->mw_connector;
245 struct drm_connector_state *conn_state = mw_conn->base.state;
246 struct malidp_hw_device *hwdev = malidp->dev;
247 struct malidp_mw_connector_state *mw_state;
248
249 if (!conn_state)
250 return;
251
252 mw_state = to_mw_state(conn_state);
253
254 if (conn_state->writeback_job) {
255 struct drm_framebuffer *fb = conn_state->writeback_job->fb;
256
257 DRM_DEV_DEBUG_DRIVER(drm->dev,
258 "Enable memwrite %ux%u:%d %pad fmt: %u\n",
259 fb->width, fb->height,
260 mw_state->pitches[0],
261 &mw_state->addrs[0],
262 mw_state->format);
263
264 drm_writeback_queue_job(mw_conn, conn_state);
265 hwdev->hw->enable_memwrite(hwdev, mw_state->addrs,
266 mw_state->pitches, mw_state->n_planes,
267 fb->width, fb->height, mw_state->format,
268 !mw_state->rgb2yuv_initialized ?
269 mw_state->rgb2yuv_coeffs : NULL);
270 mw_state->rgb2yuv_initialized = !!mw_state->rgb2yuv_coeffs;
271 } else {
272 DRM_DEV_DEBUG_DRIVER(drm->dev, "Disable memwrite\n");
273 hwdev->hw->disable_memwrite(hwdev);
274 }
275 }
276