1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * This control block defines the PACA which defines the processor
4 * specific data for each logical processor on the system.
5 * There are some pointers defined that are utilized by PLIC.
6 *
7 * C 2001 PPC 64 Team, IBM Corp
8 */
9 #ifndef _ASM_POWERPC_PACA_H
10 #define _ASM_POWERPC_PACA_H
11 #ifdef __KERNEL__
12
13 #ifdef CONFIG_PPC64
14
15 #include <linux/string.h>
16 #include <asm/types.h>
17 #include <asm/mmu.h>
18 #include <asm/page.h>
19 #ifdef CONFIG_PPC_BOOK3E
20 #include <asm/exception-64e.h>
21 #else
22 #include <asm/exception-64s.h>
23 #endif
24 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
25 #include <asm/kvm_book3s_asm.h>
26 #endif
27 #include <asm/accounting.h>
28 #include <asm/hmi.h>
29 #include <asm/cpuidle.h>
30 #include <asm/atomic.h>
31
32 #include <asm-generic/mmiowb_types.h>
33
34 register struct paca_struct *local_paca asm("r13");
35
36 #if defined(CONFIG_DEBUG_PREEMPT) && defined(CONFIG_SMP)
37 extern unsigned int debug_smp_processor_id(void); /* from linux/smp.h */
38 /*
39 * Add standard checks that preemption cannot occur when using get_paca():
40 * otherwise the paca_struct it points to may be the wrong one just after.
41 */
42 #define get_paca() ((void) debug_smp_processor_id(), local_paca)
43 #else
44 #define get_paca() local_paca
45 #endif
46
47 #define get_slb_shadow() (get_paca()->slb_shadow_ptr)
48
49 struct task_struct;
50 struct rtas_args;
51 struct lppaca;
52
53 /*
54 * Defines the layout of the paca.
55 *
56 * This structure is not directly accessed by firmware or the service
57 * processor.
58 */
59 struct paca_struct {
60 #ifdef CONFIG_PPC_PSERIES
61 /*
62 * Because hw_cpu_id, unlike other paca fields, is accessed
63 * routinely from other CPUs (from the IRQ code), we stick to
64 * read-only (after boot) fields in the first cacheline to
65 * avoid cacheline bouncing.
66 */
67
68 struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */
69 #endif /* CONFIG_PPC_PSERIES */
70
71 /*
72 * MAGIC: the spinlock functions in arch/powerpc/lib/locks.c
73 * load lock_token and paca_index with a single lwz
74 * instruction. They must travel together and be properly
75 * aligned.
76 */
77 #ifdef __BIG_ENDIAN__
78 u16 lock_token; /* Constant 0x8000, used in locks */
79 u16 paca_index; /* Logical processor number */
80 #else
81 u16 paca_index; /* Logical processor number */
82 u16 lock_token; /* Constant 0x8000, used in locks */
83 #endif
84
85 u64 kernel_toc; /* Kernel TOC address */
86 u64 kernelbase; /* Base address of kernel */
87 u64 kernel_msr; /* MSR while running in kernel */
88 void *emergency_sp; /* pointer to emergency stack */
89 u64 data_offset; /* per cpu data offset */
90 s16 hw_cpu_id; /* Physical processor number */
91 u8 cpu_start; /* At startup, processor spins until */
92 /* this becomes non-zero. */
93 u8 kexec_state; /* set when kexec down has irqs off */
94 #ifdef CONFIG_PPC_BOOK3S_64
95 struct slb_shadow *slb_shadow_ptr;
96 struct dtl_entry *dispatch_log;
97 struct dtl_entry *dispatch_log_end;
98 #endif
99 u64 dscr_default; /* per-CPU default DSCR */
100
101 #ifdef CONFIG_PPC_BOOK3S_64
102 /*
103 * Now, starting in cacheline 2, the exception save areas
104 */
105 /* used for most interrupts/exceptions */
106 u64 exgen[EX_SIZE] __attribute__((aligned(0x80)));
107 u64 exslb[EX_SIZE]; /* used for SLB/segment table misses
108 * on the linear mapping */
109 /* SLB related definitions */
110 u16 vmalloc_sllp;
111 u8 slb_cache_ptr;
112 u8 stab_rr; /* stab/slb round-robin counter */
113 #ifdef CONFIG_DEBUG_VM
114 u8 in_kernel_slb_handler;
115 #endif
116 u32 slb_used_bitmap; /* Bitmaps for first 32 SLB entries. */
117 u32 slb_kern_bitmap;
118 u32 slb_cache[SLB_CACHE_ENTRIES];
119 #endif /* CONFIG_PPC_BOOK3S_64 */
120
121 #ifdef CONFIG_PPC_BOOK3E
122 u64 exgen[8] __aligned(0x40);
123 /* Keep pgd in the same cacheline as the start of extlb */
124 pgd_t *pgd __aligned(0x40); /* Current PGD */
125 pgd_t *kernel_pgd; /* Kernel PGD */
126
127 /* Shared by all threads of a core -- points to tcd of first thread */
128 struct tlb_core_data *tcd_ptr;
129
130 /*
131 * We can have up to 3 levels of reentrancy in the TLB miss handler,
132 * in each of four exception levels (normal, crit, mcheck, debug).
133 */
134 u64 extlb[12][EX_TLB_SIZE / sizeof(u64)];
135 u64 exmc[8]; /* used for machine checks */
136 u64 excrit[8]; /* used for crit interrupts */
137 u64 exdbg[8]; /* used for debug interrupts */
138
139 /* Kernel stack pointers for use by special exceptions */
140 void *mc_kstack;
141 void *crit_kstack;
142 void *dbg_kstack;
143
144 struct tlb_core_data tcd;
145 #endif /* CONFIG_PPC_BOOK3E */
146
147 #ifdef CONFIG_PPC_BOOK3S
148 mm_context_id_t mm_ctx_id;
149 #ifdef CONFIG_PPC_MM_SLICES
150 unsigned char mm_ctx_low_slices_psize[BITS_PER_LONG / BITS_PER_BYTE];
151 unsigned char mm_ctx_high_slices_psize[SLICE_ARRAY_SIZE];
152 unsigned long mm_ctx_slb_addr_limit;
153 #else
154 u16 mm_ctx_user_psize;
155 u16 mm_ctx_sllp;
156 #endif
157 #endif
158
159 /*
160 * then miscellaneous read-write fields
161 */
162 struct task_struct *__current; /* Pointer to current */
163 u64 kstack; /* Saved Kernel stack addr */
164 u64 saved_r1; /* r1 save for RTAS calls or PM or EE=0 */
165 u64 saved_msr; /* MSR saved here by enter_rtas */
166 #ifdef CONFIG_PPC_BOOK3E
167 u16 trap_save; /* Used when bad stack is encountered */
168 #endif
169 u8 irq_soft_mask; /* mask for irq soft masking */
170 u8 irq_happened; /* irq happened while soft-disabled */
171 u8 irq_work_pending; /* IRQ_WORK interrupt while soft-disable */
172 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
173 u8 pmcregs_in_use; /* pseries puts this in lppaca */
174 #endif
175 u64 sprg_vdso; /* Saved user-visible sprg */
176 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
177 u64 tm_scratch; /* TM scratch area for reclaim */
178 #endif
179
180 #ifdef CONFIG_PPC_POWERNV
181 /* PowerNV idle fields */
182 /* PNV_CORE_IDLE_* bits, all siblings work on thread 0 paca */
183 unsigned long idle_state;
184 union {
185 /* P7/P8 specific fields */
186 struct {
187 /* PNV_THREAD_RUNNING/NAP/SLEEP */
188 u8 thread_idle_state;
189 /* Mask to denote subcore sibling threads */
190 u8 subcore_sibling_mask;
191 };
192
193 /* P9 specific fields */
194 struct {
195 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
196 /* The PSSCR value that the kernel requested before going to stop */
197 u64 requested_psscr;
198 /* Flag to request this thread not to stop */
199 atomic_t dont_stop;
200 #endif
201 };
202 };
203 #endif
204
205 #ifdef CONFIG_PPC_BOOK3S_64
206 /* Non-maskable exceptions that are not performance critical */
207 u64 exnmi[EX_SIZE]; /* used for system reset (nmi) */
208 u64 exmc[EX_SIZE]; /* used for machine checks */
209 #endif
210 #ifdef CONFIG_PPC_BOOK3S_64
211 /* Exclusive stacks for system reset and machine check exception. */
212 void *nmi_emergency_sp;
213 void *mc_emergency_sp;
214
215 u16 in_nmi; /* In nmi handler */
216
217 /*
218 * Flag to check whether we are in machine check early handler
219 * and already using emergency stack.
220 */
221 u16 in_mce;
222 u8 hmi_event_available; /* HMI event is available */
223 u8 hmi_p9_special_emu; /* HMI P9 special emulation */
224 u32 hmi_irqs; /* HMI irq stat */
225 #endif
226 u8 ftrace_enabled; /* Hard disable ftrace */
227
228 /* Stuff for accurate time accounting */
229 struct cpu_accounting_data accounting;
230 u64 dtl_ridx; /* read index in dispatch log */
231 struct dtl_entry *dtl_curr; /* pointer corresponding to dtl_ridx */
232
233 #ifdef CONFIG_KVM_BOOK3S_HANDLER
234 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
235 /* We use this to store guest state in */
236 struct kvmppc_book3s_shadow_vcpu shadow_vcpu;
237 #endif
238 struct kvmppc_host_state kvm_hstate;
239 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
240 /*
241 * Bitmap for sibling subcore status. See kvm/book3s_hv_ras.c for
242 * more details
243 */
244 struct sibling_subcore_state *sibling_subcore_state;
245 #endif
246 #endif
247 #ifdef CONFIG_PPC_BOOK3S_64
248 /*
249 * rfi fallback flush must be in its own cacheline to prevent
250 * other paca data leaking into the L1d
251 */
252 u64 exrfi[EX_SIZE] __aligned(0x80);
253 void *rfi_flush_fallback_area;
254 u64 l1d_flush_size;
255 #endif
256 #ifdef CONFIG_PPC_PSERIES
257 struct rtas_args *rtas_args_reentrant;
258 u8 *mce_data_buf; /* buffer to hold per cpu rtas errlog */
259 #endif /* CONFIG_PPC_PSERIES */
260
261 #ifdef CONFIG_PPC_BOOK3S_64
262 /* Capture SLB related old contents in MCE handler. */
263 struct slb_entry *mce_faulty_slbs;
264 u16 slb_save_cache_ptr;
265 #endif /* CONFIG_PPC_BOOK3S_64 */
266 #ifdef CONFIG_STACKPROTECTOR
267 unsigned long canary;
268 #endif
269 #ifdef CONFIG_MMIOWB
270 struct mmiowb_state mmiowb_state;
271 #endif
272 } ____cacheline_aligned;
273
274 extern void copy_mm_to_paca(struct mm_struct *mm);
275 extern struct paca_struct **paca_ptrs;
276 extern void initialise_paca(struct paca_struct *new_paca, int cpu);
277 extern void setup_paca(struct paca_struct *new_paca);
278 extern void allocate_paca_ptrs(void);
279 extern void allocate_paca(int cpu);
280 extern void free_unused_pacas(void);
281
282 #else /* CONFIG_PPC64 */
283
allocate_paca_ptrs(void)284 static inline void allocate_paca_ptrs(void) { };
allocate_paca(int cpu)285 static inline void allocate_paca(int cpu) { };
free_unused_pacas(void)286 static inline void free_unused_pacas(void) { };
287
288 #endif /* CONFIG_PPC64 */
289
290 #endif /* __KERNEL__ */
291 #endif /* _ASM_POWERPC_PACA_H */
292