1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 2020 Loongson Technology Corporation Limited
4  */
5 #include <linux/kernel.h>
6 #include <linux/mm.h>
7 
8 #include <asm/loongarchregs.h>
9 #include <asm/page.h>
10 #include <asm/pgtable.h>
11 #include <asm/tlb.h>
12 
dump_tlb_regs(void)13 void dump_tlb_regs(void)
14 {
15 	const int field = 2 * sizeof(unsigned long);
16 
17 	pr_info("Index    : 0x%0x\n", read_csr_tlbidx());
18 	pr_info("PageSize : 0x%0x\n", read_csr_pagesize());
19 	pr_info("EntryHi  : 0x%0*lx\n", field, read_csr_entryhi());
20 	pr_info("EntryLo0 : 0x%0*lx\n", field, read_csr_entrylo0());
21 	pr_info("EntryLo1 : 0x%0*lx\n", field, read_csr_entrylo1());
22 }
23 
dump_tlb(int first, int last)24 static void dump_tlb(int first, int last)
25 {
26 	unsigned long s_entryhi, entryhi, asid;
27 	unsigned long long entrylo0, entrylo1, pa;
28 	unsigned int index;
29 	unsigned int s_index, s_asid;
30 	unsigned int pagesize, c0, c1, i;
31 	unsigned long asidmask = cpu_asid_mask(&current_cpu_data);
32 	int pwidth = 16;
33 	int vwidth = 16;
34 	int asidwidth = DIV_ROUND_UP(ilog2(asidmask) + 1, 4);
35 
36 	s_entryhi = read_csr_entryhi();
37 	s_index = read_csr_tlbidx();
38 	s_asid = read_csr_asid();
39 
40 	for (i = first; i <= last; i++) {
41 		write_csr_index(i);
42 		tlb_read();
43 		pagesize = read_csr_pagesize();
44 		entryhi	 = read_csr_entryhi();
45 		entrylo0 = read_csr_entrylo0();
46 		entrylo1 = read_csr_entrylo1();
47 		index = read_csr_tlbidx();
48 		asid = read_csr_asid();
49 
50 		/* EHINV bit marks entire entry as invalid */
51 		if (index & CSR_TLBIDX_EHINV)
52 			continue;
53 		/*
54 		 * ASID takes effect in absence of G (global) bit.
55 		 */
56 		if (!((entrylo0 | entrylo1) & ENTRYLO_G) &&
57 		    asid != s_asid)
58 			continue;
59 
60 		/*
61 		 * Only print entries in use
62 		 */
63 		printk("Index: %4d pgsize=0x%x ", i, (1 << pagesize));
64 
65 		c0 = (entrylo0 & ENTRYLO_C) >> ENTRYLO_C_SHIFT;
66 		c1 = (entrylo1 & ENTRYLO_C) >> ENTRYLO_C_SHIFT;
67 
68 		pr_cont("va=0x%0*lx asid=0x%0*lx",
69 			vwidth, (entryhi & ~0x1fffUL), asidwidth, asid & asidmask);
70 
71 		/* NR/NX are in awkward places, so mask them off separately */
72 		pa = entrylo0 & ~(ENTRYLO_NR | ENTRYLO_NX);
73 		pa = pa & PAGE_MASK;
74 		pr_cont("\n\t[");
75 		pr_cont("nr=%d nx=%d ",
76 			(entrylo0 & ENTRYLO_NR) ? 1 : 0,
77 			(entrylo0 & ENTRYLO_NX) ? 1 : 0);
78 		pr_cont("pa=0x%0*llx c=%d d=%d v=%d g=%d plv=%lld] [",
79 			pwidth, pa, c0,
80 			(entrylo0 & ENTRYLO_D) ? 1 : 0,
81 			(entrylo0 & ENTRYLO_V) ? 1 : 0,
82 			(entrylo0 & ENTRYLO_G) ? 1 : 0,
83 			(entrylo0 & ENTRYLO_PLV) >> ENTRYLO_PLV_SHIFT);
84 		/* NR/NX are in awkward places, so mask them off separately */
85 		pa = entrylo1 & ~(ENTRYLO_NR | ENTRYLO_NX);
86 		pa = pa & PAGE_MASK;
87 		pr_cont("nr=%d nx=%d ",
88 			(entrylo1 & ENTRYLO_NR) ? 1 : 0,
89 			(entrylo1 & ENTRYLO_NX) ? 1 : 0);
90 		pr_cont("pa=0x%0*llx c=%d d=%d v=%d g=%d plv=%lld]\n",
91 			pwidth, pa, c1,
92 			(entrylo1 & ENTRYLO_D) ? 1 : 0,
93 			(entrylo1 & ENTRYLO_V) ? 1 : 0,
94 			(entrylo1 & ENTRYLO_G) ? 1 : 0,
95 			(entrylo1 & ENTRYLO_PLV) >> ENTRYLO_PLV_SHIFT);
96 	}
97 	printk("\n");
98 
99 	write_csr_entryhi(s_entryhi);
100 	write_csr_tlbidx(s_index);
101 	write_csr_asid(s_asid);
102 }
103 
dump_tlb_all(void)104 void dump_tlb_all(void)
105 {
106 	dump_tlb(0, current_cpu_data.tlbsize - 1);
107 }
108