1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited 4 */ 5 6 #ifndef __LS3A_KVM_IPI_H 7 #define __LS3A_KVM_IPI_H 8 9 #include <linux/mm_types.h> 10 #include <linux/hrtimer.h> 11 #include <linux/kvm_host.h> 12 #include <linux/spinlock.h> 13 14 #include <kvm/iodev.h> 15 16 typedef struct gipi_single { 17 uint32_t status; 18 uint32_t en; 19 uint32_t set; 20 uint32_t clear; 21 uint64_t buf[4]; 22 } gipi_single; 23 24 typedef struct gipiState { 25 gipi_single core[KVM_MAX_VCPUS]; 26 } gipiState; 27 28 struct ls3a_kvm_ipi; 29 30 typedef struct ipi_io_device { 31 struct ls3a_kvm_ipi *ipi; 32 struct kvm_io_device device; 33 int nodeNum; 34 } ipi_io_device; 35 36 struct ls3a_kvm_ipi { 37 spinlock_t lock; 38 struct kvm *kvm; 39 gipiState ls3a_gipistate; 40 int nodeNum; 41 ipi_io_device dev_ls3a_ipi; 42 }; 43 44 #define SMP_MAILBOX (LOONGSON_VIRT_REG_BASE + 0x0000) 45 #define KVM_IPI_REG_ADDRESS(id, off) (SMP_MAILBOX | (id << 8) | off) 46 #define KVM_IOCSR_IPI_ADDR_SIZE 0x10000 47 48 #define CORE0_STATUS_OFF 0x000 49 #define CORE0_EN_OFF 0x004 50 #define CORE0_SET_OFF 0x008 51 #define CORE0_CLEAR_OFF 0x00c 52 #define CORE0_BUF_20 0x020 53 #define CORE0_BUF_28 0x028 54 #define CORE0_BUF_30 0x030 55 #define CORE0_BUF_38 0x038 56 #define CORE0_IPI_SEND 0x040 57 #define CORE0_MAIL_SEND 0x048 58 ls3a_ipi_irqchip(struct kvm *kvm)59static inline struct ls3a_kvm_ipi *ls3a_ipi_irqchip(struct kvm *kvm) 60 { 61 return kvm->arch.v_gipi; 62 } 63 ls3a_ipi_in_kernel(struct kvm *kvm)64static inline int ls3a_ipi_in_kernel(struct kvm *kvm) 65 { 66 int ret; 67 68 ret = (ls3a_ipi_irqchip(kvm) != NULL); 69 return ret; 70 } 71 72 int kvm_create_ls3a_ipi(struct kvm *kvm); 73 void kvm_destroy_ls3a_ipi(struct kvm *kvm); 74 int kvm_set_ls3a_ipi(struct kvm *kvm, struct loongarch_gipiState *state); 75 int kvm_get_ls3a_ipi(struct kvm *kvm, struct loongarch_gipiState *state); 76 int kvm_helper_send_ipi(struct kvm_vcpu *vcpu, unsigned int cpu, unsigned int action); 77 #endif 78