1 /* 2 * Copyright (c) 2017 Rockchip Electronics Co. Ltd. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 */ 14 15 #ifndef __RK618_H__ 16 #define __RK618_H__ 17 18 #include <linux/clk.h> 19 #include <linux/delay.h> 20 #include <linux/regmap.h> 21 22 #define UPDATE(x, h, l) (((x) << (l)) & GENMASK((h), (l))) 23 #define HIWORD_UPDATE(v, h, l) (((v) << (l)) | (GENMASK((h), (l)) << 16)) 24 25 #define RK618_LVDS_CON 0x0084 26 #define LVDS_CON_START_PHASE(x) HIWORD_UPDATE(x, 14, 14) 27 #define LVDS_DCLK_INV HIWORD_UPDATE(1, 13, 13) 28 #define LVDS_CON_CHADS_10PF HIWORD_UPDATE(3, 12, 11) 29 #define LVDS_CON_CHADS_5PF HIWORD_UPDATE(2, 12, 11) 30 #define LVDS_CON_CHADS_7PF HIWORD_UPDATE(1, 12, 11) 31 #define LVDS_CON_CHADS_3PF HIWORD_UPDATE(0, 12, 11) 32 #define LVDS_CON_CHA1TTL_ENABLE HIWORD_UPDATE(1, 10, 10) 33 #define LVDS_CON_CHA1TTL_DISABLE HIWORD_UPDATE(0, 10, 10) 34 #define LVDS_CON_CHA0TTL_ENABLE HIWORD_UPDATE(1, 9, 9) 35 #define LVDS_CON_CHA0TTL_DISABLE HIWORD_UPDATE(0, 9, 9) 36 #define LVDS_CON_CHA1_POWER_UP HIWORD_UPDATE(1, 8, 8) 37 #define LVDS_CON_CHA1_POWER_DOWN HIWORD_UPDATE(0, 8, 8) 38 #define LVDS_CON_CHA0_POWER_UP HIWORD_UPDATE(1, 7, 7) 39 #define LVDS_CON_CHA0_POWER_DOWN HIWORD_UPDATE(0, 7, 7) 40 #define LVDS_CON_CBG_POWER_UP HIWORD_UPDATE(1, 6, 6) 41 #define LVDS_CON_CBG_POWER_DOWN HIWORD_UPDATE(0, 6, 6) 42 #define LVDS_CON_PLL_POWER_DOWN HIWORD_UPDATE(1, 5, 5) 43 #define LVDS_CON_PLL_POWER_UP HIWORD_UPDATE(0, 5, 5) 44 #define LVDS_CON_START_SEL_EVEN_PIXEL HIWORD_UPDATE(1, 4, 4) 45 #define LVDS_CON_START_SEL_ODD_PIXEL HIWORD_UPDATE(0, 4, 4) 46 #define LVDS_CON_CHASEL_DOUBLE_CHANNEL HIWORD_UPDATE(1, 3, 3) 47 #define LVDS_CON_CHASEL_SINGLE_CHANNEL HIWORD_UPDATE(0, 3, 3) 48 #define LVDS_CON_MSBSEL_D7 HIWORD_UPDATE(1, 2, 2) 49 #define LVDS_CON_MSBSEL_D0 HIWORD_UPDATE(0, 2, 2) 50 #define LVDS_CON_SELECT(x) HIWORD_UPDATE(x, 1, 0) 51 #define LVDS_CON_SELECT_6BIT_MODE HIWORD_UPDATE(3, 1, 0) 52 #define LVDS_CON_SELECT_8BIT_MODE_3 HIWORD_UPDATE(2, 1, 0) 53 #define LVDS_CON_SELECT_8BIT_MODE_2 HIWORD_UPDATE(1, 1, 0) 54 #define LVDS_CON_SELECT_8BIT_MODE_1 HIWORD_UPDATE(0, 1, 0) 55 #define RK618_IO_CON0 0x0088 56 #define VIF1_SYNC_MODE_ENABLE HIWORD_UPDATE(1, 15, 15) 57 #define VIF1_SYNC_MODE_DISABLE HIWORD_UPDATE(0, 15, 15) 58 #define VIF0_SYNC_MODE_ENABLE HIWORD_UPDATE(1, 14, 14) 59 #define VIF0_SYNC_MODE_DISABLE HIWORD_UPDATE(0, 14, 14) 60 #define PORT2_OUTPUT_LVDS HIWORD_UPDATE(1, 11, 11) 61 #define PORT2_OUTPUT_TTL HIWORD_UPDATE(0, 11, 11) 62 #define PORT1_OUTPUT_TTL_DISABLE HIWORD_UPDATE(1, 10, 10) 63 #define PORT1_OUTPUT_TTL_ENABLE HIWORD_UPDATE(0, 10, 10) 64 #define PORT2_IO_PULL_DOWN_DISABLE HIWORD_UPDATE(1, 9, 9) 65 #define PORT2_IO_PULL_DOWN_ENABLE HIWORD_UPDATE(0, 9, 9) 66 #define PORT1_IO_PULL_DOWN_DISABLE HIWORD_UPDATE(1, 8, 8) 67 #define PORT1_IO_PULL_DOWN_ENABLE HIWORD_UPDATE(0, 8, 8) 68 #define PORT0_IO_PULL_DOWN_DISABLE HIWORD_UPDATE(1, 7, 7) 69 #define PORT0_IO_PULL_DOWN_ENABLE HIWORD_UPDATE(0, 7, 7) 70 #define HDMI_IO_PULL_UP_DISABLE HIWORD_UPDATE(1, 6, 6) 71 #define HDMI_IO_PULL_UP_ENABLE HIWORD_UPDATE(0, 6, 6) 72 #define I2C_IO_PULL_UP_DISABLE HIWORD_UPDATE(1, 2, 2) 73 #define I2C_IO_PULL_UP_ENABLE HIWORD_UPDATE(0, 2, 2) 74 #define INT_IO_PULL_UP HIWORD_UPDATE(1, 1, 1) 75 #define INT_IO_PULL_DOWN HIWORD_UPDATE(0, 1, 1) 76 #define CLKIN_IO_PULL_UP HIWORD_UPDATE(1, 0, 0) 77 #define CLKIN_IO_PULL_DOWN HIWORD_UPDATE(0, 0, 0) 78 #define RK618_IO_CON1 0x008c 79 #define PORT2_IO_SCHMITT_INPUT_ENABLE HIWORD_UPDATE(1, 9, 9) 80 #define PORT2_IO_SCHMITT_INPUT_DISABLE HIWORD_UPDATE(0, 9, 9) 81 #define PORT1_IO_SCHMITT_INPUT_ENABLE HIWORD_UPDATE(1, 8, 8) 82 #define PORT1_IO_SCHMITT_INPUT_DISABLE HIWORD_UPDATE(0, 8, 8) 83 #define PORT0_IO_SCHMITT_INPUT_ENABLE HIWORD_UPDATE(1, 7, 7) 84 #define PORT0_IO_SCHMITT_INPUT_DISABLE HIWORD_UPDATE(0, 7, 7) 85 #define HDMI_IO_SCHMITT_INPUT_ENABLE HIWORD_UPDATE(1, 6, 6) 86 #define HDMI_IO_SCHMITT_INPUT_DISABLE HIWORD_UPDATE(0, 6, 6) 87 #define I2C_IO_SCHMITT_INPUT_ENABLE HIWORD_UPDATE(1, 2, 2) 88 #define I2C_IO_SCHMITT_INPUT_DISABLE HIWORD_UPDATE(0, 2, 2) 89 #define INT_IO_SCHMITT_INPUT_ENABLE HIWORD_UPDATE(1, 1, 1) 90 #define INT_IO_SCHMITT_INPUT_DISABLE HIWORD_UPDATE(0, 1, 1) 91 #define CLKIN_IO_SCHMITT_INPUT_ENABLE HIWORD_UPDATE(1, 0, 0) 92 #define CLKIN_IO_SCHMITT_INPUT_DISABLE HIWORD_UPDATE(0, 0, 0) 93 #define RK618_MISC_CON 0x009c 94 #define HDMI_INT_STATUS BIT(20) 95 #define MIPI_INT_STATUS BIT(19) 96 #define MIPI_EDPI_HALT BIT(16) 97 #define HDMI_HSYNC_POL_INV BIT(15) 98 #define HDMI_VSYNC_POL_INV BIT(14) 99 #define HDMI_CLK_SEL_MASK GENMASK(13, 12) 100 #define HDMI_CLK_SEL_VIDEO_INF0_CLK UPDATE(2, 13, 12) 101 #define HDMI_CLK_SEL_SCALER_CLK UPDATE(1, 13, 12) 102 #define HDMI_CLK_SEL_VIDEO_INF1_CLK 0 103 #define INT_ACTIVE_LOW BIT(5) 104 #define INT_ACTIVE_HIGH 0 105 #define DOUBLE_CH_LVDS_DEN_POLARITY BIT(4) 106 #define DOUBLE_CH_LVDS_DEN_LOW BIT(4) 107 #define DOUBLE_CH_LVDS_DEN_HIGH 0 108 #define DOUBLE_CH_LVDS_HSYNC_POLARITY BIT(3) 109 #define DOUBLE_CH_LVDS_HSYNC_LOW BIT(3) 110 #define DOUBLE_CH_LVDS_HSYNC_HIGH 0 111 #define MIPI_DPICOLOM BIT(2) 112 #define MIPI_DPISHUTDN BIT(1) 113 114 struct rk618 { 115 struct device *dev; 116 struct i2c_client *client; 117 struct clk *clkin; 118 struct regmap *regmap; 119 120 struct regulator *supply; 121 struct gpio_desc *enable_gpio; 122 struct gpio_desc *reset_gpio; /* power on reset */ 123 }; 124 125 #endif 126