1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 drivers/video/rockchip/transmitter/mipi_dsi.h
4 */
5 #ifndef MIPI_DSI_H_
6 #define MIPI_DSI_H_
7 
8 #ifdef CONFIG_MIPI_DSI_FT
9 #include "..\..\common\config.h"
10 #endif
11 
12 //DSI DATA TYPE
13 #define DTYPE_DCS_SWRITE_0P		0x05
14 #define DTYPE_DCS_SWRITE_1P		0x15
15 #define DTYPE_DCS_LWRITE		0x39
16 #define DTYPE_GEN_LWRITE		0x29
17 #define DTYPE_GEN_SWRITE_2P		0x23
18 #define DTYPE_GEN_SWRITE_1P		0x13
19 #define DTYPE_GEN_SWRITE_0P		0x03
20 
21 //command transmit mode
22 #define HSDT			0x00
23 #define LPDT			0x01
24 
25 //DSI DATA TYPE FLAG
26 #define DATA_TYPE_DCS			0x00
27 #define DATA_TYPE_GEN			0x01
28 
29 //Video Mode
30 #define VM_NBMWSP		0x00  //Non burst mode with sync pulses
31 #define VM_NBMWSE		0x01  //Non burst mode with sync events
32 #define VM_BM			0x02  //Burst mode
33 
34 //Video Pixel Format
35 #define VPF_16BPP		0x00
36 #define VPF_18BPP		0x01	 //packed
37 #define VPF_18BPPL		0x02     //loosely packed
38 #define VPF_24BPP		0x03
39 
40 //Display Command Set
41 #define dcs_enter_idle_mode 		0x39
42 #define dcs_enter_invert_mode 		0x21
43 #define dcs_enter_normal_mode 		0x13
44 #define dcs_enter_partial_mode  	0x12
45 #define dcs_enter_sleep_mode  		0x10
46 #define dcs_exit_idle_mode  		0x38
47 #define dcs_exit_invert_mode  		0x20
48 #define dcs_exit_sleep_mode  		0x11
49 #define dcs_get_address_mode  		0x0b
50 #define dcs_get_blue_channel  		0x08
51 #define dcs_get_diagnostic_result  	0x0f
52 #define dcs_get_display_mode  		0x0d
53 #define dcs_get_green_channel  		0x07
54 #define dcs_get_pixel_format  		0x0c
55 #define dcs_get_power_mode  		0x0a
56 #define dcs_get_red_channel 		0x06
57 #define dcs_get_scanline 	 		0x45
58 #define dcs_get_signal_mode  		0x0e
59 #define dcs_nop				 		0x00
60 #define dcs_read_DDB_continue  		0xa8
61 #define dcs_read_DDB_start  		0xa1
62 #define dcs_read_memory_continue  	0x3e
63 #define dcs_read_memory_start  		0x2e
64 #define dcs_set_address_mode  		0x36
65 #define dcs_set_column_address  	0x2a
66 #define dcs_set_display_off  		0x28
67 #define dcs_set_display_on  		0x29
68 #define dcs_set_gamma_curve  		0x26
69 #define dcs_set_page_address  		0x2b
70 #define dcs_set_partial_area  		0x30
71 #define dcs_set_pixel_format  		0x3a
72 #define dcs_set_scroll_area  		0x33
73 #define dcs_set_scroll_start  		0x37
74 #define dcs_set_tear_off 	 		0x34
75 #define dcs_set_tear_on 	 		0x35
76 #define dcs_set_tear_scanline  		0x44
77 #define dcs_soft_reset 		 		0x01
78 #define dcs_write_LUT 		 		0x2d
79 #define dcs_write_memory_continue  	0x3c
80 #define dcs_write_memory_start 		0x2c
81 
82 #ifndef MHz
83 #define MHz   1000000
84 #endif
85 
86 
87 #if 0
88 typedef signed char s8;
89 typedef unsigned char u8;
90 
91 typedef signed short s16;
92 typedef unsigned short u16;
93 
94 typedef signed int s32;
95 typedef unsigned int u32;
96 
97 typedef signed long s64;
98 typedef unsigned long u64;
99 #endif
100 
101 
102 //iomux
103 #define OLD_RK_IOMUX 0
104 
105 
106 #endif /* end of MIPI_DSI_H_ */
107