1 /* 2 * MIPI DSI Bus 3 * 4 * Copyright (c) Fuzhou Rockchip Electronics Co.Ltd 5 * Authors: 6 * Mark Yao <yzq@rock-chips.com> 7 * 8 * based on include/drm/drm_mipi_dsi.h 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 */ 14 15 #ifndef _DRM_MIPI_DSI_H__ 16 #define _DRM_MIPI_DSI_H__ 17 18 /* DSI mode flags */ 19 20 /* video mode */ 21 #define MIPI_DSI_MODE_VIDEO (1 << 0) 22 /* video burst mode */ 23 #define MIPI_DSI_MODE_VIDEO_BURST (1 << 1) 24 /* video pulse mode */ 25 #define MIPI_DSI_MODE_VIDEO_SYNC_PULSE (1 << 2) 26 /* enable auto vertical count mode */ 27 #define MIPI_DSI_MODE_VIDEO_AUTO_VERT (1 << 3) 28 /* enable hsync-end packets in vsync-pulse and v-porch area */ 29 #define MIPI_DSI_MODE_VIDEO_HSE (1 << 4) 30 /* disable hfront-porch area */ 31 #define MIPI_DSI_MODE_VIDEO_HFP (1 << 5) 32 /* disable hback-porch area */ 33 #define MIPI_DSI_MODE_VIDEO_HBP (1 << 6) 34 /* disable hsync-active area */ 35 #define MIPI_DSI_MODE_VIDEO_HSA (1 << 7) 36 /* flush display FIFO on vsync pulse */ 37 #define MIPI_DSI_MODE_VSYNC_FLUSH (1 << 8) 38 /* disable EoT packets in HS mode */ 39 #define MIPI_DSI_MODE_EOT_PACKET (1 << 9) 40 /* device supports non-continuous clock behavior (DSI spec 5.6.1) */ 41 #define MIPI_DSI_CLOCK_NON_CONTINUOUS (1 << 10) 42 /* transmit data in low power */ 43 #define MIPI_DSI_MODE_LPM (1 << 11) 44 45 #define MIPI_DSI_FMT_RGB888 0 46 #define MIPI_DSI_FMT_RGB666 1 47 #define MIPI_DSI_FMT_RGB666_PACKED 2 48 #define MIPI_DSI_FMT_RGB565 3 49 50 #define MIPI_CSI_FMT_RAW8 0x10 51 #define MIPI_CSI_FMT_RAW10 0x11 52 53 #endif /* __DRM_MIPI_DSI__ */ 54