1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
4 *
5 * author:
6 * Alpha Lin, alpha.lin@rock-chips.com
7 * Randy Li, randy.li@rock-chips.com
8 * Ding Wei, leo.ding@rock-chips.com
9 *
10 */
11 #include <asm/cacheflush.h>
12 #include <linux/delay.h>
13 #include <linux/iopoll.h>
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/types.h>
17 #include <linux/of_platform.h>
18 #include <linux/slab.h>
19 #include <linux/seq_file.h>
20 #include <linux/uaccess.h>
21 #include <linux/regmap.h>
22 #include <linux/proc_fs.h>
23 #include <linux/nospec.h>
24 #include <soc/rockchip/pm_domains.h>
25
26 #include "mpp_debug.h"
27 #include "mpp_common.h"
28 #include "mpp_iommu.h"
29
30 #define VEPU1_DRIVER_NAME "mpp_vepu1"
31
32 #define VEPU1_SESSION_MAX_BUFFERS 20
33 /* The maximum registers number of all the version */
34 #define VEPU1_REG_NUM 164
35 #define VEPU1_REG_HW_ID_INDEX 0
36 #define VEPU1_REG_START_INDEX 0
37 #define VEPU1_REG_END_INDEX 163
38
39 #define VEPU1_REG_INT 0x004
40 #define VEPU1_REG_INT_INDEX (1)
41 #define VEPU1_INT_SLICE BIT(8)
42 #define VEPU1_INT_TIMEOUT BIT(6)
43 #define VEPU1_INT_BUF_FULL BIT(5)
44 #define VEPU1_INT_RESET BIT(4)
45 #define VEPU1_INT_BUS_ERROR BIT(3)
46 #define VEPU1_INT_RDY BIT(2)
47 #define VEPU1_IRQ_DIS BIT(1)
48 #define VEPU1_INT_RAW BIT(0)
49
50 #define VEPU1_REG_ENC_EN 0x038
51 #define VEPU1_REG_ENC_EN_INDEX (14)
52 #define VEPU1_INT_TIMEOUT_EN BIT(31)
53 #define VEPU1_INT_SLICE_EN BIT(28)
54 #define VEPU1_ENC_START BIT(0)
55
56 #define VEPU1_GET_FORMAT(x) (((x) >> 1) & 0x3)
57 #define VEPU1_FORMAT_MASK (0x06)
58
59 #define VEPU1_FMT_RESERVED (0)
60 #define VEPU1_FMT_VP8E (1)
61 #define VEPU1_FMT_JPEGE (2)
62 #define VEPU1_FMT_H264E (3)
63
64 #define VEPU1_REG_CLR_CACHE_BASE 0xc10
65
66 #define to_vepu_task(task) container_of(task, struct vepu_task, mpp_task)
67 #define to_vepu_dev(dev) container_of(dev, struct vepu_dev, mpp)
68
69 struct vepu_task {
70 struct mpp_task mpp_task;
71
72 enum MPP_CLOCK_MODE clk_mode;
73 u32 reg[VEPU1_REG_NUM];
74
75 struct reg_offset_info off_inf;
76 u32 irq_status;
77 /* req for current task */
78 u32 w_req_cnt;
79 struct mpp_request w_reqs[MPP_MAX_MSG_NUM];
80 u32 r_req_cnt;
81 struct mpp_request r_reqs[MPP_MAX_MSG_NUM];
82 };
83
84 struct vepu_session_priv {
85 struct rw_semaphore rw_sem;
86 /* codec info from user */
87 struct {
88 /* show mode */
89 u32 flag;
90 /* item data */
91 u64 val;
92 } codec_info[ENC_INFO_BUTT];
93 };
94
95 struct vepu_dev {
96 struct mpp_dev mpp;
97
98 struct mpp_clk_info aclk_info;
99 struct mpp_clk_info hclk_info;
100 #ifdef CONFIG_ROCKCHIP_MPP_PROC_FS
101 struct proc_dir_entry *procfs;
102 #endif
103 struct reset_control *rst_a;
104 struct reset_control *rst_h;
105 };
106
107 static struct mpp_hw_info vepu_v1_hw_info = {
108 .reg_num = VEPU1_REG_NUM,
109 .reg_id = VEPU1_REG_HW_ID_INDEX,
110 .reg_start = VEPU1_REG_START_INDEX,
111 .reg_end = VEPU1_REG_END_INDEX,
112 .reg_en = VEPU1_REG_ENC_EN_INDEX,
113 };
114
115 /*
116 * file handle translate information
117 */
118 static const u16 trans_tbl_default[] = {5, 6, 7, 8, 9, 10, 11, 12, 13, 51};
119
120 static const u16 trans_tbl_vp8e[] = {5, 6, 7, 8, 9, 10, 11, 12, 13, 16, 17, 26, 51, 52, 58, 59, 71};
121
122 static struct mpp_trans_info trans_rk_vepu1[] = {
123 [VEPU1_FMT_RESERVED] =
124 {
125 .count = 0,
126 .table = NULL,
127 },
128 [VEPU1_FMT_VP8E] =
129 {
130 .count = ARRAY_SIZE(trans_tbl_vp8e),
131 .table = trans_tbl_vp8e,
132 },
133 [VEPU1_FMT_JPEGE] =
134 {
135 .count = ARRAY_SIZE(trans_tbl_default),
136 .table = trans_tbl_default,
137 },
138 [VEPU1_FMT_H264E] =
139 {
140 .count = ARRAY_SIZE(trans_tbl_default),
141 .table = trans_tbl_default,
142 },
143 };
144
vepu_process_reg_fd(struct mpp_session *session, struct vepu_task *task, struct mpp_task_msgs *msgs)145 static int vepu_process_reg_fd(struct mpp_session *session, struct vepu_task *task, struct mpp_task_msgs *msgs)
146 {
147 int ret = 0;
148 int fmt = VEPU1_GET_FORMAT(task->reg[VEPU1_REG_ENC_EN_INDEX]);
149 ret = mpp_translate_reg_address(session, &task->mpp_task, fmt, task->reg, &task->off_inf);
150 if (ret) {
151 return ret;
152 }
153 mpp_translate_reg_offset_info(&task->mpp_task, &task->off_inf, task->reg);
154 return 0;
155 }
156
vepu_extract_task_msg(struct vepu_task *task, struct mpp_task_msgs *msgs)157 static int vepu_extract_task_msg(struct vepu_task *task, struct mpp_task_msgs *msgs)
158 {
159 u32 i;
160 int ret;
161 struct mpp_request *req;
162 struct mpp_hw_info *hw_info = task->mpp_task.hw_info;
163 for (i = 0; i < msgs->req_cnt; i++) {
164 u32 off_s, off_e;
165 req = &msgs->reqs[i];
166 if (!req->size) {
167 continue;
168 }
169 switch (req->cmd) {
170 case MPP_CMD_SET_REG_WRITE: {
171 off_s = hw_info->reg_start * sizeof(u32);
172 off_e = hw_info->reg_end * sizeof(u32);
173 ret = mpp_check_req(req, 0, sizeof(task->reg), off_s, off_e);
174 if (ret) {
175 continue;
176 }
177 if (copy_from_user((u8 *)task->reg + req->offset, req->data, req->size)) {
178 mpp_err("copy_from_user reg failed\n");
179 return -EIO;
180 }
181 memcpy(&task->w_reqs[task->w_req_cnt++], req, sizeof(*req));
182 break;
183 }
184 case MPP_CMD_SET_REG_READ: {
185 off_s = hw_info->reg_start * sizeof(u32);
186 off_e = hw_info->reg_end * sizeof(u32);
187 ret = mpp_check_req(req, 0, sizeof(task->reg), off_s, off_e);
188 if (ret) {
189 continue;
190 }
191 memcpy(&task->r_reqs[task->r_req_cnt++], req, sizeof(*req));
192 break;
193 }
194 case MPP_CMD_SET_REG_ADDR_OFFSET: {
195 mpp_extract_reg_offset_info(&task->off_inf, req);
196 break;
197 }
198 default:
199 break;
200 }
201 }
202 mpp_debug(DEBUG_TASK_INFO, "w_req_cnt %d, r_req_cnt %d\n", task->w_req_cnt, task->r_req_cnt);
203 return 0;
204 }
205
vepu_alloc_task(struct mpp_session *session, struct mpp_task_msgs *msgs)206 static void *vepu_alloc_task(struct mpp_session *session, struct mpp_task_msgs *msgs)
207 {
208 int ret;
209 struct mpp_task *mpp_task = NULL;
210 struct vepu_task *task = NULL;
211 struct mpp_dev *mpp = session->mpp;
212
213 mpp_debug_enter();
214
215 task = kzalloc(sizeof(*task), GFP_KERNEL);
216 if (!task) {
217 return NULL;
218 }
219
220 mpp_task = &task->mpp_task;
221 mpp_task_init(session, mpp_task);
222 mpp_task->hw_info = mpp->var->hw_info;
223 mpp_task->reg = task->reg;
224 /* extract reqs for current task */
225 ret = vepu_extract_task_msg(task, msgs);
226 if (ret) {
227 goto fail;
228 }
229 /* process fd in register */
230 if (!(msgs->flags & MPP_FLAGS_REG_FD_NO_TRANS)) {
231 ret = vepu_process_reg_fd(session, task, msgs);
232 if (ret) {
233 goto fail;
234 }
235 }
236 task->clk_mode = CLK_MODE_NORMAL;
237
238 mpp_debug_leave();
239
240 return mpp_task;
241
242 fail:
243 mpp_task_dump_mem_region(mpp, mpp_task);
244 mpp_task_dump_reg(mpp, mpp_task);
245 mpp_task_finalize(session, mpp_task);
246 kfree(task);
247 return NULL;
248 }
249
vepu_run(struct mpp_dev *mpp, struct mpp_task *mpp_task)250 static int vepu_run(struct mpp_dev *mpp, struct mpp_task *mpp_task)
251 {
252 u32 i;
253 u32 reg_en;
254 struct vepu_task *task = to_vepu_task(mpp_task);
255
256 mpp_debug_enter();
257
258 /* clear cache */
259 mpp_write_relaxed(mpp, VEPU1_REG_CLR_CACHE_BASE, 1);
260 /* set registers for hardware */
261 reg_en = mpp_task->hw_info->reg_en;
262 /* First, flush correct encoder format */
263 mpp_write_relaxed(mpp, VEPU1_REG_ENC_EN, task->reg[reg_en] & VEPU1_FORMAT_MASK);
264 /* Second, flush others register */
265 for (i = 0; i < task->w_req_cnt; i++) {
266 struct mpp_request *req = &task->w_reqs[i];
267 int s = req->offset / sizeof(u32);
268 int e = s + req->size / sizeof(u32);
269
270 mpp_write_req(mpp, task->reg, s, e, reg_en);
271 }
272 /* init current task */
273 mpp->cur_task = mpp_task;
274 /* Last, flush start registers */
275 wmb();
276 mpp_write(mpp, VEPU1_REG_ENC_EN, task->reg[reg_en] | VEPU1_ENC_START);
277
278 mpp_debug_leave();
279
280 return 0;
281 }
282
vepu_irq(struct mpp_dev *mpp)283 static int vepu_irq(struct mpp_dev *mpp)
284 {
285 mpp->irq_status = mpp_read(mpp, VEPU1_REG_INT);
286 if (!(mpp->irq_status & VEPU1_INT_RAW)) {
287 return IRQ_NONE;
288 }
289
290 mpp_write(mpp, VEPU1_REG_INT, 0);
291
292 return IRQ_WAKE_THREAD;
293 }
294
vepu_isr(struct mpp_dev *mpp)295 static int vepu_isr(struct mpp_dev *mpp)
296 {
297 u32 err_mask;
298 struct vepu_task *task = NULL;
299 struct mpp_task *mpp_task = mpp->cur_task;
300 /* use a spin lock here */
301 if (!mpp_task) {
302 dev_err(mpp->dev, "no current task\n");
303 return IRQ_HANDLED;
304 }
305 mpp_time_diff(mpp_task);
306 mpp->cur_task = NULL;
307 task = to_vepu_task(mpp_task);
308 task->irq_status = mpp->irq_status;
309 mpp_debug(DEBUG_IRQ_STATUS, "irq_status: %08x\n", task->irq_status);
310 err_mask = VEPU1_INT_TIMEOUT | VEPU1_INT_BUF_FULL | VEPU1_INT_BUS_ERROR;
311 if (err_mask & task->irq_status) {
312 atomic_inc(&mpp->reset_request);
313 }
314 mpp_task_finish(mpp_task->session, mpp_task);
315 mpp_debug_leave();
316 return IRQ_HANDLED;
317 }
318
vepu_finish(struct mpp_dev *mpp, struct mpp_task *mpp_task)319 static int vepu_finish(struct mpp_dev *mpp, struct mpp_task *mpp_task)
320 {
321 u32 i;
322 u32 s, e;
323 struct mpp_request *req;
324 struct vepu_task *task = to_vepu_task(mpp_task);
325
326 mpp_debug_enter();
327
328 /* read register after running */
329 for (i = 0; i < task->r_req_cnt; i++) {
330 req = &task->r_reqs[i];
331 s = req->offset / sizeof(u32);
332 e = s + req->size / sizeof(u32);
333 mpp_read_req(mpp, task->reg, s, e);
334 }
335 /* revert hack for irq status */
336 task->reg[VEPU1_REG_INT_INDEX] = task->irq_status;
337
338 mpp_debug_leave();
339
340 return 0;
341 }
342
vepu_result(struct mpp_dev *mpp, struct mpp_task *mpp_task, struct mpp_task_msgs *msgs)343 static int vepu_result(struct mpp_dev *mpp, struct mpp_task *mpp_task, struct mpp_task_msgs *msgs)
344 {
345 u32 i;
346 struct mpp_request *req;
347 struct vepu_task *task = to_vepu_task(mpp_task);
348
349 /* may overflow the kernel */
350 for (i = 0; i < task->r_req_cnt; i++) {
351 req = &task->r_reqs[i];
352
353 if (copy_to_user(req->data, (u8 *)task->reg + req->offset, req->size)) {
354 mpp_err("copy_to_user reg fail\n");
355 return -EIO;
356 }
357 }
358 return 0;
359 }
360
vepu_free_task(struct mpp_session *session, struct mpp_task *mpp_task)361 static int vepu_free_task(struct mpp_session *session, struct mpp_task *mpp_task)
362 {
363 struct vepu_task *task = to_vepu_task(mpp_task);
364 mpp_task_finalize(session, mpp_task);
365 kfree(task);
366 return 0;
367 }
368
vepu_control(struct mpp_session *session, struct mpp_request *req)369 static int vepu_control(struct mpp_session *session, struct mpp_request *req)
370 {
371 switch (req->cmd) {
372 case MPP_CMD_SEND_CODEC_INFO: {
373 int i;
374 int cnt;
375 struct codec_info_elem elem;
376 struct vepu_session_priv *priv;
377 if (!session || !session->priv) {
378 mpp_err("session info null\n");
379 return -EINVAL;
380 }
381 priv = session->priv;
382 cnt = req->size / sizeof(elem);
383 cnt = (cnt > ENC_INFO_BUTT) ? ENC_INFO_BUTT : cnt;
384 mpp_debug(DEBUG_IOCTL, "codec info count %d\n", cnt);
385 down_write(&priv->rw_sem);
386 for (i = 0; i < cnt; i++) {
387 if (copy_from_user(&elem, req->data + i * sizeof(elem), sizeof(elem))) {
388 mpp_err("copy_from_user failed\n");
389 continue;
390 }
391 if (elem.type > ENC_INFO_BASE && elem.type < ENC_INFO_BUTT && elem.flag > CODEC_INFO_FLAG_NULL &&
392 elem.flag < CODEC_INFO_FLAG_BUTT) {
393 elem.type = array_index_nospec(elem.type, ENC_INFO_BUTT);
394 priv->codec_info[elem.type].flag = elem.flag;
395 priv->codec_info[elem.type].val = elem.data;
396 } else {
397 mpp_err("codec info invalid, type %d, flag %d\n", elem.type, elem.flag);
398 }
399 }
400 up_write(&priv->rw_sem);
401 break;
402 }
403 default: {
404 mpp_err("unknown mpp ioctl cmd %x\n", req->cmd);
405 break;
406 }
407 }
408 return 0;
409 }
410
vepu_free_session(struct mpp_session *session)411 static int vepu_free_session(struct mpp_session *session)
412 {
413 if (session && session->priv) {
414 kfree(session->priv);
415 session->priv = NULL;
416 }
417
418 return 0;
419 }
420
vepu_init_session(struct mpp_session *session)421 static int vepu_init_session(struct mpp_session *session)
422 {
423 struct vepu_session_priv *priv;
424
425 if (!session) {
426 mpp_err("session is null\n");
427 return -EINVAL;
428 }
429
430 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
431 if (!priv) {
432 return -ENOMEM;
433 }
434
435 init_rwsem(&priv->rw_sem);
436 session->priv = priv;
437
438 return 0;
439 }
440
441 #ifdef CONFIG_ROCKCHIP_MPP_PROC_FS
vepu_procfs_remove(struct mpp_dev *mpp)442 static int vepu_procfs_remove(struct mpp_dev *mpp)
443 {
444 struct vepu_dev *enc = to_vepu_dev(mpp);
445
446 if (enc->procfs) {
447 proc_remove(enc->procfs);
448 enc->procfs = NULL;
449 }
450
451 return 0;
452 }
453
vepu_dump_session(struct mpp_session *session, struct seq_file *seq)454 static int vepu_dump_session(struct mpp_session *session, struct seq_file *seq)
455 {
456 int i;
457 struct vepu_session_priv *priv = session->priv;
458
459 down_read(&priv->rw_sem);
460 /* item name */
461 seq_puts(seq, "------------------------------------------------------");
462 seq_puts(seq, "------------------------------------------------------\n");
463 seq_printf(seq, "|%8s|", (const char *)"session");
464 seq_printf(seq, "%8s|", (const char *)"device");
465 for (i = ENC_INFO_BASE; i < ENC_INFO_BUTT; i++) {
466 bool show = priv->codec_info[i].flag;
467
468 if (show) {
469 seq_printf(seq, "%8s|", enc_info_item_name[i]);
470 }
471 }
472 seq_puts(seq, "\n");
473 /* item data */
474 seq_printf(seq, "|%8p|", session);
475 seq_printf(seq, "%8s|", mpp_device_name[session->device_type]);
476 for (i = ENC_INFO_BASE; i < ENC_INFO_BUTT; i++) {
477 u32 flag = priv->codec_info[i].flag;
478
479 if (!flag) {
480 continue;
481 }
482 if (flag == CODEC_INFO_FLAG_NUMBER) {
483 u32 data = priv->codec_info[i].val;
484
485 seq_printf(seq, "%8d|", data);
486 } else if (flag == CODEC_INFO_FLAG_STRING) {
487 const char *name = (const char *)&priv->codec_info[i].val;
488
489 seq_printf(seq, "%8s|", name);
490 } else {
491 seq_printf(seq, "%8s|", (const char *)"null");
492 }
493 }
494 seq_puts(seq, "\n");
495 up_read(&priv->rw_sem);
496
497 return 0;
498 }
499
vepu_show_session_info(struct seq_file *seq, void *offset)500 static int vepu_show_session_info(struct seq_file *seq, void *offset)
501 {
502 struct mpp_session *session = NULL, *n;
503 struct mpp_dev *mpp = seq->private;
504
505 mutex_lock(&mpp->srv->session_lock);
506 list_for_each_entry_safe(session, n, &mpp->srv->session_list, session_link)
507 {
508 if (session->device_type != MPP_DEVICE_VEPU1) {
509 continue;
510 }
511 if (!session->priv) {
512 continue;
513 }
514 if (mpp->dev_ops->dump_session) {
515 mpp->dev_ops->dump_session(session, seq);
516 }
517 }
518 mutex_unlock(&mpp->srv->session_lock);
519
520 return 0;
521 }
522
vepu_procfs_init(struct mpp_dev *mpp)523 static int vepu_procfs_init(struct mpp_dev *mpp)
524 {
525 struct vepu_dev *enc = to_vepu_dev(mpp);
526
527 enc->procfs = proc_mkdir(mpp->dev->of_node->name, mpp->srv->procfs);
528 if (IS_ERR_OR_NULL(enc->procfs)) {
529 mpp_err("failed on open procfs\n");
530 enc->procfs = NULL;
531 return -EIO;
532 }
533 mpp_procfs_create_u32("aclk", FILE_RIGHT_644, enc->procfs, &enc->aclk_info.debug_rate_hz);
534 mpp_procfs_create_u32("session_buffers", FILE_RIGHT_644, enc->procfs, &mpp->session_max_buffers);
535 /* for show session info */
536 proc_create_single_data("sessions-info", FILE_RIGHT_444, enc->procfs, vepu_show_session_info, mpp);
537
538 return 0;
539 }
540 #else
vepu_procfs_remove(struct mpp_dev *mpp)541 static inline int vepu_procfs_remove(struct mpp_dev *mpp)
542 {
543 return 0;
544 }
545
vepu_procfs_init(struct mpp_dev *mpp)546 static inline int vepu_procfs_init(struct mpp_dev *mpp)
547 {
548 return 0;
549 }
550
vepu_dump_session(struct mpp_session *session, struct seq_file *seq)551 static inline int vepu_dump_session(struct mpp_session *session, struct seq_file *seq)
552 {
553 return 0;
554 }
555 #endif
556
vepu_init(struct mpp_dev *mpp)557 static int vepu_init(struct mpp_dev *mpp)
558 {
559 int ret;
560 struct vepu_dev *enc = to_vepu_dev(mpp);
561
562 mpp->grf_info = &mpp->srv->grf_infos[MPP_DRIVER_VEPU1];
563
564 /* Get clock info from dtsi */
565 ret = mpp_get_clk_info(mpp, &enc->aclk_info, "aclk_vcodec");
566 if (ret) {
567 mpp_err("failed on clk_get aclk_vcodec\n");
568 }
569 ret = mpp_get_clk_info(mpp, &enc->hclk_info, "hclk_vcodec");
570 if (ret) {
571 mpp_err("failed on clk_get hclk_vcodec\n");
572 }
573 /* Set default rates */
574 mpp_set_clk_info_rate_hz(&enc->aclk_info, CLK_MODE_DEFAULT, 0x12C * MHZ);
575
576 /* Get reset control from dtsi */
577 enc->rst_a = mpp_reset_control_get(mpp, RST_TYPE_A, "video_a");
578 if (!enc->rst_a) {
579 mpp_err("No aclk reset resource define\n");
580 }
581 enc->rst_h = mpp_reset_control_get(mpp, RST_TYPE_H, "video_h");
582 if (!enc->rst_h) {
583 mpp_err("No hclk reset resource define\n");
584 }
585
586 return 0;
587 }
588
vepu_clk_on(struct mpp_dev *mpp)589 static int vepu_clk_on(struct mpp_dev *mpp)
590 {
591 struct vepu_dev *enc = to_vepu_dev(mpp);
592
593 mpp_clk_safe_enable(enc->aclk_info.clk);
594 mpp_clk_safe_enable(enc->hclk_info.clk);
595
596 return 0;
597 }
598
vepu_clk_off(struct mpp_dev *mpp)599 static int vepu_clk_off(struct mpp_dev *mpp)
600 {
601 struct vepu_dev *enc = to_vepu_dev(mpp);
602
603 mpp_clk_safe_disable(enc->aclk_info.clk);
604 mpp_clk_safe_disable(enc->hclk_info.clk);
605
606 return 0;
607 }
608
vepu_set_freq(struct mpp_dev *mpp, struct mpp_task *mpp_task)609 static int vepu_set_freq(struct mpp_dev *mpp, struct mpp_task *mpp_task)
610 {
611 struct vepu_dev *enc = to_vepu_dev(mpp);
612 struct vepu_task *task = to_vepu_task(mpp_task);
613
614 mpp_clk_set_rate(&enc->aclk_info, task->clk_mode);
615
616 return 0;
617 }
618
vepu_reduce_freq(struct mpp_dev *mpp)619 static int vepu_reduce_freq(struct mpp_dev *mpp)
620 {
621 struct vepu_dev *enc = to_vepu_dev(mpp);
622
623 mpp_clk_set_rate(&enc->aclk_info, CLK_MODE_REDUCE);
624
625 return 0;
626 }
627
vepu_reset(struct mpp_dev *mpp)628 static int vepu_reset(struct mpp_dev *mpp)
629 {
630 struct vepu_dev *enc = to_vepu_dev(mpp);
631
632 if (enc->rst_a && enc->rst_h) {
633 /* Don't skip this or iommu won't work after reset */
634 rockchip_pmu_idle_request(mpp->dev, true);
635 mpp_safe_reset(enc->rst_a);
636 mpp_safe_reset(enc->rst_h);
637 udelay(0x5);
638 mpp_safe_unreset(enc->rst_a);
639 mpp_safe_unreset(enc->rst_h);
640 rockchip_pmu_idle_request(mpp->dev, false);
641 }
642 mpp_write(mpp, VEPU1_REG_ENC_EN, 0);
643
644 return 0;
645 }
646
647 static struct mpp_hw_ops vepu_v1_hw_ops = {
648 .init = vepu_init,
649 .clk_on = vepu_clk_on,
650 .clk_off = vepu_clk_off,
651 .set_freq = vepu_set_freq,
652 .reduce_freq = vepu_reduce_freq,
653 .reset = vepu_reset,
654 };
655
656 static struct mpp_dev_ops vepu_v1_dev_ops = {
657 .alloc_task = vepu_alloc_task,
658 .run = vepu_run,
659 .irq = vepu_irq,
660 .isr = vepu_isr,
661 .finish = vepu_finish,
662 .result = vepu_result,
663 .free_task = vepu_free_task,
664 .ioctl = vepu_control,
665 .init_session = vepu_init_session,
666 .free_session = vepu_free_session,
667 .dump_session = vepu_dump_session,
668 };
669
670 static const struct mpp_dev_var vepu_v1_data = {
671 .device_type = MPP_DEVICE_VEPU1,
672 .hw_info = &vepu_v1_hw_info,
673 .trans_info = trans_rk_vepu1,
674 .hw_ops = &vepu_v1_hw_ops,
675 .dev_ops = &vepu_v1_dev_ops,
676 };
677
678 static const struct of_device_id mpp_vepu1_dt_match[] = {
679 {
680 .compatible = "rockchip,vpu-encoder-v1",
681 .data = &vepu_v1_data,
682 },
683 {},
684 };
685
vepu_probe(struct platform_device *pdev)686 static int vepu_probe(struct platform_device *pdev)
687 {
688 int ret = 0;
689 struct device *dev = &pdev->dev;
690 struct vepu_dev *enc = NULL;
691 struct mpp_dev *mpp = NULL;
692 const struct of_device_id *match = NULL;
693
694 dev_info(dev, "probe device\n");
695 enc = devm_kzalloc(dev, sizeof(struct vepu_dev), GFP_KERNEL);
696 if (!enc) {
697 return -ENOMEM;
698 }
699
700 mpp = &enc->mpp;
701 platform_set_drvdata(pdev, enc);
702
703 if (pdev->dev.of_node) {
704 match = of_match_node(mpp_vepu1_dt_match, pdev->dev.of_node);
705 if (match) {
706 mpp->var = (struct mpp_dev_var *)match->data;
707 }
708 }
709
710 ret = mpp_dev_probe(mpp, pdev);
711 if (ret) {
712 dev_err(dev, "probe sub driver failed\n");
713 return -EINVAL;
714 }
715
716 ret = devm_request_threaded_irq(dev, mpp->irq, mpp_dev_irq, mpp_dev_isr_sched, IRQF_SHARED, dev_name(dev), mpp);
717 if (ret) {
718 dev_err(dev, "register interrupter runtime failed\n");
719 return -EINVAL;
720 }
721
722 mpp->session_max_buffers = VEPU1_SESSION_MAX_BUFFERS;
723 vepu_procfs_init(mpp);
724 /* register current device to mpp service */
725 mpp_dev_register_srv(mpp, mpp->srv);
726 dev_info(dev, "probing finish\n");
727
728 return 0;
729 }
730
vepu_remove(struct platform_device *pdev)731 static int vepu_remove(struct platform_device *pdev)
732 {
733 struct device *dev = &pdev->dev;
734 struct vepu_dev *enc = platform_get_drvdata(pdev);
735
736 dev_info(dev, "remove device\n");
737 mpp_dev_remove(&enc->mpp);
738 vepu_procfs_remove(&enc->mpp);
739
740 return 0;
741 }
742
vepu_shutdown(struct platform_device *pdev)743 static void vepu_shutdown(struct platform_device *pdev)
744 {
745 int ret;
746 int val;
747 struct device *dev = &pdev->dev;
748 struct vepu_dev *enc = platform_get_drvdata(pdev);
749 struct mpp_dev *mpp = &enc->mpp;
750
751 dev_info(dev, "shutdown device\n");
752
753 atomic_inc(&mpp->srv->shutdown_request);
754 ret = readx_poll_timeout(atomic_read, &mpp->task_count, val, val == 0, 0x4E20, 0x30D40);
755 if (ret == -ETIMEDOUT) {
756 dev_err(dev, "wait total running time out\n");
757 }
758 }
759
760 struct platform_driver rockchip_vepu1_driver = {
761 .probe = vepu_probe,
762 .remove = vepu_remove,
763 .shutdown = vepu_shutdown,
764 .driver =
765 {
766 .name = VEPU1_DRIVER_NAME,
767 .of_match_table = of_match_ptr(mpp_vepu1_dt_match),
768 },
769 };
770 EXPORT_SYMBOL(rockchip_vepu1_driver);
771