1/* SPDX-License-Identifier: ((GPL-2.0+ WITH Linux-syscall-note) OR MIT)
2 *
3 * Copyright (C) 2019 Rockchip Electronics Co., Ltd.
4 */
5
6#ifndef _UAPI_RKISPP_CONFIG_H
7#define _UAPI_RKISPP_CONFIG_H
8
9#include <linux/types.h>
10#include <linux/v4l2-controls.h>
11
12#define ISPP_API_VERSION KERNEL_VERSION(1, 8, 0)
13
14#define ISPP_ID_TNR (0)
15#define ISPP_ID_NR (1)
16#define ISPP_ID_SHP (2)
17#define ISPP_ID_FEC (3)
18#define ISPP_ID_ORB (4)
19#define ISPP_ID_MAX (5)
20
21#define ISPP_MODULE_TNR BIT(ISPP_ID_TNR) // 2TO1
22#define ISPP_MODULE_NR BIT(ISPP_ID_NR)
23#define ISPP_MODULE_SHP BIT(ISPP_ID_SHP)
24#define ISPP_MODULE_FEC BIT(ISPP_ID_FEC) // CALIBRATION
25#define ISPP_MODULE_ORB BIT(ISPP_ID_ORB)
26// extra function
27#define ISPP_MODULE_TNR_3TO1 (BIT(16) | ISPP_MODULE_TNR)
28#define ISPP_MODULE_FEC_ST (BIT(17) | ISPP_MODULE_FEC) // STABILIZATION
29
30#define TNR_SIGMA_CURVE_SIZE 17
31#define TNR_LUMA_CURVE_SIZE 6
32#define TNR_GFCOEF6_SIZE 6
33#define TNR_GFCOEF3_SIZE 3
34#define TNR_SCALE_YG_SIZE 4
35#define TNR_SCALE_YL_SIZE 3
36#define TNR_SCALE_CG_SIZE 3
37#define TNR_SCALE_Y2CG_SIZE 3
38#define TNR_SCALE_CL_SIZE 2
39#define TNR_SCALE_Y2CL_SIZE 3
40#define TNR_WEIGHT_Y_SIZE 3
41
42#define NR_UVNR_UVGAIN_SIZE 2
43#define NR_UVNR_T1FLT_WTQ_SIZE 8
44#define NR_UVNR_T2GEN_WTQ_SIZE 4
45#define NR_UVNR_T2FLT_WT_SIZE 3
46#define NR_YNR_SGM_DX_SIZE 16
47#define NR_YNR_SGM_Y_SIZE 17
48#define NR_YNR_HWEIT_D_SIZE 20
49#define NR_YNR_HGRAD_Y_SIZE 24
50#define NR_YNR_HSTV_Y_SIZE 17
51#define NR_YNR_CI_SIZE 4
52#define NR_YNR_LGAIN_MIN_SIZE 4
53#define NR_YNR_LWEIT_FLT_SIZE 4
54#define NR_YNR_HGAIN_SGM_SIZE 4
55#define NR_YNR_HWEIT_SIZE 4
56#define NR_YNR_LWEIT_CMP_SIZE 2
57#define NR_YNR_ST_SCALE_SIZE 3
58
59#define SHP_PBF_KERNEL_SIZE 3
60#define SHP_MRF_KERNEL_SIZE 6
61#define SHP_MBF_KERNEL_SIZE 12
62#define SHP_HRF_KERNEL_SIZE 6
63#define SHP_HBF_KERNEL_SIZE 3
64#define SHP_EDGE_COEF_SIZE 3
65#define SHP_EDGE_SMOTH_SIZE 3
66#define SHP_EDGE_GAUS_SIZE 6
67#define SHP_DOG_KERNEL_SIZE 6
68#define SHP_LUM_POINT_SIZE 6
69#define SHP_SIGMA_SIZE 8
70#define SHP_LUM_CLP_SIZE 8
71#define SHP_LUM_MIN_SIZE 8
72#define SHP_EDGE_LUM_THED_SIZE 8
73#define SHP_CLAMP_SIZE 8
74#define SHP_DETAIL_ALPHA_SIZE 8
75
76#define ORB_DATA_NUM 10000
77#define ORB_BRIEF_NUM 15
78#define ORB_DUMMY_NUM 13
79
80#define FEC_MESH_XY_POINT_SIZE 6
81#define FEC_MESH_XY_NUM 131072
82#define FEC_MESH_BUF_NUM 2
83
84#define TNR_BUF_IDXFD_NUM 64
85
86/************VIDIOC_PRIVATE*************/
87#define RKISPP_CMD_GET_FECBUF_INFO _IOR('V', BASE_VIDIOC_PRIVATE + 0, struct rkispp_fecbuf_info)
88
89#define RKISPP_CMD_SET_FECBUF_SIZE _IOW('V', BASE_VIDIOC_PRIVATE + 1, struct rkispp_fecbuf_size)
90
91#define RKISPP_CMD_FEC_IN_OUT _IOW('V', BASE_VIDIOC_PRIVATE + 10, struct rkispp_fec_in_out)
92
93#define RKISPP_CMD_TRIGGER_YNRRUN _IOW('V', BASE_VIDIOC_PRIVATE + 11, struct rkispp_tnr_inf)
94
95#define RKISPP_CMD_GET_TNRBUF_FD _IOR('V', BASE_VIDIOC_PRIVATE + 12, struct rkispp_buf_idxfd)
96
97#define RKISPP_CMD_TRIGGER_MODE _IOW('V', BASE_VIDIOC_PRIVATE + 13, struct rkispp_trigger_mode)
98
99/************EVENT_PRIVATE**************/
100#define RKISPP_V4L2_EVENT_TNR_COMPLETE (V4L2_EVENT_PRIVATE_START + 3)
101
102struct rkispp_fec_in_out {
103    int width;
104    int height;
105    int in_fourcc;
106    int out_fourcc;
107    int in_pic_fd;
108    int out_pic_fd;
109    int mesh_xint_fd;
110    int mesh_xfra_fd;
111    int mesh_yint_fd;
112    int mesh_yfra_fd;
113};
114
115struct rkispp_tnr_inf {
116    u32 dev_id;
117    u32 frame_id;
118    u32 gainkg_idx;
119    u32 gainwr_idx;
120    u32 gainkg_size;
121    u32 gainwr_size;
122} __attribute__((packed));
123
124struct rkispp_buf_idxfd {
125    u32 buf_num;
126    u32 index[TNR_BUF_IDXFD_NUM];
127    s32 dmafd[TNR_BUF_IDXFD_NUM];
128} __attribute__((packed));
129
130struct rkispp_trigger_mode {
131    u32 module;
132    u32 on;
133} __attribute__((packed));
134
135struct rkispp_tnr_config {
136    u8 opty_en;
137    u8 optc_en;
138    u8 gain_en;
139    u8 pk0_y;
140    u8 pk1_y;
141    u8 pk0_c;
142    u8 pk1_c;
143    u8 glb_gain_cur_sqrt;
144    u8 sigma_x[TNR_SIGMA_CURVE_SIZE - 1];
145    u8 gfcoef_y0[TNR_GFCOEF6_SIZE];
146    u8 gfcoef_y1[TNR_GFCOEF3_SIZE];
147    u8 gfcoef_y2[TNR_GFCOEF3_SIZE];
148    u8 gfcoef_y3[TNR_GFCOEF3_SIZE];
149    u8 gfcoef_yg0[TNR_GFCOEF6_SIZE];
150    u8 gfcoef_yg1[TNR_GFCOEF3_SIZE];
151    u8 gfcoef_yg2[TNR_GFCOEF3_SIZE];
152    u8 gfcoef_yg3[TNR_GFCOEF3_SIZE];
153    u8 gfcoef_yl0[TNR_GFCOEF6_SIZE];
154    u8 gfcoef_yl1[TNR_GFCOEF3_SIZE];
155    u8 gfcoef_yl2[TNR_GFCOEF3_SIZE];
156    u8 gfcoef_cg0[TNR_GFCOEF6_SIZE];
157    u8 gfcoef_cg1[TNR_GFCOEF3_SIZE];
158    u8 gfcoef_cg2[TNR_GFCOEF3_SIZE];
159    u8 gfcoef_cl0[TNR_GFCOEF6_SIZE];
160    u8 gfcoef_cl1[TNR_GFCOEF3_SIZE];
161    u8 weight_y[TNR_WEIGHT_Y_SIZE];
162
163    u16 glb_gain_cur __attribute__((aligned(2)));
164    u16 glb_gain_nxt;
165    u16 glb_gain_cur_div;
166    u16 txt_th1_y;
167    u16 txt_th0_c;
168    u16 txt_th1_c;
169    u16 txt_thy_dlt;
170    u16 txt_thc_dlt;
171    u16 txt_th0_y;
172    u16 sigma_y[TNR_SIGMA_CURVE_SIZE];
173    u16 luma_curve[TNR_LUMA_CURVE_SIZE];
174    u16 scale_yg[TNR_SCALE_YG_SIZE];
175    u16 scale_yl[TNR_SCALE_YL_SIZE];
176    u16 scale_cg[TNR_SCALE_CG_SIZE];
177    u16 scale_y2cg[TNR_SCALE_Y2CG_SIZE];
178    u16 scale_cl[TNR_SCALE_CL_SIZE];
179    u16 scale_y2cl[TNR_SCALE_Y2CL_SIZE];
180} __attribute__((packed));
181
182struct rkispp_nr_config {
183    u8 uvnr_step1_en;
184    u8 uvnr_step2_en;
185    u8 nr_gain_en;
186    u8 uvnr_sd32_self_en;
187    u8 uvnr_nobig_en;
188    u8 uvnr_big_en;
189    u8 uvnr_gain_1sigma;
190    u8 uvnr_gain_offset;
191    u8 uvnr_gain_t2gen;
192    u8 uvnr_gain_iso;
193    u8 uvnr_t1gen_m3alpha;
194    u8 uvnr_t1flt_mode;
195    u8 uvnr_t1flt_wtp;
196    u8 uvnr_t2gen_m3alpha;
197    u8 uvnr_t2gen_wtp;
198    u8 uvnr_gain_uvgain[NR_UVNR_UVGAIN_SIZE];
199    u8 uvnr_t1flt_wtq[NR_UVNR_T1FLT_WTQ_SIZE];
200    u8 uvnr_t2gen_wtq[NR_UVNR_T2GEN_WTQ_SIZE];
201    u8 uvnr_t2flt_wtp;
202    u8 uvnr_t2flt_wt[NR_UVNR_T2FLT_WT_SIZE];
203    u8 ynr_sgm_dx[NR_YNR_SGM_DX_SIZE];
204    u8 ynr_lci[NR_YNR_CI_SIZE];
205    u8 ynr_lgain_min[NR_YNR_LGAIN_MIN_SIZE];
206    u8 ynr_lgain_max;
207    u8 ynr_lmerge_bound;
208    u8 ynr_lmerge_ratio;
209    u8 ynr_lweit_flt[NR_YNR_LWEIT_FLT_SIZE];
210    u8 ynr_hlci[NR_YNR_CI_SIZE];
211    u8 ynr_lhci[NR_YNR_CI_SIZE];
212    u8 ynr_hhci[NR_YNR_CI_SIZE];
213    u8 ynr_hgain_sgm[NR_YNR_HGAIN_SGM_SIZE];
214    u8 ynr_hweit_d[NR_YNR_HWEIT_D_SIZE];
215    u8 ynr_hgrad_y[NR_YNR_HGRAD_Y_SIZE];
216    u8 ynr_hmax_adjust;
217    u8 ynr_hstrength;
218    u8 ynr_lweit_cmp[NR_YNR_LWEIT_CMP_SIZE];
219    u8 ynr_lmaxgain_lv4;
220
221    u16 uvnr_t1flt_msigma __attribute__((aligned(2)));
222    u16 uvnr_t2gen_msigma;
223    u16 uvnr_t2flt_msigma;
224    u16 ynr_lsgm_y[NR_YNR_SGM_Y_SIZE];
225    u16 ynr_hsgm_y[NR_YNR_SGM_Y_SIZE];
226    u16 ynr_hweit[NR_YNR_HWEIT_SIZE];
227    u16 ynr_hstv_y[NR_YNR_HSTV_Y_SIZE];
228    u16 ynr_st_scale[NR_YNR_ST_SCALE_SIZE];
229} __attribute__((packed));
230
231struct rkispp_sharp_config {
232    u8 rotation;
233    u8 scl_down_v;
234    u8 scl_down_h;
235    u8 tile_ycnt;
236    u8 tile_xcnt;
237    u8 alpha_adp_en;
238    u8 yin_flt_en;
239    u8 edge_avg_en;
240    u8 ehf_th;
241    u8 pbf_ratio;
242    u8 edge_thed;
243    u8 dir_min;
244    u8 pbf_shf_bits;
245    u8 mbf_shf_bits;
246    u8 hbf_shf_bits;
247    u8 m_ratio;
248    u8 h_ratio;
249    u8 pbf_k[SHP_PBF_KERNEL_SIZE];
250    u8 mrf_k[SHP_MRF_KERNEL_SIZE];
251    u8 mbf_k[SHP_MBF_KERNEL_SIZE];
252    u8 hrf_k[SHP_HRF_KERNEL_SIZE];
253    u8 hbf_k[SHP_HBF_KERNEL_SIZE];
254    s8 eg_coef[SHP_EDGE_COEF_SIZE];
255    u8 eg_smoth[SHP_EDGE_SMOTH_SIZE];
256    u8 eg_gaus[SHP_EDGE_GAUS_SIZE];
257    s8 dog_k[SHP_DOG_KERNEL_SIZE];
258    u8 lum_point[SHP_LUM_POINT_SIZE];
259    u8 pbf_sigma[SHP_SIGMA_SIZE];
260    u8 lum_clp_m[SHP_LUM_CLP_SIZE];
261    s8 lum_min_m[SHP_LUM_MIN_SIZE];
262    u8 mbf_sigma[SHP_SIGMA_SIZE];
263    u8 lum_clp_h[SHP_LUM_CLP_SIZE];
264    u8 hbf_sigma[SHP_SIGMA_SIZE];
265    u8 edge_lum_thed[SHP_EDGE_LUM_THED_SIZE];
266    u8 clamp_pos[SHP_CLAMP_SIZE];
267    u8 clamp_neg[SHP_CLAMP_SIZE];
268    u8 detail_alpha[SHP_DETAIL_ALPHA_SIZE];
269
270    u16 hbf_ratio __attribute__((aligned(2)));
271    u16 smoth_th4;
272    u16 l_alpha;
273    u16 g_alpha;
274    u16 rfl_ratio;
275    u16 rfh_ratio;
276} __attribute__((packed));
277
278enum rkispp_fecbuf_stat {
279    FEC_BUF_INIT = 0,
280    FEC_BUF_WAIT2CHIP,
281    FEC_BUF_CHIPINUSE,
282};
283
284struct rkispp_fecbuf_info {
285    s32 buf_fd[FEC_MESH_BUF_NUM];
286    u32 buf_size[FEC_MESH_BUF_NUM];
287} __attribute__((packed));
288
289struct rkispp_fecbuf_size {
290    u32 meas_width;
291    u32 meas_height;
292    u32 meas_mode;
293} __attribute__((packed));
294
295struct rkispp_fec_head {
296    enum rkispp_fecbuf_stat stat;
297    u32 meshxf_oft;
298    u32 meshyf_oft;
299    u32 meshxi_oft;
300    u32 meshyi_oft;
301} __attribute__((packed));
302
303struct rkispp_fec_config {
304    u8 mesh_density;
305    u8 crop_en;
306    u16 crop_width __attribute__((aligned(2)));
307    u16 crop_height;
308    u32 mesh_size __attribute__((aligned(4)));
309    s32 buf_fd;
310} __attribute__((packed));
311
312struct rkispp_orb_config {
313    u8 limit_value;
314    u32 max_feature __attribute__((aligned(4)));
315} __attribute__((packed));
316
317/**
318 * struct rkispp_params_cfg - Rockchip ISPP Input Parameters Meta Data
319 *
320 * @module_en_update: mask the enable bits of which module  should be updated
321 * @module_ens: mask the enable value of each module, only update the module
322 * which correspond bit was set in module_en_update
323 * @module_cfg_update: mask the config bits of which module  should be updated
324 * @module_init_en: initial enable module function
325 */
326struct rkispp_params_cfg {
327    u32 module_en_update;
328    u32 module_ens;
329    u32 module_cfg_update;
330    u32 module_init_ens;
331
332    u32 frame_id;
333    struct rkispp_tnr_config tnr_cfg;
334    struct rkispp_nr_config nr_cfg;
335    struct rkispp_sharp_config shp_cfg;
336    struct rkispp_fec_config fec_cfg;
337    struct rkispp_orb_config orb_cfg;
338} __attribute__((packed));
339
340struct rkispp_orb_data {
341    u8 brief[ORB_BRIEF_NUM];
342    u32 y : 13;
343    u32 x : 13;
344    u32 dmy1 : 6;
345    u8 dmy2[ORB_DUMMY_NUM];
346} __attribute__((packed));
347
348/**
349 * struct rkispp_stats_buffer - Rockchip ISPP Statistics
350 *
351 * @meas_type: measurement types
352 * @frame_id: frame ID for sync
353 * @data: statistics data
354 */
355struct rkispp_stats_buffer {
356    struct rkispp_orb_data data[ORB_DATA_NUM];
357
358    u32 total_num __attribute__((aligned(4)));
359    u32 meas_type;
360    u32 frame_id;
361} __attribute__((packed));
362
363#endif
364