1 // SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
2 /*
3 *
4 * (C) COPYRIGHT 2021 ARM Limited. All rights reserved.
5 *
6 * This program is free software and is provided to you under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation, and any use by you of this program is subject to the terms
9 * of such GNU license.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, you can access it online at
18 * http://www.gnu.org/licenses/gpl-2.0.html.
19 *
20 */
21
22 #include "mali_kbase_pbha.h"
23
24 #include <device/mali_kbase_device.h>
25 #include <mali_kbase.h>
26 #define DTB_SET_SIZE 2
27
read_setting_valid(unsigned int id, unsigned int read_setting)28 static bool read_setting_valid(unsigned int id, unsigned int read_setting)
29 {
30 switch (id) {
31 /* Valid ID - fall through all */
32 case SYSC_ALLOC_ID_R_OTHER:
33 case SYSC_ALLOC_ID_R_CSF:
34 case SYSC_ALLOC_ID_R_MMU:
35 case SYSC_ALLOC_ID_R_TILER_VERT:
36 case SYSC_ALLOC_ID_R_TILER_PTR:
37 case SYSC_ALLOC_ID_R_TILER_INDEX:
38 case SYSC_ALLOC_ID_R_TILER_OTHER:
39 case SYSC_ALLOC_ID_R_IC:
40 case SYSC_ALLOC_ID_R_ATTR:
41 case SYSC_ALLOC_ID_R_SCM:
42 case SYSC_ALLOC_ID_R_FSDC:
43 case SYSC_ALLOC_ID_R_VL:
44 case SYSC_ALLOC_ID_R_PLR:
45 case SYSC_ALLOC_ID_R_TEX:
46 case SYSC_ALLOC_ID_R_LSC:
47 switch (read_setting) {
48 /* Valid setting value - fall through all */
49 case SYSC_ALLOC_L2_ALLOC:
50 case SYSC_ALLOC_NEVER_ALLOC:
51 case SYSC_ALLOC_ALWAYS_ALLOC:
52 case SYSC_ALLOC_PTL_ALLOC:
53 case SYSC_ALLOC_L2_PTL_ALLOC:
54 return true;
55 default:
56 return false;
57 }
58 default:
59 return false;
60 }
61
62 /* Unreachable */
63 return false;
64 }
65
write_setting_valid(unsigned int id, unsigned int write_setting)66 static bool write_setting_valid(unsigned int id, unsigned int write_setting)
67 {
68 switch (id) {
69 /* Valid ID - fall through all */
70 case SYSC_ALLOC_ID_W_OTHER:
71 case SYSC_ALLOC_ID_W_CSF:
72 case SYSC_ALLOC_ID_W_PCB:
73 case SYSC_ALLOC_ID_W_TILER_PTR:
74 case SYSC_ALLOC_ID_W_TILER_VERT_PLIST:
75 case SYSC_ALLOC_ID_W_TILER_OTHER:
76 case SYSC_ALLOC_ID_W_L2_EVICT:
77 case SYSC_ALLOC_ID_W_L2_FLUSH:
78 case SYSC_ALLOC_ID_W_TIB_COLOR:
79 case SYSC_ALLOC_ID_W_TIB_COLOR_AFBCH:
80 case SYSC_ALLOC_ID_W_TIB_COLOR_AFBCB:
81 case SYSC_ALLOC_ID_W_TIB_CRC:
82 case SYSC_ALLOC_ID_W_TIB_DS:
83 case SYSC_ALLOC_ID_W_TIB_DS_AFBCH:
84 case SYSC_ALLOC_ID_W_TIB_DS_AFBCB:
85 case SYSC_ALLOC_ID_W_LSC:
86 switch (write_setting) {
87 /* Valid setting value - fall through all */
88 case SYSC_ALLOC_L2_ALLOC:
89 case SYSC_ALLOC_NEVER_ALLOC:
90 case SYSC_ALLOC_ALWAYS_ALLOC:
91 case SYSC_ALLOC_PTL_ALLOC:
92 case SYSC_ALLOC_L2_PTL_ALLOC:
93 return true;
94 default:
95 return false;
96 }
97 default:
98 return false;
99 }
100
101 /* Unreachable */
102 return false;
103 }
104
settings_valid(unsigned int id, unsigned int read_setting, unsigned int write_setting)105 static bool settings_valid(unsigned int id, unsigned int read_setting,
106 unsigned int write_setting)
107 {
108 bool settings_valid = false;
109
110 if (id < SYSC_ALLOC_COUNT * sizeof(u32)) {
111 settings_valid = read_setting_valid(id, read_setting) &&
112 write_setting_valid(id, write_setting);
113 }
114
115 return settings_valid;
116 }
117
kbasep_pbha_supported(struct kbase_device *kbdev)118 bool kbasep_pbha_supported(struct kbase_device *kbdev)
119 {
120 const u32 arch_maj_rev =
121 ARCH_MAJOR_REV_REG(kbdev->gpu_props.props.raw_props.gpu_id);
122
123 return (arch_maj_rev >= GPU_ID2_ARCH_MAJOR_REV_MAKE(11, 3));
124 }
125
kbase_pbha_record_settings(struct kbase_device *kbdev, bool runtime, unsigned int id, unsigned int read_setting, unsigned int write_setting)126 int kbase_pbha_record_settings(struct kbase_device *kbdev, bool runtime,
127 unsigned int id, unsigned int read_setting,
128 unsigned int write_setting)
129 {
130 bool const valid = settings_valid(id, read_setting, write_setting);
131
132 if (valid) {
133 unsigned int const sysc_alloc_num = id / sizeof(u32);
134 u32 modified_reg;
135 if (runtime) {
136 int i;
137
138 kbase_pm_context_active(kbdev);
139 /* Ensure host copy of SYSC_ALLOC is up to date */
140 for (i = 0; i < SYSC_ALLOC_COUNT; i++)
141 kbdev->sysc_alloc[i] = kbase_reg_read(
142 kbdev, GPU_CONTROL_REG(SYSC_ALLOC(i)));
143 kbase_pm_context_idle(kbdev);
144 }
145
146 modified_reg = kbdev->sysc_alloc[sysc_alloc_num];
147
148 switch (id % sizeof(u32)) {
149 case 0:
150 modified_reg = SYSC_ALLOC_R_SYSC_ALLOC0_SET(
151 modified_reg, read_setting);
152 modified_reg = SYSC_ALLOC_W_SYSC_ALLOC0_SET(
153 modified_reg, write_setting);
154 break;
155 case 1:
156 modified_reg = SYSC_ALLOC_R_SYSC_ALLOC1_SET(
157 modified_reg, read_setting);
158 modified_reg = SYSC_ALLOC_W_SYSC_ALLOC1_SET(
159 modified_reg, write_setting);
160 break;
161 case 2:
162 modified_reg = SYSC_ALLOC_R_SYSC_ALLOC2_SET(
163 modified_reg, read_setting);
164 modified_reg = SYSC_ALLOC_W_SYSC_ALLOC2_SET(
165 modified_reg, write_setting);
166 break;
167 case 3:
168 modified_reg = SYSC_ALLOC_R_SYSC_ALLOC3_SET(
169 modified_reg, read_setting);
170 modified_reg = SYSC_ALLOC_W_SYSC_ALLOC3_SET(
171 modified_reg, write_setting);
172 break;
173 }
174
175 kbdev->sysc_alloc[sysc_alloc_num] = modified_reg;
176 }
177
178 return valid ? 0 : -EINVAL;
179 }
180
kbase_pbha_write_settings(struct kbase_device *kbdev)181 void kbase_pbha_write_settings(struct kbase_device *kbdev)
182 {
183 if (kbasep_pbha_supported(kbdev)) {
184 int i;
185 for (i = 0; i < SYSC_ALLOC_COUNT; ++i)
186 kbase_reg_write(kbdev, GPU_CONTROL_REG(SYSC_ALLOC(i)),
187 kbdev->sysc_alloc[i]);
188 }
189 }
190
kbase_pbha_read_dtb(struct kbase_device *kbdev)191 int kbase_pbha_read_dtb(struct kbase_device *kbdev)
192 {
193 u32 dtb_data[SYSC_ALLOC_COUNT * sizeof(u32) * DTB_SET_SIZE];
194 const struct device_node *pbha_node;
195 int sz, i;
196 bool valid = true;
197
198 if (!kbasep_pbha_supported(kbdev))
199 return 0;
200
201 pbha_node = of_get_child_by_name(kbdev->dev->of_node, "pbha");
202 if (!pbha_node)
203 return 0;
204
205 sz = of_property_count_elems_of_size(pbha_node, "int_id_override",
206 sizeof(u32));
207 if (sz <= 0 || (sz % DTB_SET_SIZE != 0)) {
208 dev_err(kbdev->dev, "Bad DTB format: pbha.int_id_override\n");
209 return -EINVAL;
210 }
211 if (of_property_read_u32_array(pbha_node, "int_id_override", dtb_data,
212 sz) != 0) {
213 dev_err(kbdev->dev,
214 "Failed to read DTB pbha.int_id_override\n");
215 return -EINVAL;
216 }
217
218 for (i = 0; valid && i < sz; i = i + DTB_SET_SIZE) {
219 unsigned int rdset =
220 SYSC_ALLOC_R_SYSC_ALLOC0_GET(dtb_data[i + 1]);
221 unsigned int wrset =
222 SYSC_ALLOC_W_SYSC_ALLOC0_GET(dtb_data[i + 1]);
223 valid = valid &&
224 (kbase_pbha_record_settings(kbdev, false, dtb_data[i],
225 rdset, wrset) == 0);
226 if (valid)
227 dev_info(kbdev->dev,
228 "pbha.int_id_override 0x%x r0x%x w0x%x\n",
229 dtb_data[i], rdset, wrset);
230 }
231 if (i != sz || (!valid)) {
232 dev_err(kbdev->dev,
233 "Failed recording DTB data (pbha.int_id_override)\n");
234 return -EINVAL;
235 }
236 return 0;
237 }
238