1 /* 2 * Copyright (C) 2016 Rockchip Electronics Co., Ltd. 3 * Authors: 4 * Zhiqin Wei <wzq@rock-chips.com> 5 * 6 * Licensed under the Apache License, Version 2.0 (the "License"); 7 * you may not use this file except in compliance with the License. 8 * You may obtain a copy of the License at 9 * 10 * http://www.apache.org/licenses/LICENSE-2.0 11 * 12 * Unless required by applicable law or agreed to in writing, software 13 * distributed under the License is distributed on an "AS IS" BASIS, 14 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 * See the License for the specific language governing permissions and 16 * limitations under the License. 17 */ 18 19 #ifndef RGA_DRIVER_H 20 #define RGA_DRIVER_H 21 #include <stdint.h> 22 #ifdef __cplusplus 23 extern "C" { 24 #endif 25 26 #define RGA_BLIT_SYNC 0x5017 27 #define RGA_BLIT_ASYNC 0x5018 28 #define RGA_FLUSH 0x5019 29 #define RGA_GET_RESULT 0x501a 30 #define RGA_GET_VERSION 0x501b 31 32 #define RGA2_BLIT_SYNC 0x6017 33 #define RGA2_BLIT_ASYNC 0x6018 34 #define RGA2_FLUSH 0x6019 35 #define RGA2_GET_RESULT 0x601a 36 #define RGA2_GET_VERSION 0x601b 37 #define RGA2_GET_VERSION 0x601b 38 39 #define RGA_REG_CTRL_LEN 0x8 /* 8 */ 40 #define RGA_REG_CMD_LEN 0x1c /* 28 */ 41 #define RGA_CMD_BUF_SIZE 0x700 /* 16*28*4 */ 42 43 #ifndef ENABLE 44 #define ENABLE 1 45 #endif 46 47 #ifndef DISABLE 48 #define DISABLE 0 49 #endif 50 51 /* RGA process mode enum */ 52 enum { 53 bitblt_mode = 0x0, 54 color_palette_mode = 0x1, 55 color_fill_mode = 0x2, 56 line_point_drawing_mode = 0x3, 57 blur_sharp_filter_mode = 0x4, 58 pre_scaling_mode = 0x5, 59 update_palette_table_mode = 0x6, 60 update_patten_buff_mode = 0x7, 61 }; 62 63 enum { 64 rop_enable_mask = 0x2, 65 dither_enable_mask = 0x8, 66 fading_enable_mask = 0x10, 67 PD_enbale_mask = 0x20, 68 }; 69 70 enum { 71 yuv2rgb_mode0 = 0x0, /* BT.601 MPEG */ 72 yuv2rgb_mode1 = 0x1, /* BT.601 JPEG */ 73 yuv2rgb_mode2 = 0x2, /* BT.709 */ 74 75 rgb2yuv_601_full = 0x1 << 8, 76 rgb2yuv_709_full = 0x2 << 8, 77 yuv2yuv_601_limit_2_709_limit = 0x3 << 8, 78 yuv2yuv_601_limit_2_709_full = 0x4 << 8, 79 yuv2yuv_709_limit_2_601_limit = 0x5 << 8, 80 yuv2yuv_709_limit_2_601_full = 0x6 << 8, // not support 81 yuv2yuv_601_full_2_709_limit = 0x7 << 8, 82 yuv2yuv_601_full_2_709_full = 0x8 << 8, // not support 83 yuv2yuv_709_full_2_601_limit = 0x9 << 8, // not support 84 yuv2yuv_709_full_2_601_full = 0xa << 8, // not support 85 full_csc_mask = 0xf00, 86 }; 87 88 /* RGA rotate mode */ 89 enum { 90 rotate_mode0 = 0x0, /* no rotate */ 91 rotate_mode1 = 0x1, /* rotate */ 92 rotate_mode2 = 0x2, /* x_mirror */ 93 rotate_mode3 = 0x3, /* y_mirror */ 94 }; 95 96 enum { 97 color_palette_mode0 = 0x0, /* 1K */ 98 color_palette_mode1 = 0x1, /* 2K */ 99 color_palette_mode2 = 0x2, /* 4K */ 100 color_palette_mode3 = 0x3, /* 8K */ 101 }; 102 103 enum { 104 BB_BYPASS = 0x0, /* no rotate */ 105 BB_ROTATE = 0x1, /* rotate */ 106 BB_X_MIRROR = 0x2, /* x_mirror */ 107 BB_Y_MIRROR = 0x3 /* y_mirror */ 108 }; 109 110 enum { 111 nearby = 0x0, /* no rotate */ 112 bilinear = 0x1, /* rotate */ 113 bicubic = 0x2, /* x_mirror */ 114 }; 115 116 /* 117 // Alpha Red Green Blue 118 { 4, 32, {{32,24, 8, 0, 16, 8, 24,16 }}, GGL_RGBA }, // RK_FORMAT_RGBA_8888 119 { 4, 24, {{ 0, 0, 8, 0, 16, 8, 24,16 }}, GGL_RGB }, // RK_FORMAT_RGBX_8888 120 { 3, 24, {{ 0, 0, 8, 0, 16, 8, 24,16 }}, GGL_RGB }, // RK_FORMAT_RGB_888 121 { 4, 32, {{32,24, 24,16, 16, 8, 8, 0 }}, GGL_BGRA }, // RK_FORMAT_BGRA_8888 122 { 2, 16, {{ 0, 0, 16,11, 11, 5, 5, 0 }}, GGL_RGB }, // RK_FORMAT_RGB_565 123 { 2, 16, {{ 1, 0, 16,11, 11, 6, 6, 1 }}, GGL_RGBA }, // RK_FORMAT_RGBA_5551 124 { 2, 16, {{ 4, 0, 16,12, 12, 8, 8, 4 }}, GGL_RGBA }, // RK_FORMAT_RGBA_4444 125 { 3, 24, {{ 0, 0, 24,16, 16, 8, 8, 0 }}, GGL_BGR }, // RK_FORMAT_BGB_888 126 127 */ 128 /* In order to be compatible with RK_FORMAT_XX and HAL_PIXEL_FORMAT_XX, 129 * RK_FORMAT_XX is shifted to the left by 8 bits to distinguish. */ 130 typedef enum _Rga_SURF_FORMAT { 131 RK_FORMAT_RGBA_8888 = 0x0 << 8, 132 RK_FORMAT_RGBX_8888 = 0x1 << 8, 133 RK_FORMAT_RGB_888 = 0x2 << 8, 134 RK_FORMAT_BGRA_8888 = 0x3 << 8, 135 RK_FORMAT_RGB_565 = 0x4 << 8, 136 RK_FORMAT_RGBA_5551 = 0x5 << 8, 137 RK_FORMAT_RGBA_4444 = 0x6 << 8, 138 RK_FORMAT_BGR_888 = 0x7 << 8, 139 140 RK_FORMAT_YCbCr_422_SP = 0x8 << 8, 141 RK_FORMAT_YCbCr_422_P = 0x9 << 8, 142 RK_FORMAT_YCbCr_420_SP = 0xa << 8, 143 RK_FORMAT_YCbCr_420_P = 0xb << 8, 144 145 RK_FORMAT_YCrCb_422_SP = 0xc << 8, 146 RK_FORMAT_YCrCb_422_P = 0xd << 8, 147 RK_FORMAT_YCrCb_420_SP = 0xe << 8, 148 RK_FORMAT_YCrCb_420_P = 0xf << 8, 149 150 RK_FORMAT_BPP1 = 0x10 << 8, 151 RK_FORMAT_BPP2 = 0x11 << 8, 152 RK_FORMAT_BPP4 = 0x12 << 8, 153 RK_FORMAT_BPP8 = 0x13 << 8, 154 155 RK_FORMAT_Y4 = 0x14 << 8, 156 RK_FORMAT_YCbCr_400 = 0x15 << 8, 157 158 RK_FORMAT_BGRX_8888 = 0x16 << 8, 159 160 RK_FORMAT_YVYU_422 = 0x18 << 8, 161 RK_FORMAT_YVYU_420 = 0x19 << 8, 162 RK_FORMAT_VYUY_422 = 0x1a << 8, 163 RK_FORMAT_VYUY_420 = 0x1b << 8, 164 RK_FORMAT_YUYV_422 = 0x1c << 8, 165 RK_FORMAT_YUYV_420 = 0x1d << 8, 166 RK_FORMAT_UYVY_422 = 0x1e << 8, 167 RK_FORMAT_UYVY_420 = 0x1f << 8, 168 169 RK_FORMAT_YCbCr_420_SP_10B = 0x20 << 8, 170 RK_FORMAT_YCrCb_420_SP_10B = 0x21 << 8, 171 RK_FORMAT_YCbCr_422_10b_SP = 0x22 << 8, 172 RK_FORMAT_YCrCb_422_10b_SP = 0x23 << 8, 173 174 RK_FORMAT_BGR_565 = 0x24 << 8, 175 RK_FORMAT_BGRA_5551 = 0x25 << 8, 176 RK_FORMAT_BGRA_4444 = 0x26 << 8, 177 RK_FORMAT_UNKNOWN = 0x100 << 8, 178 } RgaSURF_FORMAT; 179 180 typedef struct rga_img_info_t { 181 #if defined(__arm64__) || defined(__aarch64__) 182 unsigned long yrgb_addr; /* yrgb mem addr */ 183 unsigned long uv_addr; /* cb/cr mem addr */ 184 unsigned long v_addr; /* cr mem addr */ 185 #else 186 unsigned int yrgb_addr; /* yrgb mem addr */ 187 unsigned int uv_addr; /* cb/cr mem addr */ 188 unsigned int v_addr; /* cr mem addr */ 189 #endif 190 unsigned int format; // definition by RK_FORMAT 191 unsigned short act_w; 192 unsigned short act_h; 193 unsigned short x_offset; 194 unsigned short y_offset; 195 196 unsigned short vir_w; 197 unsigned short vir_h; 198 199 unsigned short endian_mode; // for BPP 200 unsigned short alpha_swap; 201 } rga_img_info_t; 202 203 typedef struct mdp_img_act { 204 unsigned short w; // width 205 unsigned short h; // height 206 short x_off; // x offset for the vir 207 short y_off; // y offset for the vir 208 } mdp_img_act; 209 210 typedef struct RANGE { 211 unsigned short min; 212 unsigned short max; 213 } RANGE; 214 215 typedef struct POINT { 216 unsigned short x; 217 unsigned short y; 218 } POINT; 219 220 typedef struct RECT { 221 unsigned short xmin; 222 unsigned short xmax; // width - 1 223 unsigned short ymin; 224 unsigned short ymax; // height - 1 225 } RECT; 226 227 typedef struct RGB { 228 unsigned char r; 229 unsigned char g; 230 unsigned char b; 231 unsigned char res; 232 } RGB; 233 234 typedef struct MMU { 235 unsigned char mmu_en; 236 #if defined(__arm64__) || defined(__aarch64__) 237 unsigned long base_addr; 238 #else 239 unsigned int base_addr; 240 #endif 241 unsigned int mmu_flag; /* [0] mmu enable [1] src_flush [2] dst_flush [3] CMD_flush [4~5] page size */ 242 } MMU; 243 244 typedef struct COLOR_FILL { 245 short gr_x_a; 246 short gr_y_a; 247 short gr_x_b; 248 short gr_y_b; 249 short gr_x_g; 250 short gr_y_g; 251 short gr_x_r; 252 short gr_y_r; 253 } COLOR_FILL; 254 255 typedef struct FADING { 256 unsigned char b; 257 unsigned char g; 258 unsigned char r; 259 unsigned char res; 260 } FADING; 261 262 typedef struct line_draw_t { 263 POINT start_point; /* LineDraw_start_point */ 264 POINT end_point; /* LineDraw_end_point */ 265 unsigned int color; /* LineDraw_color */ 266 unsigned int flag; /* (enum) LineDrawing mode sel */ 267 unsigned int line_width; /* range 1~16 */ 268 } line_draw_t; 269 270 /* color space convert coefficient. */ 271 typedef struct csc_coe_t { 272 int16_t r_v; 273 int16_t g_y; 274 int16_t b_u; 275 int32_t off; 276 } csc_coe_t; 277 278 typedef struct full_csc_t { 279 unsigned char flag; 280 csc_coe_t coe_y; 281 csc_coe_t coe_u; 282 csc_coe_t coe_v; 283 } full_csc_t; 284 285 struct rga_req { 286 unsigned char render_mode; /* (enum) process mode sel */ 287 288 rga_img_info_t src; /* src image info */ 289 rga_img_info_t dst; /* dst image info */ 290 rga_img_info_t pat; /* patten image info */ 291 292 #if defined(__arm64__) || defined(__aarch64__) 293 unsigned long rop_mask_addr; /* rop4 mask addr */ 294 unsigned long LUT_addr; /* LUT addr */ 295 #else 296 unsigned int rop_mask_addr; /* rop4 mask addr */ 297 unsigned int LUT_addr; /* LUT addr */ 298 #endif 299 300 RECT clip; /* dst clip window default value is dst_vir */ 301 /* value from [0, w-1] / [0, h-1] */ 302 303 int sina; /* dst angle default value 0 16.16 scan from table */ 304 int cosa; /* dst angle default value 0 16.16 scan from table */ 305 306 unsigned short alpha_rop_flag; /* alpha rop process flag */ 307 /* ([0] = 1 alpha_rop_enable) */ 308 /* ([1] = 1 rop enable) */ 309 /* ([2] = 1 fading_enable) */ 310 /* ([3] = 1 PD_enable) */ 311 /* ([4] = 1 alpha cal_mode_sel) */ 312 /* ([5] = 1 dither_enable) */ 313 /* ([6] = 1 gradient fill mode sel) */ 314 /* ([7] = 1 AA_enable) */ 315 /* ([8] = 1 nn_quantize) */ 316 /* ([9] = 1 Real color mode) */ 317 318 unsigned char scale_mode; /* 0 nearst / 1 bilnear / 2 bicubic */ 319 320 unsigned int color_key_max; /* color key max */ 321 unsigned int color_key_min; /* color key min */ 322 323 unsigned int fg_color; /* foreground color */ 324 unsigned int bg_color; /* background color */ 325 326 COLOR_FILL gr_color; /* color fill use gradient */ 327 328 line_draw_t line_draw_info; 329 330 FADING fading; 331 332 unsigned char PD_mode; /* porter duff alpha mode sel */ 333 334 unsigned char alpha_global_value; /* global alpha value */ 335 336 unsigned short rop_code; /* rop2/3/4 code scan from rop code table */ 337 338 unsigned char bsfilter_flag; /* [2] 0 blur 1 sharp / [1:0] filter_type */ 339 340 unsigned char palette_mode; /* (enum) color palatte 0/1bpp, 1/2bpp 2/4bpp 3/8bpp */ 341 342 unsigned char yuv2rgb_mode; /* (enum) BT.601 MPEG / BT.601 JPEG / BT.709 */ 343 344 unsigned char endian_mode; /* 0/big endian 1/little endian */ 345 346 unsigned char rotate_mode; /* (enum) rotate mode */ 347 /* 0x0, no rotate */ 348 /* 0x1, rotate */ 349 /* 0x2, x_mirror */ 350 /* 0x3, y_mirror */ 351 352 unsigned char color_fill_mode; /* 0 solid color / 1 patten color */ 353 354 MMU mmu_info; /* mmu information */ 355 356 unsigned char alpha_rop_mode; /* ([0~1] alpha mode) */ 357 /* ([2~3] rop mode) */ 358 /* ([4] zero mode en) */ 359 /* ([5] dst alpha mode) (RGA1) */ 360 361 unsigned char src_trans_mode; 362 363 unsigned char dither_mode; 364 365 full_csc_t full_csc; /* full color space convert */ 366 367 unsigned char CMD_fin_int_enable; 368 369 /* completion is reported through a callback */ 370 void (*complete)(int retval); 371 }; 372 373 int RGA_set_src_act_info(struct rga_req *req, unsigned int width, /* act width */ 374 unsigned int height, /* act height */ 375 unsigned int x_off, /* x_off */ 376 unsigned int y_off /* y_off */ 377 ); 378 379 #if defined(__arm64__) || defined(__aarch64__) 380 int RGA_set_src_vir_info(struct rga_req *req, unsigned long yrgb_addr, /* yrgb_addr */ 381 unsigned long uv_addr, /* uv_addr */ 382 unsigned long v_addr, /* v_addr */ 383 unsigned int vir_w, /* vir width */ 384 unsigned int vir_h, /* vir height */ 385 unsigned char format, /* format */ 386 unsigned char a_swap_en /* only for 32bit RGB888 format */ 387 ); 388 #else 389 int RGA_set_src_vir_info(struct rga_req *req, unsigned int yrgb_addr, /* yrgb_addr */ 390 unsigned int uv_addr, /* uv_addr */ 391 unsigned int v_addr, /* v_addr */ 392 unsigned int vir_w, /* vir width */ 393 unsigned int vir_h, /* vir height */ 394 unsigned char format, /* format */ 395 unsigned char a_swap_en /* only for 32bit RGB888 format */ 396 ); 397 #endif 398 399 int RGA_set_dst_act_info(struct rga_req *req, unsigned int width, /* act width */ 400 unsigned int height, /* act height */ 401 unsigned int x_off, /* x_off */ 402 unsigned int y_off /* y_off */ 403 ); 404 405 #if defined(__arm64__) || defined(__aarch64__) 406 int RGA_set_dst_vir_info(struct rga_req *msg, unsigned long yrgb_addr, /* yrgb_addr */ 407 unsigned long uv_addr, /* uv_addr */ 408 unsigned long v_addr, /* v_addr */ 409 unsigned int vir_w, /* vir width */ 410 unsigned int vir_h, /* vir height */ 411 RECT *clip, /* clip window */ 412 unsigned char format, /* format */ 413 unsigned char a_swap_en); 414 #else 415 int RGA_set_dst_vir_info(struct rga_req *msg, unsigned int yrgb_addr, /* yrgb_addr */ 416 unsigned int uv_addr, /* uv_addr */ 417 unsigned int v_addr, /* v_addr */ 418 unsigned int vir_w, /* vir width */ 419 unsigned int vir_h, /* vir height */ 420 RECT *clip, /* clip window */ 421 unsigned char format, /* format */ 422 unsigned char a_swap_en); 423 #endif 424 425 int RGA_set_pat_info(struct rga_req *msg, unsigned int width, unsigned int height, unsigned int x_off, 426 unsigned int y_off, unsigned int pat_format); 427 428 #if defined(__arm64__) || defined(__aarch64__) 429 int RGA_set_rop_mask_info(struct rga_req *msg, unsigned long rop_mask_addr, unsigned int rop_mask_endian_mode); 430 #else 431 int RGA_set_rop_mask_info(struct rga_req *msg, unsigned int rop_mask_addr, unsigned int rop_mask_endian_mode); 432 #endif 433 434 int RGA_set_alpha_en_info(struct rga_req *msg, 435 unsigned int alpha_cal_mode, /* 0:alpha' = alpha + (alpha>>7) | alpha' = alpha */ 436 unsigned int alpha_mode, /* 0 global alpha / 1 per pixel alpha / 2 mix mode */ 437 unsigned int global_a_value, unsigned int PD_en, /* porter duff alpha mode en */ 438 unsigned int PD_mode, unsigned int dst_alpha_en); /* use dst alpha */ 439 440 int RGA_set_rop_en_info(struct rga_req *msg, unsigned int ROP_mode, unsigned int ROP_code, unsigned int color_mode, 441 unsigned int solid_color); 442 443 int RGA_set_fading_en_info(struct rga_req *msg, unsigned char r, unsigned char g, unsigned char b); 444 445 int RGA_set_src_trans_mode_info(struct rga_req *msg, unsigned char trans_mode, unsigned char a_en, unsigned char b_en, 446 unsigned char g_en, unsigned char r_en, unsigned char color_key_min, 447 unsigned char color_key_max, unsigned char zero_mode_en); 448 449 int RGA_set_bitblt_mode(struct rga_req *msg, 450 unsigned char scale_mode, // 0/near 1/bilnear 2/bicubic 451 unsigned char rotate_mode, // 0/copy 1/rotate_scale 2/x_mirror 3/y_mirror 452 unsigned int angle, // rotate angle 453 unsigned int dither_en, // dither en flag 454 unsigned int AA_en, // AA flag 455 unsigned int yuv2rgb_mode); 456 457 int RGA_set_color_palette_mode(struct rga_req *msg, unsigned char palette_mode, /* 1bpp/2bpp/4bpp/8bpp */ 458 unsigned char endian_mode, /* src endian mode sel */ 459 unsigned int bpp1_0_color, /* BPP1 = 0 */ 460 unsigned int bpp1_1_color /* BPP1 = 1 */ 461 ); 462 463 int RGA_set_color_fill_mode(struct rga_req *msg, COLOR_FILL *gr_color, /* gradient color part */ 464 unsigned char gr_satur_mode, /* saturation mode */ 465 unsigned char cf_mode, /* patten fill or solid fill */ 466 unsigned int color, /* solid color */ 467 unsigned short pat_width, /* pattern width */ 468 unsigned short pat_height, /* pattern height */ 469 unsigned char pat_x_off, /* pattern x offset */ 470 unsigned char pat_y_off, /* pattern y offset */ 471 unsigned char aa_en /* alpha en */ 472 ); 473 474 int RGA_set_line_point_drawing_mode(struct rga_req *msg, POINT sp, /* start point */ 475 POINT ep, /* end point */ 476 unsigned int color, /* line point drawing color */ 477 unsigned int line_width, /* line width */ 478 unsigned char AA_en, /* AA en */ 479 unsigned char last_point_en /* last point en */ 480 ); 481 482 int RGA_set_blur_sharp_filter_mode(struct rga_req *msg, unsigned char filter_mode, /* blur/sharpness */ 483 unsigned char filter_type, /* filter intensity */ 484 unsigned char dither_en /* dither_en flag */ 485 ); 486 487 int RGA_set_pre_scaling_mode(struct rga_req *msg, unsigned char dither_en); 488 489 #if defined(__arm64__) || defined(__aarch64__) 490 int RGA_update_palette_table_mode(struct rga_req *msg, unsigned long LUT_addr, /* LUT table addr */ 491 unsigned int palette_mode /* 1bpp/2bpp/4bpp/8bpp */ 492 ); 493 #else 494 int RGA_update_palette_table_mode(struct rga_req *msg, unsigned int LUT_addr, /* LUT table addr */ 495 unsigned int palette_mode /* 1bpp/2bpp/4bpp/8bpp */ 496 ); 497 #endif 498 499 int RGA_set_update_patten_buff_mode(struct rga_req *msg, unsigned int pat_addr, /* patten addr */ 500 unsigned int w, /* patten width */ 501 unsigned int h, /* patten height */ 502 unsigned int format /* patten format */ 503 ); 504 505 #if defined(__arm64__) || defined(__aarch64__) 506 int RGA_set_mmu_info(struct rga_req *msg, unsigned char mmu_en, unsigned char src_flush, unsigned char dst_flush, 507 unsigned char cmd_flush, unsigned long base_addr, unsigned char page_size); 508 #else 509 int RGA_set_mmu_info(struct rga_req *msg, unsigned char mmu_en, unsigned char src_flush, unsigned char dst_flush, 510 unsigned char cmd_flush, unsigned int base_addr, unsigned char page_size); 511 #endif 512 513 void rga_set_fds_offsets(struct rga_req *rga_request, unsigned short src_fd, unsigned short dst_fd, 514 unsigned int src_offset, unsigned int dst_offset); 515 516 int RGA_set_src_fence_flag(struct rga_req *msg, int acq_fence, int src_flag); 517 518 int RGA_set_dst_fence_flag(struct rga_req *msg, int dst_flag); 519 520 int RGA_get_dst_fence(struct rga_req *msg); 521 #ifdef __cplusplus 522 } 523 #endif 524 525 #endif /* _RK29_IPP_DRIVER_H_ */ 526