1 /*
2  * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved.
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *   http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16  /******************************************************************************
17  * @file     startup.S
18  * @brief    startup file for smartl. Should use with
19  *           GCC for CSKY Embedded Processors
20  * @version  V1.0
21  * @date     02. June 2017
22  ******************************************************************************/
23 
24 .text
25 .long _start
26 .align   2
27 _start:
28     .text
29     .align   2
30     .globl   Reset_Handler
31     .type    Reset_Handler, %function
32 Reset_Handler:
33     lrw     r0, 0x80000200
34     mtcr    r0, psr
35 
36     lrw     r0, __init_stack_e
37     mov     sp, r0
38 
39 /*
40  *  The ranges of copy from/to are specified by following symbols
41  *    __etext: LMA of start of the section to copy from. Usually end of text
42  *    __data_start__: VMA of start of the section to copy to
43  *    __data_end__: VMA of end of the section to copy to
44  *
45  *  All addresses must be aligned to 4 bytes boundary.
46  */
47     lrw     r1, __erodata
48     lrw     r2, __data_start__
49     lrw     r3, __data_end__
50 
51     subu    r3, r2
52     cmpnei  r3, 0
53     bf      .L_loop0_done
54 
55 .L_loop0:
56     ldw     r0, (r1, 0)
57     stw     r0, (r2, 0)
58     addi    r1, 4
59     addi    r2, 4
60     subi    r3, 4
61     cmpnei  r3, 0
62     bt      .L_loop0
63 
64 .L_loop0_done:
65 
66 /*
67  *  The BSS section is specified by following symbols
68  *    __bss_start: start of the BSS section.
69  *    __bss_end: end of the BSS section.
70  *
71  *  Both addresses must be aligned to 4 bytes boundary.
72  */
73     lrw     r1, __bss_start
74     lrw     r2, __bss_end
75 
76     movi    r0, 0
77 
78     subu    r2, r1
79     cmpnei  r2, 0
80     bf      .L_loop1_done
81 
82 .L_loop1:
83     stw     r0, (r1, 0)
84     addi    r1, 4
85     subi    r2, 4
86     cmpnei  r2, 0
87     bt      .L_loop1
88 .L_loop1_done:
89     jbsr    main
90     .size   Reset_Handler, . - Reset_Handler
91 __exit:
92     br __exit
93