1 /*
2 * Copyright (c) Huawei Technologies Co., Ltd. 2021. All rights reserved.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at
6 *
7 * http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 */
15
16 #include "register_test.h"
17
18 #include <bitset>
19
20 using namespace testing::ext;
21 using namespace std;
22 namespace OHOS {
23 namespace Developtools {
24 namespace NativeDaemon {
25 class RegisterTest : public testing::Test {
26 public:
27 static void SetUpTestCase(void);
28 static void TearDownTestCase(void);
29 void SetUp();
30 void TearDown();
31 };
32
SetUpTestCase()33 void RegisterTest::SetUpTestCase() {}
34
TearDownTestCase()35 void RegisterTest::TearDownTestCase() {}
36
SetUp()37 void RegisterTest::SetUp() {}
38
TearDown()39 void RegisterTest::TearDown() {}
40
41 /**
42 * @tc.name: GetSupportedRegMask
43 * @tc.desc:
44 * @tc.type: FUNC
45 */
HWTEST_F(RegisterTest, GetSupportedRegMask, TestSize.Level1)46 HWTEST_F(RegisterTest, GetSupportedRegMask, TestSize.Level1)
47 {
48 EXPECT_NE(GetSupportedRegMask(ArchType::ARCH_X86), GetSupportedRegMask(ArchType::ARCH_X86_64));
49 EXPECT_NE(GetSupportedRegMask(ArchType::ARCH_ARM), GetSupportedRegMask(ArchType::ARCH_ARM64));
50 EXPECT_EQ(GetSupportedRegMask(static_cast<ArchType>(100)),
51 std::numeric_limits<uint64_t>::max());
52 EXPECT_EQ(GetSupportedRegMask(static_cast<ArchType>(-1)), std::numeric_limits<uint64_t>::max());
53
54 std::bitset<64> regMasker;
55 regMasker = GetSupportedRegMask(ArchType::ARCH_X86);
56 EXPECT_EQ(regMasker.count(), PERF_REG_X86_32_MAX);
57
58 regMasker = GetSupportedRegMask(ArchType::ARCH_X86_64);
59 // dont support PERF_REG_X86_DS,PERF_REG_X86_ES,PERF_REG_X86_FS,PERF_REG_X86_GS
60 EXPECT_EQ(regMasker.count(), PERF_REG_X86_64_MAX - 4u);
61
62 regMasker = GetSupportedRegMask(ArchType::ARCH_ARM);
63 EXPECT_EQ(regMasker.count(), PERF_REG_ARM_MAX);
64
65 regMasker = GetSupportedRegMask(ArchType::ARCH_ARM64);
66 EXPECT_EQ(regMasker.count(), PERF_REG_ARM64_MAX);
67 }
68
69 /**
70 * @tc.name: RegisterGetIP
71 * @tc.desc:
72 * @tc.type: FUNC
73 */
HWTEST_F(RegisterTest, RegisterGetIP, TestSize.Level1)74 HWTEST_F(RegisterTest, RegisterGetIP, TestSize.Level1)
75 {
76 #if defined(target_cpu_x86_64)
77 EXPECT_EQ(RegisterGetIP(ArchType::ARCH_X86_64), PERF_REG_X86_IP);
78 #elif defined(target_cpu_arm)
79 EXPECT_EQ(RegisterGetIP(ArchType::ARCH_ARM), PERF_REG_ARM_PC);
80 #elif defined(target_cpu_arm64)
81 EXPECT_EQ(RegisterGetIP(ArchType::ARCH_ARM64), PERF_REG_ARM64_PC);
82 #endif
83 }
84
85 /**
86 * @tc.name: RegisterGetSP
87 * @tc.desc:
88 * @tc.type: FUNC
89 */
HWTEST_F(RegisterTest, RegisterGetSP, TestSize.Level1)90 HWTEST_F(RegisterTest, RegisterGetSP, TestSize.Level1)
91 {
92 #if defined(target_cpu_x86_64)
93 EXPECT_EQ(RegisterGetSP(ArchType::ARCH_X86_64), PERF_REG_X86_IP);
94 #elif defined(target_cpu_arm)
95 EXPECT_EQ(RegisterGetSP(ArchType::ARCH_ARM), PERF_REG_ARM_SP);
96 #elif defined(target_cpu_arm64)
97 EXPECT_EQ(RegisterGetSP(ArchType::ARCH_ARM64), PERF_REG_ARM64_SP);
98 #endif
99 }
100
101 /**
102 * @tc.name: RegisterGetValue
103 * @tc.desc:
104 * @tc.type: FUNC
105 */
HWTEST_F(RegisterTest, RegisterGetValue, TestSize.Level1)106 HWTEST_F(RegisterTest, RegisterGetValue, TestSize.Level1)
107 {
108 uint64_t value = 0;
109 const u64 registers[4] = {1, 2, 3, 4};
110
111 EXPECT_EQ(RegisterGetValue(value, registers, 0, sizeof(registers)), true);
112 EXPECT_EQ(RegisterGetValue(value, registers, sizeof(registers), sizeof(registers)), false);
113 EXPECT_EQ(RegisterGetValue(value, registers, -1, sizeof(registers)), false);
114
115 for (unsigned i = 0; i < sizeof(registers); i++) {
116 RegisterGetValue(value, registers, i, sizeof(registers));
117 EXPECT_EQ(value, registers[i]);
118 }
119 }
120
121 /**
122 * @tc.name: RegisterGetSPValue
123 * @tc.desc:
124 * @tc.type: FUNC
125 */
HWTEST_F(RegisterTest, RegisterGetSPValue, TestSize.Level1)126 HWTEST_F(RegisterTest, RegisterGetSPValue, TestSize.Level1)
127 {
128 uint64_t value = 0;
129 uint64_t value2 = 0;
130 u64 registers[PERF_REG_ARM64_MAX] = {1, 2, 3, 4};
131 size_t sp = RegisterGetSP(buildArchType);
132 registers[sp] = 0x1234;
133
134 EXPECT_EQ(RegisterGetValue(value, registers, sp, sizeof(registers)),
135 RegisterGetSPValue(value2, buildArchType, registers, sizeof(registers)));
136
137 EXPECT_EQ(value, value2);
138 }
139
140 /**
141 * @tc.name: RegisterGetIPValue
142 * @tc.desc:
143 * @tc.type: FUNC
144 */
HWTEST_F(RegisterTest, RegisterGetIPValue, TestSize.Level1)145 HWTEST_F(RegisterTest, RegisterGetIPValue, TestSize.Level1)
146 {
147 uint64_t value = 0;
148 uint64_t value2 = 0;
149 u64 registers[PERF_REG_ARM64_MAX] = {1, 2, 3, 4};
150 size_t ip = RegisterGetIP(buildArchType);
151 registers[ip] = 0x1234;
152
153 EXPECT_EQ(RegisterGetValue(value, registers, ip, sizeof(registers)),
154 RegisterGetIPValue(value2, buildArchType, registers, sizeof(registers)));
155
156 EXPECT_EQ(value, value2);
157 }
158
159 /**
160 * @tc.name: RegisterGetName
161 * @tc.desc:
162 * @tc.type: FUNC
163 */
HWTEST_F(RegisterTest, RegisterGetName, TestSize.Level1)164 HWTEST_F(RegisterTest, RegisterGetName, TestSize.Level1)
165 {
166 for (unsigned i = 0; i < PERF_REG_ARM64_MAX; i++) {
167 EXPECT_EQ(RegisterGetName(i).empty(), false);
168 }
169 }
170 } // namespace NativeDaemon
171 } // namespace Developtools
172 } // namespace OHOS
173