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/third_party/libsnd/src/GSM610/
H A Dgsm_decode.c32 LARc [6] = sr & 0x7 ; sr >>= 3 ; in gsm_decode()
33 LARc [7] = sr & 0x7 ; sr >>= 3 ; in gsm_decode()
40 xmc [0] = sr & 0x7 ; sr >>= 3 ; in gsm_decode()
42 xmc [1] = sr & 0x7 ; sr >>= 3 ; in gsm_decode()
43 xmc [2] = sr & 0x7 ; sr >>= 3 ; in gsm_decode()
45 xmc [3] = sr & 0x7 ; sr >>= 3 ; in gsm_decode()
46 xmc [4] = sr & 0x7 ; sr >>= 3 ; in gsm_decode()
47 xmc [5] = sr & 0x7 ; sr >>= 3 ; in gsm_decode()
49 xmc [6] = sr & 0x7 ; sr >>= 3 ; in gsm_decode()
50 xmc [7] = sr & 0x7 ; s in gsm_decode()
[all...]
H A Dgsm_encode.c350 | ((LARc [3] >> 2) & 0x7) ; in gsm_encode()
355 | ((LARc [6] & 0x7) << 3) in gsm_encode()
356 | (LARc [7] & 0x7) ; in gsm_encode()
363 | ((xmc [0] & 0x7) << 4) in gsm_encode()
364 | ((xmc [1] & 0x7) << 1) in gsm_encode()
367 | ((xmc [3] & 0x7) << 3) in gsm_encode()
368 | (xmc [4] & 0x7) ; in gsm_encode()
369 *c++ = ((xmc [5] & 0x7) << 5) /* 10 */ in gsm_encode()
370 | ((xmc [6] & 0x7) << 2) in gsm_encode()
373 | ((xmc [8] & 0x7) << in gsm_encode()
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/marl/src/
H A Dosfiber_asm_aarch64.S108 mov x7, x1
111 ldr x16, [x7, #MARL_REG_r16]
112 ldr x17, [x7, #MARL_REG_r17]
113 ldr x18, [x7, #MARL_REG_r18]
116 ldr x19, [x7, #MARL_REG_r19]
117 ldr x20, [x7, #MARL_REG_r20]
118 ldr x21, [x7, #MARL_REG_r21]
119 ldr x22, [x7, #MARL_REG_r22]
120 ldr x23, [x7, #MARL_REG_r23]
121 ldr x24, [x7, #MARL_REG_r2
[all...]
/third_party/skia/third_party/externals/swiftshader/src/Shader/
H A DPixelShader.cpp401 interpolant[index][0] |= swizzleContainsComponentMasked(swizzle, 0, 0x7); in analyzeInterpolants()
402 interpolant[index][1] |= swizzleContainsComponentMasked(swizzle, 1, 0x7); in analyzeInterpolants()
403 interpolant[index][2] |= swizzleContainsComponentMasked(swizzle, 2, 0x7); in analyzeInterpolants()
404 interpolant[index][3] |= swizzleContainsComponentMasked(swizzle, 3, 0x7); in analyzeInterpolants()
411 interpolant[index + 1][0] |= swizzleContainsComponentMasked(swizzle, 0, 0x7); in analyzeInterpolants()
412 interpolant[index + 1][1] |= swizzleContainsComponentMasked(swizzle, 1, 0x7); in analyzeInterpolants()
413 interpolant[index + 1][2] |= swizzleContainsComponentMasked(swizzle, 2, 0x7); in analyzeInterpolants()
414 interpolant[index + 1][3] |= swizzleContainsComponentMasked(swizzle, 3, 0x7); in analyzeInterpolants()
421 interpolant[index][0] |= swizzleContainsComponentMasked(swizzle, 0, 0x7); in analyzeInterpolants()
422 interpolant[index][1] |= swizzleContainsComponentMasked(swizzle, 1, 0x7); in analyzeInterpolants()
[all...]
/third_party/mesa3d/src/gallium/drivers/r600/
H A Deg_sq.h33 #define S_SQ_CF_WORD0_JUMPTABLE_SEL(x) (((unsigned)(x) & 0x7) << 24)
34 #define G_SQ_CF_WORD0_JUMPTABLE_SEL(x) (((x) >> 24) & 0x7)
37 #define S_SQ_CF_WORD1_POP_COUNT(x) (((unsigned)(x) & 0x7) << 0)
38 #define G_SQ_CF_WORD1_POP_COUNT(x) (((x) >> 0) & 0x7)
227 #define S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X(x) (((unsigned)(x) & 0x7) << 0)
228 #define G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X(x) (((x) >> 0) & 0x7)
230 #define S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(x) (((unsigned)(x) & 0x7) << 3)
231 #define G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(x) (((x) >> 3) & 0x7)
233 #define S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(x) (((unsigned)(x) & 0x7) << 6)
234 #define G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(x) (((x) >> 6) & 0x7)
[all...]
H A Dr700_sq.h34 #define S_SQ_CF_WORD1_POP_COUNT(x) (((unsigned)(x) & 0x7) << 0)
35 #define G_SQ_CF_WORD1_POP_COUNT(x) (((x) >> 0) & 0x7)
43 #define S_SQ_CF_WORD1_COUNT(x) (((unsigned)(x) & 0x7) << 10)
44 #define G_SQ_CF_WORD1_COUNT(x) (((x) >> 10) & 0x7)
158 #define S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X(x) (((unsigned)(x) & 0x7) << 0)
159 #define G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X(x) (((x) >> 0) & 0x7)
161 #define S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(x) (((unsigned)(x) & 0x7) << 3)
162 #define G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(x) (((x) >> 3) & 0x7)
164 #define S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(x) (((unsigned)(x) & 0x7) << 6)
165 #define G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(x) (((x) >> 6) & 0x7)
[all...]
H A Dr600_sq.h34 #define S_SQ_CF_WORD1_POP_COUNT(x) (((unsigned)(x) & 0x7) << 0)
35 #define G_SQ_CF_WORD1_POP_COUNT(x) (((x) >> 0) & 0x7)
43 #define S_SQ_CF_WORD1_COUNT(x) (((unsigned)(x) & 0x7) << 10)
44 #define G_SQ_CF_WORD1_COUNT(x) (((x) >> 10) & 0x7)
166 #define S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X(x) (((unsigned)(x) & 0x7) << 0)
167 #define G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X(x) (((x) >> 0) & 0x7)
169 #define S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(x) (((unsigned)(x) & 0x7) << 3)
170 #define G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(x) (((x) >> 3) & 0x7)
172 #define S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(x) (((unsigned)(x) & 0x7) << 6)
173 #define G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(x) (((x) >> 6) & 0x7)
[all...]
/third_party/mesa3d/src/gallium/drivers/i915/
H A Di915_reg.h43 #define PRIM3D_RECTLIST (0x7 << 18)
70 #define BFO_STENCIL_TEST_MASK (0x7 << 11)
72 #define BFO_STENCIL_FAIL_MASK (0x7 << 8)
74 #define BFO_STENCIL_PASS_Z_FAIL_MASK (0x7 << 5)
76 #define BFO_STENCIL_PASS_Z_PASS_MASK (0x7 << 2)
95 #define BUF_3D_ID_DEPTH (0x7 << 24)
244 #define BLENDFUNC_MASK 0x7
248 #define _3DSTATE_LOAD_INDIRECT (CMD_3D | (0x1d << 24) | (0x7 << 16))
384 #define S5_STENCIL_TEST_FUNC_MASK (0x7 << 13)
386 #define S5_STENCIL_FAIL_MASK (0x7 << 1
[all...]
/third_party/ffmpeg/libavcodec/aarch64/
H A Dvp9mc_aarch64.S31 ldp x7, x8, [x2, #16]
34 stp x7, x8, [x0, #16]
40 ldp x7, x8, [x2, #80]
43 stp x7, x8, [x0, #80]
56 ldp x7, x8, [x2, #16]
59 stp x7, x8, [x0, #16]
73 ldp x7, x8, [x2, #16]
76 stp x7, x8, [x0, #16]
H A Dmdct_neon.S36 add x7, x2, x12, lsl #1
38 sub x7, x7, #16
40 ld2 {v16.2s,v17.2s}, [x7], x12 // d16=x,n1 d17=x,n0
58 ld2 {v16.2s,v17.2s}, [x7], x12
86 mov x7, #-16
90 ld2 {v0.2s,v1.2s}, [x3], x7 // d0 =i1,r1 d1 =i0,r0
92 ld2 {v16.2s,v17.2s},[x1], x7 // d16=c1,c0 d18=s1,s0
109 ld2 {v0.2s,v1.2s}, [x3], x7
111 ld2 {v16.2s,v17.2s},[x1], x7 // d1
[all...]
H A Dsynth_filter_neon.S37 ld1 {v27.4s}, [x7], x15
48 sxtw x7, w7
50 add x1, x1, x7, lsl #2 // synth_buf
53 and x7, x7, #~63
56 stp x7, x30, [sp, #32]
80 add x7, x4, #48*4
H A Dvp8dsp_neon.S908 add x7, sp, #15
911 bic x7, x7, #15
915 st1 {v1.16b}, [x7], #16
923 add x7, sp, #15
925 bic x7, x7, #15
927 ld1 {v1.8b - v4.8b}, [x7], #32
928 ld1 {v16.8b - v19.8b}, [x7], #32
929 ld1 {v20.8b - v23.8b}, [x7], #3
[all...]
/third_party/mesa3d/src/virtio/virtio-gpu/
H A Dvirgl_protocol.h160 #define VIRGL_OBJ_BLEND_S2_RT_RGB_FUNC(x) (((x) & 0x7) << 1)
163 #define VIRGL_OBJ_BLEND_S2_RT_ALPHA_FUNC(x) (((x) & 0x7) << 14)
174 #define VIRGL_OBJ_DSA_S0_DEPTH_FUNC(x) (((x) & 0x7) << 2)
176 #define VIRGL_OBJ_DSA_S0_ALPHA_FUNC(x) (((x) & 0x7) << 9)
180 #define VIRGL_OBJ_DSA_S1_STENCIL_FUNC(x) (((x) & 0x7) << 1)
181 #define VIRGL_OBJ_DSA_S1_STENCIL_FAIL_OP(x) (((x) & 0x7) << 4)
182 #define VIRGL_OBJ_DSA_S1_STENCIL_ZPASS_OP(x) (((x) & 0x7) << 7)
183 #define VIRGL_OBJ_DSA_S1_STENCIL_ZFAIL_OP(x) (((x) & 0x7) << 10)
259 #define VIRGL_OBJ_SHADER_SO_OUTPUT_NUM_COMPONENTS(x) (((x) & 0x7) << 10)
260 #define VIRGL_OBJ_SHADER_SO_OUTPUT_BUFFER(x) (((x) & 0x7) << 1
[all...]
/third_party/node/deps/openssl/config/archs/darwin64-arm64-cc/asm_avx2/crypto/bn/
H A Darmv8-mont.S38 ldp x7,x8,[x1],#16 // ap[0..1]
44 mul x6,x7,x9 // ap[0]*bp[0]
46 umulh x7,x7,x9
73 adds x6,x10,x7
75 adc x7,x11,xzr
91 adds x6,x10,x7
93 adc x7,x11,xzr
101 adcs x13,x13,x7
108 ldp x7,x
[all...]
/third_party/node/deps/openssl/config/archs/linux-aarch64/asm/crypto/bn/
H A Darmv8-mont.S38 ldp x7,x8,[x1],#16 // ap[0..1]
44 mul x6,x7,x9 // ap[0]*bp[0]
46 umulh x7,x7,x9
73 adds x6,x10,x7
75 adc x7,x11,xzr
91 adds x6,x10,x7
93 adc x7,x11,xzr
101 adcs x13,x13,x7
108 ldp x7,x
[all...]
/third_party/node/deps/openssl/config/archs/linux-aarch64/asm_avx2/crypto/bn/
H A Darmv8-mont.S38 ldp x7,x8,[x1],#16 // ap[0..1]
44 mul x6,x7,x9 // ap[0]*bp[0]
46 umulh x7,x7,x9
73 adds x6,x10,x7
75 adc x7,x11,xzr
91 adds x6,x10,x7
93 adc x7,x11,xzr
101 adcs x13,x13,x7
108 ldp x7,x
[all...]
/third_party/node/deps/openssl/config/archs/darwin64-arm64-cc/asm/crypto/bn/
H A Darmv8-mont.S38 ldp x7,x8,[x1],#16 // ap[0..1]
44 mul x6,x7,x9 // ap[0]*bp[0]
46 umulh x7,x7,x9
73 adds x6,x10,x7
75 adc x7,x11,xzr
91 adds x6,x10,x7
93 adc x7,x11,xzr
101 adcs x13,x13,x7
108 ldp x7,x
[all...]
/third_party/elfutils/libcpu/
H A Driscv_disasm.c151 uint16_t nnn = (first >> 12) & 0x7; in riscv_disasm()
152 if (nnn != 0x7) in riscv_disasm()
223 op[0] = FREGP ((first >> 2) & 0x7); in riscv_disasm()
226 opaddr, REGP ((first >> 7) & 0x7)); in riscv_disasm()
276 op[0] = REGP ((first >> 2) & 0x7); in riscv_disasm()
280 opaddr, REGP ((first >> 7) & 0x7)); in riscv_disasm()
312 op[0] = FREGP ((first >> 2) & 0x7); in riscv_disasm()
320 op[0] = REGP ((first >> 2) & 0x7); in riscv_disasm()
324 opaddr, REGP ((first >> 7) & 0x7)); in riscv_disasm()
395 op[2] = REGP ((first >> 2) & 0x7); in riscv_disasm()
[all...]
/third_party/node/deps/openssl/config/archs/linux-aarch64/asm/crypto/modes/
H A Daes-gcm-armv8_64.S223 ldp x6, x7, [x0, #0] //AES block 0 - load plaintext
226 rev x7, x7
244 eor x7, x7, x14 //AES block 0 - round 10 high
251 fmov v4.d[1], x7 //AES block 0 - mov high
344 ldp x6, x7, [x0, #0] //AES block 4k+4 - load plaintext
347 rev x7, x7
385 eor x7, x
[all...]
/third_party/node/deps/openssl/config/archs/darwin64-arm64-cc/asm/crypto/modes/
H A Daes-gcm-armv8_64.S223 ldp x6, x7, [x0, #0] //AES block 0 - load plaintext
226 rev x7, x7
244 eor x7, x7, x14 //AES block 0 - round 10 high
251 fmov v4.d[1], x7 //AES block 0 - mov high
344 ldp x6, x7, [x0, #0] //AES block 4k+4 - load plaintext
347 rev x7, x7
385 eor x7, x
[all...]
/third_party/node/deps/openssl/config/archs/darwin64-arm64-cc/asm_avx2/crypto/modes/
H A Daes-gcm-armv8_64.S223 ldp x6, x7, [x0, #0] //AES block 0 - load plaintext
226 rev x7, x7
244 eor x7, x7, x14 //AES block 0 - round 10 high
251 fmov v4.d[1], x7 //AES block 0 - mov high
344 ldp x6, x7, [x0, #0] //AES block 4k+4 - load plaintext
347 rev x7, x7
385 eor x7, x
[all...]
/third_party/node/deps/openssl/config/archs/linux-aarch64/asm_avx2/crypto/modes/
H A Daes-gcm-armv8_64.S223 ldp x6, x7, [x0, #0] //AES block 0 - load plaintext
226 rev x7, x7
244 eor x7, x7, x14 //AES block 0 - round 10 high
251 fmov v4.d[1], x7 //AES block 0 - mov high
344 ldp x6, x7, [x0, #0] //AES block 4k+4 - load plaintext
347 rev x7, x7
385 eor x7, x
[all...]
/third_party/mesa3d/src/gallium/drivers/r300/compiler/
H A Dr500_fragprog.c417 (inst) & 0x3, toswiz((inst >> 2) & 0x7), toswiz((inst >> 5) & 0x7), toswiz((inst >> 8) & 0x7), in r500FragmentProgramDump()
419 (inst >> 13) & 0x3, toswiz((inst >> 15) & 0x7), toswiz((inst >> 18) & 0x7), toswiz((inst >> 21) & 0x7), in r500FragmentProgramDump()
427 (inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), (inst >> 17) & 0x3, in r500FragmentProgramDump()
428 (inst >> 19) & 0x3, toswiz((inst >> 21) & 0x7), (inst >> 24) & 0x3, in r500FragmentProgramDump()
436 (inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), toswiz((inst >> 17) & 0x7), toswi in r500FragmentProgramDump()
[all...]
/third_party/ffmpeg/libswscale/aarch64/
H A Doutput.S30 mov x7, #0 // i = 0
37 add x11, x11, x7, lsl #1 // &src[j ][i]
38 add x12, x12, x7, lsl #1 // &src[j+1][i]
55 add x7, x7, #8 // i += 8
/third_party/ffmpeg/libavcodec/
H A Dmpeg12data.c82 { 0xb, 10 }, { 0x14, 12 }, { 0x14, 13 }, { 0x7, 5 },
84 { 0xf, 10 }, { 0x12, 12 }, { 0x7, 6 }, { 0x9, 10 },
86 { 0x4, 6 }, { 0x15, 12 }, { 0x7, 7 }, { 0x11, 12 },
190 {0x7, 7},
196 {0x7, 8},
252 {0x7, 8},
253 {0x7, 9},
282 {0x7, 3},

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