/third_party/ffmpeg/libavcodec/aarch64/ |
H A D | hevcdsp_sao_neon.S | 130 uxtl2 v21.8h, v3.16b // src[7:15] 186 uxtl2 v21.8h, v3.16b
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H A D | hevcdsp_idct_neon.S | 55 uxtl2 v7.8h, v2.16b 95 uxtl2 v2.8h, v2.16b 134 uxtl2 v18.8h, v16.16b 136 uxtl2 v21.8h, v19.16b 180 uxtl2 v17.8h, v20.16b 183 uxtl2 v19.8h, v21.16b 187 uxtl2 v21.8h, v22.16b 189 uxtl2 v23.8h, v23.16b
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H A D | me_cmp_neon.S | 192 uxtl2 v8.8h, v1.16b // 8->16 bits pix1 8..15
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H A D | vp8dsp_neon.S | 741 uxtl2 v22.8h, v22.16b 744 uxtl2 v23.8h, v23.16b 747 uxtl2 v3.8h, v3.16b 750 uxtl2 v2.8h, v2.16b 752 uxtl2 v16.8h, v16.16b 759 uxtl2 v1.8h, \v0\().16b
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H A D | vp9mc_neon.S | 320 uxtl2 v6.8h, v6.16b 322 uxtl2 v18.8h, v18.16b
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H A D | vc1dsp_neon.S | 1062 uxtl2 v4.8h, v4.16b // P2[8..15] 1064 uxtl2 v5.8h, v5.16b // P6[8..15] 1071 uxtl2 v26.8h, v6.16b // P3[8..15] 1073 uxtl2 v7.8h, v7.16b // P7[8..15] 1076 uxtl2 v18.8h, v18.16b // P4[8..15] 1080 uxtl2 v20.8h, v20.16b // P8[8..15] 1082 uxtl2 v1.8h, v1.16b // P5[8..15]
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H A D | h264dsp_neon.S | 81 uxtl2 v20.8H, v0.16B 97 uxtl2 v21.8H, v16.16B 100 uxtl2 v24.8H, v0.16B
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H A D | vp9lpf_neon.S | 127 uxtl2 \dst2, \in\().16b
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/third_party/node/deps/v8/src/execution/arm64/ |
H A D | simulator-logic-arm64.cc | 1391 LogicVRegister extendedreg = uxtl2(vform, temp2, src); in ushll2() 2084 LogicVRegister Simulator::uxtl2(VectorFormat vform, LogicVRegister dst, in uxtl2() function in v8::internal::Simulator 2335 uxtl2(vform, temp1, src1); in uaddl2() 2336 uxtl2(vform, temp2, src2); in uaddl2() 2354 uxtl2(vform, temp, src2); in uaddw2() 2411 uxtl2(vform, temp1, src1); in usubl2() 2412 uxtl2(vform, temp2, src2); in usubl2() 2430 uxtl2(vform, temp, src2); in usubw2() 2487 uxtl2(vform, temp1, src1); in uabal2() 2488 uxtl2(vfor in uabal2() [all...] |
H A D | simulator-arm64.h | 1789 LogicVRegister uxtl2(VectorFormat vform, LogicVRegister dst,
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/third_party/vixl/src/aarch64/ |
H A D | logic-aarch64.cc | 1571 LogicVRegister extendedreg = uxtl2(vform, temp2, src); in ushll2() 3151 LogicVRegister Simulator::uxtl2(VectorFormat vform, 3497 uxtl2(vform, temp1, src1); 3498 uxtl2(vform, temp2, src2); 3520 uxtl2(vform, temp, src2); 3589 uxtl2(vform, temp1, src1); 3590 uxtl2(vform, temp2, src2); 3612 uxtl2(vform, temp, src2); 3681 uxtl2(vform, temp1, src1); 3682 uxtl2(vfor [all...] |
H A D | simulator-aarch64.h | 3933 LogicVRegister uxtl2(VectorFormat vform,
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H A D | assembler-aarch64.h | 3028 void uxtl2(const VRegister& vd, const VRegister& vn);
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H A D | assembler-aarch64.cc | 5620 void Assembler::uxtl2(const VRegister& vd, const VRegister& vn) {
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H A D | macro-assembler-aarch64.h | 3074 V(uxtl2, Uxtl2) \
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/third_party/node/deps/v8/src/codegen/arm64/ |
H A D | assembler-arm64.h | 1970 void uxtl2(const VRegister& vd, const VRegister& vn);
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H A D | macro-assembler-arm64.h | 323 V(uxtl2, Uxtl2) \
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H A D | assembler-arm64.cc | 1690 void Assembler::uxtl2(const VRegister& vd, const VRegister& vn) { in uxtl2() function in v8::internal::Assembler
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/third_party/vixl/test/aarch64/ |
H A D | test-trace-aarch64.cc | 2484 __ uxtl2(v6.V2D(), v16.V4S()); in GenerateTestSequenceNEON() 2485 __ uxtl2(v22.V4S(), v20.V8H()); in GenerateTestSequenceNEON() 2486 __ uxtl2(v20.V8H(), v21.V16B()); in GenerateTestSequenceNEON()
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H A D | test-cpu-features-aarch64.cc | 2747 TEST_NEON(uxtl2_0, uxtl2(v0.V8H(), v1.V16B())) 2748 TEST_NEON(uxtl2_1, uxtl2(v0.V4S(), v1.V8H())) 2749 TEST_NEON(uxtl2_2, uxtl2(v0.V2D(), v1.V4S()))
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