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Searched refs:uxtl2 (Results 1 - 20 of 20) sorted by relevance

/third_party/ffmpeg/libavcodec/aarch64/
H A Dhevcdsp_sao_neon.S130 uxtl2 v21.8h, v3.16b // src[7:15]
186 uxtl2 v21.8h, v3.16b
H A Dhevcdsp_idct_neon.S55 uxtl2 v7.8h, v2.16b
95 uxtl2 v2.8h, v2.16b
134 uxtl2 v18.8h, v16.16b
136 uxtl2 v21.8h, v19.16b
180 uxtl2 v17.8h, v20.16b
183 uxtl2 v19.8h, v21.16b
187 uxtl2 v21.8h, v22.16b
189 uxtl2 v23.8h, v23.16b
H A Dme_cmp_neon.S192 uxtl2 v8.8h, v1.16b // 8->16 bits pix1 8..15
H A Dvp8dsp_neon.S741 uxtl2 v22.8h, v22.16b
744 uxtl2 v23.8h, v23.16b
747 uxtl2 v3.8h, v3.16b
750 uxtl2 v2.8h, v2.16b
752 uxtl2 v16.8h, v16.16b
759 uxtl2 v1.8h, \v0\().16b
H A Dvp9mc_neon.S320 uxtl2 v6.8h, v6.16b
322 uxtl2 v18.8h, v18.16b
H A Dvc1dsp_neon.S1062 uxtl2 v4.8h, v4.16b // P2[8..15]
1064 uxtl2 v5.8h, v5.16b // P6[8..15]
1071 uxtl2 v26.8h, v6.16b // P3[8..15]
1073 uxtl2 v7.8h, v7.16b // P7[8..15]
1076 uxtl2 v18.8h, v18.16b // P4[8..15]
1080 uxtl2 v20.8h, v20.16b // P8[8..15]
1082 uxtl2 v1.8h, v1.16b // P5[8..15]
H A Dh264dsp_neon.S81 uxtl2 v20.8H, v0.16B
97 uxtl2 v21.8H, v16.16B
100 uxtl2 v24.8H, v0.16B
H A Dvp9lpf_neon.S127 uxtl2 \dst2, \in\().16b
/third_party/node/deps/v8/src/execution/arm64/
H A Dsimulator-logic-arm64.cc1391 LogicVRegister extendedreg = uxtl2(vform, temp2, src); in ushll2()
2084 LogicVRegister Simulator::uxtl2(VectorFormat vform, LogicVRegister dst, in uxtl2() function in v8::internal::Simulator
2335 uxtl2(vform, temp1, src1); in uaddl2()
2336 uxtl2(vform, temp2, src2); in uaddl2()
2354 uxtl2(vform, temp, src2); in uaddw2()
2411 uxtl2(vform, temp1, src1); in usubl2()
2412 uxtl2(vform, temp2, src2); in usubl2()
2430 uxtl2(vform, temp, src2); in usubw2()
2487 uxtl2(vform, temp1, src1); in uabal2()
2488 uxtl2(vfor in uabal2()
[all...]
H A Dsimulator-arm64.h1789 LogicVRegister uxtl2(VectorFormat vform, LogicVRegister dst,
/third_party/vixl/src/aarch64/
H A Dlogic-aarch64.cc1571 LogicVRegister extendedreg = uxtl2(vform, temp2, src); in ushll2()
3151 LogicVRegister Simulator::uxtl2(VectorFormat vform,
3497 uxtl2(vform, temp1, src1);
3498 uxtl2(vform, temp2, src2);
3520 uxtl2(vform, temp, src2);
3589 uxtl2(vform, temp1, src1);
3590 uxtl2(vform, temp2, src2);
3612 uxtl2(vform, temp, src2);
3681 uxtl2(vform, temp1, src1);
3682 uxtl2(vfor
[all...]
H A Dsimulator-aarch64.h3933 LogicVRegister uxtl2(VectorFormat vform,
H A Dassembler-aarch64.h3028 void uxtl2(const VRegister& vd, const VRegister& vn);
H A Dassembler-aarch64.cc5620 void Assembler::uxtl2(const VRegister& vd, const VRegister& vn) {
H A Dmacro-assembler-aarch64.h3074 V(uxtl2, Uxtl2) \
/third_party/node/deps/v8/src/codegen/arm64/
H A Dassembler-arm64.h1970 void uxtl2(const VRegister& vd, const VRegister& vn);
H A Dmacro-assembler-arm64.h323 V(uxtl2, Uxtl2) \
H A Dassembler-arm64.cc1690 void Assembler::uxtl2(const VRegister& vd, const VRegister& vn) { in uxtl2() function in v8::internal::Assembler
/third_party/vixl/test/aarch64/
H A Dtest-trace-aarch64.cc2484 __ uxtl2(v6.V2D(), v16.V4S()); in GenerateTestSequenceNEON()
2485 __ uxtl2(v22.V4S(), v20.V8H()); in GenerateTestSequenceNEON()
2486 __ uxtl2(v20.V8H(), v21.V16B()); in GenerateTestSequenceNEON()
H A Dtest-cpu-features-aarch64.cc2747 TEST_NEON(uxtl2_0, uxtl2(v0.V8H(), v1.V16B()))
2748 TEST_NEON(uxtl2_1, uxtl2(v0.V4S(), v1.V8H()))
2749 TEST_NEON(uxtl2_2, uxtl2(v0.V2D(), v1.V4S()))

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