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Searched refs:tmu_writes (Results 1 - 3 of 3) sorted by relevance

/third_party/mesa3d/src/broadcom/compiler/
H A Dv3d40_tex.c46 uint32_t *tmu_writes) in vir_TMU_WRITE_or_count()
48 if (tmu_writes) in vir_TMU_WRITE_or_count()
49 (*tmu_writes)++; in vir_TMU_WRITE_or_count()
71 * If 'tmu_writes' is not NULL, then it just counts required register writes,
89 unsigned *tmu_writes) in handle_tex_src()
94 assert(tmu_writes || (s_out && p2_unpacked)); in handle_tex_src()
101 if (tmu_writes) in handle_tex_src()
102 (*tmu_writes)++; in handle_tex_src()
110 tmu_writes); in handle_tex_src()
117 tmu_writes); in handle_tex_src()
43 vir_TMU_WRITE_or_count(struct v3d_compile *c, enum v3d_qpu_waddr waddr, struct qreg val, uint32_t *tmu_writes) vir_TMU_WRITE_or_count() argument
83 handle_tex_src(struct v3d_compile *c, nir_tex_instr *instr, unsigned src_idx, unsigned non_array_components, struct V3D41_TMU_CONFIG_PARAMETER_2 *p2_unpacked, struct qreg *s_out, unsigned *tmu_writes) handle_tex_src() argument
200 vir_tex_handle_srcs(struct v3d_compile *c, nir_tex_instr *instr, struct V3D41_TMU_CONFIG_PARAMETER_2 *p2_unpacked, struct qreg *s, unsigned *tmu_writes) vir_tex_handle_srcs() argument
219 unsigned tmu_writes = 0; get_required_tex_tmu_writes() local
252 const unsigned tmu_writes = get_required_tex_tmu_writes(c, instr); v3d40_vir_emit_tex() local
431 vir_image_emit_register_writes(struct v3d_compile *c, nir_intrinsic_instr *instr, bool atomic_add_replaced, uint32_t *tmu_writes) vir_image_emit_register_writes() argument
512 unsigned tmu_writes; get_required_image_tmu_writes() local
581 const uint32_t tmu_writes = v3d40_vir_emit_image_load_store() local
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H A Dqpu_validate.c148 int tmu_writes = 0; in qpu_validate_inst() local
158 tmu_writes++; in qpu_validate_inst()
175 tmu_writes++; in qpu_validate_inst()
220 if (tmu_writes + in qpu_validate_inst()
H A Dnir_to_vir.c358 uint32_t *tmu_writes) in emit_tmu_general_store_writes()
378 (*tmu_writes)++; in emit_tmu_general_store_writes()
393 BITFIELD_RANGE(first_component, *tmu_writes); in emit_tmu_general_store_writes()
414 uint32_t *tmu_writes) in emit_tmu_general_atomic_writes()
420 (*tmu_writes)++; in emit_tmu_general_atomic_writes()
427 (*tmu_writes)++; in emit_tmu_general_atomic_writes()
451 uint32_t *tmu_writes) in emit_tmu_general_address_write()
454 (*tmu_writes)++; in emit_tmu_general_address_write()
615 uint32_t tmu_writes = 0; in ntq_emit_tmu_general() local
617 assert(mode == MODE_COUNT || tmu_writes > in ntq_emit_tmu_general()
351 emit_tmu_general_store_writes(struct v3d_compile *c, enum emit_mode mode, nir_intrinsic_instr *instr, uint32_t base_const_offset, uint32_t *writemask, uint32_t *const_offset, uint32_t *type_size, uint32_t *tmu_writes) emit_tmu_general_store_writes() argument
409 emit_tmu_general_atomic_writes(struct v3d_compile *c, enum emit_mode mode, nir_intrinsic_instr *instr, uint32_t tmu_op, bool has_index, uint32_t *tmu_writes) emit_tmu_general_atomic_writes() argument
443 emit_tmu_general_address_write(struct v3d_compile *c, enum emit_mode mode, nir_intrinsic_instr *instr, uint32_t config, bool dynamic_src, int offset_src, struct qreg base_offset, uint32_t const_offset, uint32_t *tmu_writes) emit_tmu_general_address_write() argument
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