| /third_party/node/deps/v8/src/execution/arm/ |
| H A D | simulator-arm.h | 210 void set_s_register_from_float(int sreg, const Float32 flt) { in set_s_register_from_float() argument
211 SetVFPRegister<Float32, 1>(sreg, flt); in set_s_register_from_float()
213 void set_s_register_from_float(int sreg, const float flt) { in set_s_register_from_float() argument
214 SetVFPRegister<float, 1>(sreg, flt); in set_s_register_from_float()
217 Float32 get_float_from_s_register(int sreg) { in get_float_from_s_register() argument
218 return GetFromVFPRegister<Float32, 1>(sreg); in get_float_from_s_register()
221 void set_s_register_from_sinteger(int sreg, const int sint) { in set_s_register_from_sinteger() argument
222 SetVFPRegister<int, 1>(sreg, sint); in set_s_register_from_sinteger()
225 int get_sinteger_from_s_register(int sreg) { in get_sinteger_from_s_register() argument
226 return GetFromVFPRegister<int, 1>(sreg); in get_sinteger_from_s_register()
[all...] |
| H A D | simulator-arm.cc | 843 void Simulator::set_s_register(int sreg, unsigned int value) { in set_s_register() argument
844 DCHECK((sreg >= 0) && (sreg < num_s_registers)); in set_s_register()
845 vfp_registers_[sreg] = value; in set_s_register()
848 unsigned int Simulator::get_s_register(int sreg) const { in get_s_register()
849 DCHECK((sreg >= 0) && (sreg < num_s_registers)); in get_s_register()
850 return vfp_registers_[sreg]; in get_s_register()
2336 SRegister sreg = static_cast<SRegister>(instr->BitField(22, 22)); in DecodeType01() local
2337 set_register(rd, GetFromSpecialRegister(sreg)); in DecodeType01()
[all...] |
| /third_party/vixl/test/aarch32/ |
| H A D | test-utils-aarch32.cc | 127 const SRegister& sreg) { in Equal32()
128 return Equal32(expected, core, core->GetSRegisterBits(sreg.GetCode())); in Equal32()
209 const SRegister& sreg) { in EqualFP32()
211 uint32_t result = core->GetSRegisterBits(sreg.GetCode()); in EqualFP32()
125 Equal32(uint32_t expected, const RegisterDump* core, const SRegister& sreg) Equal32() argument
207 EqualFP32(float expected, const RegisterDump* core, const SRegister& sreg) EqualFP32() argument
|
| H A D | test-utils-aarch32.h | 188 const SRegister& sreg);
|
| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-arm64.cc | 2092 MemoryWrite<float>(address, sreg(srcdst));
2242 MemoryWrite<float>(address, sreg(rt));
2243 MemoryWrite<float>(address2, sreg(rt2));
2863 set_wreg(dst, FPToInt32(sreg(src), FPTieAway));
2866 set_xreg(dst, FPToInt64(sreg(src), FPTieAway));
2875 set_wreg(dst, FPToUInt32(sreg(src), FPTieAway));
2878 set_xreg(dst, FPToUInt64(sreg(src), FPTieAway));
2887 set_wreg(dst, FPToInt32(sreg(src), FPNegativeInfinity));
2890 set_xreg(dst, FPToInt64(sreg(src), FPNegativeInfinity));
2899 set_wreg(dst, FPToUInt32(sreg(sr
[all...] |
| H A D | simulator-arm64.h | 1026 float sreg(unsigned code) const { return vreg<float>(code); } in sreg() function in v8::internal::Simulator
|
| /third_party/vixl/test/aarch64/ |
| H A D | test-utils-aarch64.h | 148 inline float sreg(unsigned code) const { in sreg() function in vixl::aarch64::RegisterDump
|
| H A D | test-utils-aarch64.cc | 258 return EqualFP32(expected, core, core->sreg(fpreg.GetCode())); in EqualFP32()
|
| /third_party/vixl/src/aarch32/ |
| H A D | assembler-aarch32.cc | 19447 const SRegister& sreg = sreglist.GetFirstSRegister(); in vldm() local
19450 (write_back.GetWriteBackUint32() << 21) | sreg.Encode(22, 12) | in vldm()
19459 const SRegister& sreg = sreglist.GetFirstSRegister(); in vldm() local
19462 (write_back.GetWriteBackUint32() << 21) | sreg.Encode(22, 12) | in vldm()
19516 const SRegister& sreg = sreglist.GetFirstSRegister(); in vldmdb() local
19518 EmitT32_32(0xed300a00U | (rn.GetCode() << 16) | sreg.Encode(22, 12) | in vldmdb()
19527 const SRegister& sreg = sreglist.GetFirstSRegister(); in vldmdb() local
19530 sreg.Encode(22, 12) | (len & 0xff)); in vldmdb()
19584 const SRegister& sreg = sreglist.GetFirstSRegister(); in vldmia() local
19587 (write_back.GetWriteBackUint32() << 21) | sreg in vldmia()
19596 const SRegister& sreg = sreglist.GetFirstSRegister(); vldmia() local
22480 const SRegister& sreg = sreglist.GetFirstSRegister(); vpop() local
22488 const SRegister& sreg = sreglist.GetFirstSRegister(); vpop() local
22531 const SRegister& sreg = sreglist.GetFirstSRegister(); vpush() local
22539 const SRegister& sreg = sreglist.GetFirstSRegister(); vpush() local
27123 const SRegister& sreg = sreglist.GetFirstSRegister(); vstm() local
27135 const SRegister& sreg = sreglist.GetFirstSRegister(); vstm() local
27192 const SRegister& sreg = sreglist.GetFirstSRegister(); vstmdb() local
27203 const SRegister& sreg = sreglist.GetFirstSRegister(); vstmdb() local
27260 const SRegister& sreg = sreglist.GetFirstSRegister(); vstmia() local
27272 const SRegister& sreg = sreglist.GetFirstSRegister(); vstmia() local
[all...] |
| /third_party/FatFs/source/ |
| H A D | ff.c | 1750 DWORD sreg; in gen_numname() local
1756 sreg = seq; in gen_numname()
1760 sreg = (sreg << 1) + (wc & 1); in gen_numname()
1762 if (sreg & 0x10000) sreg ^= 0x11021; in gen_numname()
1765 seq = (UINT)sreg; in gen_numname()
|
| /third_party/vixl/src/aarch64/ |
| H A D | simulator-aarch64.h | 1796 VIXL_DEPRECATED("ReadSRegister", float sreg(unsigned code) const) {
|