Home
last modified time | relevance | path

Searched refs:reg_size (Results 1 - 25 of 43) sorted by relevance

12

/third_party/node/deps/v8/src/codegen/arm64/
H A Dassembler-arm64-inl.h915 Instr Assembler::ImmS(unsigned imms, unsigned reg_size) { in ImmS() argument
916 DCHECK(((reg_size == kXRegSizeInBits) && is_uint6(imms)) || in ImmS()
917 ((reg_size == kWRegSizeInBits) && is_uint5(imms))); in ImmS()
918 USE(reg_size); in ImmS()
922 Instr Assembler::ImmR(unsigned immr, unsigned reg_size) { in ImmR() argument
923 DCHECK(((reg_size == kXRegSizeInBits) && is_uint6(immr)) || in ImmR()
924 ((reg_size == kWRegSizeInBits) && is_uint5(immr))); in ImmR()
925 USE(reg_size); in ImmR()
930 Instr Assembler::ImmSetBits(unsigned imms, unsigned reg_size) { in ImmSetBits() argument
931 DCHECK((reg_size in ImmSetBits()
938 ImmRotate(unsigned immr, unsigned reg_size) ImmRotate() argument
951 BitN(unsigned bitn, unsigned reg_size) BitN() argument
[all...]
H A Dinstructions-arm64.cc79 static uint64_t RepeatBitsAcrossReg(unsigned reg_size, uint64_t value, in RepeatBitsAcrossReg() argument
83 DCHECK((reg_size == kWRegSizeInBits) || (reg_size == kXRegSizeInBits)); in RepeatBitsAcrossReg()
85 for (unsigned i = width; i < reg_size; i *= 2) { in RepeatBitsAcrossReg()
95 unsigned reg_size = SixtyFourBits() ? kXRegSizeInBits : kWRegSizeInBits; in ImmLogical() local
135 reg_size, RotateRight(bits, imm_r & mask, width), width); in ImmLogical()
H A Dmacro-assembler-arm64.cc167 unsigned reg_size = rd.SizeInBits(); in LogicalMacro() local
222 if (IsImmLogical(immediate, reg_size, &n, &imm_s, &imm_r)) { in LogicalMacro()
288 unsigned reg_size = rd.SizeInBits(); in Mov() local
299 if (CountSetHalfWords(imm, reg_size) > CountSetHalfWords(~imm, reg_size)) { in Mov()
311 DCHECK_EQ(reg_size % 16, 0); in Mov()
602 unsigned TurboAssembler::CountSetHalfWords(uint64_t imm, unsigned reg_size) { in CountSetHalfWords() argument
603 DCHECK_EQ(reg_size % 16, 0); in CountSetHalfWords()
606 switch (reg_size / 16) { in CountSetHalfWords()
620 bool TurboAssembler::IsImmMovz(uint64_t imm, unsigned reg_size) { in IsImmMovz() argument
627 IsImmMovn(uint64_t imm, unsigned reg_size) IsImmMovn() argument
696 int reg_size = dst.SizeInBits(); TryOneInstrMoveImmediate() local
718 int reg_size = dst.SizeInBits(); MoveImmediateForShiftedOp() local
[all...]
H A Dmacro-assembler-arm64.h649 static unsigned CountSetHalfWords(uint64_t imm, unsigned reg_size);
660 static bool IsImmMovn(uint64_t imm, unsigned reg_size);
661 static bool IsImmMovz(uint64_t imm, unsigned reg_size);
1750 inline void PushSizeRegList(RegList registers, unsigned reg_size) { in PushSizeRegList() argument
1751 PushCPURegList(CPURegList(reg_size, registers)); in PushSizeRegList()
1753 inline void PushSizeRegList(DoubleRegList registers, unsigned reg_size) { in PushSizeRegList() argument
1754 PushCPURegList(CPURegList(reg_size, registers)); in PushSizeRegList()
1756 inline void PopSizeRegList(RegList registers, unsigned reg_size) { in PopSizeRegList() argument
1757 PopCPURegList(CPURegList(reg_size, registers)); in PopSizeRegList()
1759 inline void PopSizeRegList(DoubleRegList registers, unsigned reg_size) { in PopSizeRegList() argument
[all...]
H A Dassembler-arm64.h649 int reg_size = rd.SizeInBits();
650 DCHECK(shift < reg_size);
651 ubfm(rd, rn, (reg_size - shift) % reg_size, reg_size - shift - 1);
2177 inline static Instr ImmS(unsigned imms, unsigned reg_size);
2178 inline static Instr ImmR(unsigned immr, unsigned reg_size);
2179 inline static Instr ImmSetBits(unsigned imms, unsigned reg_size);
2180 inline static Instr ImmRotate(unsigned immr, unsigned reg_size);
2182 inline static Instr BitN(unsigned bitn, unsigned reg_size);
[all...]
/third_party/mesa3d/src/freedreno/ir3/
H A Dir3_ra_validate.c142 unsigned dst_max = ra_reg_get_physreg(dst) + reg_size(dst); in validate_simple()
149 unsigned src_max = ra_reg_get_physreg(src) + reg_size(src); in validate_simple()
224 for (unsigned i = 0; i < reg_size(dst); i++) { in propagate_normal_instr()
255 unsigned size = reg_size(dst); in propagate_collect()
283 size += reg_size(pcopy->srcs[i]); in propagate_parallelcopy()
294 for (unsigned j = 0; j < reg_size(dst); j++) { in propagate_parallelcopy()
306 offset += reg_size(dst); in propagate_parallelcopy()
316 for (unsigned j = 0; j < reg_size(dst); j++) in propagate_parallelcopy()
319 offset += reg_size(dst); in propagate_parallelcopy()
444 for (unsigned i = 0; i < reg_size(sr in check_reaching_src()
[all...]
H A Dir3_merge_regs.c125 value.offset + value.size > reg_size(value.reg)) in chase_copies()
155 unsigned a_end = a_start + reg_size(a->reg); in can_skip_interference()
156 unsigned b_end = b_start + reg_size(b->reg); in can_skip_interference()
202 set->size = reg_size(def); in get_merge_set()
489 unsigned size = reg_size(dst); in index_merge_sets()
H A Dir3_ra.c796 for (unsigned i = 0; i < reg_size(reg); i++) { in get_reg_specified()
804 check_dst_overlap(ctx, file, reg, physreg, physreg + reg_size(reg))) in get_reg_specified()
827 for (unsigned i = 0; i < reg_size(reg); i++) { in try_evict_regs()
837 conflicting->physreg_start < physreg + reg_size(reg); in try_evict_regs()
1057 unsigned dst_size = reg->tied ? 0 : reg_size(reg); in compress_regs_left()
1058 unsigned ec_dst_size = is_early_clobber(reg) ? reg_size(reg) : 0; in compress_regs_left()
1112 unsigned interval_size = reg_size(other_dst); in compress_regs_left()
1243 unsigned interval_size = reg_size(cur_reg); in compress_regs_left()
1291 unsigned dst_size = reg_size(dst); in compress_regs_left()
1377 if (preferred_reg + reg_size(re in get_reg()
[all...]
H A Dir3_spill.c170 ctx->limit_pressure.full -= reg_size(ctx->base_reg); in add_base_reg()
450 unsigned size = reg_size(interval->interval.reg); in interval_add()
477 unsigned size = reg_size(interval->interval.reg); in interval_delete()
575 physreg_t max = physreg + reg_size(dst); in insert_dst()
683 ctx->spill_slot = reg->spill_slot + reg_size(reg) * 2; in get_spill_slot()
842 def->interval_end = set->interval_start + offset + reg_size(def); in add_to_merge_set()
1126 reg->interval_end = offset + reg_size(def); in create_temp_interval()
1134 ctx->live->interval_offset += reg_size(def); in create_temp_interval()
/third_party/mesa3d/src/gallium/drivers/iris/
H A Diris_perf.c60 uint32_t reg, uint32_t reg_size, in iris_perf_store_register_mem()
65 if (reg_size == 8) { in iris_perf_store_register_mem()
68 assert(reg_size == 4); in iris_perf_store_register_mem()
79 uint32_t reg, uint32_t reg_size,
59 iris_perf_store_register_mem(void *ctx, void *bo, uint32_t reg, uint32_t reg_size, uint32_t offset) iris_perf_store_register_mem() argument
/third_party/mesa3d/src/intel/compiler/
H A Dbrw_fs_reg_allocate.cpp752 const unsigned reg_size = dst.component_size(bld.dispatch_width()) / in emit_unspill() local
754 assert(count % reg_size == 0); in emit_unspill()
756 for (unsigned i = 0; i < count / reg_size; i++) { in emit_unspill()
783 unspill_inst->size_written = reg_size * REG_SIZE; in emit_unspill()
790 BRW_DATAPORT_OWORD_BLOCK_DWORDS(reg_size * 8)); in emit_unspill()
809 dst.offset += reg_size * REG_SIZE; in emit_unspill()
810 spill_offset += reg_size * REG_SIZE; in emit_unspill()
821 const unsigned reg_size = src.component_size(bld.dispatch_width()) / in emit_spill() local
823 assert(count % reg_size == 0); in emit_spill()
825 for (unsigned i = 0; i < count / reg_size; in emit_spill()
[all...]
H A Dbrw_ir_fs.h466 const unsigned reg_size = inst->src[i].file == UNIFORM ? 4 : REG_SIZE;
467 return DIV_ROUND_UP(reg_offset(inst->src[i]) % reg_size +
470 reg_size);
H A Dbrw_ir_vec4.h434 const unsigned reg_size = in regs_read() local
436 return DIV_ROUND_UP(reg_offset(inst->src[i]) % reg_size + inst->size_read(i), in regs_read()
437 reg_size); in regs_read()
H A Dbrw_vec4.cpp1380 const unsigned reg_size = (inst->dst.file == UNIFORM ? 16 : REG_SIZE); in dump_instruction() local
1381 fprintf(file, "+%d.%d", inst->dst.offset / reg_size, in dump_instruction()
1382 inst->dst.offset % reg_size); in dump_instruction()
1473 const unsigned reg_size = (inst->src[i].file == UNIFORM ? 16 : REG_SIZE); in dump_instruction() local
1474 fprintf(file, "+%d.%d", inst->src[i].offset / reg_size, in dump_instruction()
1475 inst->src[i].offset % reg_size); in dump_instruction()
/third_party/vixl/src/aarch64/
H A Dinstructions-aarch64.cc34 static uint64_t RepeatBitsAcrossReg(unsigned reg_size, in RepeatBitsAcrossReg() argument
39 VIXL_ASSERT((reg_size == kBRegSize) || (reg_size == kHRegSize) || in RepeatBitsAcrossReg()
40 (reg_size == kSRegSize) || (reg_size == kDRegSize)); in RepeatBitsAcrossReg()
42 for (unsigned i = width; i < reg_size; i *= 2) { in RepeatBitsAcrossReg()
610 unsigned reg_size = GetSixtyFourBits() ? kXRegSize : kWRegSize; in GetImmLogical() local
614 return DecodeImmBitMask(n, imm_s, imm_r, reg_size); in GetImmLogical()
H A Dmacro-assembler-aarch64.cc520 unsigned reg_size = rd.GetSizeInBits(); in Emit() local
531 if (CountClearHalfWords(~imm, reg_size) > in Emit()
532 CountClearHalfWords(imm, reg_size)) { in Emit()
548 VIXL_ASSERT((reg_size % 16) == 0); in Emit()
550 for (unsigned i = 0; i < (reg_size / 16); i++) { in Emit()
889 unsigned reg_size = rd.GetSizeInBits(); in Emit() local
947 if (IsImmLogical(immediate, reg_size, &n, &imm_s, &imm_r)) { in Emit()
1775 int reg_size = dst.GetSizeInBits(); in Emit() local
1782 int shift_low = CountTrailingZeros(imm, reg_size); in Emit()
1798 int shift_high = CountLeadingZeros(imm, reg_size); in Emit()
2235 int reg_size = registers.GetRegisterSizeInBytes(); Emit() local
2267 int reg_size = registers.GetRegisterSizeInBytes(); Emit() local
2569 const int reg_size = registers.GetRegisterSizeInBytes(); Emit() local
2620 int reg_size = registers.GetRegisterSizeInBytes(); Emit() local
[all...]
H A Dsimulator-aarch64.cc911 uint64_t Simulator::AddWithCarry(unsigned reg_size, in Simulator()
917 AddWithCarry(reg_size, left, right, carry_in); in Simulator()
929 std::pair<uint64_t, uint8_t> Simulator::AddWithCarry(unsigned reg_size, in Simulator() argument
934 VIXL_ASSERT((reg_size == kXRegSize) || (reg_size == kWRegSize)); in Simulator()
936 uint64_t max_uint = (reg_size == kWRegSize) ? kWMaxUInt : kXMaxUInt; in Simulator()
937 uint64_t reg_mask = (reg_size == kWRegSize) ? kWRegMask : kXRegMask; in Simulator()
938 uint64_t sign_mask = (reg_size == kWRegSize) ? kWSignMask : kXSignMask; in Simulator()
945 uint8_t nzcv = CalcNFlag(result, reg_size) ? 8 : 0; in Simulator()
1013 int64_t Simulator::ShiftOperand(unsigned reg_size, in Simulator() argument
1065 ExtendValue(unsigned reg_size, int64_t value, Extend extend_type, unsigned left_shift) const Simulator() argument
1153 GetPrintRegisterFormatForSize( unsigned reg_size, unsigned lane_size) Simulator() argument
3891 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; Simulator() local
3934 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; Simulator() local
3951 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; Simulator() local
3961 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; Simulator() local
4008 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; Simulator() local
4032 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; Simulator() local
4073 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; Simulator() local
4085 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; Simulator() local
4798 unsigned reg_size = 0; Simulator() local
5301 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; Simulator() local
5436 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; Simulator() local
5655 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; Simulator() local
5705 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; Simulator() local
5768 unsigned reg_size = (instr->GetSixtyFourBits() == 1) ? kXRegSize : kWRegSize; Simulator() local
8226 int reg_size = RegisterSizeInBytesFromFormat(vf); Simulator() local
[all...]
H A Dassembler-aarch64.h854 unsigned reg_size = rd.GetSizeInBits(); in lsl() local
855 VIXL_ASSERT(shift < reg_size); in lsl()
857 ubfm(rd, rn, (reg_size - shift) % reg_size, reg_size - shift - 1); in lsl()
7337 static Instr ImmS(unsigned imms, unsigned reg_size) {
7338 VIXL_ASSERT(((reg_size == kXRegSize) && IsUint6(imms)) ||
7339 ((reg_size == kWRegSize) && IsUint5(imms)));
7340 USE(reg_size);
7344 static Instr ImmR(unsigned immr, unsigned reg_size) {
[all...]
/third_party/vulkan-loader/loader/
H A Dloader_windows.c726 DWORD reg_size = 4096; in windows_read_data_files_in_registry() local
729 regHKR_result = windows_read_manifest_from_d3d_adapters(inst, &search_path, &reg_size, LoaderPnpDriverRegistryWide()); in windows_read_data_files_in_registry()
732 windows_get_device_registry_files(inst, log_target_flag, &search_path, &reg_size, LoaderPnpDriverRegistry()); in windows_read_data_files_in_registry()
735 regHKR_result = windows_read_manifest_from_d3d_adapters(inst, &search_path, &reg_size, LoaderPnpELayerRegistryWide()); in windows_read_data_files_in_registry()
738 windows_get_device_registry_files(inst, log_target_flag, &search_path, &reg_size, LoaderPnpELayerRegistry()); in windows_read_data_files_in_registry()
741 regHKR_result = windows_read_manifest_from_d3d_adapters(inst, &search_path, &reg_size, LoaderPnpILayerRegistryWide()); in windows_read_data_files_in_registry()
744 windows_get_device_registry_files(inst, log_target_flag, &search_path, &reg_size, LoaderPnpILayerRegistry()); in windows_read_data_files_in_registry()
755 VkResult reg_result = windows_get_registry_files(inst, registry_location, use_secondary_hive, &search_path, &reg_size); in windows_read_data_files_in_registry()
/third_party/vixl/src/
H A Dutils-vixl.cc191 unsigned CountClearHalfWords(uint64_t imm, unsigned reg_size) { in CountClearHalfWords() argument
192 VIXL_ASSERT((reg_size % 8) == 0); in CountClearHalfWords()
194 for (unsigned i = 0; i < (reg_size / 16); i++) { in CountClearHalfWords()
/third_party/vixl/test/aarch64/
H A Dtest-simulator-aarch64.cc392 unsigned reg_size, in Test2Op_Helper()
394 VIXL_ASSERT((reg_size == kDRegSize) || (reg_size == kSRegSize) || in Test2Op_Helper()
395 (reg_size == kHRegSize)); in Test2Op_Helper()
409 bool double_op = reg_size == kDRegSize; in Test2Op_Helper()
410 bool float_op = reg_size == kSRegSize; in Test2Op_Helper()
549 unsigned reg_size, in Test3Op_Helper()
551 VIXL_ASSERT((reg_size == kDRegSize) || (reg_size == kSRegSize) || in Test3Op_Helper()
552 (reg_size in Test3Op_Helper()
388 Test2Op_Helper(Test2OpFPHelper_t helper, uintptr_t inputs, unsigned inputs_length, uintptr_t results, unsigned reg_size, bool* skipped) Test2Op_Helper() argument
545 Test3Op_Helper(Test3OpFPHelper_t helper, uintptr_t inputs, unsigned inputs_length, uintptr_t results, unsigned reg_size, bool* skipped) Test3Op_Helper() argument
703 TestCmp_Helper(TestFPCmpHelper_t helper, uintptr_t inputs, unsigned inputs_length, uintptr_t results, unsigned reg_size, bool* skipped) TestCmp_Helper() argument
844 TestCmpZero_Helper(TestFPCmpZeroHelper_t helper, uintptr_t inputs, unsigned inputs_length, uintptr_t results, unsigned reg_size, bool* skipped) TestCmpZero_Helper() argument
[all...]
H A Dtest-utils-aarch64.h480 // r array will be populated with <reg_size>-sized registers,
492 int reg_size,
500 int reg_size,
H A Dtest-utils-aarch64.cc492 int reg_size, in PopulateRegisterArray()
501 r[i] = Register(n, reg_size); in PopulateRegisterArray()
523 int reg_size, in PopulateVRegisterArray()
532 v[i] = VRegister(n, reg_size); in PopulateVRegisterArray()
489 PopulateRegisterArray(Register* w, Register* x, Register* r, int reg_size, int reg_count, RegList allowed) PopulateRegisterArray() argument
520 PopulateVRegisterArray(VRegister* s, VRegister* d, VRegister* v, int reg_size, int reg_count, RegList allowed) PopulateVRegisterArray() argument
/third_party/node/deps/v8/src/diagnostics/arm64/
H A Ddisasm-arm64.h70 bool IsMovzMovnImm(unsigned reg_size, uint64_t value);
/third_party/mesa3d/src/intel/perf/
H A Dintel_perf.h406 void (*store_register_mem)(void *ctx, void *bo, uint32_t reg, uint32_t reg_size, uint32_t offset);

Completed in 52 milliseconds

12