| /third_party/musl/src/thread/arm/ |
| H A D | atomics.s | 28 mcr p15,0,r0,c7,c10,5
55 mcr p15,0,r0,c7,c10,5
61 mcr p15,0,r0,c7,c10,5
83 mrc p15,0,r0,c13,c0,3
|
| /third_party/node/deps/openssl/openssl/crypto/poly1305/asm/ |
| H A D | poly1305-ia64.S | 155 cmp.eq p15,p0=7,r29
164 .pred.rel "mutex",p8,p9,p10,p11,p12,p13,p14,p15
170 (p15) shrp i0=r15,r14,56 }
171 { .mii; (p15) shrp i1=r16,r15,56
187 .pred.rel "mutex",p8,p9,p10,p11,p12,p13,p14,p15
207 (p15) shrp i0=r15,r14,56 }
210 (p15) shrp i1=r16,r15,56 }
|
| /third_party/openssl/crypto/poly1305/asm/ |
| H A D | poly1305-ia64.S | 155 cmp.eq p15,p0=7,r29
164 .pred.rel "mutex",p8,p9,p10,p11,p12,p13,p14,p15
170 (p15) shrp i0=r15,r14,56 }
171 { .mii; (p15) shrp i1=r16,r15,56
187 .pred.rel "mutex",p8,p9,p10,p11,p12,p13,p14,p15
207 (p15) shrp i0=r15,r14,56 }
210 (p15) shrp i1=r16,r15,56 }
|
| /third_party/musl/src/ldso/arm/ |
| H A D | tlsdesc.S | 22 mrc p15,0,r0,c13,c0,3
|
| /third_party/node/deps/openssl/config/archs/linux-armv4/asm_avx2/crypto/ |
| H A D | armv4cpuid.S | 135 mrrc p15,0,r0,r1,c14 @ CNTPCT
137 mrrc p15,1,r0,r1,c14 @ CNTVCT
|
| /third_party/node/deps/openssl/config/archs/linux-armv4/asm/crypto/ |
| H A D | armv4cpuid.S | 135 mrrc p15,0,r0,r1,c14 @ CNTPCT
137 mrrc p15,1,r0,r1,c14 @ CNTVCT
|
| /third_party/node/deps/openssl/openssl/crypto/ |
| H A D | armv4cpuid.pl | 159 mrrc p15,0,r0,r1,c14 @ CNTPCT
161 mrrc p15,1,r0,r1,c14 @ CNTVCT
|
| /third_party/openssl/crypto/ |
| H A D | armv4cpuid.pl | 159 mrrc p15,0,r0,r1,c14 @ CNTPCT
161 mrrc p15,1,r0,r1,c14 @ CNTVCT
|
| /third_party/vixl/test/aarch64/ |
| H A D | test-disasm-sve-aarch64.cc | 1306 COMPARE(fcmgt(p15.VnH(), p5.Zeroing(), z26.VnH(), z5.VnH()), in TEST()
1307 "fcmgt p15.h, p5/z, z26.h, z5.h"); in TEST()
1308 COMPARE(fcmgt(p15.VnS(), p5.Zeroing(), z26.VnS(), z5.VnS()), in TEST()
1309 "fcmgt p15.s, p5/z, z26.s, z5.s"); in TEST()
1310 COMPARE(fcmgt(p15.VnD(), p5.Zeroing(), z26.VnD(), z5.VnD()), in TEST()
1311 "fcmgt p15.d, p5/z, z26.d, z5.d"); in TEST()
1381 COMPARE(fcmlt(p15.VnH(), p7.Zeroing(), z9.VnH(), 0), in TEST()
1382 "fcmlt p15.h, p7/z, z9.h, #0.0"); in TEST()
1383 COMPARE(fcmlt(p15.VnS(), p7.Zeroing(), z9.VnS(), 0), in TEST()
1384 "fcmlt p15 in TEST()
[all...] |
| H A D | test-api-aarch64.cc | 376 CPURegisterByValueHelper(p15.Merging()); in TEST()
578 VIXL_CHECK(p15.GetCode() == 15); in TEST()
1208 temps.Include(p7, p8, p15); in TEST()
1211 VIXL_CHECK(temps.IsAvailable(p15)); in TEST()
1219 VIXL_CHECK(temps.IsAvailable(p15)); in TEST()
1221 // AcquireP() prefers p8-p15, ... in TEST()
1224 // ... but will return p0-p7 if none of p8-p15 are available. in TEST()
1647 temps.Include(CPURegList(p15)); in TEST()
1679 temps.Exclude(CPURegList(p15)); in TEST()
|
| H A D | test-assembler-sve-aarch64.cc | 1186 __ Cmplt(p15.VnS(), p3.Zeroing(), z17.VnS(), z16.VnS()); // GT
1218 ASSERT_EQUAL_SVE(p10_expected, p15.VnS());
1537 __ Ptrue(p15.VnB());
1540 __ Decp(x20, p15.VnB());
1543 __ Incp(x21, p15.VnH());
1627 __ Ptrue(p15.VnB());
1630 __ Sqdecp(x21, p15.VnB());
1633 __ Sqincp(x22, p15.VnH());
1636 __ Sqdecp(x23, p15.VnS(), w23);
1639 __ Sqincp(x24, p15
[all...] |
| H A D | test-api-movprfx-aarch64.cc | 2491 __ match(p15.VnB(), p1.Zeroing(), z18.VnB(), z5.VnB()); in TEST()
|
| H A D | test-trace-aarch64.cc | 2763 __ str(p15.VnB(), SVEMemOperand(x0, 11, SVE_MUL_VL)); in GenerateTestSequenceSVE()
|
| /third_party/libunwind/libunwind/tests/ |
| H A D | ia64-test-nat-asm.S | 44 tbit.nz p15, p0 = reg, 0;; \
45 (p15) ld8.s reg = [r0]
|
| /third_party/typescript/tests/baselines/reference/ |
| H A D | promiseType.js | 94 const p15 = p.catch(() => null);
333 const p15 = p.catch(() => null);
|
| H A D | promiseTypeStrictNull.js | 94 const p15 = p.catch(() => null);
328 const p15 = p.catch(() => null);
|
| /third_party/node/deps/openssl/openssl/crypto/bn/asm/ |
| H A D | ia64-mont.pl | 449 cmp4.le p14,p15=8,in5 }
484 (p15)fcvt.fxu ai7=f0
490 (p15)fcvt.fxu bj[0]=f0
496 (p15)fcvt.fxu ni7=f0
840 (p15)br.cond.dpnt.few .Ldone };;
|
| H A D | ia64.S | 1534 pred=p15
|
| /third_party/openssl/crypto/bn/asm/ |
| H A D | ia64-mont.pl | 449 cmp4.le p14,p15=8,in5 }
484 (p15)fcvt.fxu ai7=f0
490 (p15)fcvt.fxu bj[0]=f0
496 (p15)fcvt.fxu ni7=f0
840 (p15)br.cond.dpnt.few .Ldone };;
|
| H A D | ia64.S | 1534 pred=p15
|
| /third_party/node/deps/openssl/openssl/crypto/sha/asm/ |
| H A D | sha512-ia64.pl | 189 cmp.eq p15,p0=7,r8 };;
236 (p15) br.cond.dpnt.many .L7byte };;
|
| /third_party/openssl/crypto/sha/asm/ |
| H A D | sha512-ia64.pl | 189 cmp.eq p15,p0=7,r8 };;
236 (p15) br.cond.dpnt.many .L7byte };;
|
| /third_party/node/deps/v8/src/codegen/arm/ |
| H A D | assembler-arm.h | 78 p15 = 15 enumerator
|
| H A D | assembler-arm.cc | 2328 mcr(p15, 0, r0, cr7, cr10, 5); in dmb()
2339 mcr(p15, 0, r0, cr7, cr10, 4); in dsb()
2350 mcr(p15, 0, r0, cr7, cr5, 4); in isb()
|
| /third_party/vixl/src/aarch32/ |
| H A D | instructions-aarch32.h | 965 enum CoprocessorName { p10 = 10, p11 = 11, p14 = 14, p15 = 15 };
|